From 30754ef77c3e88acb5a378d4e2c2bcce6228a118 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?= Date: Tue, 17 Apr 2018 17:29:31 +0200 Subject: imx6ul: opos6ul: add SPL_DM support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since commit commit 152038ea1886 ("i.MX6UL: icore: Add SPL_OF_CONTROL support") the OPOS6UL board doesn't boot anymore. Adding SPL_DM support makes the board boot again. Fixes: commit 152038ea1886 ("i.MX6UL: icore: Add SPL_OF_CONTROL support") Signed-off-by: Sébastien Szymanski --- arch/arm/mach-imx/mx6/Kconfig | 4 ++++ arch/arm/mach-imx/mx6/opos6ul.c | 50 +++++------------------------------------ 2 files changed, 10 insertions(+), 44 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index aa6f5facbf..98ea1f566c 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -73,6 +73,10 @@ config MX6UL_OPOS6UL select DM_MMC select DM_THERMAL select SUPPORT_SPL + select SPL_DM if SPL + select SPL_OF_CONTROL if SPL + select SPL_SEPARATE_BSS if SPL + select SPL_PINCTRL if SPL config MX6ULL select SYS_L2CACHE_OFF diff --git a/arch/arm/mach-imx/mx6/opos6ul.c b/arch/arm/mach-imx/mx6/opos6ul.c index 2de1321b56..ef70a7d323 100644 --- a/arch/arm/mach-imx/mx6/opos6ul.c +++ b/arch/arm/mach-imx/mx6/opos6ul.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2017 Armadeus Systems + * Copyright (C) 2018 Armadeus Systems * * SPDX-License-Identifier: GPL-2.0+ */ @@ -9,15 +9,12 @@ #include #include #include -#include #include #include #include #include #include #include -#include -#include DECLARE_GLOBAL_DATA_PTR; @@ -138,12 +135,6 @@ int board_late_init(void) return opos6ul_board_late_init(); } -int board_mmc_getcd(struct mmc *mmc) -{ - struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - return cfg->esdhc_base == USDHC1_BASE_ADDR; -} - int dram_init(void) { gd->ram_size = imx_ddr_size(); @@ -153,32 +144,9 @@ int dram_init(void) #ifdef CONFIG_SPL_BUILD #include -#include #include #include -#define USDHC_PAD_CTRL ( \ - PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_MED | \ - PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST \ -) - -struct fsl_esdhc_cfg usdhc_cfg[1] = { - {USDHC1_BASE_ADDR, 0, 8}, -}; - -static iomux_v3_cfg_t const usdhc1_pads[] = { - MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_READY_B__USDHC1_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_CE0_B__USDHC1_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_CE1_B__USDHC1_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), - MX6_PAD_NAND_CLE__USDHC1_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), -}; - static struct mx6ul_iomux_grp_regs mx6_grp_ioregs = { .grp_addds = 0x00000030, .grp_ddrmode_ctl = 0x00020000, @@ -240,13 +208,6 @@ static struct mx6_ddr3_cfg mem_ddr = { .trasmin = 3750, }; -int board_mmc_init(bd_t *bis) -{ - imx_iomux_v3_setup_multiple_pads(usdhc1_pads, ARRAY_SIZE(usdhc1_pads)); - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); - return fsl_esdhc_initialize(bis, &usdhc_cfg[0]); -} - static void ccgr_init(void) { struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; @@ -282,6 +243,11 @@ static void spl_dram_init(void) mx6_dram_cfg(&ddr_sysinfo, &mx6_mmcd_calib, &mem_ddr); } +void spl_board_init(void) +{ + preloader_console_init(); +} + void board_init_f(ulong dummy) { ccgr_init(); @@ -292,10 +258,6 @@ void board_init_f(ulong dummy) /* setup GP timer */ timer_init(); - /* UART clocks enabled and gd valid - init serial console */ - opos6ul_setup_uart_debug(); - preloader_console_init(); - /* DDR initialization */ spl_dram_init(); } -- cgit v1.2.1 From ea772178281fa7442e221ac26c291366090c888f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?S=C3=A9bastien=20Szymanski?= Date: Tue, 17 Apr 2018 17:29:32 +0200 Subject: imx6ul: opos6ul: in Serial Downloader boot mode use ymodem MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When booting in Serial Downloader mode load the U-Boot image using ymodem. Signed-off-by: Sébastien Szymanski --- arch/arm/mach-imx/mx6/opos6ul.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/mx6/opos6ul.c b/arch/arm/mach-imx/mx6/opos6ul.c index ef70a7d323..5d39c0bc1b 100644 --- a/arch/arm/mach-imx/mx6/opos6ul.c +++ b/arch/arm/mach-imx/mx6/opos6ul.c @@ -208,6 +208,16 @@ static struct mx6_ddr3_cfg mem_ddr = { .trasmin = 3750, }; +void board_boot_order(u32 *spl_boot_list) +{ + unsigned int bmode = readl(&src_base->sbmr2); + + if (((bmode >> 24) & 0x03) == 0x01) /* Serial Downloader */ + spl_boot_list[0] = BOOT_DEVICE_UART; + else + spl_boot_list[0] = spl_boot_device(); +} + static void ccgr_init(void) { struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; -- cgit v1.2.1