From 7abf9c16aa5f153903914620dc3062fa3bddef65 Mon Sep 17 00:00:00 2001 From: Chuanhua Han Date: Wed, 10 Jul 2019 21:00:21 +0800 Subject: configs: lx2160: enable DM support for pcf2127 rtc Enable related configs on all lx2160ardb boards to support pcf2127 rtc DM feature. Also remove SYS_I2C_MXC_I2Cx, where x is from 1 to 8 from Kconfig. Signed-off-by: Chuanhua Han Signed-off-by: Biwen Li Reviewed-by: Prabhakar Kushwaha --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 8 -------- 1 file changed, 8 deletions(-) (limited to 'arch/arm/cpu/armv8') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 5c32738fbf..860eabed1d 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -235,14 +235,6 @@ config ARCH_LX2160A select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC - select SYS_I2C_MXC_I2C1 - select SYS_I2C_MXC_I2C2 - select SYS_I2C_MXC_I2C3 - select SYS_I2C_MXC_I2C4 - select SYS_I2C_MXC_I2C5 - select SYS_I2C_MXC_I2C6 - select SYS_I2C_MXC_I2C7 - select SYS_I2C_MXC_I2C8 imply DISTRO_DEFAULTS imply PANIC_HANG imply SCSI -- cgit v1.2.1 From 21d5e964da48bbd3ad5f6ecaa69d7e2d3c392525 Mon Sep 17 00:00:00 2001 From: Chuanhua Han Date: Wed, 10 Jul 2019 15:48:38 +0800 Subject: configs: ls1028a: Enable DM support for pcf2127 rtc Enable related configs on all ls1028aqds boards to support pcf2127 rtc DM function. Signed-off-by: Chuanhua Han Reviewed-by: Alex Marginean Tested-by: Alex Marginean Reviewed-by: Prabhakar Kushwaha --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 8 -------- 1 file changed, 8 deletions(-) (limited to 'arch/arm/cpu/armv8') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 860eabed1d..489e9b0db1 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -40,14 +40,6 @@ config ARCH_LS1028A select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC - select SYS_I2C_MXC_I2C1 - select SYS_I2C_MXC_I2C2 - select SYS_I2C_MXC_I2C3 - select SYS_I2C_MXC_I2C4 - select SYS_I2C_MXC_I2C5 - select SYS_I2C_MXC_I2C6 - select SYS_I2C_MXC_I2C7 - select SYS_I2C_MXC_I2C8 select SYS_FSL_ERRATUM_A008997 select SYS_FSL_ERRATUM_A009007 select SYS_FSL_ERRATUM_A008514 if !TFABOOT -- cgit v1.2.1 From 292370df1ca11ed6fa63023ae7ca50a9dfb2e875 Mon Sep 17 00:00:00 2001 From: Chuanhua Han Date: Fri, 26 Jul 2019 19:24:03 +0800 Subject: configs: ls2088a: Enable DM support for ds3231 rtc Enable related configs on all ls2088aqds boards to support ds3231 rtc DM function. Signed-off-by: Chuanhua Han Reviewed-by: Prabhakar Kushwaha --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/cpu/armv8') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 489e9b0db1..a8dc90513c 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -197,10 +197,10 @@ config ARCH_LS2080A select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC - select SYS_I2C_MXC_I2C1 - select SYS_I2C_MXC_I2C2 - select SYS_I2C_MXC_I2C3 - select SYS_I2C_MXC_I2C4 + select SYS_I2C_MXC_I2C1 if !TFABOOT + select SYS_I2C_MXC_I2C2 if !TFABOOT + select SYS_I2C_MXC_I2C3 if !TFABOOT + select SYS_I2C_MXC_I2C4 if !TFABOOT imply DISTRO_DEFAULTS imply PANIC_HANG -- cgit v1.2.1 From 67d3a815cb89ca349be5a0c9b02c4118a9a3a20e Mon Sep 17 00:00:00 2001 From: Chuanhua Han Date: Fri, 26 Jul 2019 20:25:37 +0800 Subject: configs: ls1088a: Enable DM support for pcf2127 rtc Enable related configs on all ls1088aqds boards to support pcf2127 rtc DM function. Signed-off-by: Chuanhua Han Reviewed-by: Prabhakar Kushwaha --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm/cpu/armv8') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index a8dc90513c..9566dc5108 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -147,10 +147,10 @@ config ARCH_LS1088A select ARCH_EARLY_INIT_R select BOARD_EARLY_INIT_F select SYS_I2C_MXC - select SYS_I2C_MXC_I2C1 - select SYS_I2C_MXC_I2C2 - select SYS_I2C_MXC_I2C3 - select SYS_I2C_MXC_I2C4 + select SYS_I2C_MXC_I2C1 if !TFABOOT + select SYS_I2C_MXC_I2C2 if !TFABOOT + select SYS_I2C_MXC_I2C3 if !TFABOOT + select SYS_I2C_MXC_I2C4 if !TFABOOT imply SCSI imply PANIC_HANG -- cgit v1.2.1 From 71a2da3fa94a546ce6c36ed48d4c3dc80183af37 Mon Sep 17 00:00:00 2001 From: Chuanhua Han Date: Fri, 2 Aug 2019 16:53:53 +0800 Subject: armv8: kconfig: Fix some platforms incorrect I2C clock divider By default, i2c input clock is platform clk / 2, but some of the platform of i2c clock divider does not meet this kind of circumstance, so alone to set default values for these platforms. Signed-off-by: Chuanhua Han Reviewed-by: Prabhakar Kushwaha --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/cpu/armv8') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 9566dc5108..42d31fdab0 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -497,6 +497,10 @@ config SYS_FSL_DUART_CLK_DIV config SYS_FSL_I2C_CLK_DIV int "I2C clock divider" default 1 if ARCH_LS1043A + default 4 if ARCH_LS1012A + default 4 if ARCH_LS1028A + default 8 if ARCH_LX2160A + default 8 if ARCH_LS1088A default 2 help This is the divider that is used to derive I2C clock from Platform -- cgit v1.2.1 From aef654a2ed386d8bd53053383f6bf15ba016a79c Mon Sep 17 00:00:00 2001 From: Laurentiu Tudor Date: Tue, 30 Jul 2019 17:29:57 +0300 Subject: armv8: fsl-layerscape: make icid setup endianness aware MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The current implementation assumes that the registers holding the ICIDs are universally big endian. That's no longer the case on newer platforms so update the code to take into account the endianness of each register. Signed-off-by: Laurentiu Tudor Reviewed-by: Horia Geantă Reviewed-by: Prabhakar Kushwaha --- arch/arm/cpu/armv8/fsl-layerscape/icid.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm/cpu/armv8') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/icid.c b/arch/arm/cpu/armv8/fsl-layerscape/icid.c index b1a950e7f9..82c5a8b123 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/icid.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/icid.c @@ -17,7 +17,10 @@ static void set_icid(struct icid_id_table *tbl, int size) int i; for (i = 0; i < size; i++) - out_be32((u32 *)(tbl[i].reg_addr), tbl[i].reg); + if (tbl[i].le) + out_le32((u32 *)(tbl[i].reg_addr), tbl[i].reg); + else + out_be32((u32 *)(tbl[i].reg_addr), tbl[i].reg); } #ifdef CONFIG_SYS_DPAA_FMAN -- cgit v1.2.1 From 5c6dc6c9a9a5f253f3928a97ca020712177884e7 Mon Sep 17 00:00:00 2001 From: Laurentiu Tudor Date: Tue, 30 Jul 2019 17:29:58 +0300 Subject: armv8: ls1088a: add icid setup for platform devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add ICID setup for the platform devices contained on this chip: usb, sata, sdhc, sec. The ICID macros for SEC needed to be adapted because the format of the registers is different. Signed-off-by: Laurentiu Tudor Reviewed-by: Horia Geantă Reviewed-by: Prabhakar Kushwaha --- arch/arm/cpu/armv8/fsl-layerscape/Makefile | 1 + arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c | 30 ++++++++++++++++++++++++++ arch/arm/cpu/armv8/fsl-layerscape/soc.c | 4 ++++ 3 files changed, 35 insertions(+) create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c (limited to 'arch/arm/cpu/armv8') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile index a8d3cf91fc..aa88b93175 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile +++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile @@ -47,6 +47,7 @@ endif ifneq ($(CONFIG_ARCH_LS1088A),) obj-$(CONFIG_SYS_HAS_SERDES) += ls1088a_serdes.o +obj-y += icid.o ls1088_ids.o endif ifneq ($(CONFIG_ARCH_LS1028A),) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c new file mode 100644 index 0000000000..956d6e78c8 --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c @@ -0,0 +1,30 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +#include +#include +#include +#include + +struct icid_id_table icid_tbl[] = { + SET_SDHC_ICID(FSL_SDMMC_STREAM_ID), + SET_USB_ICID(1, "snps,dwc3", FSL_USB1_STREAM_ID), + SET_USB_ICID(2, "snps,dwc3", FSL_USB2_STREAM_ID), + SET_SATA_ICID(1, "fsl,ls1088a-ahci", FSL_SATA1_STREAM_ID), + SET_SEC_JR_ICID_ENTRY(0, FSL_SEC_JR1_STREAM_ID), + SET_SEC_JR_ICID_ENTRY(1, FSL_SEC_JR2_STREAM_ID), + SET_SEC_JR_ICID_ENTRY(2, FSL_SEC_JR3_STREAM_ID), + SET_SEC_JR_ICID_ENTRY(3, FSL_SEC_JR4_STREAM_ID), + SET_SEC_RTIC_ICID_ENTRY(0, FSL_SEC_STREAM_ID), + SET_SEC_RTIC_ICID_ENTRY(1, FSL_SEC_STREAM_ID), + SET_SEC_RTIC_ICID_ENTRY(2, FSL_SEC_STREAM_ID), + SET_SEC_RTIC_ICID_ENTRY(3, FSL_SEC_STREAM_ID), + SET_SEC_DECO_ICID_ENTRY(0, FSL_SEC_STREAM_ID), + SET_SEC_DECO_ICID_ENTRY(1, FSL_SEC_STREAM_ID), + SET_SEC_DECO_ICID_ENTRY(2, FSL_SEC_STREAM_ID), + SET_SEC_DECO_ICID_ENTRY(3, FSL_SEC_STREAM_ID), +}; + +int icid_tbl_sz = ARRAY_SIZE(icid_tbl); diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index ca8005992a..72e546fad6 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -340,6 +340,10 @@ void fsl_lsch3_early_init_f(void) if (fsl_check_boot_mode_secure() == 1) bypass_smmu(); #endif + +#ifdef CONFIG_ARCH_LS1088A + set_icids(); +#endif } /* Get VDD in the unit mV from voltage ID */ -- cgit v1.2.1 From b249fcba00e093149f8424492da155572f12d7bb Mon Sep 17 00:00:00 2001 From: Laurentiu Tudor Date: Tue, 30 Jul 2019 17:29:59 +0300 Subject: armv8: ls1028a: add icid setup for platform devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add ICID setup for the platform devices contained on this chip: usb, sata, sdhc, edma, qdma, gpu, display and sec. Signed-off-by: Laurentiu Tudor Reviewed-by: Horia Geantă Reviewed-by: Prabhakar Kushwaha --- arch/arm/cpu/armv8/fsl-layerscape/Makefile | 1 + arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c | 33 ++++++++++++++++++++++++++ arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c | 2 +- arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +- 4 files changed, 36 insertions(+), 2 deletions(-) create mode 100644 arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c (limited to 'arch/arm/cpu/armv8') diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile index aa88b93175..efecbc07e7 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile +++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile @@ -52,4 +52,5 @@ endif ifneq ($(CONFIG_ARCH_LS1028A),) obj-$(CONFIG_SYS_HAS_SERDES) += ls1028a_serdes.o +obj-y += icid.o ls1028_ids.o endif diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c new file mode 100644 index 0000000000..d9d125e8ba --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +#include +#include +#include +#include + +struct icid_id_table icid_tbl[] = { + SET_USB_ICID(1, "snps,dwc3", FSL_USB1_STREAM_ID), + SET_USB_ICID(2, "snps,dwc3", FSL_USB2_STREAM_ID), + SET_SDHC_ICID(1, FSL_SDMMC_STREAM_ID), + SET_SDHC_ICID(2, FSL_SDMMC2_STREAM_ID), + SET_SATA_ICID(1, "fsl,ls1028a-ahci", FSL_SATA1_STREAM_ID), + SET_EDMA_ICID(FSL_EDMA_STREAM_ID), + SET_QDMA_ICID("fsl,ls1028a-qdma", FSL_DMA_STREAM_ID), + SET_GPU_ICID("fsl,ls1028a-gpu", FSL_GPU_STREAM_ID), + SET_DISPLAY_ICID(FSL_DISPLAY_STREAM_ID), + SET_SEC_JR_ICID_ENTRY(0, FSL_SEC_JR1_STREAM_ID), + SET_SEC_JR_ICID_ENTRY(1, FSL_SEC_JR2_STREAM_ID), + SET_SEC_JR_ICID_ENTRY(2, FSL_SEC_JR3_STREAM_ID), + SET_SEC_JR_ICID_ENTRY(3, FSL_SEC_JR4_STREAM_ID), + SET_SEC_RTIC_ICID_ENTRY(0, FSL_SEC_STREAM_ID), + SET_SEC_RTIC_ICID_ENTRY(1, FSL_SEC_STREAM_ID), + SET_SEC_RTIC_ICID_ENTRY(2, FSL_SEC_STREAM_ID), + SET_SEC_RTIC_ICID_ENTRY(3, FSL_SEC_STREAM_ID), + SET_SEC_DECO_ICID_ENTRY(0, FSL_SEC_STREAM_ID), + SET_SEC_DECO_ICID_ENTRY(1, FSL_SEC_STREAM_ID), +}; + +int icid_tbl_sz = ARRAY_SIZE(icid_tbl); diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c index 956d6e78c8..49e27553b1 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1088_ids.c @@ -9,7 +9,7 @@ #include struct icid_id_table icid_tbl[] = { - SET_SDHC_ICID(FSL_SDMMC_STREAM_ID), + SET_SDHC_ICID(1, FSL_SDMMC_STREAM_ID), SET_USB_ICID(1, "snps,dwc3", FSL_USB1_STREAM_ID), SET_USB_ICID(2, "snps,dwc3", FSL_USB2_STREAM_ID), SET_SATA_ICID(1, "fsl,ls1088a-ahci", FSL_SATA1_STREAM_ID), diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 72e546fad6..3fd34e3a43 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -341,7 +341,7 @@ void fsl_lsch3_early_init_f(void) bypass_smmu(); #endif -#ifdef CONFIG_ARCH_LS1088A +#if defined(CONFIG_ARCH_LS1088A) || defined(CONFIG_ARCH_LS1028A) set_icids(); #endif } -- cgit v1.2.1