From ff4e87c030bd62d643b0cbd86e7ff893caa97d1b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Sun, 31 Jul 2022 21:08:29 -0400 Subject: Convert CONFIG_SYS_FSL_QMAN_V3 et al to Kconfig This converts the following to Kconfig: CONFIG_FSL_NGPIXIS CONFIG_SYS_FSL_QMAN_V3 CONFIG_SYS_FSL_RAID_ENGINE CONFIG_SYS_FSL_RMU CONFIG_SYS_FSL_SINGLE_SOURCE_CLK CONFIG_SYS_FSL_SRIO_LIODN CONFIG_SYS_FSL_TBCLK_DIV CONFIG_SYS_FSL_USB1_PHY_ENABLE CONFIG_SYS_FSL_USB2_PHY_ENABLE CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY Signed-off-by: Tom Rini --- README | 6 ------ 1 file changed, 6 deletions(-) (limited to 'README') diff --git a/README b/README index 4ef9e8c3ac..a6c306149c 100644 --- a/README +++ b/README @@ -294,12 +294,6 @@ The following options need to be configured: the "64" category of the Power ISA). This is necessary for ePAPR compliance, among other possible reasons. - CONFIG_SYS_FSL_TBCLK_DIV - - Defines the core time base clock divider ratio compared to the - system clock. On most PQ3 devices this is 8, on newer QorIQ - devices it can be 16 or 32. The ratio varies from SoC to Soc. - CONFIG_SYS_FSL_ERRATUM_A004510 Enables a workaround for erratum A004510. If set, -- cgit v1.2.1