From 52aaddd6f415397bb2eae0d68a8cc1c5c4a98bb3 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Tue, 21 Nov 2017 00:02:16 +0530 Subject: i.MX6: engicam: Add imx6q/imx6ul boards for existing boards Add new board names for existing board support imx6q - icore and icore_rqs boards imx6ul - geam6ul and isiot boards Signed-off-by: Jagan Teki --- arch/arm/mach-imx/mx6/Kconfig | 50 ++------- board/engicam/common/board.c | 2 +- board/engicam/common/spl.c | 26 +++++ board/engicam/geam6ul/Kconfig | 12 --- board/engicam/geam6ul/MAINTAINERS | 8 -- board/engicam/geam6ul/Makefile | 6 -- board/engicam/geam6ul/README | 28 ----- board/engicam/geam6ul/geam6ul.c | 90 ---------------- board/engicam/icorem6/Kconfig | 12 --- board/engicam/icorem6/MAINTAINERS | 10 -- board/engicam/icorem6/Makefile | 6 -- board/engicam/icorem6/README | 30 ------ board/engicam/icorem6/icorem6.c | 192 --------------------------------- board/engicam/icorem6_rqs/Kconfig | 12 --- board/engicam/icorem6_rqs/MAINTAINERS | 9 -- board/engicam/icorem6_rqs/Makefile | 6 -- board/engicam/icorem6_rqs/README | 30 ------ board/engicam/imx6q/Kconfig | 12 +++ board/engicam/imx6q/MAINTAINERS | 14 +++ board/engicam/imx6q/Makefile | 6 ++ board/engicam/imx6q/README | 33 ++++++ board/engicam/imx6q/imx6q.c | 198 ++++++++++++++++++++++++++++++++++ board/engicam/imx6ul/Kconfig | 12 +++ board/engicam/imx6ul/MAINTAINERS | 15 +++ board/engicam/imx6ul/Makefile | 6 ++ board/engicam/imx6ul/README | 33 ++++++ board/engicam/imx6ul/imx6ul.c | 99 +++++++++++++++++ board/engicam/isiotmx6ul/Kconfig | 12 --- board/engicam/isiotmx6ul/MAINTAINERS | 12 --- board/engicam/isiotmx6ul/Makefile | 6 -- board/engicam/isiotmx6ul/README | 28 ----- board/engicam/isiotmx6ul/isiotmx6ul.c | 129 ---------------------- configs/imx6qdl_icore_mmc_defconfig | 2 +- configs/imx6qdl_icore_nand_defconfig | 2 +- configs/imx6qdl_icore_rqs_defconfig | 2 +- configs/imx6ul_geam_mmc_defconfig | 2 +- configs/imx6ul_geam_nand_defconfig | 2 +- configs/imx6ul_isiot_emmc_defconfig | 2 +- configs/imx6ul_isiot_mmc_defconfig | 2 +- configs/imx6ul_isiot_nand_defconfig | 2 +- 40 files changed, 469 insertions(+), 691 deletions(-) delete mode 100644 board/engicam/geam6ul/Kconfig delete mode 100644 board/engicam/geam6ul/MAINTAINERS delete mode 100644 board/engicam/geam6ul/Makefile delete mode 100644 board/engicam/geam6ul/README delete mode 100644 board/engicam/geam6ul/geam6ul.c delete mode 100644 board/engicam/icorem6/Kconfig delete mode 100644 board/engicam/icorem6/MAINTAINERS delete mode 100644 board/engicam/icorem6/Makefile delete mode 100644 board/engicam/icorem6/README delete mode 100644 board/engicam/icorem6/icorem6.c delete mode 100644 board/engicam/icorem6_rqs/Kconfig delete mode 100644 board/engicam/icorem6_rqs/MAINTAINERS delete mode 100644 board/engicam/icorem6_rqs/Makefile delete mode 100644 board/engicam/icorem6_rqs/README create mode 100644 board/engicam/imx6q/Kconfig create mode 100644 board/engicam/imx6q/MAINTAINERS create mode 100644 board/engicam/imx6q/Makefile create mode 100644 board/engicam/imx6q/README create mode 100644 board/engicam/imx6q/imx6q.c create mode 100644 board/engicam/imx6ul/Kconfig create mode 100644 board/engicam/imx6ul/MAINTAINERS create mode 100644 board/engicam/imx6ul/Makefile create mode 100644 board/engicam/imx6ul/README create mode 100644 board/engicam/imx6ul/imx6ul.c delete mode 100644 board/engicam/isiotmx6ul/Kconfig delete mode 100644 board/engicam/isiotmx6ul/MAINTAINERS delete mode 100644 board/engicam/isiotmx6ul/Makefile delete mode 100644 board/engicam/isiotmx6ul/README delete mode 100644 board/engicam/isiotmx6ul/isiotmx6ul.c diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 412e48e12a..bee7eabe02 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -205,27 +205,8 @@ config TARGET_MX6LOGICPD config TARGET_MX6QARM2 bool "mx6qarm2" -config TARGET_MX6Q_ICORE - bool "Support Engicam i.Core" - select BOARD_LATE_INIT - select MX6QDL - select OF_CONTROL - select SPL_OF_LIBFDT - select DM - select DM_ETH - select DM_GPIO - select DM_I2C - select DM_MMC - select DM_THERMAL - select SUPPORT_SPL - select SPL_LOAD_FIT - select SPL_DM if SPL - select SPL_OF_CONTROL if SPL - select SPL_SEPARATE_BSS if SPL - select SPL_PINCTRL if SPL - -config TARGET_MX6Q_ICORE_RQS - bool "Support Engicam i.Core RQS" +config TARGET_MX6Q_ENGICAM + bool "Support Engicam i.Core(RQS)" select BOARD_LATE_INIT select MX6QDL select OF_CONTROL @@ -304,25 +285,8 @@ config TARGET_MX6UL_14X14_EVK select DM_THERMAL select SUPPORT_SPL -config TARGET_MX6UL_GEAM - bool "Support Engicam GEAM6UL" - select BOARD_LATE_INIT - select MX6UL - select OF_CONTROL - select DM - select DM_ETH - select DM_GPIO - select DM_I2C - select DM_MMC - select DM_THERMAL - select SUPPORT_SPL - select SPL_DM if SPL - select SPL_OF_CONTROL if SPL - select SPL_SEPARATE_BSS if SPL - select SPL_PINCTRL if SPL - -config TARGET_MX6UL_ISIOT - bool "Support Engicam Is.IoT MX6UL" +config TARGET_MX6UL_ENGICAM + bool "Support Engicam GEAM6UL/Is.IoT" select BOARD_LATE_INIT select MX6UL select OF_CONTROL @@ -474,10 +438,8 @@ source "board/congatec/cgtqmx6eval/Kconfig" source "board/dhelectronics/dh_imx6/Kconfig" source "board/el/el6x/Kconfig" source "board/embest/mx6boards/Kconfig" -source "board/engicam/geam6ul/Kconfig" -source "board/engicam/icorem6/Kconfig" -source "board/engicam/icorem6_rqs/Kconfig" -source "board/engicam/isiotmx6ul/Kconfig" +source "board/engicam/imx6q/Kconfig" +source "board/engicam/imx6ul/Kconfig" source "board/freescale/mx6qarm2/Kconfig" source "board/freescale/mx6sabreauto/Kconfig" source "board/freescale/mx6sabresd/Kconfig" diff --git a/board/engicam/common/board.c b/board/engicam/common/board.c index f86fb2be42..f633c71916 100644 --- a/board/engicam/common/board.c +++ b/board/engicam/common/board.c @@ -49,7 +49,7 @@ static void setenv_fdt_file(void) } else if (!strcmp(cmp_dtb, "imx6ul-geam-kit")) env_set("fdt_file", "imx6ul-geam-kit.dtb"); else if (!strcmp(cmp_dtb, "imx6ul-isiot-mmc")) - env_set("fdt_file", "imx6ul-isiot-mmc.dtb"); + env_set("fdt_file", "imx6ul-isiot-emmc.dtb"); else if (!strcmp(cmp_dtb, "imx6ul-isiot-emmc")) env_set("fdt_file", "imx6ul-isiot-emmc.dtb"); else if (!strcmp(cmp_dtb, "imx6ul-isiot-nand")) diff --git a/board/engicam/common/spl.c b/board/engicam/common/spl.c index f8ae3acb0d..6e2389dd4b 100644 --- a/board/engicam/common/spl.c +++ b/board/engicam/common/spl.c @@ -55,6 +55,32 @@ int board_fit_config_name_match(const char *name) } #endif +#ifdef CONFIG_ENV_IS_IN_MMC +void board_boot_order(u32 *spl_boot_list) +{ + u32 bmode = imx6_src_get_boot_mode(); + u8 boot_dev = BOOT_DEVICE_MMC1; + + switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { + case IMX6_BMODE_SD: + case IMX6_BMODE_ESD: + /* SD/eSD - BOOT_DEVICE_MMC1 */ + break; + case IMX6_BMODE_MMC: + case IMX6_BMODE_EMMC: + /* MMC/eMMC */ + boot_dev = BOOT_DEVICE_MMC2; + break; + default: + /* Default - BOOT_DEVICE_MMC1 */ + printf("Wrong board boot order\n"); + break; + } + + spl_boot_list[0] = boot_dev; +} +#endif + #ifdef CONFIG_SPL_OS_BOOT int spl_start_uboot(void) { diff --git a/board/engicam/geam6ul/Kconfig b/board/engicam/geam6ul/Kconfig deleted file mode 100644 index 7f4023e1ec..0000000000 --- a/board/engicam/geam6ul/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_MX6UL_GEAM - -config SYS_BOARD - default "geam6ul" - -config SYS_VENDOR - default "engicam" - -config SYS_CONFIG_NAME - default "imx6-engicam" - -endif diff --git a/board/engicam/geam6ul/MAINTAINERS b/board/engicam/geam6ul/MAINTAINERS deleted file mode 100644 index 2b882d245a..0000000000 --- a/board/engicam/geam6ul/MAINTAINERS +++ /dev/null @@ -1,8 +0,0 @@ -GEAM6UL BOARD -M: Jagan Teki -S: Maintained -F: board/engicam/geam6ul -F: include/configs/imx6-engicam.h -F: configs/imx6ul_geam_mmc_defconfig -F: configs/imx6ul_geam_nand_defconfig -F: arch/arm/dts/imx6ul-geam-kit.dts diff --git a/board/engicam/geam6ul/Makefile b/board/engicam/geam6ul/Makefile deleted file mode 100644 index 0e367e2172..0000000000 --- a/board/engicam/geam6ul/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# Copyright (C) 2016 Amarula Solutions B.V. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := geam6ul.o diff --git a/board/engicam/geam6ul/README b/board/engicam/geam6ul/README deleted file mode 100644 index 0df6ae4a8c..0000000000 --- a/board/engicam/geam6ul/README +++ /dev/null @@ -1,28 +0,0 @@ -How to use U-Boot on Engicam GEAM6UL Starter Kit: -------------------------------------------------- - -- Configure U-Boot for Engicam GEAM6UL: - -$ make mrproper -$ make imx6ul_geam_mmc_defconfig -$ make - -This will generate the SPL image called SPL and the u-boot-dtb.img. - -- Flash the SPL image into the micro SD card: - -sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync - -- Flash the u-boot-dtb.img image into the micro SD card: - -sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync - -- Jumper settings: - -MMC Boot: JM3 Closed - -- Connect the Serial cable between the Starter Kit and the PC for the console. -(J28 is the Linux Serial console connector) - -- Insert the micro SD card in the board, power it up and U-Boot messages should -come up. diff --git a/board/engicam/geam6ul/geam6ul.c b/board/engicam/geam6ul/geam6ul.c deleted file mode 100644 index 23e7e4b0b9..0000000000 --- a/board/engicam/geam6ul/geam6ul.c +++ /dev/null @@ -1,90 +0,0 @@ -/* - * Copyright (C) 2016 Amarula Solutions B.V. - * Copyright (C) 2016 Engicam S.r.l. - * Author: Jagan Teki - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "../common/board.h" - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_NAND_MXS - -#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) -#define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \ - PAD_CTL_SRE_FAST) -#define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1) - -static iomux_v3_cfg_t const nand_pads[] = { - IOMUX_PADS(PAD_NAND_DATA00__RAWNAND_DATA00 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA01__RAWNAND_DATA01 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA02__RAWNAND_DATA02 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA03__RAWNAND_DATA03 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA04__RAWNAND_DATA04 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA05__RAWNAND_DATA05 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA06__RAWNAND_DATA06 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA07__RAWNAND_DATA07 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_CLE__RAWNAND_CLE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_ALE__RAWNAND_ALE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_CE0_B__RAWNAND_CE0_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_RE_B__RAWNAND_RE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_WE_B__RAWNAND_WE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_WP_B__RAWNAND_WP_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_READY_B__RAWNAND_READY_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), -}; - -void setup_gpmi_nand(void) -{ - struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; - - /* config gpmi nand iomux */ - SETUP_IOMUX_PADS(nand_pads); - - clrbits_le32(&mxc_ccm->CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); - - /* - * config gpmi and bch clock to 100 MHz - * bch/gpmi select PLL2 PFD2 400M - * 100M = 400M / 4 - */ - clrbits_le32(&mxc_ccm->cscmr1, - MXC_CCM_CSCMR1_BCH_CLK_SEL | - MXC_CCM_CSCMR1_GPMI_CLK_SEL); - clrsetbits_le32(&mxc_ccm->cscdr1, - MXC_CCM_CSCDR1_BCH_PODF_MASK | - MXC_CCM_CSCDR1_GPMI_PODF_MASK, - (3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) | - (3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET)); - - /* enable gpmi and bch clock gating */ - setbits_le32(&mxc_ccm->CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); - - /* enable apbh clock gating */ - setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); -} -#endif /* CONFIG_NAND_MXS */ diff --git a/board/engicam/icorem6/Kconfig b/board/engicam/icorem6/Kconfig deleted file mode 100644 index 4a1c9ac436..0000000000 --- a/board/engicam/icorem6/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_MX6Q_ICORE - -config SYS_BOARD - default "icorem6" - -config SYS_VENDOR - default "engicam" - -config SYS_CONFIG_NAME - default "imx6-engicam" - -endif diff --git a/board/engicam/icorem6/MAINTAINERS b/board/engicam/icorem6/MAINTAINERS deleted file mode 100644 index a348bdde9e..0000000000 --- a/board/engicam/icorem6/MAINTAINERS +++ /dev/null @@ -1,10 +0,0 @@ -ICOREM6QDL BOARD -M: Jagan Teki -S: Maintained -F: board/engicam/icorem6 -F: include/configs/imx6-engicam.h -F: configs/imx6qdl_icore_mmc_defconfig -F: configs/imx6qdl_icore_nand_defconfig -F: arch/arm/dts/imx6qdl-icore.dtsi -F: arch/arm/dts/imx6q-icore.dts -F: arch/arm/dts/imx6dl-icore.dts diff --git a/board/engicam/icorem6/Makefile b/board/engicam/icorem6/Makefile deleted file mode 100644 index 9ec9ecdafb..0000000000 --- a/board/engicam/icorem6/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# Copyright (C) 2016 Amarula Solutions B.V. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := icorem6.o diff --git a/board/engicam/icorem6/README b/board/engicam/icorem6/README deleted file mode 100644 index 3779e9665d..0000000000 --- a/board/engicam/icorem6/README +++ /dev/null @@ -1,30 +0,0 @@ -How to use U-Boot on Engicam i.CoreM6 Solo/DualLite and Quad/Dual Starter Kit: ------------------------------------------------------------------------------ - -$ make mrproper - -- Configure U-Boot for Engicam i.CoreM6 Quad/Dual/Solo/DualLite: -$ make imx6qdl_icore_mmc_defconfig - -- Build U-Boot -$ make - -This will generate the SPL image called SPL and the u-boot-dtb.img. - -- Flash the SPL image into the micro SD card: - -sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync - -- Flash the u-boot-dtb.img image into the micro SD card: - -sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync - -- Jumper settings: - -MMC Boot: JM3 Closed - -- Connect the Serial cable between the Starter Kit and the PC for the console. -(J28 is the Linux Serial console connector) - -- Insert the micro SD card in the board, power it up and U-Boot messages should -come up. diff --git a/board/engicam/icorem6/icorem6.c b/board/engicam/icorem6/icorem6.c deleted file mode 100644 index a967ccd0a7..0000000000 --- a/board/engicam/icorem6/icorem6.c +++ /dev/null @@ -1,192 +0,0 @@ -/* - * Copyright (C) 2016 Amarula Solutions B.V. - * Copyright (C) 2016 Engicam S.r.l. - * Author: Jagan Teki - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include "../common/board.h" - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_NAND_MXS - -#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) -#define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \ - PAD_CTL_SRE_FAST) -#define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1) - -iomux_v3_cfg_t gpmi_pads[] = { - IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NANDF_WP_B__NAND_WP_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NANDF_RB0__NAND_READY_B | MUX_PAD_CTRL(GPMI_PAD_CTRL0)), - IOMUX_PADS(PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_SD4_CMD__NAND_RE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_SD4_CLK__NAND_WE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NANDF_D0__NAND_DATA00 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NANDF_D1__NAND_DATA01 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NANDF_D2__NAND_DATA02 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NANDF_D3__NAND_DATA03 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NANDF_D4__NAND_DATA04 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NANDF_D5__NAND_DATA05 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NANDF_D6__NAND_DATA06 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NANDF_D7__NAND_DATA07 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), -}; - -void setup_gpmi_nand(void) -{ - struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; - - /* config gpmi nand iomux */ - SETUP_IOMUX_PADS(gpmi_pads); - - /* gate ENFC_CLK_ROOT clock first,before clk source switch */ - clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); - - /* config gpmi and bch clock to 100 MHz */ - clrsetbits_le32(&mxc_ccm->cs2cdr, - MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK | - MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK | - MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK, - MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) | - MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) | - MXC_CCM_CS2CDR_ENFC_CLK_SEL(3)); - - /* enable ENFC_CLK_ROOT clock */ - setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); - - /* enable gpmi and bch clock gating */ - setbits_le32(&mxc_ccm->CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_OFFSET); - - /* enable apbh clock gating */ - setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); -} -#endif - -#if defined(CONFIG_VIDEO_IPUV3) -static iomux_v3_cfg_t const rgb_pads[] = { - IOMUX_PADS(PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK), - IOMUX_PADS(PAD_DI0_PIN15__IPU1_DI0_PIN15), - IOMUX_PADS(PAD_DI0_PIN2__IPU1_DI0_PIN02), - IOMUX_PADS(PAD_DI0_PIN3__IPU1_DI0_PIN03), - IOMUX_PADS(PAD_DISP0_DAT0__IPU1_DISP0_DATA00), - IOMUX_PADS(PAD_DISP0_DAT1__IPU1_DISP0_DATA01), - IOMUX_PADS(PAD_DISP0_DAT2__IPU1_DISP0_DATA02), - IOMUX_PADS(PAD_DISP0_DAT3__IPU1_DISP0_DATA03), - IOMUX_PADS(PAD_DISP0_DAT4__IPU1_DISP0_DATA04), - IOMUX_PADS(PAD_DISP0_DAT5__IPU1_DISP0_DATA05), - IOMUX_PADS(PAD_DISP0_DAT6__IPU1_DISP0_DATA06), - IOMUX_PADS(PAD_DISP0_DAT7__IPU1_DISP0_DATA07), - IOMUX_PADS(PAD_DISP0_DAT8__IPU1_DISP0_DATA08), - IOMUX_PADS(PAD_DISP0_DAT9__IPU1_DISP0_DATA09), - IOMUX_PADS(PAD_DISP0_DAT10__IPU1_DISP0_DATA10), - IOMUX_PADS(PAD_DISP0_DAT11__IPU1_DISP0_DATA11), - IOMUX_PADS(PAD_DISP0_DAT12__IPU1_DISP0_DATA12), - IOMUX_PADS(PAD_DISP0_DAT13__IPU1_DISP0_DATA13), - IOMUX_PADS(PAD_DISP0_DAT14__IPU1_DISP0_DATA14), - IOMUX_PADS(PAD_DISP0_DAT15__IPU1_DISP0_DATA15), - IOMUX_PADS(PAD_DISP0_DAT16__IPU1_DISP0_DATA16), - IOMUX_PADS(PAD_DISP0_DAT17__IPU1_DISP0_DATA17), -}; - -static void enable_rgb(struct display_info_t const *dev) -{ - SETUP_IOMUX_PADS(rgb_pads); -} - -struct display_info_t const displays[] = { - { - .bus = -1, - .addr = 0, - .pixfmt = IPU_PIX_FMT_RGB666, - .detect = NULL, - .enable = enable_rgb, - .mode = { - .name = "Amp-WD", - .refresh = 60, - .xres = 800, - .yres = 480, - .pixclock = 30000, - .left_margin = 30, - .right_margin = 30, - .upper_margin = 5, - .lower_margin = 5, - .hsync_len = 64, - .vsync_len = 20, - .sync = FB_SYNC_EXT, - .vmode = FB_VMODE_NONINTERLACED - } - }, -}; - -size_t display_count = ARRAY_SIZE(displays); - -void setup_display(void) -{ - struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; - int reg; - - enable_ipu_clock(); - - /* Turn on LDB0,IPU,IPU DI0 clocks */ - reg = __raw_readl(&mxc_ccm->CCGR3); - reg |= (MXC_CCM_CCGR3_LDB_DI0_MASK | 0xffff); - writel(reg, &mxc_ccm->CCGR3); - - /* set LDB0, LDB1 clk select to 011/011 */ - reg = readl(&mxc_ccm->cs2cdr); - reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK | - MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK); - reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) | - (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); - writel(reg, &mxc_ccm->cs2cdr); - - reg = readl(&mxc_ccm->cscmr2); - reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV; - writel(reg, &mxc_ccm->cscmr2); - - reg = readl(&mxc_ccm->chsccdr); - reg |= (CHSCCDR_CLK_SEL_LDB_DI0 << - MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); - writel(reg, &mxc_ccm->chsccdr); - - reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES | - IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH | - IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW | - IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG | - IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT | - IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG | - IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT | - IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED | - IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; - writel(reg, &iomux->gpr[2]); - - reg = readl(&iomux->gpr[3]); - reg = (reg & ~IOMUXC_GPR3_LVDS0_MUX_CTL_MASK) | - (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 << - IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); - writel(reg, &iomux->gpr[3]); -} -#endif /* CONFIG_VIDEO_IPUV3 */ diff --git a/board/engicam/icorem6_rqs/Kconfig b/board/engicam/icorem6_rqs/Kconfig deleted file mode 100644 index 6dc3a076c4..0000000000 --- a/board/engicam/icorem6_rqs/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_MX6Q_ICORE_RQS - -config SYS_BOARD - default "icorem6_rqs" - -config SYS_VENDOR - default "engicam" - -config SYS_CONFIG_NAME - default "imx6-engicam" - -endif diff --git a/board/engicam/icorem6_rqs/MAINTAINERS b/board/engicam/icorem6_rqs/MAINTAINERS deleted file mode 100644 index 9a74265eea..0000000000 --- a/board/engicam/icorem6_rqs/MAINTAINERS +++ /dev/null @@ -1,9 +0,0 @@ -ICOREM6QDL_RQS BOARD -M: Jagan Teki -S: Maintained -F: board/engicam/icorem6_rqs -F: include/configs/imx6-engicam.h -F: configs/imx6qdl_icore_rqs_defconfig -F: arch/arm/dts/imx6qdl-icore-rqs.dtsi -F: arch/arm/dts/imx6q-icore-rqs.dts -F: arch/arm/dts/imx6dl-icore-rqs.dts diff --git a/board/engicam/icorem6_rqs/Makefile b/board/engicam/icorem6_rqs/Makefile deleted file mode 100644 index 2e3933c698..0000000000 --- a/board/engicam/icorem6_rqs/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# Copyright (C) 2016 Amarula Solutions B.V. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := icorem6_rqs.o diff --git a/board/engicam/icorem6_rqs/README b/board/engicam/icorem6_rqs/README deleted file mode 100644 index 97e978cd6f..0000000000 --- a/board/engicam/icorem6_rqs/README +++ /dev/null @@ -1,30 +0,0 @@ -How to use U-Boot on Engicam i.CoreM6 RQS Solo/DualLite and Quad/Dual Starter Kit: ----------------------------------------------------------------------------------- - -$ make mrproper - -- Configure U-Boot for Engicam i.CoreM6 RQS Quad/Dual/Solo/DualLite: -$ make imx6qdl_icore_rqs_defconfig - -- Build U-Boot -$ make - -This will generate the SPL image called SPL and the u-boot-dtb.img. - -- Flash the SPL image into the micro SD card: - -sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync - -- Flash the u-boot-dtb.img image into the micro SD card: - -sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync - -- Jumper settings: - -MMC Boot: JM3 Closed - -- Connect the Serial cable between the Starter Kit and the PC for the console. -(J28 is the Linux Serial console connector) - -- Insert the micro SD card in the board, power it up and U-Boot messages should -come up. diff --git a/board/engicam/imx6q/Kconfig b/board/engicam/imx6q/Kconfig new file mode 100644 index 0000000000..48eb60c09a --- /dev/null +++ b/board/engicam/imx6q/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MX6Q_ENGICAM + +config SYS_BOARD + default "imx6q" + +config SYS_VENDOR + default "engicam" + +config SYS_CONFIG_NAME + default "imx6-engicam" + +endif diff --git a/board/engicam/imx6q/MAINTAINERS b/board/engicam/imx6q/MAINTAINERS new file mode 100644 index 0000000000..82efb462c0 --- /dev/null +++ b/board/engicam/imx6q/MAINTAINERS @@ -0,0 +1,14 @@ +MX6Q_ENGICAM BOARD +M: Jagan Teki +S: Maintained +F: board/engicam/imx6q +F: include/configs/imx6-engicam.h +F: configs/imx6qdl_icore_mmc_defconfig +F: configs/imx6qdl_icore_nand_defconfig +F: configs/imx6qdl_icore_rqs_defconfig +F: arch/arm/dts/imx6qdl-icore.dtsi +F: arch/arm/dts/imx6q-icore.dts +F: arch/arm/dts/imx6dl-icore.dts +F: arch/arm/dts/imx6qdl-icore-rqs.dtsi +F: arch/arm/dts/imx6q-icore-rqs.dts +F: arch/arm/dts/imx6dl-icore-rqs.dts diff --git a/board/engicam/imx6q/Makefile b/board/engicam/imx6q/Makefile new file mode 100644 index 0000000000..ef2fb6acaa --- /dev/null +++ b/board/engicam/imx6q/Makefile @@ -0,0 +1,6 @@ +# Copyright (C) 2016 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := imx6q.o diff --git a/board/engicam/imx6q/README b/board/engicam/imx6q/README new file mode 100644 index 0000000000..3f3478cc89 --- /dev/null +++ b/board/engicam/imx6q/README @@ -0,0 +1,33 @@ +Hsow to use U-Boot on Engicam i.CoreM6 (RQS) Solo/DualLite/Quad/Dual Starter Kit: +-------------------------------------------------------------------------------- + +$ make mrproper + +- Configure U-Boot for Engicam i.CoreM6 Quad/Duali/Solo/DualLite: +$ make imx6qdl_icore_mmc_defconfig + +- Configure U-Boot for Engicam i.CoreM6 RQS Quad/Duali/Solo/DualLite: +$ make imx6qdl_icore_rqs_defconfig + +- Build U-Boot +$ make + +This will generate the SPL image called SPL and the u-boot-dtb.img. + +- Flash the SPL image into the micro SD card: + +sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync + +- Flash the u-boot-dtb.img image into the micro SD card: + +sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync + +- Jumper settings: + +MMC Boot: JM3 Closed + +- Connect the Serial cable between the Starter Kit and the PC for the console. +(J28 is the Linux Serial console connector) + +- Insert the micro SD card in the board, power it up and U-Boot messages should +come up. diff --git a/board/engicam/imx6q/imx6q.c b/board/engicam/imx6q/imx6q.c new file mode 100644 index 0000000000..bb0c866df6 --- /dev/null +++ b/board/engicam/imx6q/imx6q.c @@ -0,0 +1,198 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * Author: Jagan Teki + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#include "../common/board.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_NAND_MXS +#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) +#define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \ + PAD_CTL_SRE_FAST) +#define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1) + +static iomux_v3_cfg_t gpmi_pads[] = { + IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NANDF_WP_B__NAND_WP_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NANDF_RB0__NAND_READY_B | MUX_PAD_CTRL(GPMI_PAD_CTRL0)), + IOMUX_PADS(PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_SD4_CMD__NAND_RE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_SD4_CLK__NAND_WE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NANDF_D0__NAND_DATA00 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NANDF_D1__NAND_DATA01 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NANDF_D2__NAND_DATA02 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NANDF_D3__NAND_DATA03 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NANDF_D4__NAND_DATA04 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NANDF_D5__NAND_DATA05 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NANDF_D6__NAND_DATA06 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NANDF_D7__NAND_DATA07 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), +}; + +void setup_gpmi_nand(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + /* config gpmi nand iomux */ + SETUP_IOMUX_PADS(gpmi_pads); + + /* gate ENFC_CLK_ROOT clock first,before clk source switch */ + clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); + + /* config gpmi and bch clock to 100 MHz */ + clrsetbits_le32(&mxc_ccm->cs2cdr, + MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK | + MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK | + MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK, + MXC_CCM_CS2CDR_ENFC_CLK_PODF(0) | + MXC_CCM_CS2CDR_ENFC_CLK_PRED(3) | + MXC_CCM_CS2CDR_ENFC_CLK_SEL(3)); + + /* enable ENFC_CLK_ROOT clock */ + setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); + + /* enable gpmi and bch clock gating */ + setbits_le32(&mxc_ccm->CCGR4, + MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | + MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_OFFSET); + + /* enable apbh clock gating */ + setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); +} +#endif + +#if defined(CONFIG_VIDEO_IPUV3) +static iomux_v3_cfg_t const rgb_pads[] = { + IOMUX_PADS(PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK), + IOMUX_PADS(PAD_DI0_PIN15__IPU1_DI0_PIN15), + IOMUX_PADS(PAD_DI0_PIN2__IPU1_DI0_PIN02), + IOMUX_PADS(PAD_DI0_PIN3__IPU1_DI0_PIN03), + IOMUX_PADS(PAD_DISP0_DAT0__IPU1_DISP0_DATA00), + IOMUX_PADS(PAD_DISP0_DAT1__IPU1_DISP0_DATA01), + IOMUX_PADS(PAD_DISP0_DAT2__IPU1_DISP0_DATA02), + IOMUX_PADS(PAD_DISP0_DAT3__IPU1_DISP0_DATA03), + IOMUX_PADS(PAD_DISP0_DAT4__IPU1_DISP0_DATA04), + IOMUX_PADS(PAD_DISP0_DAT5__IPU1_DISP0_DATA05), + IOMUX_PADS(PAD_DISP0_DAT6__IPU1_DISP0_DATA06), + IOMUX_PADS(PAD_DISP0_DAT7__IPU1_DISP0_DATA07), + IOMUX_PADS(PAD_DISP0_DAT8__IPU1_DISP0_DATA08), + IOMUX_PADS(PAD_DISP0_DAT9__IPU1_DISP0_DATA09), + IOMUX_PADS(PAD_DISP0_DAT10__IPU1_DISP0_DATA10), + IOMUX_PADS(PAD_DISP0_DAT11__IPU1_DISP0_DATA11), + IOMUX_PADS(PAD_DISP0_DAT12__IPU1_DISP0_DATA12), + IOMUX_PADS(PAD_DISP0_DAT13__IPU1_DISP0_DATA13), + IOMUX_PADS(PAD_DISP0_DAT14__IPU1_DISP0_DATA14), + IOMUX_PADS(PAD_DISP0_DAT15__IPU1_DISP0_DATA15), + IOMUX_PADS(PAD_DISP0_DAT16__IPU1_DISP0_DATA16), + IOMUX_PADS(PAD_DISP0_DAT17__IPU1_DISP0_DATA17), +}; + +static void enable_rgb(struct display_info_t const *dev) +{ + SETUP_IOMUX_PADS(rgb_pads); +} + +struct display_info_t const displays[] = { + { + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB666, + .detect = NULL, + .enable = enable_rgb, + .mode = { + .name = "Amp-WD", + .refresh = 60, + .xres = 800, + .yres = 480, + .pixclock = 30000, + .left_margin = 30, + .right_margin = 30, + .upper_margin = 5, + .lower_margin = 5, + .hsync_len = 64, + .vsync_len = 20, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED + } + }, +}; + +size_t display_count = ARRAY_SIZE(displays); + +void setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + int reg; + + enable_ipu_clock(); + + /* Turn on LDB0,IPU,IPU DI0 clocks */ + reg = __raw_readl(&mxc_ccm->CCGR3); + reg |= (MXC_CCM_CCGR3_LDB_DI0_MASK | 0xffff); + writel(reg, &mxc_ccm->CCGR3); + + /* set LDB0, LDB1 clk select to 011/011 */ + reg = readl(&mxc_ccm->cs2cdr); + reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK | + MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK); + reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET) | + (3 << MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_OFFSET); + writel(reg, &mxc_ccm->cs2cdr); + + reg = readl(&mxc_ccm->cscmr2); + reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV; + writel(reg, &mxc_ccm->cscmr2); + + reg = readl(&mxc_ccm->chsccdr); + reg |= (CHSCCDR_CLK_SEL_LDB_DI0 << + MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); + writel(reg, &mxc_ccm->chsccdr); + + reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES | + IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH | + IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW | + IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG | + IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT | + IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG | + IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT | + IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED | + IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; + writel(reg, &iomux->gpr[2]); + + reg = readl(&iomux->gpr[3]); + reg = (reg & ~IOMUXC_GPR3_LVDS0_MUX_CTL_MASK) | + (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 << + IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); + writel(reg, &iomux->gpr[3]); +} +#endif /* CONFIG_VIDEO_IPUV3 */ + +#ifdef CONFIG_ENV_IS_IN_MMC +int board_mmc_get_env_dev(int devno) +{ + return devno - 1; +} +#endif diff --git a/board/engicam/imx6ul/Kconfig b/board/engicam/imx6ul/Kconfig new file mode 100644 index 0000000000..e91dd15970 --- /dev/null +++ b/board/engicam/imx6ul/Kconfig @@ -0,0 +1,12 @@ +if TARGET_MX6UL_ENGICAM + +config SYS_BOARD + default "imx6ul" + +config SYS_VENDOR + default "engicam" + +config SYS_CONFIG_NAME + default "imx6-engicam" + +endif diff --git a/board/engicam/imx6ul/MAINTAINERS b/board/engicam/imx6ul/MAINTAINERS new file mode 100644 index 0000000000..37f84f8cc0 --- /dev/null +++ b/board/engicam/imx6ul/MAINTAINERS @@ -0,0 +1,15 @@ +MX6UL_ENGICAM BOARD +M: Jagan Teki +S: Maintained +F: board/engicam/imx6ul +F: include/configs/imx6-engicam.h +F: configs/imx6ul_geam_mmc_defconfig +F: configs/imx6ul_geam_nand_defconfig +F: configs/imx6ul_isiot_emmc_defconfig +F: configs/imx6ul_isiot_mmc_defconfig +F: configs/imx6ul_isiot_nand_defconfig +F: arch/arm/dts/imx6ul-geam-kit.dts +F: arch/arm/dts/imx6ul-isiot.dtsi +F: arch/arm/dts/imx6ul-isiot-mmc.dts +F: arch/arm/dts/imx6ul-isiot-emmc.dts +F: arch/arm/dts/imx6ul-isiot-nand.dts diff --git a/board/engicam/imx6ul/Makefile b/board/engicam/imx6ul/Makefile new file mode 100644 index 0000000000..c78c7e40fb --- /dev/null +++ b/board/engicam/imx6ul/Makefile @@ -0,0 +1,6 @@ +# Copyright (C) 2016 Amarula Solutions B.V. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := imx6ul.o diff --git a/board/engicam/imx6ul/README b/board/engicam/imx6ul/README new file mode 100644 index 0000000000..1e85f618f1 --- /dev/null +++ b/board/engicam/imx6ul/README @@ -0,0 +1,33 @@ +Hsow to use U-Boot on Engicam GEAM6UL and Is.IoT MX6UL Starter Kit: +------------------------------------------------------------------- + +$ make mrproper + +- Configure U-Boot for Engicam GEAM6UL: +$ make imx6ul_geam_mmc_defconfig + +- Configure U-Boot for Engicam Is.IoT MX6UL: +$ make imx6ul_isiot_mmc_defconfig + +- Build U-Boot +$ make + +This will generate the SPL image called SPL and the u-boot-dtb.img. + +- Flash the SPL image into the micro SD card: + +sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync + +- Flash the u-boot-dtb.img image into the micro SD card: + +sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync + +- Jumper settings: + +MMC Boot: JM3 Closed + +- Connect the Serial cable between the Starter Kit and the PC for the console. +(J28 is the Linux Serial console connector) + +- Insert the micro SD card in the board, power it up and U-Boot messages should +come up. diff --git a/board/engicam/imx6ul/imx6ul.c b/board/engicam/imx6ul/imx6ul.c new file mode 100644 index 0000000000..a903a3603b --- /dev/null +++ b/board/engicam/imx6ul/imx6ul.c @@ -0,0 +1,99 @@ +/* + * Copyright (C) 2016 Amarula Solutions B.V. + * Copyright (C) 2016 Engicam S.r.l. + * Author: Jagan Teki + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "../common/board.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_NAND_MXS + +#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) +#define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \ + PAD_CTL_SRE_FAST) +#define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1) + +static iomux_v3_cfg_t const nand_pads[] = { + IOMUX_PADS(PAD_NAND_DATA00__RAWNAND_DATA00 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NAND_DATA01__RAWNAND_DATA01 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NAND_DATA02__RAWNAND_DATA02 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NAND_DATA03__RAWNAND_DATA03 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NAND_DATA04__RAWNAND_DATA04 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NAND_DATA05__RAWNAND_DATA05 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NAND_DATA06__RAWNAND_DATA06 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NAND_DATA07__RAWNAND_DATA07 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NAND_CLE__RAWNAND_CLE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NAND_ALE__RAWNAND_ALE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NAND_CE0_B__RAWNAND_CE0_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NAND_RE_B__RAWNAND_RE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NAND_WE_B__RAWNAND_WE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NAND_WP_B__RAWNAND_WP_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), + IOMUX_PADS(PAD_NAND_READY_B__RAWNAND_READY_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), +}; + +void setup_gpmi_nand(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + /* config gpmi nand iomux */ + SETUP_IOMUX_PADS(nand_pads); + + clrbits_le32(&mxc_ccm->CCGR4, + MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | + MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); + + /* + * config gpmi and bch clock to 100 MHz + * bch/gpmi select PLL2 PFD2 400M + * 100M = 400M / 4 + */ + clrbits_le32(&mxc_ccm->cscmr1, + MXC_CCM_CSCMR1_BCH_CLK_SEL | + MXC_CCM_CSCMR1_GPMI_CLK_SEL); + clrsetbits_le32(&mxc_ccm->cscdr1, + MXC_CCM_CSCDR1_BCH_PODF_MASK | + MXC_CCM_CSCDR1_GPMI_PODF_MASK, + (3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) | + (3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET)); + + /* enable gpmi and bch clock gating */ + setbits_le32(&mxc_ccm->CCGR4, + MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | + MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); + + /* enable apbh clock gating */ + setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); +} +#endif /* CONFIG_NAND_MXS */ + +#ifdef CONFIG_ENV_IS_IN_MMC +int board_mmc_get_env_dev(int devno) +{ + /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */ + return (devno == 0) ? 0 : 1; +} +#endif diff --git a/board/engicam/isiotmx6ul/Kconfig b/board/engicam/isiotmx6ul/Kconfig deleted file mode 100644 index 10c2c50ed7..0000000000 --- a/board/engicam/isiotmx6ul/Kconfig +++ /dev/null @@ -1,12 +0,0 @@ -if TARGET_MX6UL_ISIOT - -config SYS_BOARD - default "isiotmx6ul" - -config SYS_VENDOR - default "engicam" - -config SYS_CONFIG_NAME - default "imx6-engicam" - -endif diff --git a/board/engicam/isiotmx6ul/MAINTAINERS b/board/engicam/isiotmx6ul/MAINTAINERS deleted file mode 100644 index 9b66c8db39..0000000000 --- a/board/engicam/isiotmx6ul/MAINTAINERS +++ /dev/null @@ -1,12 +0,0 @@ -ISIOTMX6UL BOARD -M: Jagan Teki -S: Maintained -F: board/engicam/isiotmx6ul -F: include/configs/imx6-engicam.h -F: configs/imx6ul_isiot_mmc_defconfig -F: configs/imx6ul_isiot_emmc_defconfig -F: configs/imx6ul_isiot_nand_defconfig -F: arch/arm/dts/imx6ul-isiot.dtsi -F: arch/arm/dts/imx6ul-isiot-mmc.dts -F: arch/arm/dts/imx6ul-isiot-emmc.dts -F: arch/arm/dts/imx6ul-isiot-nand.dts diff --git a/board/engicam/isiotmx6ul/Makefile b/board/engicam/isiotmx6ul/Makefile deleted file mode 100644 index f4f8c780ae..0000000000 --- a/board/engicam/isiotmx6ul/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# Copyright (C) 2016 Amarula Solutions B.V. -# -# SPDX-License-Identifier: GPL-2.0+ -# - -obj-y := isiotmx6ul.o diff --git a/board/engicam/isiotmx6ul/README b/board/engicam/isiotmx6ul/README deleted file mode 100644 index 1d177ac625..0000000000 --- a/board/engicam/isiotmx6ul/README +++ /dev/null @@ -1,28 +0,0 @@ -How to use U-Boot on Engicam Is.IoT MX6UL Starter Kit: ------------------------------------------------------ - -- Configure U-Boot for Engicam Is.IoT MX6UL - -$ make mrproper -$ make imx6ul_isiot_mmc_defconfig -$ make - -This will generate the SPL image called SPL and the u-boot-dtb.img. - -- Flash the SPL image into the micro SD card: - -sudo dd if=SPL of=/dev/mmcblk0 bs=1k seek=1; sync - -- Flash the u-boot-dtb.img image into the micro SD card: - -sudo dd if=u-boot-dtb.img of=/dev/mmcblk0 bs=1k seek=69; sync - -- Jumper settings: - -MMC Boot: JM3 Closed - -- Connect the Serial cable between the Starter Kit and the PC for the console. -(J28 is the Linux Serial console connector) - -- Insert the micro SD card in the board, power it up and U-Boot messages should -come up. diff --git a/board/engicam/isiotmx6ul/isiotmx6ul.c b/board/engicam/isiotmx6ul/isiotmx6ul.c deleted file mode 100644 index 05d23c2df2..0000000000 --- a/board/engicam/isiotmx6ul/isiotmx6ul.c +++ /dev/null @@ -1,129 +0,0 @@ -/* - * Copyright (C) 2016 Amarula Solutions B.V. - * Copyright (C) 2016 Engicam S.r.l. - * Author: Jagan Teki - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include "../common/board.h" - -DECLARE_GLOBAL_DATA_PTR; - -#ifdef CONFIG_NAND_MXS - -#define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP) -#define GPMI_PAD_CTRL1 (PAD_CTL_DSE_40ohm | PAD_CTL_SPEED_MED | \ - PAD_CTL_SRE_FAST) -#define GPMI_PAD_CTRL2 (GPMI_PAD_CTRL0 | GPMI_PAD_CTRL1) - -static iomux_v3_cfg_t const nand_pads[] = { - IOMUX_PADS(PAD_NAND_DATA00__RAWNAND_DATA00 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA01__RAWNAND_DATA01 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA02__RAWNAND_DATA02 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA03__RAWNAND_DATA03 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA04__RAWNAND_DATA04 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA05__RAWNAND_DATA05 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA06__RAWNAND_DATA06 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_DATA07__RAWNAND_DATA07 | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_CLE__RAWNAND_CLE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_ALE__RAWNAND_ALE | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_CE0_B__RAWNAND_CE0_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_RE_B__RAWNAND_RE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_WE_B__RAWNAND_WE_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_WP_B__RAWNAND_WP_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), - IOMUX_PADS(PAD_NAND_READY_B__RAWNAND_READY_B | MUX_PAD_CTRL(GPMI_PAD_CTRL2)), -}; - -void setup_gpmi_nand(void) -{ - struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; - - /* config gpmi nand iomux */ - SETUP_IOMUX_PADS(nand_pads); - - clrbits_le32(&mxc_ccm->CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); - - /* - * config gpmi and bch clock to 100 MHz - * bch/gpmi select PLL2 PFD2 400M - * 100M = 400M / 4 - */ - clrbits_le32(&mxc_ccm->cscmr1, - MXC_CCM_CSCMR1_BCH_CLK_SEL | - MXC_CCM_CSCMR1_GPMI_CLK_SEL); - clrsetbits_le32(&mxc_ccm->cscdr1, - MXC_CCM_CSCDR1_BCH_PODF_MASK | - MXC_CCM_CSCDR1_GPMI_PODF_MASK, - (3 << MXC_CCM_CSCDR1_BCH_PODF_OFFSET) | - (3 << MXC_CCM_CSCDR1_GPMI_PODF_OFFSET)); - - /* enable gpmi and bch clock gating */ - setbits_le32(&mxc_ccm->CCGR4, - MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | - MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | - MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); - - /* enable apbh clock gating */ - setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); -} -#endif /* CONFIG_NAND_MXS */ - -#ifdef CONFIG_ENV_IS_IN_MMC -int board_mmc_get_env_dev(int devno) -{ - /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */ - return (devno == 0) ? 0 : 1; -} -#endif - -#ifdef CONFIG_SPL_BUILD -#include - -#ifdef CONFIG_ENV_IS_IN_MMC -void board_boot_order(u32 *spl_boot_list) -{ - u32 bmode = imx6_src_get_boot_mode(); - u8 boot_dev = BOOT_DEVICE_MMC1; - - switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) { - case IMX6_BMODE_SD: - case IMX6_BMODE_ESD: - /* SD/eSD - BOOT_DEVICE_MMC1 */ - break; - case IMX6_BMODE_MMC: - case IMX6_BMODE_EMMC: - /* MMC/eMMC */ - boot_dev = BOOT_DEVICE_MMC2; - break; - default: - /* Default - BOOT_DEVICE_MMC1 */ - printf("Wrong board boot order\n"); - break; - } - - spl_boot_list[0] = boot_dev; -} -#endif -#endif /* CONFIG_SPL_BUILD */ diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 31cf1e6184..256ccb9b92 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ICORE=y +CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y diff --git a/configs/imx6qdl_icore_nand_defconfig b/configs/imx6qdl_icore_nand_defconfig index ab8b6d20a7..21cfb85582 100644 --- a/configs/imx6qdl_icore_nand_defconfig +++ b/configs/imx6qdl_icore_nand_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ICORE=y +CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_BMODE is not set diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index 1e57debf48..6cf985221f 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6Q_ICORE_RQS=y +CONFIG_TARGET_MX6Q_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index c147d4a07f..b2ac4a276c 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_GEAM=y +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index 4e51892cf8..d920af74b9 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_GEAM=y +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_BMODE is not set diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 5f8a574b93..72ae08e700 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_ISIOT=y +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y diff --git a/configs/imx6ul_isiot_mmc_defconfig b/configs/imx6ul_isiot_mmc_defconfig index 367dfa1809..ffd12bf48e 100644 --- a/configs/imx6ul_isiot_mmc_defconfig +++ b/configs/imx6ul_isiot_mmc_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_ISIOT=y +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index dde1cc2b33..aaaf9e6b01 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -3,7 +3,7 @@ CONFIG_ARCH_MX6=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_TARGET_MX6UL_ISIOT=y +CONFIG_TARGET_MX6UL_ENGICAM=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y # CONFIG_CMD_BMODE is not set -- cgit v1.2.1