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* x86: apl: Add FSP structuresSimon Glass2019-12-154-0/+440
* x86: apl: Add a CPU driverSimon Glass2019-12-152-0/+21
* x86: apl: Add PCH driverSimon Glass2019-12-151-0/+9
* x86: apl: Add LPC driverSimon Glass2019-12-151-0/+82
* x86: apl: Add ITSS driverSimon Glass2019-12-151-0/+43
* x86: apl: Add systemagent driverSimon Glass2019-12-151-0/+37
* x86: apl: Add pinctrl driverSimon Glass2019-12-151-0/+485
* x86: apl: Add UART driverSimon Glass2019-12-151-0/+20
* x86: apl: Add PMC driverSimon Glass2019-12-151-0/+19
* x86: apl: Add basic IO addressesSimon Glass2019-12-151-0/+29
* x86: Add a generic Intel pinctrl driverSimon Glass2019-12-152-0/+679
* x86: Add low-power subsystem (lpss) supportSimon Glass2019-12-151-0/+36
* x86: Make MSR_PKG_POWER_SKU commonSimon Glass2019-12-153-3/+8
* x86: Add support for newer CAR schemesSimon Glass2019-12-151-7/+5
* x86: fsp: Make the notify API call commonSimon Glass2019-12-152-18/+27
* x86: fsp: Allow remembering the location of FSP-SSimon Glass2019-12-151-0/+3
* x86: fsp: Add FSP2 base supportSimon Glass2019-12-152-0/+160
* x86: Move fsp_prepare_mrc_cache() to fsp1 directorySimon Glass2019-12-151-7/+0
* x86: Don't export mrccache_update()Simon Glass2019-12-151-15/+0
* x86: Add mrccache support for a 'variable' cacheSimon Glass2019-12-151-0/+1
* x86: Update mrccache to support multiple cachesSimon Glass2019-12-152-5/+27
* x86: Add a new global_data member for the cache recordSimon Glass2019-12-151-0/+2
* x86: Reduce mrccache record alignment sizeSimon Glass2019-12-151-1/+1
* x86: spi: Add helper functions for Intel Fast SPISimon Glass2019-12-152-0/+69
* i2c: designware: Avoid using static dataSimon Glass2019-12-151-0/+1
* x86: Add a CPU init function for TPLSimon Glass2019-11-031-0/+9
* x86: spl: Support init of a PUNITSimon Glass2019-11-031-0/+1
* x86: timer: Use a separate flag for whether timer is initedSimon Glass2019-11-031-0/+1
* x86: Add a function to set variable MTRRsSimon Glass2019-10-081-0/+12
* x86: Add new common CPU functions for turbo/burst modeSimon Glass2019-10-081-0/+49
* x86: Tidy up some duplicate MSR definesSimon Glass2019-10-081-63/+43
* x86: Add common functions for TDP and perf controlSimon Glass2019-10-082-1/+19
* x86: Use a common bus clock for Intel CPUsSimon Glass2019-10-084-9/+5
* x86: Add a common function to set CPU thermal targetSimon Glass2019-10-081-0/+11
* x86: Use a common definition of MSR_IA32_PERF_CTLSimon Glass2019-10-081-2/+0
* x86: pci: Drop the first parameter in pci_x86_r/w_config()Simon Glass2019-10-081-9/+6
* x86: Move acpi_s3.h to a common locationSimon Glass2019-10-081-130/+0
* x86: Rename turbo ratio MSR to MSR_TURBO_RATIO_LIMITSimon Glass2019-10-081-2/+1
* x86: Add various MTRR indexes and valuesSimon Glass2019-10-082-0/+23
* x86: fsp: Save usable RAM and hob_list in the handoff areaSimon Glass2019-10-081-0/+8
* x86: spl: Reduce priority of the basic SPL image loaderSimon Glass2019-10-081-2/+1
* x86: pci: Add a function to clear and set PCI config regsSimon Glass2019-10-081-0/+40
* x86: Move common Intel CPU info code into a functionSimon Glass2019-10-081-0/+16
* x86: fsp: Add access to variable MRC dataSimon Glass2019-10-082-0/+16
* x86: fsp: Add a few more definitions for FSP2Simon Glass2019-10-081-1/+14
* x86: Move common fsp functions into a common fileSimon Glass2019-10-082-10/+17
* x86: fsp: Move common dram functions into a common fileSimon Glass2019-10-081-0/+9
* x86: fsp: Tidy up comment style a littleSimon Glass2019-10-083-40/+50
* x86: fsp: Create a common fsp_support.h headerSimon Glass2019-10-082-116/+128
* x86: Rename some FSP functions to have an fsp_ prefixSimon Glass2019-10-081-3/+3
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