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* ARM: da850-evm: Replace CMD_SF with CMD_MTDAdam Ford2019-07-311-0/+2
| | | | | | | This patch enables MTD and CMD_MTD and it works with SPI NOR, so the older CMD_SF can be removed. Signed-off-by: Adam Ford <aford173@gmail.com>
* ARM: da850evm: Split MTDPARTS into SPL and u-bootAdam Ford2019-07-311-2/+1
| | | | | | | | | | | | The MTDPARTS currently lists just u-boot.ais as 512k in size. This works when loading the ais file via serial port, but if one wanted to update just the u-boot portion, it's not really possible. This patch splits the MTDPARTS into a 32k SPL partiion and a 480k u-boot partition which allows u-boot.img to be burned to the u-boot partition. The remaining partitions are left with the same sizes and offsets to not break backwards compatibility. Signed-off-by: Adam Ford <aford173@gmail.com>
* configs: am57xx_evm_defconfig: Enable 'dtimg' commandSam Protsenko2019-07-313-0/+3
| | | | | | | We are going to implement DTBO partition for BeagleBoard X15 further. To support this, 'dtimg' command must be enabled. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
* configs: am57xx_evm_defconfig: Enable 'bcb' commandSam Protsenko2019-07-313-0/+3
| | | | | | | | | | | | It is essential to have an access to BCB area of 'misc' partition on Android devices [1]. For BeagleBoard X15 the 'bcb' command will be further used for reboot reason implementation and booting to recovery. It can be also used for debugging reasons, like checking RescueParty messages in BCB area. [1] doc/android/bcb.txt Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
* omap: Correct the fastboot product varSam Protsenko2019-07-311-0/+13
| | | | | | | | | | | | | | | | | | | | | | "fastboot flashall" expects "fastboot getvar product" value to be one of values provided in android-info.txt file (in AOSP), from "require board=" list. Before this patch, "am57xx" is returned for all AM57xx based boards, as it's set in $board env var from SYS_BOARD in board/ti/am57xx/Kconfig file, which is used for default implementation of "fastboot getvar product". In order to fix that inconsistency, let's do next: 1. In U-Boot: override fastboot.product, reusing the value from $board_name 2. In AOSP: provide values for all AM57xx boards we can use to device/ti/beagle_x15/board-info.txt file This way requirements check in "fastboot flashall" will work as expected, verifying that user tries to flash images to the board which those images were built for. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Acked-by: Andrew F. Davis <afd@ti.com>
* env: ti: boot: Handle reboot reason from BCBSam Protsenko2019-07-311-2/+27
| | | | | | | | | | | | | | | | | In case of Android boot, reboot reason can be written into BCB (usually it's an area in 'misc' partition). U-Boot then can obtain that reboot reason from BCB and handle it accordingly to achieve correct Android boot flow, like it was suggested in [1]: - if it's empty: perform normal Android boot from eMMC - if it contains "bootonce-bootloader": get into fastboot mode - if it contains "boot-recovery": perform recovery boot The latter is not implemented yet, as it depends on some features that are not implemented on TI platforms yet (in AOSP and in U-Boot). [1] https://marc.info/?l=u-boot&m=152508418909737&w=2 Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
* Merge tag 'video-for-2019.10-rc1' of ↵WIP/30Jul2019Tom Rini2019-07-304-3/+25
|\ | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-video - fix EDID mode filtering - extend mxc_ipuv3_fb to enable backlight/display - include fb_base in global_data for DM_VIDEO - show frame buffer address via board info as used to be with legacy VIDEO support
| * mxc_ipuv3_fb.c: enable a backlight on a panelHeiko Schocher2019-07-301-0/+5
| | | | | | | | | | | | | | check if we get a panel device, if so, enable the backlight on it. Signed-off-by: Heiko Schocher <hs@denx.de>
| * mxc_ipuv3_fb.c: call display_enableHeiko Schocher2019-07-301-0/+13
| | | | | | | | | | | | call display_enable, so a display gets enabled. Signed-off-by: Heiko Schocher <hs@denx.de>
| * bdinfo: show fb base with DM_VIDEOHeiko Schocher2019-07-301-1/+1
| | | | | | | | | | | | | | show Framebuffer base with CONFIG_DM_VIDEO enabled. Signed-off-by: Heiko Schocher <hs@denx.de>
| * mxc_ipuv3_fb.c: set gd->fb_baseHeiko Schocher2019-07-301-0/+2
| | | | | | | | | | | | set gd->fb_base so it can be shown with bdinfo command. Signed-off-by: Heiko Schocher <hs@denx.de>
| * global_data: enable fb_base for DM_VIDEOHeiko Schocher2019-07-301-1/+1
| | | | | | | | | | | | | | | | with CONFIG_VIDEO we store fb base address in global data fb_base variable. Do this also in DM_VIDEO case. Signed-off-by: Heiko Schocher <hs@denx.de>
| * edid: fix edid_get_timing_validate() mode_valid lookupNeil Armstrong2019-07-291-1/+3
| | | | | | | | | | | | | | | | | | Add a condition to the break in the modes lookup, without this when the first mode is not valid, then edid_get_timing_validate() return an error instead of checking the next modes. Fixes: 1c1ed441b0d1 ("edid: add edid_get_timing_validate() variant to filter out edid modes") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | Merge tag 'xilinx-for-v2019.10' of ↵Tom Rini2019-07-3032-279/+2148
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx/FPGA changes for v2019.10 fpga: - Xilinx virtex2 cleanup - Altera cyclon2 cleanup zynq: - Minor Kconfig cleanup - Add psu_init configuration for Z-turn board zynqmp: - Add support for pmufw config passing to PMU - script for psu_init conversion - zcu1275 renaming xilinx: - Add support for UltraZed-EV SoM
| * | arm64: zynqmp: Do not include pm_cfg_obj.o when SPL is disabledMichal Simek2019-07-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xilinx_zynqmp_mini configuration is throwing build error: readlink: missing operand Try 'readlink --help' for more information. because CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE is not defined at all and Makefile pass ifneq condition. Add SPL_BUILD dependency which is also reflected in Kconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | cmd: fpga: Change return value to avoid printing usage textAlexander Dahl2019-07-301-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In cmd/fpga.c the commands should return enum command_ret_t, e.g. CMD_RET_USAGE, CMD_RET_SUCCESS, or CMD_RET_FAILURE. What they actually do is passing a return value from different 'fpga_' functions. Passing on a return value of -1 from a called function leads to printing out usage text. In case of actually correct usage with correctly specified parameters but some fail at runtime printing out that usage text is distracting. The reason is most 'fpga_' functions return either FPGA_SUCCESS or FPGA_FAIL, the latter was equal to -1 which is the same value as CMD_RET_USAGE. So just passing on FPGA_FAIL lead to printing out usage. We should only return CMD_RET_USAGE in cases, where the user sent wrong input. Every other case should return CMD_RET_SUCCESS or CMD_RET_FAILURE, and not simply pass an error code. Simply changing FPGA_FAIL from -1 to 1 gets the job done. Suggested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Alexander Dahl <ada@thorsis.com>
| * | fpga: altera: cyclon2: Check function pointer before callingAlexander Dahl2019-07-301-1/+5
| | | | | | | | | | | | | | | | | | | | | As already done for the 'pre' function, a check is added to not follow a NULL pointer, if somebody has not assigned a 'post' function. Signed-off-by: Alexander Dahl <ada@thorsis.com>
| * | fpga: altera: cyclon2: Fix indentationAlexander Dahl2019-07-301-16/+16
| | | | | | | | | | | | | | | | | | Some code parts stood too far left … Signed-off-by: Alexander Dahl <ada@thorsis.com>
| * | fpga: altera: cyclon2: Fix most checkpatch warningsAlexander Dahl2019-07-301-42/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Nothing special, but done before further cleanup. * spacing * braces * __FUNCTION__ → __func__ Suggested-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Alexander Dahl <ada@thorsis.com>
| * | fpga: altera: Add some more device sizesAlexander Dahl2019-07-301-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There seems to be only one place, where this is checked against: `altera_validate()`. It should be non zero. Otherwise it is only used to display it, so it probably does not really matter at the moment. But we had the datasheet open anyway … Sizes in datasheet are bit counts, display here is in bytes. Signed-off-by: Alexander Dahl <ada@thorsis.com>
| * | arm64: zynqmp: add MAINTAINERS entry for Avnet UltraZed-EVLuca Ceresoli2019-07-301-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The board was added without adding a MAINTAINERS entry. Fixes: $ ./tools/genboardscfg.py -f WARNING: no status info for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0' WARNING: no maintainers for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0' $ Reported-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | fpga: virtex2: Add slave serial programming supportRobert Hancock2019-07-302-23/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for slave serial programming, in addition to the previously supported slave SelectMAP mode. There are two ways that this can be used: -Using the clk and wdata callbacks in order to write image data one bit at a time using pure bit-banging. This works, but is rather painfully slow with typical image sizes. -By specifying the wbulkdata callback instead, the image loading process can be offloaded to SPI hardware. In this mode the clk and wdata callbacks do not need to be specified. This allows the image to be loaded much faster, taking only a few seconds with even relatively large images. Slave serial programming has been tested on the Kintex-7 series of FPGAs. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | fpga: virtex2: Add additional clock cycles after DONE assertionRobert Hancock2019-07-301-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Xilinx FPGA configuration options can result in the startup sequence extending past the end of the FPGA bitstream. Continue applying CCLK clock cycles for 8 cycles after DONE is asserted in order to ensure the startup sequence is complete, as recommended by Xilinx. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | fpga: virtex2: Split out image writing from pre/post operationsRobert Hancock2019-07-301-157/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is in preparation for adding slave serial programming support, which uses the same pre/post operations as slave SelectMAP, to avoid duplicating code. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | fpga: virtex2: added Kconfig optionRobert Hancock2019-07-301-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an option to allow this driver to be selected with Kconfig. As noted in the description, this driver should also work with many newer Xilinx FPGA families as the programming methods are essentially the same. Also added a missing FPGA_XILINX dependency to the similar Spartan 3 driver. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | fpga: virtex2: cosmetic: Cleanup code styleRobert Hancock2019-07-301-134/+136
| | | | | | | | | | | | | | | | | | | | | | | | Address Checkpatch warnings in virtex2 code prior to making other changes. No functional change intended. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: add support for Avnet UltraZed-EV Starter KitLuca Ceresoli2019-07-305-0/+843
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avnet UltraZed-EV Starter Kit is composed by the UltraZed-EV SoM and the only publicly-available compatible carrier card. The SoM is based on the EV version of the Xilinx ZynqMP SoC+FPGA. The psu_init_gpl.c file has been generated from the board definition files at [0] using Vivado 2018.3 and then minimized by tools/zynqmp_psu_init_minimize.sh. Manually removed serdes init code since it is not mentioned in device tree and fixed a checkpatch error. [0] https://github.com/Avnet/bdf/tree/3686c9ff7d2f0467fb4fcf39f861b8d6ff183b12/ultrazed_7ev_cc/1.1 Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | tools: zynqmp_psu_init_minimize.sh: fix return lines coding styleLuca Ceresoli2019-07-301-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Remove unneeded parenthess around return value. E.g.: return (0); -> return 0; Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM: zynq: Add configuration for Z-turn boardAnton Gerasimov2019-07-301-0/+281
| | | | | | | | | | | | | | | | | | | | | Basic (PS-only) configuration based on Vivado board files by Sergiusz Bazanski <sergius@q3k.org> Signed-off-by: Anton Gerasimov <tossel@gmail.com>
| * | cmd: fpga: correct typo, capitalize "Xilinx"Robert P. J. Day2019-07-301-1/+1
| | | | | | | | | | | | | | | | | | | | | A couple minor tweaks to printed strings in cmd/fpga.c. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: add tool to minimize psu_init_gpl.c filesLuca Ceresoli2019-07-301-0/+145
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This script transforms a pair of psu_init_gpl.c and .h files produced by the Xilinx Vivado tool for ZynqMP into a smaller psu_init_gpl.c file that is almost checkpatch compliant. Based on a script by Michal Simek. Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: xil_io.h: declare functions as staticLuca Ceresoli2019-07-301-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes sparse warnings when building zynqmp defconfigs: ./board/xilinx/zynqmp/xil_io.h:12:6: warning: symbol 'Xil_Out32' was not declared. Should it be static? ./board/xilinx/zynqmp/xil_io.h:17:5: warning: symbol 'Xil_In32' was not declared. Should it be static? ./board/xilinx/zynqmp/xil_io.h:22:6: warning: symbol 'usleep' was not declared. Should it be static? Also add __maybe_unused to usleep() since it is not used by minimized psu_init_gpl.c files, so it would warn as "defined but not used". Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: add tool to convert PMU config object .c to binaryLuca Ceresoli2019-07-301-0/+301
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The recently-added ZYNQMP_SPL_PM_CFG_OBJ_FILE option allows SPL to load a PMUFW configuration object from a binary blob. However the configuration object is produced by Xilinx proprietary tools as a C source file and no tool exists to easily convert it to a binary blob in an embedded Linux build system for U-Boot to use. Add a simple Python script to do the conversion. It is definitely not a complete C language parser, but it is enough to parse the known patterns generated by Xilinx tools, including: - defines - literal integers, optionally with a 'U' suffix - bitwise OR between them Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: spl: install a PMU firmware config object at runtimeLuca Ceresoli2019-07-308-0/+176
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optionally allow U-Boot to load a configuration object into the Power Management Unit (PMU) firmware on Xilinx ZynqMP. The configuration object is required by the PMU FW to enable most SoC peripherals. So far the only way to boot using U-Boot SPL was to hard-code the configuration object in the PMU firmware. Allow a different boot process, where the PMU FW is equal for any ZynqMP chip and its configuration is passed at runtime by U-Boot SPL. All the code for Inter-processor communication with the PMU is isolated in a new file (pmu_ipc.c). The code is inspired by the same feature as implemented in the Xilinx First Stage Bootloader (FSBL) and Arm Trusted Firmware: * https://github.com/Xilinx/embeddedsw/blob/fb647e6b4c00f5154eba52a88b948195b6f1dc2b/lib/sw_apps/zynqmp_fsbl/src/xfsbl_misc_drivers.c#L295 * https://github.com/ARM-software/arm-trusted-firmware/blob/c48d02bade88b07fa7f43aa44e5217f68e5d047f/plat/xilinx/zynqmp/pm_service/pm_api_sys.c#L357 SPL logs on the console before loading the configuration object: U-Boot SPL 2019.07-rc1-00511-gaec224515c87 (May 15 2019 - 08:43:41 +0200) Loading PMUFW cfg obj (2008 bytes) EL Level: EL3 ... Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | arm64: zynqmp: Rename zc1275 to zcu1275Michal Simek2019-07-305-10/+12
| | | | | | | | | | | | | | | | | | | | | | | | Name of this platform has changed and released to customers that's why name has also changed. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Series-to: uboot
| * | ARM: zynq: delete long-dead CONFIG_USB_CABLE_CHECKRobert P. J. Day2019-07-303-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This Kbuild option disappeared way back in 2014: commit 75504e9592745021006cb8905b5ff5a51d9d1cb3 Author: Mateusz Zalega <m.zalega@samsung.com> Date: Wed Apr 30 13:07:48 2014 +0200 ... snip ... CONFIG_USB_CABLE_CHECK was removed. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2019-07-3024-883/+1609
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| * | pinctrl: renesas: fix R-Car gpio0_00 operation fails with 'gpio -input' commandtitron2019-07-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix GPIO bank 0 pin 0 request/release off by one error. Without this patch, it is not possible to request/release GPIO bank 0 pin 0. Signed-off-by: Tiezhuang Dong <tiezhuang.dong.yh@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Eugeniu Rosca <roscaeugeniu@gmail.com> Cc: Yoshihiro Shimoda <shimoda.yoshihiro.uh@renesas.com>
| * | ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.2Eugeniu Rosca2019-07-238-47/+595
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Backport and squash below Linux 5.2 commits for R-Car Gen3: Commit id * Summary line 6fffb98645e67b5 arm64: dts: renesas: r8a77990: ebisu: Add GPIO expander b068ed6efe6244d arm64: dts: renesas: r8a77990: Fix SPDX license identifier style 96c25882252704d ! arm64: dts: renesas: r8a7796: remove unneeded sound #address/size-cells 71ac75dffdae2f8 arm64: dts: renesas: r8a77990: ebisu: Enable LVDS1 encoder 9a0ff5c727b60a3 arm64: dts: renesas: r8a77995: draak: Enable LVDS1 encoder 9130c15829846fa arm64: dts: renesas: ebisu: Fix adv7482 hexadecimal register address 191f7dcd1f5ea1f arm64: dts: renesas: r8a77965: add SSIU support for sound a8f6110e64422d5 arm64: dts: renesas: ebisu: Enable VIN5 4162aa9db3d4469 arm64: dts: renesas: r8a77995: draak: Enable CAN0, CAN1 af965ba3248edde arm64: dts: renesas: r8a77990: Remove invalid compatible value for CSI40 1f4c123a98098cc arm64: dts: renesas: r8a77990-ebisu: Add BD9571 PMIC 474706117c2baa6 arm64: dts: renesas: ebisu: Add PMIC DDR0 Backup Power config e2fa79de7ecbef4 arm64: dts: renesas: Update Ebisu and Draak bootargs de8e8daaf7190ef arm64: dts: renesas: salvator-common: Sort node label 05f1d882d28b871 arm64: dts: renesas: r8a77995: draak: Fix EthernetAVB phy mode to rgmii 7a516e49d975311 arm64: dts: renesas: use extended audio dmac register e3414b8c45afa5c arm64: dts: renesas: salvator-common: Add GPIO keys support 720066d17c973fd arm64: dts: renesas: r8a7795: Add CMT device nodes 99cb95103e2d058 arm64: dts: renesas: r8a77965: Add CMT device nodes 28a5c61b5136d58 arm64: dts: renesas: r8a77990: Add CMT device nodes 32d622f3290b2a1 arm64: dts: renesas: r8a77965: Remove reg-names of display node (*) Patch id mismatch between Linux and U-Boot commit. [!] Dropped changes in arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts, since the file doesn't exist in the U-Boot tree. Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
| * | dt-bindings: Synchronize R-Car Gen3 headers with Linux 5.2Eugeniu Rosca2019-07-232-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Backport and squash below Linux v5.2 commits: Commit id * Summary line da3e1c57caf93e [1] soc: renesas: r8a77970-sysc: Remove non-existent CR7 power domain b5eb730e031aca [1] soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domains 3961d355dfb512 dt-bindings: power: r8a77965: Remove non-existent A3IR power domain (*) Patch id mismatch between Linux and U-Boot commit [1] Dropped changes in drivers/soc/renesas/r8a77970-sysc.c, since the file doesn't exist in U-Boot. Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
| * | pinctrl: renesas: Synchronize Gen2/Gen3 tables with Linux 5.2Eugeniu Rosca2019-07-2311-829/+959
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In spite of the summary line, U-Boot commits [1-2] seem to have aligned the U-Boot PFC tables to Linux v5.1 rather than to v5.0, since they also imported the Linux 5.1 commits listed in [3]. What current commit tries to accomplish is to align the Gen2 and Gen3 pinctrl tables to Linux v5.2. Importing these updates in two steps as done before (i.e. separately for Gen2 and Gen3) is somewhat difficult due to Linux commits like [5-6] which atomically update both Gen2/3 platforms and whose breakdown would not be easily possible. The detailed list of Linux commits squashed into this U-Boot patch is shown in [4]. The second column in [4] depicts the patch id mismatch between the original Linux and the resulted U-Boot commit. The exclamation mark means that manual conflict resolution was involved during cherry picking Linux commit into U-Boot repository (this is mainly caused by dropped changes in files like pfc-r8a7795-es1.c and pfc-r8a77980.c which are missing in U-Boot). This patch has been applied on top of v2019.07-rc4-155-g8754656680b6 and boot-tested on: - H3-ES2.0-Salvator-X - M3-ES1.1-Salvator-XS - M3N-ES1.1-ULCB [1] 8719ca81136474 ("pinctrl: renesas: Synchronize Gen3 tables with Linux 5.0") [2] a6a743df242a50 ("pinctrl: renesas: Synchronize Gen2 tables with Linux 5.0") [3] Linux 5.1 commits already contained in [1-2]: 79dbbdbeccc6784 pinctrl: sh-pfc: r8a77965: Add DRIF pins, groups and functions 729257d674bc2e6 pinctrl: sh-pfc: r8a77965: Add TMU pins, groups and functions b9fd50488b4939c pinctrl: sh-pfc: r8a7792: Fix vin1_data18_b pin group a4b0350047f1b10 pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin group fdbbd6b74c9278f pinctrl: sh-pfc: r8a77990: Add DRIF pins, groups and functions 16978e7d40f73be pinctrl: sh-pfc: r8a77990: Add TMU pins, groups and functions 86c045c2e4201e9 pinctrl: sh-pfc: r8a77965: Replace DU_DOTCLKIN2 by DU_DOTCLKIN3 b8ba194ca5f4ca2 pinctrl: sh-pfc: r8a7791: Fix VIN1 versioned groups 81c585c96b7dd47 pinctrl: sh-pfc: r8a77970: Deduplicate VIN[01] pin definitions 08b7e2112a9b19c pinctrl: sh-pfc: r8a7796: Deduplicate VIN5 pin definitions 99fdb920f5534d1 pinctrl: sh-pfc: r8a7795: Deduplicate VIN5 pin definitions 85ccae133bde425 Revert "pinctrl: sh-pfc: r8a77990: Add support for pull-up only pins" f7d8b568e204d29 pinctrl: sh-pfc: r8a77990: GP6_9 does not have pull-down capability 5219aa33caec2f7 pinctrl: sh-pfc: r8a77995: Fix MOD_SEL bit numbering 3e3eebeacad79bd pinctrl: sh-pfc: r8a77990: Fix MOD_SEL bit numbering 7219a4b64520873 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit2 when using RX2, TX2 and SCK2 699c7d1346fbef6 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit3 when using TX0 [4] Linux 5.2 commits backported and squashed into this U-Boot patch Linux commit id Linux commit summary line 9925e8795726801 pinctrl: sh-pfc: Validate pins/marks in pin groups at build time f83f97684a737f6 pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length 5e8588c86d71e78 pinctrl: sh-pfc: Validate fixed-size field widths at build time 1c5c1101755c5ed pinctrl: sh-pfc: r8a77970: Rename IOCTRLx registers 3df892fdbfe6919 pinctrl: sh-pfc: r8a77990: Rename IOCTRLx registers dcd24e098d8df8b pinctrl: sh-pfc: r8a7796: Move CANFD pin groups and functions 2cee6cb290ab30f pinctrl: sh-pfc: r8a77990: Move CANFD pin groups and functions d92ee9cf8ec8d7f ! pinctrl: sh-pfc: rcar-gen3: Retain TDSELCTRL register across suspend/resume efca8da0c5fcc7f ! pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG() macro 69f7be1c6314fb0 ! pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macro 19b593a1cf068ef ! pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro c481c8178420b8c pinctrl: sh-pfc: Validate enum IDs for regs with fixed-width fields fa4d36712f20e24 ! pinctrl: sh-pfc: Validate enum IDs for regs with variable-width fields 360328c7dc15f48 pinctrl: sh-pfc: Improve PINMUX_IPSR_PHYS() documentation 943ff71281c6ce4 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit16 when using NFALE and NFRB_N e167d723e1a472d pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D e87882eb9be10b2 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2 5671f8e0270ad5e ! pinctrl: sh-pfc: rcar-gen3: Remove HDMI CEC pins, groups, and functions 662dc924a05e9df ! pinctrl: sh-pfc: rcar-gen3: Remove CC5_OSCOUT pin 624a7a12cc0cc77 ! pinctrl: sh-pfc: rcar-gen3: Rename RTS{0,1,3,4}# pin function definitions a040f3dec8eb7b1 pinctrl: sh-pfc: rcar-gen3: Rename SEL_ADG_{A,B,C} to SEL_ADG{A,B,C} e551122cdb7fcb9 pinctrl: sh-pfc: rcar-gen3: Rename SEL_NDFC to SEL_NDF baaa2effc684e49 pinctrl: sh-pfc: r8a77970: Fix spacing f05603fa6aa3043 pinctrl: sh-pfc: r8a7796: Remove placeholder I2C pin data 0a042b355e60269 pinctrl: sh-pfc: r8a77965: Add I2C{0,3,5} pins, groups and functions [5] efca8da0c5fcc7 ("pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG() macro") [6] 69f7be1c6314fb ("pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macro") Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
| * | ARM: renesas: Update Gen3 PCIe dma-ranges before bootMarek Vasut2019-07-232-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | Update "dma-ranges" DT property of all PCIe controllers in the system with the up-to-date DRAM layout. This allows the PCIe controller take full advantage of all the available DRAM. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * | common: fdt_support: Add missing cpu_to_fdt32() to fdt_pci_dma_ranges()Marek Vasut2019-07-231-11/+14
| | | | | | | | | | | | | | | | | | | | | | | | The fdt_pci_dma_ranges() cannot work on e.g. ARM, since the DT entries endianness is not adjusted at all. Fix this. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Tom Rini <trini@konsulko.com>
* | | Prepare v2019.10-rc1v2019.10-rc1Tom Rini2019-07-291-2/+2
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* | | Merge tag 'dm-pull-29jul19' of ↵WIP/29Jul2019Tom Rini2019-07-2949-367/+1984
|\ \ \ | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-dm binman support for replacing files
| * | | Makefile: fix implementation of BINMAN_DEBUGStephen Warren2019-07-291-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | binman only accepts the -D argument early on the command-line, yet the Makefile currently passes it near the end. This causes the build to fail if this feature is used. Re-order the command-line to fix this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | binman: Add command-line support for replacing entriesSimon Glass2019-07-295-4/+327
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a 'replace' command to binman to permit entries to be replaced, either individually or all at once (using a filter). Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | binman: Correct the error message for invalid pathSimon Glass2019-07-292-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | At present this message references -o for output file. But binman uses -f now. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | binman: Split control.WriteEntryToImage() into separate functionsSimon Glass2019-07-291-17/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code has three distinct phases: 1. The image is loaded and the state module is set up 2. The entry is written to the image 3. The image is repacked and written back to the file Split the code out with three separate functions, one for each phase. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | binman: Update control.WriteEntry() to support writing the mapSimon Glass2019-07-291-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the ability to write a new map file. Also tidy up a few comments and rename a misleading variable. Signed-off-by: Simon Glass <sjg@chromium.org>
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