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| * remoteproc: stm32: use reset for hold bootPatrick Delaunay2020-11-252-68/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the reset function to handle the hold boot bit in RCC with device tree handle with MCU_HOLD_BOOT identifier. This generic reset allows to remove the two specific properties: - st,syscfg-holdboot - st,syscfg-tz This patch prepares alignment with kernel device tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Cc: Fabien DESSENNE <fabien.dessenne@st.com> Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * reset: stm32: Add support of MCU HOLD BOOTPatrick Delaunay2020-11-252-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Handle the register RCC_MP_GCR without SET/CLR registers but with a direct access to bit BOOT_MCU: - deassert => set the bit: The MCU will not be in HOLD_BOOT - assert => clear the bit: The MCU will be set in HOLD_BOOT With this patch the RCC driver handles the MCU_HOLD_BOOT_R value added in binding stm32mp1-resets.h Cc: Fabien DESSENNE <fabien.dessenne@st.com> Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * board: stm32mp1: no MTD partitions fixup for serial bootPatrick Delaunay2020-11-251-3/+8
| | | | | | | | | | | | | | | | | | | | Remove the update of the MTD partitions in kernel device tree for serial boot (USB / UART), and the kernel will use the MTD partitions define in the loaded DTB because U-Boot can't known the expected flash layout in this case. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * SPL: stm32mp1: fix spl_mmc_boot_partition not definedRichard Genoud2020-11-251-0/+2
| | | | | | | | | | | | | | | | spl_mmc_boot_partition is only defined when CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is defined. Signed-off-by: Richard Genoud <richard.genoud@posteo.net> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stm32: Drop QSPI CS2 on DHCOMMarek Vasut2020-11-251-11/+2
| | | | | | | | | | | | | | | | | | | | The QSPI CS2 is not used on DHCOM, remove the pinmux and flash@1. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stm32: Fix uSD card-detect GPIO on DHCOMMarek Vasut2020-11-251-1/+1
| | | | | | | | | | | | | | | | | | | | The uSD slot card-detect GPIO is connected to PG1, fix it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stm32: Add DHCOM based PicoITX boardMarek Vasut2020-11-255-1/+131
| | | | | | | | | | | | | | | | | | | | | | | | Add DT for DH PicoITX unit, which is a bare-bones carrier board for the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom board-to-board expansion connector. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * arm: stm32mp: correct the ALIGN macro usagePatrick Delaunay2020-11-251-2/+2
| | | | | | | | | | | | | | | | | | | | | | Correct the ALIGN macro usage in mmu_set_region_dcache_behaviour call: the address must use ALIGN_DOWN and size can use ALIGN macro. With STM32_SYSRAM_BASE=0x2FFC0000 and MMU_SECTION_SIZE=0x100000 for STM32MP15x the computed address was 30000000 instead of 2ff00000. Fixes: 43fe9d2fda24 ("stm32mp1: mmu_set_region_dcache_behaviour") Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stm32: Fix typo in stm32h7-u-boot.dtsiPatrice Chotard2020-11-251-1/+1
| | | | | | | | | | | | | | Fix typo "firsct" Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stm32: Fix timer initialization for stm32 MCU's boardPatrice Chotard2020-11-255-12/+24
| | | | | | | | | | | | | | | | | | Commit 4b2be78ab66c ("time: Fix get_ticks being non-monotonic") puts in evidence that get_ticks is called before timer initialization. Fix it by initializing timer before relocation. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: stm32: DT sync with kernel v5.10-rc1 for MCU's boardsPatrice Chotard2020-11-2522-100/+308
| | | | | | | | | | | | | | Device tree alignment with kernel v5.10-rc1. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
| * ARM: dts: sync armv7-m.dtsi with kernel v5.10-rc1Patrice Chotard2020-11-251-3/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since kernel v4.8-rc1, commit 05b23ebc2bd9 ("ARM: dts: armv7-m: remove skeleton.dtsi include"), skeleton.dtsi file is no more included. This synchronization is needed to avoid to get 2 memory node in DTB file if, in DTS file, memory node is declared with the correct syntax as following: memory@90000000 { device_type = "memory"; reg = <0x90000000 0x800000>; }; Then in DTB, we will have the 2 memory nodes, which is incorrect and cause misbehavior during DT parsing by U-boot: memory { device_type = "memory"; reg = <0x00 0x00>; }; memory@90000000 { device_type = "memory"; reg = <0x90000000 0x800000>; }; Issue found when synchronizing MCU's STM32 DT from kernel v5.10-rc1. When using fdtdec_setup_mem_size_base() or fdtdec_setup_memory_banksize() API, first above memory node is found (with reg = <0x00 0x00>), so gd->ram_size, gd->ram_base, gd->bd->bi_dram[bank].start and gd->bd->bi_dram[bank].size are all set to 0 which avoid boards to boot. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-usbWIP/22Nov2020Tom Rini2020-11-224-23/+43
|\ | | | | | | - DWC2, DWC3 fixes
| * usb: gadget: dwc2_udc_otg: return zero when reset property is not presentJaehoon Chung2020-11-221-1/+1
| | | | | | | | | | | | | | If reset DT property is not present, -ENOENT is returned. But it's not really error. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
| * usb: dwc3: Handle case where setup_phy is not neededSiva Durga Prasad Paladugu2020-11-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_PHY is not enabled then the dwc3_setup_phy() returns ENOTSUPP which can be still valid and intentional so modify error check to handle this -ENOTSUPP. The same error handling exists in drivers/usb/host/xhci-dwc3.c already added by commit d648a50c0a27 ("dwc3: move phy operation to core.c"). Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * usb: dwc2: add "u-boot,force-vbus-detection" for stm32Patrick Delaunay2020-11-223-21/+41
| | | | | | | | | | | | | | | | | | | | | | On some board, the ID pin is not connected so the B session must be overridden with "u-boot,force_b_session_valid" but the VBus sensing must continue to be handle. To managed it, this patch adds a new DT field "u-boot,force-vbus-detection" to use with "u-boot,force_b_session_valid" Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-shTom Rini2020-11-228-818/+1068
|\ \ | |/ |/| | | - Assorted pinctrl updates
| * pinctrl: renesas: Drop unused members from struct sh_pfc_pinctrlLad Prabhakar2020-11-221-4/+0
| | | | | | | | | | | | | | Drop unused members from struct sh_pfc_pinctrl. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
| * pinctrl: renesas: r8a7795: Optimize pinctrl image size for R8A774E1Biju Das2020-11-221-2/+12
| | | | | | | | | | | | | | | | | | | | This driver supports both RZ/G2H and R-Car H3 SoCs. Optimize pinctrl image size for RZ/G2H, when support for R-Car H3 (R8A7795) is not enabled Based on the similar patch on Linux. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
| * pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1Biju Das2020-11-221-0/+12
| | | | | | | | | | | | | | | | | | | | This driver supports both RZ/G2N and R-Car M3-N SoCs. Optimize pinctrl image size for RZ/G2N, when support for R-Car M3-N (R8A77965) is not enabled. Based on the simialr patch on Linux. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
| * pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1Biju Das2020-11-221-0/+12
| | | | | | | | | | | | | | | | | | | | This driver supports both RZ/G2M and R-Car M3-W/W+ SoCs. Optimize pinctrl image size for RZ/G2M, when support for R-Car M3-W/W+ (R8A7796[01]) is not enabled. Based on the similar patch on Linux. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
| * pinctrl: renesas: r8a77951: Add R8A774E1 PFC supportBiju Das2020-11-226-409/+520
| | | | | | | | | | | | | | | | | | | | | | | | | | Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (r8a77951), however it doesn't have several automotive specific peripherals. Add a r8a77951 specific pin groups/functions along with common pin groups/functions for supporting both r8a77951 and r8a774e1 SoC. PFC changes are synced from mainline linux-5.9 commit bbf5c979011a ("Linux 5.9"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
| * pinctrl: renesas: r8a77965: Add R8A774B1 PFC supportBiju Das2020-11-226-405/+514
|/ | | | | | | | | | | | | Renesas RZ/G2N (r8a774b1) is pin compatible with R-Car M3-N (r8a77965), however it doesn't have several automotive specific peripherals. Add a r8a77965 specific pin groups/functions along with common pin groups/functions for supporting both r8a77965 and r8a774b1 SoC. PFC changes are synced from mainline linux-5.9 commit bbf5c979011a ("Linux 5.9"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
* Merge tag 'efi-2021-01-rc3-2' of ↵WIP/21Nov2020Tom Rini2020-11-214-75/+101
|\ | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2021-01-rc3 (2) The parameter check for UEFI service GetNextVariableName() is corrected. The dependencies of CONFIG_DFU_TFTP are simplified. The set of supported hash algorithms reported by the EFI_TCG2_PROTOCOL is corrected.
| * efi_loader: parameter check in GetNextVariableName()Heinrich Schuchardt2020-11-211-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | If GetNextVariableName() is called with a non-existing combination of VariableName and VendorGuid, return EFI_INVALID_PARAMETER. If GetNextVariableName() is called with a string that is not zero terminated, return EFI_INVALID_PARAMETER. Reformat a line over 80 characters. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * efi_loader: tcg2 protocol updatesIlias Apalodimas2020-11-212-70/+92
| | | | | | | | | | | | | | | | | | On pull reuqest https://lists.denx.de/pipermail/u-boot/2020-November/432735.html V4 of the patchset was sent instead of the v5. This is the v4->v5 missing diff Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
| * dfu: simplify the dependencies of DFU_TFTPAKASHI Takahiro2020-11-211-2/+1
| | | | | | | | | | | | | | | | | | | | Since CONFIG_UPDATE_COMMON always selects CONFIG_DFU_WRITE_ALT, we can drop the latter from dependencies of CONFIG_DFU_TFTP. Fixes: 3149e524fc1e ("common: update: add a generic interface for FIT image") Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | Merge tag 'xilinx-for-v2021.01-rc3' of ↵WIP/20Nov2020Tom Rini2020-11-2011-110/+35
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.01-rc3 Microblaze: - Enable GC - Get rid of xparameters.h and switch to DT for CFI - Fix config file tpm: - Fix TPM code zynqmp: - Enable TPM by default - Remove unused macros fru: - Several fixes especially use limit for recording
| * fru: common: Record pcie/uuid fields in custom board areaMichal Simek2020-11-201-0/+4
| | | | | | | | | | | | Add additional fields. They will be just recorded and filled but not shown. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * fru: ops: Do not let parser to write data to not allocated spaceMichal Simek2020-11-201-1/+7
| | | | | | | | | | | | | | | | | | If customs fields in board area are used it will likely go over allocated space in struct fru_board_data. That's why calculate limit of this structure to make sure that different data is not rewritten by accident. When limit is reached stop to record fields. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * fru: common: Switch capture variable with the restMichal Simek2020-11-202-2/+2
| | | | | | | | | | | | | | | | | | capture variable is bool which is just one byte and it is just causing unaligned accesses. Better to have it as last entry in the structure. It also simplify offset calculation for initial header copy. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Enable TPM for xilinx platformsMichal Simek2020-11-201-0/+3
| | | | | | | | | | | | TPMs are becoming popular that's why enable drivers and command for it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * arm64: zynqmp: Get rid of unused macrosMichal Simek2020-11-201-4/+2
| | | | | | | | | | | | | | There is no reason to have these macros. But record offsets of missing register in the structure for future use. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * tpm: spi: Cleanup source codeMichal Simek2020-11-201-3/+0
| | | | | | | | | | | | | | There is no need for GD to be used and priv variable is unused. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * microblaze: Detect NOR flash based on DTMichal Simek2020-11-202-38/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove fixed configuration and detect flash based on DT. Also increase amount of flash sectors to 2048 because on kc705 flash has 1027 sectors. Bank # 1: CFI conformant flash (16 x 16) Size: 128 MB in 1027 Sectors Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x8962 Erase timeout: 4096 ms, write timeout: 2 ms Buffer write timeout: 5 ms, buffer size: 1024 bytes Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Unify of setting for SPL_NOR/XIP supportMichal Simek2020-11-201-5/+3
| | | | | | | | | | | | | | | | | | | | XIP is not enabled in SPL. SPL_NOR is enabled but any macro setting with using SYS_FLASH_BASE are wrong because it is not aligned with DM. That's why change these macro and align them with TEXT_BASE macro. Information should be find at run time based on DT but implementation is not done yet. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Remove CONFIG_SYS_FDT_SIZEMichal Simek2020-11-202-2/+0
| | | | | | | | | | | | CONFIG_SYS_FDT_SIZE is not use anywhere that's why remove it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Get rid of xparameters.hMichal Simek2020-11-202-19/+6
| | | | | | | | | | | | | | There is no need to use this file anymore. Include it in main config file and simplify logic based on it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Simplify cache handlingMichal Simek2020-11-201-14/+2
| | | | | | | | | | | | | | Enable caches by default. For now just simplify config file but it should be read from DT or PVRs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Clean config file from ifdef messMichal Simek2020-11-201-24/+0
| | | | | | | | | | | | | | A lot of configs has been moved to Kconfig and it ends up in ifdef mess with no bodies. That's why remove all of them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Enable GCC garbage collector for full U-BootMichal Simek2020-11-202-3/+6
|/ | | | | | | | | | | | | | | | | | | | | | GCC's garbage collector works for Microblaze for quite a long time but none has enabled it. The same change has be done for example by commit fac4790491f6 ("arc: Eliminate unused code and data with GCC's garbage collector"). Before: text data bss dec hex filename 588760 33592 39192 661544 a1828 u-boot After: text data bss dec hex filename 504504 32164 38608 575276 8c72c u-boot Which saves almost 15% of memory footprint. Also group symbols/functions to proper section. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Merge branch '2020-11-18-assorted-fixes'WIP/19Nov2020Tom Rini2020-11-1926-168/+321
|\ | | | | | | | | | | - Assorted SquashFS fixes and cleanups - Fixes for various Coverity issues - Various fixups to other platforms / code
| * fs/squashfs: implement exists() functionRichard Genoud2020-11-193-1/+40
| | | | | | | | | | | | | | This permits to find a file and use the distro_bootcmd Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com> Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
| * fs/squashfs: sqfs_read: remove buggy offset functionalityRichard Genoud2020-11-191-4/+12
| | | | | | | | | | | | | | | | | | offset is the offset in the file read, not the offset in the destination buffer. If the offset is not null, this will lead to a memory corruption. So, for now, we are returning an error if the offset is used. Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
| * fs/squashfs: sqfs_read: don't write beyond buffer sizeRichard Genoud2020-11-191-0/+8
| | | | | | | | | | | | | | The length of the buffer wasn't taken into account when writing to the given buffer. Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
| * fs/squashfs: sqfs_probe: use sqfs_decompressor_init() return valueRichard Genoud2020-11-191-2/+0
| | | | | | | | | | | | | | | | sqfs_decompressor_init() returns a value, so it's better to use it than to force the return value to EINVAL (it could be ENOMEM) Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com> Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
| * fs/squashfs: sqfs_probe: reset cur_dev/cur_part_info to NULL on errorRichard Genoud2020-11-191-1/+1
| | | | | | | | | | | | | | | | Resetting the context on error will prevent some checks like: if (!ctx.cur_dev) To pass when the probe method has failed Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
| * fs/squashfs: sqfs_probe: fix possible memory leak on errorRichard Genoud2020-11-191-5/+9
| | | | | | | | | | | | | | If SquashFS magic number is invalid, there's a memory leak. Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com> Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
| * fs/squashfs: sqfs_read: fix memory leak on finfo.blk_sizesRichard Genoud2020-11-191-26/+22
| | | | | | | | | | | | | | | | | | finfo.blk_sizes may not be freed in case of error in the for loop Setting it to null and freeing it at the end makes prevents that from happening. Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com> Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
| * fs/squashfs: sqfs_get_abs_path: fix possible memory leak on errorRichard Genoud2020-11-191-14/+18
| | | | | | | | | | | | | | | | if sqfs_tokenize(rel_tokens, rc, rel); fails, the function exits without freeing the array base_tokens. Reviewed-by: Joao Marcos Costa <jmcosta944@gmail.com> Signed-off-by: Richard Genoud <richard.genoud@posteo.net>
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