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authorJohn Rigby <jrigby@freescale.com>2007-07-10 14:58:41 -0600
committerJohn Rigby <jrigby@freescale.com>2007-07-10 14:58:41 -0600
commit98c80b462f9532f3ff6a62dd9629023b48627a6d (patch)
treebea13c7b7f892aa5875e737bd52535be50d96d25 /include/configs/CPCI4052.h
parent0dca874db62718e41253659e60f3a1de7eb418ce (diff)
parent4ef218f6fdf8d747f4589da5252b004e7d2c2876 (diff)
downloadu-boot-98c80b462f9532f3ff6a62dd9629023b48627a6d.tar.gz
Merge branch 'master' into u-boot-5329-early
Diffstat (limited to 'include/configs/CPCI4052.h')
-rw-r--r--include/configs/CPCI4052.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index d756f447f7..3fc99c5024 100644
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -37,6 +37,7 @@
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_CPCI405 1 /* ...on a CPCI405 board */
#define CONFIG_CPCI405_VER2 1 /* ...version 2 */
+#undef CONFIG_CPCI405_6U /* enable this for 6U boards */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
@@ -56,6 +57,10 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
+
+#define CONFIG_NET_MULTI 1
+#undef CONFIG_HAS_ETH1
#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */