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authorSimon Glass <sjg@chromium.org>2019-09-25 08:56:37 -0600
committerBin Meng <bmeng.cn@gmail.com>2019-10-08 13:57:47 +0800
commit55a6b13a75276fbdf7186b34b4ad72238a7ec16b (patch)
tree9efd23735408507ff6fd90df3f27ebcdc6888607 /arch/x86/include/asm
parent246ac08b037befab08805750049df75044ab7f6c (diff)
downloadu-boot-55a6b13a75276fbdf7186b34b4ad72238a7ec16b.tar.gz
x86: Use a common bus clock for Intel CPUs
Modern Intel CPUs use a standard bus clock value of 100MHz, so put this in a common file and tidy up the copies. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/x86/include/asm')
-rw-r--r--arch/x86/include/asm/arch-broadwell/cpu.h3
-rw-r--r--arch/x86/include/asm/arch-broadwell/pch.h3
-rw-r--r--arch/x86/include/asm/arch-ivybridge/model_206ax.h3
-rw-r--r--arch/x86/include/asm/cpu_common.h5
4 files changed, 5 insertions, 9 deletions
diff --git a/arch/x86/include/asm/arch-broadwell/cpu.h b/arch/x86/include/asm/arch-broadwell/cpu.h
index ca22a79996..3bc3bd6609 100644
--- a/arch/x86/include/asm/arch-broadwell/cpu.h
+++ b/arch/x86/include/asm/arch-broadwell/cpu.h
@@ -21,9 +21,6 @@
#define CPUID_BROADWELL_D0 0x306d3
#define CPUID_BROADWELL_E0 0x306d4
-/* Broadwell bus clock is fixed at 100MHz */
-#define BROADWELL_BCLK 100
-
#define BROADWELL_FAMILY_ULT 0x306d0
#define CORE_THREAD_COUNT_MSR 0x35
diff --git a/arch/x86/include/asm/arch-broadwell/pch.h b/arch/x86/include/asm/arch-broadwell/pch.h
index 23153a040f..ecdf6d16f9 100644
--- a/arch/x86/include/asm/arch-broadwell/pch.h
+++ b/arch/x86/include/asm/arch-broadwell/pch.h
@@ -6,9 +6,6 @@
#ifndef __ASM_ARCH_PCH_H
#define __ASM_ARCH_PCH_H
-/* CPU bus clock is fixed at 100MHz */
-#define CPU_BCLK 100
-
#define PMBASE 0x40
#define ACPI_CNTL 0x44
#define ACPI_EN (1 << 7)
diff --git a/arch/x86/include/asm/arch-ivybridge/model_206ax.h b/arch/x86/include/asm/arch-ivybridge/model_206ax.h
index 850d96bdd9..10caaa2422 100644
--- a/arch/x86/include/asm/arch-ivybridge/model_206ax.h
+++ b/arch/x86/include/asm/arch-ivybridge/model_206ax.h
@@ -8,9 +8,6 @@
#ifndef _ASM_ARCH_MODEL_206AX_H
#define _ASM_ARCH_MODEL_206AX_H
-/* SandyBridge/IvyBridge bus clock is fixed at 100MHz */
-#define SANDYBRIDGE_BCLK 100
-
#define CPUID_VMX (1 << 5)
#define CPUID_SMX (1 << 6)
#define MSR_FEATURE_CONFIG 0x13c
diff --git a/arch/x86/include/asm/cpu_common.h b/arch/x86/include/asm/cpu_common.h
index e158c96ce6..f42eb32308 100644
--- a/arch/x86/include/asm/cpu_common.h
+++ b/arch/x86/include/asm/cpu_common.h
@@ -6,6 +6,11 @@
#ifndef __ASM_CPU_COMMON_H
#define __ASM_CPU_COMMON_H
+/* Standard Intel bus clock is fixed at 100MHz */
+enum {
+ INTEL_BCLK_MHZ = 100
+};
+
struct cpu_info;
/**