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| author | Richard Retanubun <RichardRetanubun@RuggedCom.com> | 2011-03-24 08:58:11 +0000 |
|---|---|---|
| committer | jason <jason@jason-ThinkPad-T61.(none)> | 2012-09-20 20:39:27 +0800 |
| commit | 59d0612252a0ffcb878a1891249d32a306a24fa6 (patch) | |
| tree | eef4fe1f59521cf6a2096434f0c600b1e82fc138 /arch/m68k/include/asm/coldfire | |
| parent | 198cafbf2cab9851ee5dd8d24d268d0ccc0fe3bd (diff) | |
| download | u-boot-59d0612252a0ffcb878a1891249d32a306a24fa6.tar.gz | |
ColdFire: Queued SPI driver
This patch adds a driver for Freescale Colfire Queued SPI bus.
Coded to work with 8 bits per transfer to use with SPI flash.
CPOL, CPHA, and CS_ACTIVE_HIGH can be configured.
Tested with MCF5270 which have 4 chip selects.
Activate by #define CONFIG_CF_QSPI in board config.
Signed-off-by: Richard Retanubun <richardretanubun@ruggedcom.com>
Diffstat (limited to 'arch/m68k/include/asm/coldfire')
| -rw-r--r-- | arch/m68k/include/asm/coldfire/qspi.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/m68k/include/asm/coldfire/qspi.h b/arch/m68k/include/asm/coldfire/qspi.h index 8bcd2e4db1..9fd98f6c04 100644 --- a/arch/m68k/include/asm/coldfire/qspi.h +++ b/arch/m68k/include/asm/coldfire/qspi.h @@ -98,7 +98,7 @@ typedef struct qspi_ctrl { #define QSPI_QAR_RECV (0x0010) #define QSPI_QAR_CMD (0x0020) -/* DR */ +/* DR with RAM command word definitions */ #define QSPI_QDR_CONT (0x8000) #define QSPI_QDR_BITSE (0x4000) #define QSPI_QDR_DT (0x2000) |