diff options
author | Vignesh R <vigneshr@ti.com> | 2016-07-06 10:20:57 +0530 |
---|---|---|
committer | Jagan Teki <jteki@openedev.com> | 2016-07-09 20:16:33 +0530 |
commit | b60774fff1d2098c79cf1efb1e242f5f662ce317 (patch) | |
tree | 9210822472087e0a4c340e35b4a7000ae7577aaf /arch/arm/dts/k2g.dtsi | |
parent | 2372e14f1937fceea54d698342e5a4240b58a893 (diff) | |
download | u-boot-b60774fff1d2098c79cf1efb1e242f5f662ce317.tar.gz |
ARM: dts: K2G: Add support for QSPI controller
K2G SoC has a Cadence QSPI controller to communicate with NOR flash
devices. Add DT nodes to support the same.
Also, K2G EVM has a s25fl512s flash connect to QSPI bus at CS 0. Add nor
flash slave node for the same.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Diffstat (limited to 'arch/arm/dts/k2g.dtsi')
-rw-r--r-- | arch/arm/dts/k2g.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/dts/k2g.dtsi b/arch/arm/dts/k2g.dtsi index 88b1a8e998..00cd492973 100644 --- a/arch/arm/dts/k2g.dtsi +++ b/arch/arm/dts/k2g.dtsi @@ -23,6 +23,7 @@ spi1 = &spi1; spi2 = &spi2; spi3 = &spi3; + spi4 = &qspi; }; memory { @@ -84,6 +85,19 @@ bus_freq = <2500000>; }; + qspi: qspi@2940000 { + compatible = "cadence,qspi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x02940000 0x1000>, + <0x24000000 0x4000000>; + interrupts = <GIC_SPI 198 IRQ_TYPE_EDGE_RISING>; + num-cs = <4>; + fifo-depth = <256>; + sram-size = <256>; + status = "disabled"; + }; + #include "k2g-netcp.dtsi" pmmc: pmmc@2900000 { |