On at least ASUS A8N-E, unless *all* registers are restored to pre-PXE
status, localboot doesn't work.  We were clobbering DS, ESI and EDX
when chainloading an NBP, which meant that localboot wouldn't work in
the chainloaded NBP.  Fix this.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>

Windows RIS has been reported to make inappropriate use of data found
in uninitialized memory.  To avoid that, clear memory between
a chainloaded boot sector or NBP and Free Base Memory.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>

MDSLINUX (Multiple Disk Syslinux) will never happen, kill references
to it.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>

Conflicts:
	core/bootsect.inc
	version

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>

KeepPXE was broken in 3.74, because we tried to use both bits 0 and 1,
but failed to actually test both bits.  Instead, just use bit 0, but
move the place where we clear the bits.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>

KVM uses V86 mode to simulate real mode.  This causes problems with
the new shuffler.  This changes the shuffler handover to be in
16-bit protected mode instead, and requires the stub to do the actual
entry to real mode.  For the KVM hack to work, all segments must have:

(seg.base & 0xfff0000f) == 0 && seg.limit == 0xffff

As a result, we have to make sure the real-mode entry stub is
paragraph-aligned, lest we violate the first criterion.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>

Conflicts:
	com32/lib/syslinux/memmap.c

Signed-off-by: H. Peter Anvin <hpa@zytor.com>

Update copyright notices.  Per agreement with my new employer, Intel
Corporation, add Intel copyright notices where appropriate.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>

The shuffle list length needs to be passed into the shuffler in ECX,
but when using the shuffler internally it is a 16-bit number, which
needs to be zero-extended.  Zero-extend the proper register, please!

Signed-off-by: H. Peter Anvin <hpa@zytor.com>