From 11a56768950e1caae302507e15e58eb1c316c30a Mon Sep 17 00:00:00 2001 From: Jeremy Allison Date: Wed, 6 Sep 2017 09:58:06 -0700 Subject: third_party: Add build capability to aesni-intel. Minor modifications to code to allow building as a Samba shared library. BUG: https://bugzilla.samba.org/show_bug.cgi?id=13008 Based on original work by Justin Maggard Signed-off-by: Jeremy Allison Reviewed-by: Stefan Metzmacher --- third_party/aesni-intel/aesni-intel_asm.c | 26 +++++++++++++++++--------- third_party/aesni-intel/inst-intel.h | 4 ---- third_party/aesni-intel/wscript | 14 ++++++++++++++ third_party/wscript | 2 ++ 4 files changed, 33 insertions(+), 13 deletions(-) create mode 100644 third_party/aesni-intel/wscript (limited to 'third_party') diff --git a/third_party/aesni-intel/aesni-intel_asm.c b/third_party/aesni-intel/aesni-intel_asm.c index 383a6f84a06..7baf703f338 100644 --- a/third_party/aesni-intel/aesni-intel_asm.c +++ b/third_party/aesni-intel/aesni-intel_asm.c @@ -29,9 +29,19 @@ * (at your option) any later version. */ -#include -#include -#include +#define ENTRY(name) \ + .globl name ; \ + .align 4,0x90 ; \ + name: +#define ENDPROC(name) \ + .type name, @function ; \ + .size name, .-name + +#define FRAME_BEGIN +#define FRAME_END +#define FRAME_OFFSET 0 + +#include "inst-intel.h" /* * The following macros are used to move an (un)aligned 16 byte value to/from @@ -2553,11 +2563,9 @@ ENTRY(aesni_cbc_dec) ENDPROC(aesni_cbc_dec) #ifdef __x86_64__ -.pushsection .rodata .align 16 .Lbswap_mask: .byte 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0 -.popsection /* * _aesni_inc_init: internal ABI @@ -2572,7 +2580,7 @@ ENDPROC(aesni_cbc_dec) */ .align 4 _aesni_inc_init: - movaps .Lbswap_mask, BSWAP_MASK + movaps .Lbswap_mask(%rip), BSWAP_MASK movaps IV, CTR PSHUFB_XMM BSWAP_MASK CTR mov $1, TCTR_LOW @@ -2700,12 +2708,12 @@ ENTRY(aesni_xts_crypt8) cmpb $0, %cl movl $0, %ecx movl $240, %r10d - leaq _aesni_enc4, %r11 - leaq _aesni_dec4, %rax + leaq _aesni_enc4(%rip), %r11 + leaq _aesni_dec4(%rip), %rax cmovel %r10d, %ecx cmoveq %rax, %r11 - movdqa .Lgf128mul_x_ble_mask, GF128MUL_MASK + movdqa .Lgf128mul_x_ble_mask(%rip), GF128MUL_MASK movups (IVP), IV mov 480(KEYP), KLEN diff --git a/third_party/aesni-intel/inst-intel.h b/third_party/aesni-intel/inst-intel.h index 3e115273ed8..95978be17e2 100644 --- a/third_party/aesni-intel/inst-intel.h +++ b/third_party/aesni-intel/inst-intel.h @@ -5,8 +5,6 @@ #ifndef X86_ASM_INST_H #define X86_ASM_INST_H -#ifdef __ASSEMBLY__ - #define REG_NUM_INVALID 100 #define REG_TYPE_R32 0 @@ -306,5 +304,3 @@ MODRM 0xc0 movq_r64_xmm_opd1 movq_r64_xmm_opd2 .endm #endif - -#endif diff --git a/third_party/aesni-intel/wscript b/third_party/aesni-intel/wscript new file mode 100644 index 00000000000..002ba5d42d1 --- /dev/null +++ b/third_party/aesni-intel/wscript @@ -0,0 +1,14 @@ +#!/usr/bin/env python + +def configure(conf): + if conf.CHECK_CFLAGS('-Wp,-E,-lang-asm', '') and conf.env['SYSTEM_UNAME_MACHINE'] == 'x86_64': + conf.DEFINE('HAVE_AESNI_INTEL', 1) + +def build(bld): + if not bld.CONFIG_SET('HAVE_AESNI_INTEL'): + return + + bld.SAMBA_LIBRARY('aesni-intel', + source='aesni-intel_asm.c', + cflags='-Wp,-E,-lang-asm', + private_library=True) diff --git a/third_party/wscript b/third_party/wscript index ad4d6245bbd..7c2923f611e 100644 --- a/third_party/wscript +++ b/third_party/wscript @@ -50,6 +50,7 @@ def configure(conf): conf.RECURSE('cmocka') conf.RECURSE('popt') conf.RECURSE('zlib') + conf.RECURSE('aesni-intel') def build(bld): @@ -73,3 +74,4 @@ def build(bld): bld.RECURSE('cmocka') bld.RECURSE('zlib') bld.RECURSE('popt') + bld.RECURSE('aesni-intel') -- cgit v1.2.1