From c30a6232df03e1efbd9f3b226777b07e087a1122 Mon Sep 17 00:00:00 2001 From: Allan Sandfeld Jensen Date: Mon, 12 Oct 2020 14:27:29 +0200 Subject: BASELINE: Update Chromium to 85.0.4183.140 Change-Id: Iaa42f4680837c57725b1344f108c0196741f6057 Reviewed-by: Allan Sandfeld Jensen --- chromium/v8/src/codegen/mips/macro-assembler-mips.cc | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'chromium/v8/src/codegen/mips/macro-assembler-mips.cc') diff --git a/chromium/v8/src/codegen/mips/macro-assembler-mips.cc b/chromium/v8/src/codegen/mips/macro-assembler-mips.cc index 48b2acf4562..efb2dc11e1f 100644 --- a/chromium/v8/src/codegen/mips/macro-assembler-mips.cc +++ b/chromium/v8/src/codegen/mips/macro-assembler-mips.cc @@ -3906,6 +3906,7 @@ void TurboAssembler::Call(Register target, int16_t offset, Condition cond, // Emit a nop in the branch delay slot if required. if (bd == PROTECT) nop(); } + set_last_call_pc_(pc_); } // Note: To call gcc-compiled C code on mips, you must call through t9. @@ -3938,6 +3939,7 @@ void TurboAssembler::Call(Register target, Register base, int16_t offset, // Emit a nop in the branch delay slot if required. if (bd == PROTECT) nop(); } + set_last_call_pc_(pc_); } void TurboAssembler::Call(Address target, RelocInfo::Mode rmode, Condition cond, @@ -5427,7 +5429,7 @@ void TurboAssembler::CallCFunctionHelper(Register function_base, void TurboAssembler::CheckPageFlag(Register object, Register scratch, int mask, Condition cc, Label* condition_met) { And(scratch, object, Operand(~kPageAlignmentMask)); - lw(scratch, MemOperand(scratch, MemoryChunk::kFlagsOffset)); + lw(scratch, MemOperand(scratch, BasicMemoryChunk::kFlagsOffset)); And(scratch, scratch, Operand(mask)); Branch(condition_met, cc, scratch, Operand(zero_reg)); } -- cgit v1.2.1