From 3b65323d800a04570e4364f9419d518a16bb9512 Mon Sep 17 00:00:00 2001 From: Jin Kyu Song Date: Fri, 8 Nov 2013 11:41:12 -0800 Subject: MPX: Adapt GAS's mib syntax with an index reg only GAS uses *1 multiplier for explicitly marking an index register in mib operand. e.g.) [rdx * 1 + 3] is equivalent to [3, rdx] in NASM's split EA format So only for mib operands, this is encoded same as gas does. Signed-off-by: Jin Kyu Song --- assemble.c | 12 ++++++++++++ test/mpx-64.asm | 8 ++++---- 2 files changed, 16 insertions(+), 4 deletions(-) diff --git a/assemble.c b/assemble.c index d1234eea..d62b9308 100644 --- a/assemble.c +++ b/assemble.c @@ -1205,6 +1205,18 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits, opy->hinttype = EAH_NOTBASE; } + /* + * only for mib operands, make a single reg index [reg*1]. + * gas uses this form to explicitly denote index register. + */ + if ((temp->flags & IF_MIB) && + (opy->indexreg == -1 && opy->hintbase == opy->basereg && + opy->hinttype == EAH_NOTBASE)) { + opy->indexreg = opy->basereg; + opy->basereg = -1; + opy->scale = 1; + } + if (process_ea(opy, &ea_data, bits, rfield, rflags, ins) != eat) { errfunc(ERR_NONFATAL, "invalid effective address"); diff --git a/test/mpx-64.asm b/test/mpx-64.asm index 50cc4da2..bc5e7d40 100644 --- a/test/mpx-64.asm +++ b/test/mpx-64.asm @@ -81,16 +81,16 @@ BITS 64 bndstx [rax+0x3], bnd0, rbx ; ICC-1 bndstx [rax+0x3], rbx, bnd0 ; ICC-2 - ; GAS's confusing EA - rcx is base reg in NASM - bndstx [rcx*1], bnd2 - ; next 4 lines should be parsed same + ; next 5 lines should be parsed same bndstx [,rcx*1], bnd2 ; NASM bndstx [0,rcx*1], bnd2 ; NASM bndstx [0], bnd2, rcx ; ICC-1 bndstx [0], rcx, bnd2 ; ICC-2 + bndstx [rcx*1], bnd2 ; GAS - rcx is encoded as index only when it is mib - bndstx [1*r12+3], bnd2 ; GAS's confusing EA again + ; next 3 lines should be parsed same bndstx [3,1*r12], bnd2 ; NASM + bndstx [1*r12+3], bnd2 ; GAS bndstx [3], r12, bnd2 ; ICC bndstx [r12+0x399], bnd3 -- cgit v1.2.1