| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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Conflicts:
insns.dat
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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The implicit operand size override code didn't set the operand size
prefix, which confused the size calculation code for the range check.
The BITS 64 operand size calculation is still off, but "fixing" it by
making it 32-bit unless REX.W is set breaks PUSH and maybe others.
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It is more logical, it cleans up the code and it makes implicit
operand size override prefixes come out in the same order as explicit
ones instead of after all other prefixes.
Suggested-by: H. Peter Anvin <hpa@zytor.com>
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calcsize() had the wrong criterion for when C5 prefixes are permitted
(REX.R is permitted, REX.X is forbidden.) assemble() had the right
test already. This caused symbol value errors.
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The implicit operand size override code didn't set the operand size
prefix, which confused the size calculation code for the range check.
The BITS 64 operand size calculation is still off, but "fixing" it by
making it 32-bit unless REX.W is set breaks PUSH and maybe others.
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Not automated yet
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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coff massive relocations test
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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Not all covered but still worth to put in
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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Handle segment register operations in 64-bit mode, and add a few
optimization patterns.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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Handle immediate-size optimization for "mov r64,imm" -- reduce it to
"mov r32,imm32" or "mov r64,imm32" as appropriate.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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Remove the deleted VPERMIL2 instructions.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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H. Peter Anvin pointed
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| Btw, test/imm64.asm needs test engine annotations.
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Make it so.
Reported-by: "H. Peter Anvin" <hpa@zytor.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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This reverts commit ac732cb6a599836bf4c988e59ac6de4498758c72.
Resolved Conflicts:
doc/nasmdoc.src
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Two fixes:
1. Optimization of [bx+0xFFFF] etc
0xFFFF is an sbyte under 16-bit semantics,
so make sure to check it right.
2. Don't optimize displacements in -O0
Displacements that fit into an sbyte or
can be removed should *not* be optimized in -O0.
Implicit zero displacements are still optimized, e.g.:
[eax] -> 0 bit displacement, [ebp] -> 8 bit displacement.
However explicit displacements are not optimized:
[eax+0] -> 32 bit displacement, [ebp+0] -> 32 bit displacement.
Because #2 breaks compatibility with 0.98,
I introduced a new optimization level: -OL, legacy.
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Under particular circumstances %strlen may cause SIGSEG. A typical
example is %strlen with nonexistent macro argument.
[ Testcase test/strlen.asm ]
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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Allow non-identifier characters in the name of environment variables,
by surrounding them with string quotes (subject to ordinary
string-quoting rules.)
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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Add another test case for preprocessor token pasting.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Add test case for BR 3026808 (%assign %$local).
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Add the RD*SBASE, WR*SBASE and RDRAND instructions from version 7 of
the AVX specification, Intel document 319433-007.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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The former changes have been committed to binutils.
From initial message:
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| 2010-03-22 Quentin Neill <quentin.neill@amd.com>
| Sebastian Pop <sebastian.pop@amd.com>
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| opcodes/
| * i386-dis.c (OP_LWP_I): Removed.
| (reg_table): Do not use OP_LWP_I, use Iq.
| (OP_LWPCB_E): Remove use of names16.
| (OP_LWP_E): Same.
| * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
| should not set the Vex.length bit.
| * i386-tbl.h: Regenerated.
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| gas/
| * testsuite/gas/i386/x86-64-lwp.s: Remove use of 16bit LWP insns.
| * testsuite/gas/i386/lwp.s: Same.
| * testsuite/gas/i386/x86-64-lwp.d: Updated.
| * testsuite/gas/i386/lwp.d: Updated.
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So there is no 16 bit instructions anymore.
Also xop.l field should be set to 0.
Based on patch from nasm64developer
Reported-by: nasm64developer
Signed-off-by: nasm64developer
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
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Check if the offset and the representation are equivalent.
Disallow REL on absolute addresses.
I'm not sure what that would mean and the output formats don't support it.
Warn about ignored displacement size modifiers.
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Make it easier to inject options into test compiles.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Remove references to DREX instructions
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Only make the tests under WARN actually issue warnings.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Test more IMUL patterns.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Add more output rules to be able to try things quickly.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Add ith and srec targets because, well, why not...
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Add a rule to produce a .dbg file, that is, a dump of all the calls to
the back end.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Make the MMX version of PINSRW match the SSE and AVX ones, and add it
to the tests.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Clean up a number of errors in the PINSR series instructions.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Unify the token-pasting code between the macro expansion and the
preprocessor parameter case. Parameterize whether or not to handle %+
tokens during expansion (%+ tokens have late binding semantics.)
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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The tokenizer didn't handle $$, but relied on token pasting of two $ tokens.
This broke after the improvements in 9bb46df4.
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"+" can be a separate token that ends up having to get pulled into the
middle of a floating-point constant. It's not even that strange.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Especially when token pasting involves floating-point numbers, we can
have some really strange effects from token pasting: for example,
pasting the two tokens "xyzzy" and "1e+10" ends up with *three*
tokens: "xyzzy1e" "+" "10". The easiest way to deal with this is to
explicitly combine the string and then run tokenize() on it.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
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Add an optional second argument to struc, document it and test it.
Also removed trailing whitespace in nasmdoc.src in the process.
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Add the test case from BR 2690688 to the test collection.
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A few more sbyte optimization tests.
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Add tests for EA optimizations
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