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| author | Cyrill Gorcunov <gorcunov@gmail.com> | 2011-02-23 00:41:43 +0300 |
|---|---|---|
| committer | Cyrill Gorcunov <gorcunov@gmail.com> | 2011-02-23 00:41:43 +0300 |
| commit | 79abe7a73126d51047d0715469264bb55ccca845 (patch) | |
| tree | 4b66919cffbe7bac628f640d65f51615680dfcc0 | |
| parent | 2e6f7c342d8ba2571d6603544d41b04436631dc8 (diff) | |
| download | nasm-79abe7a73126d51047d0715469264bb55ccca845.tar.gz | |
insns: VLDQQU is back
As HPA explained
|
| w.r.t. the -QQ- instruction forms... when we did
| the initial AVX implementation we decided that
| using -DQ- (double quadword) for 256-bit instructions
| was a bit messy, so we decided to accept both -DQ-
| (being official) and -QQ-
|
So move VLDQQU back and place it before VLDDQU so disassembler
match it first.
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
| -rw-r--r-- | insns.dat | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -2334,6 +2334,7 @@ VHSUBPS ymmreg,ymmreg*,ymmrm256 [rvm: vex.nds.256.f2.0f 7d /r] AVX,SANDYBRIDG VINSERTF128 ymmreg,ymmreg,xmmrm128,imm8 [rvmi: vex.nds.256.66.0f3a.w0 18 /r ib] AVX,SANDYBRIDGE VINSERTPS xmmreg,xmmreg*,xmmrm32,imm8 [rvmi: vex.nds.128.66.0f3a 21 /r ib] AVX,SANDYBRIDGE VLDDQU xmmreg,mem128 [rm: vex.128.f2.0f f0 /r] AVX,SANDYBRIDGE +VLDQQU ymmreg,mem256 [rm: vex.256.f2.0f f0 /r] AVX,SANDYBRIDGE VLDDQU ymmreg,mem256 [rm: vex.256.f2.0f f0 /r] AVX,SANDYBRIDGE VLDMXCSR mem32 [m: vex.lz.0f ae /2] AVX,SANDYBRIDGE VMASKMOVDQU xmmreg,xmmreg [rm: vex.128.66.0f f7 /r] AVX,SANDYBRIDGE |