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authorConnor Abbott <cwabbott0@gmail.com>2022-10-17 16:52:30 +0200
committerMarge Bot <emma+marge@anholt.net>2023-02-23 20:02:26 +0000
commit44054b1f3b38f1483982ab0725768ba22794a445 (patch)
tree73c9ba5eb6e1de8bb637bb58ac116d4919905ea4 /src/freedreno
parentaba8aea2be79488533544a321c18ec57c8cdade6 (diff)
downloadmesa-44054b1f3b38f1483982ab0725768ba22794a445.tar.gz
freedreno/a6xx: Fix CP_ROQ_THRESHOLDS_1
Just by adding the ROQ_*_STAT registers following the previous pattern it becomes obvious what these fields actually are. Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Diffstat (limited to 'src/freedreno')
-rw-r--r--src/freedreno/.gitlab-ci/reference/crash.log2
-rw-r--r--src/freedreno/registers/adreno/a6xx.xml13
2 files changed, 6 insertions, 9 deletions
diff --git a/src/freedreno/.gitlab-ci/reference/crash.log b/src/freedreno/.gitlab-ci/reference/crash.log
index 4c6deca751c..aa239193329 100644
--- a/src/freedreno/.gitlab-ci/reference/crash.log
+++ b/src/freedreno/.gitlab-ci/reference/crash.log
@@ -692,7 +692,7 @@ registers:
00000000 0x8aa: 00000000
00000000 0x8ab: 00000000
00000000 CP_PREEMPT_THRESHOLD: 0
- 8040362c CP_ROQ_THRESHOLDS_1: { RB_LO = 0xb0 | RB_HI = 0xd8 | IB1_START = 0x100 | IB2_START = 0x200 }
+ 8040362c CP_ROQ_THRESHOLDS_1: { MRB_START = 0xb0 | VSD_START = 0xd8 | IB1_START = 0x100 | IB2_START = 0x200 }
010000c0 CP_ROQ_THRESHOLDS_2: { SDS_START = 0x300 | ROQ_SIZE = 0x400 }
00000080 CP_MEM_POOL_SIZE: 0x80
00000000 0x8c4: 00000000
diff --git a/src/freedreno/registers/adreno/a6xx.xml b/src/freedreno/registers/adreno/a6xx.xml
index 3af922dd79e..b5c9e6f6666 100644
--- a/src/freedreno/registers/adreno/a6xx.xml
+++ b/src/freedreno/registers/adreno/a6xx.xml
@@ -1016,16 +1016,13 @@ to upconvert to 32b float internally?
<!-- all the threshold values seem to be in units of quad-dwords: -->
<reg32 offset="0x08C1" name="CP_ROQ_THRESHOLDS_1">
<doc>
- b0..7 seems to contain the size of buffered by not yet processed
- RB level cmdstream.. it's possible that it is a low threshold
- and b8..15 is a high threshold?
-
- b16..23 identifies where IB1 data starts (and RB data ends?)
-
+ b0..7 identifies where MRB data starts (and RB data ends)
+ b8.15 identifies where VSD data starts (and MRB data ends)
+ b16..23 identifies where IB1 data starts (and RB data ends)
b24..31 identifies where IB2 data starts (and IB1 data ends)
</doc>
- <bitfield name="RB_LO" low="0" high="7" shr="2"/>
- <bitfield name="RB_HI" low="8" high="15" shr="2"/>
+ <bitfield name="MRB_START" low="0" high="7" shr="2"/>
+ <bitfield name="VSD_START" low="8" high="15" shr="2"/>
<bitfield name="IB1_START" low="16" high="23" shr="2"/>
<bitfield name="IB2_START" low="24" high="31" shr="2"/>
</reg32>