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| author | Connor Abbott <cwabbott0@gmail.com> | 2022-10-17 18:39:16 +0200 |
|---|---|---|
| committer | Marge Bot <emma+marge@anholt.net> | 2023-02-23 20:02:26 +0000 |
| commit | 4060cf5772c1a1cd5dfc988d831ed63802d7db2c (patch) | |
| tree | 09d45295c06fb403a681805d4fa027083e80d4f5 /src/freedreno | |
| parent | ce7225c0f90abacc8dfc22d08d2a95cdde2d81cc (diff) | |
| download | mesa-4060cf5772c1a1cd5dfc988d831ed63802d7db2c.tar.gz | |
freedreno/crashdec: Fix apparent off-by-one with ROQ size
I have multiple examples where this register is too large by one
when comparing to the ROQ read/write pointers in CP_ROQ_*_STAT and the
ROQ data itself, as if it includes the dword most recently read too. I
have an example where it's off by 2 compared to the read pointer, but
the read pointer is also off by 1 itself judging by the SQE program
counter, so that may just be them not getting synchronized. This
off-by-one was getting in the way of figuring out exactly IB2 was being
processed in the next commit.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19551>
Diffstat (limited to 'src/freedreno')
| -rw-r--r-- | src/freedreno/.gitlab-ci/reference/crash.log | 2 | ||||
| -rw-r--r-- | src/freedreno/decode/crashdec.c | 6 |
2 files changed, 5 insertions, 3 deletions
diff --git a/src/freedreno/.gitlab-ci/reference/crash.log b/src/freedreno/.gitlab-ci/reference/crash.log index 492f398f73a..2b1a08e9d4e 100644 --- a/src/freedreno/.gitlab-ci/reference/crash.log +++ b/src/freedreno/.gitlab-ci/reference/crash.log @@ -1670,7 +1670,7 @@ registers: 00000000 0xb622: 00000000 00000000 0xb623: 00000000 got rb_base=1000000001000 -IB1: 100000000, 6 +IB1: 100000000, 5 IB2: 0, 0 found ring! got cmdszdw=27 diff --git a/src/freedreno/decode/crashdec.c b/src/freedreno/decode/crashdec.c index b1df32d69ff..df8558783b2 100644 --- a/src/freedreno/decode/crashdec.c +++ b/src/freedreno/decode/crashdec.c @@ -359,8 +359,10 @@ dump_cmdstream(void) * by name rather than hard-coding this. */ if (is_a6xx()) { - options.ibs[1].rem += regval("CP_ROQ_AVAIL_IB1") >> 16; - options.ibs[2].rem += regval("CP_ROQ_AVAIL_IB2") >> 16; + uint32_t ib1_rem = regval("CP_ROQ_AVAIL_IB1") >> 16; + uint32_t ib2_rem = regval("CP_ROQ_AVAIL_IB2") >> 16; + options.ibs[1].rem += ib1_rem ? ib1_rem - 1 : 0; + options.ibs[2].rem += ib2_rem ? ib2_rem - 1 : 0; } printf("IB1: %" PRIx64 ", %u\n", options.ibs[1].base, options.ibs[1].rem); |