//=== ---- PPCMacroFusion.def - PowerPC MacroFuson Candidates -v-*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https)//llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier) Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// This file contains descriptions of the macro-fusion pair for PowerPC.
//
//===----------------------------------------------------------------------===//

// NOTE: NO INCLUDE GUARD DESIRED!

#ifndef FUSION_FEATURE

// Each FUSION_FEATURE is assigned with one TYPE, and can be enabled/disabled
// by HAS_FEATURE. The instructions pair is fusable only when the opcode
// of the first instruction is in OPSET1, and the second instruction opcode is
// in OPSET2. And if DEP_OP_IDX >=0, we will check the result of first OP is  
// the operand of the second op with DEP_OP_IDX as its operand index. We assume
// that the result of the first op is its operand zero. 
#define FUSION_FEATURE(TYPE, HAS_FEATURE, DEP_OP_IDX, OPSET1, OPSET2)

#endif

#ifndef FUSION_OP_SET
#define FUSION_OP_SET(...) __VA_ARGS__ 
#endif

// Power8 User Manual Section 10.1.12, Instruction Fusion 
// {addi} followed by one of these {lxvd2x, lxvw4x, lxvdsx, lvebx, lvehx,
// lvewx, lvx, lxsdx}
FUSION_FEATURE(AddiLoad, hasAddiLoadFusion, 2, \
               FUSION_OP_SET(ADDI, ADDI8, ADDItocL), \
               FUSION_OP_SET(LXVD2X, LXVW4X, LXVDSX, LVEBX, LVEHX, LVEWX, \
                             LVX, LXSDX))

// {addis) followed by one of these {ld, lbz, lhz, lwz}
FUSION_FEATURE(AddisLoad, hasAddisLoadFusion, 2, \
               FUSION_OP_SET(ADDIS, ADDIS8, ADDIStocHA8), \
               FUSION_OP_SET(LD, LBZ, LBZ8, LHZ, LHZ8, LWZ, LWZ8))

// Power10 User Manual Section 19.1.5.4, Fusion
// {add, mulld} - add
FUSION_FEATURE(ArithAdd, hasArithAddFusion, -1,
               FUSION_OP_SET(ADD4, ADD8, MULLD), FUSION_OP_SET(ADD4, ADD8))

// {add, subf} - {and, nand, nor, or}
FUSION_FEATURE(ArithLogical, hasAddLogicalFusion, -1,
               FUSION_OP_SET(ADD4, ADD8, SUBF, SUBF8),
               FUSION_OP_SET(AND, AND8, OR, OR8, NAND, NAND8, NOR, NOR8))

// {and, andc, eqv, nand, nor, or, orc, xor} - {add, subf}
FUSION_FEATURE(LogicalArith, hasLogicalAddFusion, -1,
               FUSION_OP_SET(AND, ANDC, EQV, NAND, NOR, OR, ORC, XOR, AND8,
                             ANDC8, EQV8, NAND8, NOR8, OR8, ORC8, XOR8),
               FUSION_OP_SET(ADD4, ADD8, SUBF, SUBF8))

// Either of {and, andc, eqv, nand, nor, or, orc, xor}
FUSION_FEATURE(Logical, hasLogicalFusion, -1,
               FUSION_OP_SET(AND, ANDC, EQV, NAND, NOR, OR, ORC, XOR, AND8,
                             ANDC8, EQV8, NAND8, NOR8, OR8, ORC8, XOR8),
               FUSION_OP_SET(AND, ANDC, EQV, NAND, NOR, OR, ORC, XOR, AND8,
                             ANDC8, EQV8, NAND8, NOR8, OR8, ORC8, XOR8))

// vaddudm - vaddudm
FUSION_FEATURE(VecAdd, hasArithAddFusion, -1, FUSION_OP_SET(VADDUDM),
               FUSION_OP_SET(VADDUDM))

// Either of {vand, vandc, veqv, vnand, vnor, vor, vorc, vxor}
FUSION_FEATURE(VecLogical, hasLogicalFusion, -1,
               FUSION_OP_SET(VAND, VANDC, VEQV, VNAND, VNOR, VOR, VORC, VXOR),
               FUSION_OP_SET(VAND, VANDC, VEQV, VNAND, VNOR, VOR, VORC, VXOR))

// sldi rx, ra, {3, 6} - {add, subf}
// sldi rx, ra n is alias of rldicr rx, ra, n, 63-n
FUSION_FEATURE(SldiAdd, hasArithAddFusion, -1, FUSION_OP_SET(RLDICR, RLDICR_32),
               FUSION_OP_SET(ADD4, ADD8, SUBF, SUBF8))

#undef FUSION_FEATURE
#undef FUSION_OP_SET