delta/llvm.git/openmp, branch EmptyLineAfterFunctionDefinition github.com: llvm/llvm-project.git [OpenMP][libomp] Enable HWLOC topology detection of multiple CPU kinds 2021-11-17T22:30:18+00:00 Peyton, Jonathan L jonathan.l.peyton@intel.com 2021-10-21T19:07:15+00:00 a733b18bdbe28778cf34705447ee7691b2064b6e Teach the HWLOC topology method how to detect Atom and Core types so hybrid CPUs are properly detected and represented when using the HWLOC topology method. Differential Revision: https://reviews.llvm.org/D112270 
Teach the HWLOC topology method how to detect Atom and Core
types so hybrid CPUs are properly detected and represented when using
the HWLOC topology method.

Differential Revision: https://reviews.llvm.org/D112270
[OpenMP][libomp] Improve Windows Processor Group handling within topology 2021-11-17T22:29:01+00:00 Peyton, Jonathan L jonathan.l.peyton@intel.com 2021-10-21T21:28:00+00:00 286094af9bc0cfc89d00d8d645e8eaca3d78cd91 The current implementation of Windows Processor Groups has a separate topology method to handle them. This patch deprecates that specific method and uses the regular CPUID topology method by default and inserts the Windows Processor Group objects in the topology manually. Notes: * The preference for processor groups is lowered to a value less than socket so that the user will see sockets in the KMP_AFFINITY=verbose output instead of processor groups when sockets=processor groups. * The topology's capacity is modified to handle additional topology layers without the need for reallocation. * If a user asks for a granularity setting that is "above" the processor group layer, then the granularity is adjusted "down" to the processor group since this is the coarsest layer available for threads. Differential Revision: https://reviews.llvm.org/D112273 
The current implementation of Windows Processor Groups has
a separate topology method to handle them. This patch deprecates
that specific method and uses the regular CPUID topology
method by default and inserts the Windows Processor Group objects
in the topology manually.

Notes:
* The preference for processor groups is lowered to a value less than
  socket so that the user will see sockets in the KMP_AFFINITY=verbose
  output instead of processor groups when sockets=processor groups.
* The topology's capacity is modified to handle additional topology layers
  without the need for reallocation.
* If a user asks for a granularity setting that is "above" the processor
  group layer, then the granularity is adjusted "down" to the processor
  group since this is the coarsest layer available for threads.

Differential Revision: https://reviews.llvm.org/D112273
[OpenMP][libomp] Add support for offline CPUs in Linux 2021-11-17T22:28:01+00:00 Peyton, Jonathan L jonathan.l.peyton@intel.com 2021-10-21T21:43:54+00:00 1dd797168e9f8cb592c254c642f196dab3447092 If some CPUs are offline, then make sure they are not included in the fullMask even if norespect is given to KMP_AFFINITY. Differential Revision: https://reviews.llvm.org/D112274 
If some CPUs are offline, then make sure they are not included in the
fullMask even if norespect is given to KMP_AFFINITY.

Differential Revision: https://reviews.llvm.org/D112274
[OpenMP][libomp] Allow users to specify KMP_HW_SUBSET in any order 2021-11-17T21:27:37+00:00 Peyton, Jonathan L jonathan.l.peyton@intel.com 2021-10-18T18:58:38+00:00 a0afb9d0fc2b6b1a0e89c9cd8f0bd1d839e740ce Remove restriction forcing users to specify the KMP_HW_SUBSET value in topology order. This patch sorts the user KMP_HW_SUBSET value before trying to apply it. For example: 1s,4c,2t is equivalent to 2t,1s,4c Differential Revision: https://reviews.llvm.org/D112027 
Remove restriction forcing users to specify the KMP_HW_SUBSET value in
topology order. This patch sorts the user KMP_HW_SUBSET value before
trying to apply it. For example: 1s,4c,2t is equivalent to 2t,1s,4c

Differential Revision: https://reviews.llvm.org/D112027
[OpenMP][libomp][NFC] Remove non-ASCII apostrophe in comment 2021-11-17T20:46:40+00:00 Jonathan Peyton jonathan.l.peyton@intel.com 2021-11-17T20:46:23+00:00 c46becf500df2a7fb4b4fce16178a036c344315a 






[OpenMP] Silence build warnings when built with MinGW
2021-11-17T16:51:18+00:00

Martin Storsjö
martin@martin.st

2021-11-17T08:49:44+00:00

9b2b54983765abd365f6e43428c6a2697c8e4c03

There's an attempt to upstream this change in
https://github.com/intel/ittapi/pull/25 too.

Differential Revision: https://reviews.llvm.org/D114069





There's an attempt to upstream this change in
https://github.com/intel/ittapi/pull/25 too.

Differential Revision: https://reviews.llvm.org/D114069







[OpenMP] Fix initializer not working on AMDGPU
2021-11-16T13:17:15+00:00

Joseph Huber
jhuber6@vols.utk.edu

2021-11-16T04:04:55+00:00

374cd0fb6102a8726da0e6036b3c484aca32c61e

The RAII class used for debugging RTL entry used a shared variable to
keep track of the current depth. This used a global initializer, which
isn't supported on AMDGPU. This patch removes the initializer and
instead sets it to zero when the state is initialized in the runtime.

Reviewed By: jdoerfert, JonChesterfield

Differential Revision: https://reviews.llvm.org/D113963





The RAII class used for debugging RTL entry used a shared variable to
keep track of the current depth. This used a global initializer, which
isn't supported on AMDGPU. This patch removes the initializer and
instead sets it to zero when the state is initialized in the runtime.

Reviewed By: jdoerfert, JonChesterfield

Differential Revision: https://reviews.llvm.org/D113963







[NFC] Trim trailing whitespace in *.rst
2021-11-15T01:17:08+00:00

Shao-Ce SUN
shaoce@nj.iscas.ac.cn

2021-11-15T01:17:08+00:00

0c660256eb41fb0ba44277a32f39d2a028f797f2












[OpenMP] Set default blocktime to 0 for hybrid cpu
2021-11-12T18:05:35+00:00

Nawrin Sultana
nawrin.sultana@intel.com

2021-10-25T19:01:56+00:00

7a5680233e03c8ac65d4a9bd97c59b3a3b683526

Differential Revision:https://reviews.llvm.org/D113012





Differential Revision:https://reviews.llvm.org/D113012







[OpenMP] Fix main thread barrier for Pascal and amdgpu
2021-11-12T16:18:45+00:00

Joel E. Denny
jdenny.ornl@gmail.com

2021-11-12T14:55:32+00:00

c9dfe322eefca14ce07f73452f7327ecda57da30

Fixes what's left of https://bugs.llvm.org/show_bug.cgi?id=51781.

Reviewed By: jdoerfert, JonChesterfield, tianshilei1992

Differential Revision: https://reviews.llvm.org/D113602





Fixes what's left of https://bugs.llvm.org/show_bug.cgi?id=51781.

Reviewed By: jdoerfert, JonChesterfield, tianshilei1992

Differential Revision: https://reviews.llvm.org/D113602