From f996fbf9a35d470d64bb96a22c180cfb598a5940 Mon Sep 17 00:00:00 2001 From: Robby Cai Date: Mon, 13 Feb 2012 16:46:52 +0800 Subject: ENGR00174299-2: MSL part: add ePxP V2 driver MSL part for ePxP v2 driver Signed-off-by: Robby Cai --- arch/arm/mach-mx6/Kconfig | 1 + arch/arm/mach-mx6/board-mx6q_arm2.c | 5 +++++ arch/arm/mach-mx6/clock.c | 5 +++++ arch/arm/mach-mx6/devices-imx6q.h | 12 +++++++++++- arch/arm/plat-mxc/devices/platform-imx-pxp.c | 11 ++++++++--- arch/arm/plat-mxc/include/mach/dma.h | 5 +++++ arch/arm/plat-mxc/include/mach/mx6.h | 4 ++-- 7 files changed, 37 insertions(+), 6 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-mx6/Kconfig b/arch/arm/mach-mx6/Kconfig index 57959f050b03..aa081b6ce0c1 100644 --- a/arch/arm/mach-mx6/Kconfig +++ b/arch/arm/mach-mx6/Kconfig @@ -57,6 +57,7 @@ config MACH_MX6Q_ARM2 select IMX_HAVE_PLATFORM_IMX_MIPI_CSI2 select IMX_HAVE_PLATFORM_PERFMON select IMX_HAVE_PLATFORM_MXC_MLB + select IMX_HAVE_PLATFORM_IMX_PXP help Include support for i.MX 6Quad Armadillo2 platform. This includes specific configurations for the board and its peripherals. diff --git a/arch/arm/mach-mx6/board-mx6q_arm2.c b/arch/arm/mach-mx6/board-mx6q_arm2.c index 77865dd8db39..4fa511c8cdf2 100644 --- a/arch/arm/mach-mx6/board-mx6q_arm2.c +++ b/arch/arm/mach-mx6/board-mx6q_arm2.c @@ -1560,6 +1560,11 @@ static void __init mx6_arm2_init(void) imx6q_add_perfmon(1); imx6q_add_perfmon(2); imx6q_add_mlb150(&mx6_arm2_mlb150_data); + + if (cpu_is_mx6dl()) { + imx6dl_add_imx_pxp(); + imx6dl_add_imx_pxp_client(); + } } extern void __iomem *twd_base; diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index d9531efff28b..41eeebd2d6a1 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -5113,6 +5113,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK(NULL, NULL, aips_tz1_clk), _REGISTER_CLOCK(NULL, "clko_clk", clko_clk), _REGISTER_CLOCK(NULL, "clko2_clk", clko2_clk), + _REGISTER_CLOCK(NULL, "pxp_axi", ipu2_clk), _REGISTER_CLOCK("mxs-perfmon.0", "perfmon", perfmon0_clk), _REGISTER_CLOCK("mxs-perfmon.1", "perfmon", perfmon1_clk), _REGISTER_CLOCK("mxs-perfmon.2", "perfmon", perfmon2_clk), @@ -5262,6 +5263,10 @@ int __init mx6_clocks_init(unsigned long ckil, unsigned long osc, /* S/PDIF */ clk_set_parent(&spdif0_clk[0], &pll3_pfd_454M); + /* pxp & epdc */ + clk_set_parent(&ipu2_clk, &pll2_pfd_400M); + clk_set_rate(&ipu2_clk, 200000000); + if (mx6q_revision() == IMX_CHIP_REVISION_1_0) { gpt_clk[0].parent = &ipg_perclk; gpt_clk[0].get_rate = NULL; diff --git a/arch/arm/mach-mx6/devices-imx6q.h b/arch/arm/mach-mx6/devices-imx6q.h index ce6b50dc641f..ab245158cfb7 100644 --- a/arch/arm/mach-mx6/devices-imx6q.h +++ b/arch/arm/mach-mx6/devices-imx6q.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -198,3 +198,13 @@ extern const struct imx_mxc_mlb_data imx6q_mxc_mlb150_data __initconst; #define imx6q_add_mlb150(pdata) \ imx_add_mlb(pdata) +extern const struct imx_pxp_data imx6dl_pxp_data __initconst; +#define imx6dl_add_imx_pxp() \ + imx_add_imx_pxp(&imx6dl_pxp_data) + +#define imx6dl_add_imx_pxp_client() \ + imx_add_imx_pxp_client() + +extern const struct imx_epdc_data imx6dl_epdc_data __initconst; +#define imx6dl_add_imx_epdc(pdata) \ + imx_add_imx_epdc(&imx6dl_epdc_data, pdata) diff --git a/arch/arm/plat-mxc/devices/platform-imx-pxp.c b/arch/arm/plat-mxc/devices/platform-imx-pxp.c index 51030c57ca83..3ae3e4880e1d 100644 --- a/arch/arm/plat-mxc/devices/platform-imx-pxp.c +++ b/arch/arm/plat-mxc/devices/platform-imx-pxp.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright (C) 2011-2012 Freescale Semiconductor, Inc. All Rights Reserved. */ /* @@ -22,7 +22,7 @@ #include #include -#define imx5_pxp_data_entry_single(soc, size) \ +#define imx_pxp_data_entry_single(soc, size) \ { \ .iobase = soc ## _EPXP_BASE_ADDR, \ .irq = soc ## _INT_EPXP, \ @@ -31,7 +31,12 @@ #ifdef CONFIG_SOC_IMX50 const struct imx_pxp_data imx50_pxp_data __initconst = - imx5_pxp_data_entry_single(MX50, SZ_4K); + imx_pxp_data_entry_single(MX50, SZ_4K); +#endif + +#ifdef CONFIG_SOC_IMX6Q +const struct imx_pxp_data imx6dl_pxp_data __initconst = + imx_pxp_data_entry_single(MX6DL, SZ_16K); #endif struct platform_device *__init imx_add_imx_pxp( diff --git a/arch/arm/plat-mxc/include/mach/dma.h b/arch/arm/plat-mxc/include/mach/dma.h index 321ced11c71d..ee3b962eeb4d 100644 --- a/arch/arm/plat-mxc/include/mach/dma.h +++ b/arch/arm/plat-mxc/include/mach/dma.h @@ -71,6 +71,11 @@ static inline int imx_dma_is_ipu(struct dma_chan *chan) return !strcmp(dev_name(chan->device->dev), "ipu-core"); } +static inline int imx_dma_is_pxp(struct dma_chan *chan) +{ + return !strcmp(dev_name(chan->device->dev), "imx-pxp"); +} + static inline int imx_dma_is_general_purpose(struct dma_chan *chan) { return !strcmp(dev_name(chan->device->dev), "imx-sdma") || diff --git a/arch/arm/plat-mxc/include/mach/mx6.h b/arch/arm/plat-mxc/include/mach/mx6.h index c60a84034990..d4b31eaeb60c 100644 --- a/arch/arm/plat-mxc/include/mach/mx6.h +++ b/arch/arm/plat-mxc/include/mach/mx6.h @@ -183,7 +183,7 @@ #define DCIC1_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x64000) #define DCIC2_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x68000) #define MX6Q_SDMA_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x6C000) -#define MX6DL_PXP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x70000) +#define MX6DL_EPXP_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x70000) #define MX6DL_EPDC_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x74000) #define MX6DL_LCDIF_BASE_ADDR (AIPS1_OFF_BASE_ADDR + 0x78000) #define MX6Q_DVFSCORE_BASE_ADDR (GPC_BASE_ADDR + 0x180) @@ -395,7 +395,7 @@ #define MXC_INT_CHEETAH_TRIGGER 127 #define MXC_INT_SRC_CPU_WDOG 128 #define MX6DL_INT_EPDC 129 -#define MX6DL_INT_PXP 130 +#define MX6DL_INT_EPXP 130 #define MXC_INT_INTERRUPT_131_NUM 131 #define MXC_INT_CSI_INTR1 132 #define MXC_INT_CSI_INTR2 133 -- cgit v1.2.1