From b4f173752a56187bd55752b0474429202f2ab1d3 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Mon, 6 May 2013 14:19:19 -0600 Subject: ARM: tegra: disable LP2 cpuidle state if PCIe is enabled Tegra20 HW appears to have a bug such that PCIe device interrupts, whether they are legacy IRQs or MSI, are lost when LP2 is enabled. To work around this, simply disable LP2 if any PCIe devices with interrupts are present. Detect this via the IRQ domain map operation. This is slightly over-conservative; if a device with an interrupt is present but the driver does not actually use them, LP2 will still be disabled. However, this is a reasonable trade-off which enables a simpler workaround. Signed-off-by: Stephen Warren Tested-by: Thierry Reding Acked-by: Thierry Reding --- arch/arm/mach-tegra/cpuidle.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/mach-tegra/cpuidle.c') diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c index e85973cef037..0961dfcf83a4 100644 --- a/arch/arm/mach-tegra/cpuidle.c +++ b/arch/arm/mach-tegra/cpuidle.c @@ -44,3 +44,13 @@ void __init tegra_cpuidle_init(void) break; } } + +void tegra_cpuidle_pcie_irqs_in_use(void) +{ + switch (tegra_chip_id) { + case TEGRA20: + if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) + tegra20_cpuidle_pcie_irqs_in_use(); + break; + } +} -- cgit v1.2.1