From 3240d5b872f24cc65f503246371a18551d730066 Mon Sep 17 00:00:00 2001 From: Lubomir Rintel Date: Fri, 20 Dec 2019 07:53:13 +0100 Subject: ARM: dts: mmp3: Add HSIC controllers There are two on MMP3, along with the PHYs. The PHYs are made compatible with the NOP transceiver, since there's no driver for the time being and they're likely configured by the firmware. Link: https://lore.kernel.org/r/20191220065314.237624-5-lkundrak@v3.sk Signed-off-by: Lubomir Rintel Reported-by: kbuild test robot Signed-off-by: Olof Johansson --- arch/arm/boot/dts/mmp3.dtsi | 44 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) (limited to 'arch/arm/boot/dts/mmp3.dtsi') diff --git a/arch/arm/boot/dts/mmp3.dtsi b/arch/arm/boot/dts/mmp3.dtsi index d9762de0ed34..36c50706e60e 100644 --- a/arch/arm/boot/dts/mmp3.dtsi +++ b/arch/arm/boot/dts/mmp3.dtsi @@ -201,6 +201,50 @@ status = "disabled"; }; + hsic_phy0: hsic-phy@f0001800 { + compatible = "marvell,mmp3-hsic-phy", + "usb-nop-xceiv", + reg = <0xf0001800 0x40>; + #phy-cells = <0>; + status = "disabled"; + }; + + hsic0: hsic@f0001000 { + compatible = "marvell,pxau2o-ehci"; + reg = <0xf0001000 0x200>; + interrupts = ; + clocks = <&soc_clocks MMP2_CLK_USBHSIC0>; + clock-names = "USBCLK"; + phys = <&hsic_phy0>; + phy-names = "usb"; + phy_type = "hsic"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "disabled"; + }; + + hsic_phy1: hsic-phy@f0002800 { + compatible = "marvell,mmp3-hsic-phy", + "usb-nop-xceiv", + reg = <0xf0002800 0x40>; + #phy-cells = <0>; + status = "disabled"; + }; + + hsic1: hsic@f0002000 { + compatible = "marvell,pxau2o-ehci"; + reg = <0xf0002000 0x200>; + interrupts = ; + clocks = <&soc_clocks MMP2_CLK_USBHSIC1>; + clock-names = "USBCLK"; + phys = <&hsic_phy1>; + phy-names = "usb"; + phy_type = "hsic"; + #address-cells = <0x01>; + #size-cells = <0x00>; + status = "disabled"; + }; + mmc1: mmc@d4280000 { compatible = "mrvl,pxav3-mmc"; reg = <0xd4280000 0x120>; -- cgit v1.2.1