From 4f81f084ab1707f64659b8c1f2aecedc9fec5659 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 23 Mar 2015 19:26:42 -0700 Subject: drm/vc4: Make alignment of raster texture widths more consistent. This more like how the simulator writes the aligment, and consistent with the other tiling formats. Signed-off-by: Eric Anholt --- drivers/gpu/drm/vc4/vc4_validate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/vc4/vc4_validate.c b/drivers/gpu/drm/vc4/vc4_validate.c index 5ecd640f625a..27eabcbb8351 100644 --- a/drivers/gpu/drm/vc4/vc4_validate.c +++ b/drivers/gpu/drm/vc4/vc4_validate.c @@ -164,7 +164,7 @@ check_tex_size(struct vc4_exec_info *exec, struct drm_gem_cma_object *fbo, switch (tiling_format) { case VC4_TILING_FORMAT_LINEAR: - aligned_width = roundup(width, 16 / cpp); + aligned_width = roundup(width, utile_w); aligned_height = height; break; case VC4_TILING_FORMAT_T: @@ -951,7 +951,7 @@ reloc_tex(struct vc4_exec_info *exec, aligned_height = roundup(level_height, utile_h); break; default: - aligned_width = roundup(level_width, 16 / cpp); + aligned_width = roundup(level_width, utile_w); aligned_height = level_height; break; } -- cgit v1.2.1