From 46d35e65fa3bd96a8a43dd4886f6fd3fa3fef266 Mon Sep 17 00:00:00 2001 From: Tuomas Tynkkynen Date: Thu, 21 Aug 2014 00:04:38 +0300 Subject: ARM: tegra: Enable the DFLL on the Jetson TK1 Add the board-specific properties of the DFLL for the Jetson TK1 board. On this board, the DFLL will take control of the sd0 regulator on the on-board AS3722 PMIC. Signed-off-by: Tuomas Tynkkynen Signed-off-by: Mikko Perttunen --- arch/arm/boot/dts/tegra124-jetson-tk1.dts | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts index 38b7e55787be..864c9e1cace9 100644 --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts @@ -1515,7 +1515,7 @@ vin-ldo9-10-supply = <&vdd_5v0_sys>; vin-ldo11-supply = <&vdd_3v3_run>; - sd0 { + vdd_cpu: sd0 { regulator-name = "+VDD_CPU_AP"; regulator-min-microvolt = <700000>; regulator-max-microvolt = <1400000>; @@ -1736,6 +1736,12 @@ non-removable; }; + dfll@0,70110000 { + status = "okay"; + vdd-cpu-supply = <&vdd_cpu>; + nvidia,i2c-fs-rate = <400000>; + }; + ahub@0,70300000 { i2s@0,70301100 { status = "okay"; -- cgit v1.2.1