diff options
| author | CK Hu <ck.hu@mediatek.com> | 2020-08-28 17:05:11 +0800 |
|---|---|---|
| committer | Chun-Kuang Hu <chunkuang.hu@kernel.org> | 2020-12-29 07:12:36 +0800 |
| commit | f22a565d10e756f1a6141ecd8762c58aa1788db8 (patch) | |
| tree | 37487b4f6593e37e7bf42c8296492c06a7780881 /drivers/gpu/drm/mediatek | |
| parent | 993fd584942a75edda5e9cdec24c590c7a766b2d (diff) | |
| download | linux-f22a565d10e756f1a6141ecd8762c58aa1788db8.tar.gz | |
drm/mediatek: Use struct cmdq_client_reg to gather cmdq variable
struct cmdq_client_reg include subsys and offset, so use it to replace
these two variable.
Signed-off-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Diffstat (limited to 'drivers/gpu/drm/mediatek')
| -rw-r--r-- | drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 26 | ||||
| -rw-r--r-- | drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 4 |
2 files changed, 9 insertions, 21 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c index 775bc37c4045..14371d5863ae 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c @@ -96,8 +96,8 @@ void mtk_ddp_write(struct cmdq_pkt *cmdq_pkt, unsigned int value, { #if IS_REACHABLE(CONFIG_MTK_CMDQ) if (cmdq_pkt) - cmdq_pkt_write(cmdq_pkt, comp->subsys, - comp->regs_pa + offset, value); + cmdq_pkt_write(cmdq_pkt, comp->cmdq_reg.subsys, + comp->cmdq_reg.offset + offset, value); else #endif writel(value, regs + offset); @@ -109,8 +109,8 @@ void mtk_ddp_write_relaxed(struct cmdq_pkt *cmdq_pkt, unsigned int value, { #if IS_REACHABLE(CONFIG_MTK_CMDQ) if (cmdq_pkt) - cmdq_pkt_write(cmdq_pkt, comp->subsys, - comp->regs_pa + offset, value); + cmdq_pkt_write(cmdq_pkt, comp->cmdq_reg.subsys, + comp->cmdq_reg.offset + offset, value); else #endif writel_relaxed(value, regs + offset); @@ -122,8 +122,8 @@ void mtk_ddp_write_mask(struct cmdq_pkt *cmdq_pkt, unsigned int value, { #if IS_REACHABLE(CONFIG_MTK_CMDQ) if (cmdq_pkt) { - cmdq_pkt_write_mask(cmdq_pkt, comp->subsys, - comp->regs_pa + offset, value, mask); + cmdq_pkt_write_mask(cmdq_pkt, comp->cmdq_reg.subsys, + comp->cmdq_reg.offset + offset, value, mask); } else { #endif u32 tmp = readl(regs + offset); @@ -558,10 +558,6 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp, struct platform_device *comp_pdev; enum mtk_ddp_comp_type type; struct mtk_ddp_comp_dev *priv; -#if IS_REACHABLE(CONFIG_MTK_CMDQ) - struct resource res; - struct cmdq_client_reg cmdq_reg; -#endif int ret; if (comp_id < 0 || comp_id >= DDP_COMPONENT_ID_MAX) @@ -591,17 +587,9 @@ int mtk_ddp_comp_init(struct device_node *node, struct mtk_ddp_comp *comp, comp->dev = &comp_pdev->dev; #if IS_REACHABLE(CONFIG_MTK_CMDQ) - if (of_address_to_resource(node, 0, &res) != 0) { - dev_err(comp->dev, "Missing reg in %s node\n", node->full_name); - return -EINVAL; - } - comp->regs_pa = res.start; - - ret = cmdq_dev_get_client_reg(comp->dev, &cmdq_reg, 0); + ret = cmdq_dev_get_client_reg(comp->dev, &comp->cmdq_reg, 0); if (ret) dev_dbg(comp->dev, "get mediatek,gce-client-reg fail!\n"); - else - comp->subsys = cmdq_reg.subsys; #endif /* Only DMA capable components need the LARB property */ diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h index 2b201cc5cbc3..ba5fcffe6f9a 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h @@ -7,6 +7,7 @@ #define MTK_DRM_DDP_COMP_H #include <linux/io.h> +#include <linux/soc/mediatek/mtk-cmdq.h> #include <linux/soc/mediatek/mtk-mmsys.h> struct device; @@ -70,8 +71,7 @@ struct mtk_ddp_comp { struct device *larb_dev; enum mtk_ddp_comp_id id; const struct mtk_ddp_comp_funcs *funcs; - resource_size_t regs_pa; - u8 subsys; + struct cmdq_client_reg cmdq_reg; }; static inline int mtk_ddp_comp_clk_enable(struct mtk_ddp_comp *comp) |