delta/linux.git/include/linux/ccp.h, branch proc-cmdline git.kernel.org: pub/scm/linux/kernel/git/torvalds/linux.git crypto: ccp - Fix XTS-AES-128 support on v5 CCPs 2017-08-04T01:27:41+00:00 Gary R Hook gary.hook@amd.com 2017-07-25T19:12:11+00:00 e652399edba99a5497f0d80f240c9075d3b43493 Version 5 CCPs have some new requirements for XTS-AES: the type field must be specified, and the key requires 512 bits, with each part occupying 256 bits and padded with zeroes. cc: <stable@vger.kernel.org> # 4.9.x+ Signed-off-by: Gary R Hook <ghook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Version 5 CCPs have some new requirements for XTS-AES: the type field
must be specified, and the key requires 512 bits, with each part
occupying 256 bits and padded with zeroes.

cc: <stable@vger.kernel.org> # 4.9.x+

Signed-off-by: Gary R Hook <ghook@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccp - Introduce the AMD Secure Processor device 2017-07-18T09:51:19+00:00 Brijesh Singh brijesh.singh@amd.com 2017-07-06T14:59:14+00:00 720419f01832f7e697cb80480b97b2a1e96045cd The CCP device is part of the AMD Secure Processor. In order to expand the usage of the AMD Secure Processor, create a framework that allows functional components of the AMD Secure Processor to be initialized and handled appropriately. Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Acked-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
The CCP device is part of the AMD Secure Processor. In order to expand
the usage of the AMD Secure Processor, create a framework that allows
functional components of the AMD Secure Processor to be initialized and
handled appropriately.

Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Acked-by: Gary R Hook <gary.hook@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccp - Fix some line spacing 2017-07-18T09:50:53+00:00 Gary R Hook gary.hook@amd.com 2017-06-27T13:58:04+00:00 77af0ae44e4a74f58dd741babdacec32fc8042b1 Add/remove blank lines as appropriate. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Add/remove blank lines as appropriate.

Signed-off-by: Gary R Hook <gary.hook@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 2017-04-05T13:57:07+00:00 Herbert Xu herbert@gondor.apana.org.au 2017-04-05T13:57:07+00:00 c6dc0609062c6110d04c54e24b81b503eeadb2c8 Merge the crypto tree to resolve conflict between caam changes. 
Merge the crypto tree to resolve conflict between caam changes.
crypto: ccp - Enable support for AES GCM on v5 CCPs 2017-03-24T14:02:55+00:00 Gary R Hook gary.hook@amd.com 2017-03-15T18:21:01+00:00 36cf515b9bbe298e1ce7384620f0d4ec45ad3328 A version 5 device provides the primitive commands required for AES GCM. This patch adds support for en/decryption. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
A version 5 device provides the primitive commands
required for AES GCM. This patch adds support for
en/decryption.

Signed-off-by: Gary R Hook <gary.hook@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccp - Enable 3DES function on v5 CCPs 2017-03-24T14:02:55+00:00 Gary R Hook gary.hook@amd.com 2017-03-15T18:20:52+00:00 990672d48515ce09c76fcf1ceccee48b0dd1942b Wire up support for Triple DES in ECB mode. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Wire up support for Triple DES in ECB mode.

Signed-off-by: Gary R Hook <gary.hook@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccp - Add SHA-2 384- and 512-bit support 2017-03-24T14:02:54+00:00 Gary R Hook gary.hook@amd.com 2017-03-15T18:20:43+00:00 ccebcf3f224a44ec8e9c5bfca9d8e5d29298a5a8 Incorporate 384-bit and 512-bit hashing for a version 5 CCP device Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Incorporate 384-bit and 512-bit hashing for a version 5 CCP
device

Signed-off-by: Gary R Hook <gary.hook@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccp - Assign DMA commands to the channel's CCP 2017-03-16T09:43:08+00:00 Gary R Hook ghook@amd.com 2017-03-10T18:28:18+00:00 7c468447f40645fbf2a033dfdaa92b1957130d50 The CCP driver generally uses a round-robin approach when assigning operations to available CCPs. For the DMA engine, however, the DMA mappings of the SGs are associated with a specific CCP. When an IOMMU is enabled, the IOMMU is programmed based on this specific device. If the DMA operations are not performed by that specific CCP then addressing errors and I/O page faults will occur. Update the CCP driver to allow a specific CCP device to be requested for an operation and use this in the DMA engine support. Cc: <stable@vger.kernel.org> # 4.9.x- Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
The CCP driver generally uses a round-robin approach when
assigning operations to available CCPs. For the DMA engine,
however, the DMA mappings of the SGs are associated with a
specific CCP. When an IOMMU is enabled, the IOMMU is
programmed based on this specific device.

If the DMA operations are not performed by that specific
CCP then addressing errors and I/O page faults will occur.

Update the CCP driver to allow a specific CCP device to be
requested for an operation and use this in the DMA engine
support.

Cc: <stable@vger.kernel.org> # 4.9.x-
Signed-off-by: Gary R Hook <gary.hook@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccp - fix typo "CPP" 2016-10-25T03:08:28+00:00 Paul Bolle pebolle@tiscali.nl 2016-10-20T19:20:59+00:00 c8d283ff8b0b6b2061dfc137afd6c56608a34bcb The abbreviation for Cryptographic Coprocessor is "CCP". Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Acked-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
The abbreviation for Cryptographic Coprocessor is "CCP".

Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Acked-by: Gary R Hook <gary.hook@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
crypto: ccp - Let a v5 CCP provide the same function as v3 2016-08-09T10:47:16+00:00 Gary R Hook gary.hook@amd.com 2016-07-27T00:10:21+00:00 4b394a232df78414442778b02ca4a388d947d059 Enable equivalent function on a v5 CCP. Add support for a version 5 CCP which enables AES/XTS/SHA services. Also, more work on the data structures to virtualize functionality. Signed-off-by: Gary R Hook <gary.hook@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> 
Enable equivalent function on a v5 CCP. Add support for a
version 5 CCP which enables AES/XTS/SHA services. Also,
more work on the data structures to virtualize
functionality.

Signed-off-by: Gary R Hook <gary.hook@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>