From 311ec702a78c9e2ba35e66c77e53748e8e751f8d Mon Sep 17 00:00:00 2001
From: Ben Gamari <ben@smart-cactus.org>
Date: Tue, 9 Jul 2019 14:49:32 -0400
Subject: Revert "Add support for SIMD operations in the NCG"

Unfortunately this will require more work; register allocation is
quite broken.

This reverts commit acd795583625401c5554f8e04ec7efca18814011.
---
 compiler/nativeGen/SPARC/Regs.hs | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'compiler/nativeGen/SPARC/Regs.hs')

diff --git a/compiler/nativeGen/SPARC/Regs.hs b/compiler/nativeGen/SPARC/Regs.hs
index e46dbd0d38..0d7edc346a 100644
--- a/compiler/nativeGen/SPARC/Regs.hs
+++ b/compiler/nativeGen/SPARC/Regs.hs
@@ -104,6 +104,7 @@ virtualRegSqueeze cls vr
                 VirtualRegD{}           -> 1
                 _other                  -> 0
 
+
 {-# INLINE realRegSqueeze #-}
 realRegSqueeze :: RegClass -> RealReg -> Int
 
@@ -133,6 +134,7 @@ realRegSqueeze cls rr
 
                 RealRegPair{}           -> 1
 
+
 -- | All the allocatable registers in the machine,
 --      including register pairs.
 allRealRegs :: [RealReg]
-- 
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