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| author | Gabor Greif <ggreif@gmail.com> | 2016-10-17 10:05:45 +0200 |
|---|---|---|
| committer | Gabor Greif <ggreif@gmail.com> | 2016-10-17 10:05:45 +0200 |
| commit | f43db14e2cae9cd181b283cdc7d7940903689bf6 (patch) | |
| tree | ceaf0525d4ac113cb7cffacd24baf1c5a758a1d3 /compiler/nativeGen | |
| parent | a391a386e6cf00b8192c5d52a898a86a1e436eb8 (diff) | |
| download | haskell-f43db14e2cae9cd181b283cdc7d7940903689bf6.tar.gz | |
Typos in comments
Diffstat (limited to 'compiler/nativeGen')
| -rw-r--r-- | compiler/nativeGen/PPC/CodeGen.hs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/compiler/nativeGen/PPC/CodeGen.hs b/compiler/nativeGen/PPC/CodeGen.hs index ead122b959..849516f229 100644 --- a/compiler/nativeGen/PPC/CodeGen.hs +++ b/compiler/nativeGen/PPC/CodeGen.hs @@ -744,7 +744,7 @@ temporary, then do the other computation, and then use the temporary: {- Note [Power instruction format] In some instructions the 16 bit offset must be a multiple of 4, i.e. -the two least significant bits mus be zero. The "Power ISA" specification +the two least significant bits must be zero. The "Power ISA" specification calls these instruction formats "DS-FORM" and the instructions with arbitrary 16 bit offsets are "D-FORM". |