delta/go-git.git/src/cmd/asm, branch dev.debug

cmd/internal/obj/arm: check illegal base registers in ARM instructions

2017-06-30T19:09:44+00:00

Wrong instructions "MOVW 8(F0), R1" and "MOVW R0<<0(F1), R1"
are silently accepted, and all Fx are treated as Rx.

The patch checks all those illegal base registers.

fixes #20724

Change-Id: I05d41bb43fe774b023205163b7daf4a846e9dc88
Reviewed-on: https://go-review.googlesource.com/46132
Run-TryBot: Cherry Zhang 
TryBot-Result: Gobot Gobot 
Reviewed-by: Cherry Zhang

cmd/internal/obj/arm64: fix assemble LDXP bug

2017-06-30T18:24:58+00:00

The current code calculates register number incorrectly.

The fix corrects the register number calculation.

Add cases created by decoder to test assembler.

Fixes #20697
Fixes #20723

Change-Id: I73ac153df9ea9f51c43a5104828d7a5389551c92
Reviewed-on: https://go-review.googlesource.com/45850
Run-TryBot: Cherry Zhang 
TryBot-Result: Gobot Gobot 
Reviewed-by: Cherry Zhang

cmd/internal/obj/arm: fix wrong encoding of MULBB

2017-06-23T18:08:20+00:00

"MULBB R1, R2, R3" is encoded to 0xe163f182, which should be
0xe1630182.

This patch fix it.

fix #20764

Change-Id: I9d3c3ffa40ecde86638e5e083eacc67578caebf4
Reviewed-on: https://go-review.googlesource.com/46491
Run-TryBot: Cherry Zhang 
TryBot-Result: Gobot Gobot 
Reviewed-by: Cherry Zhang

cmd/internal/obj/arm: fix setting U bit in shifted register offset of MOVBS

2017-06-23T14:29:57+00:00

"MOVBS.U R0<<0(R1), R2" is assembled to 0xe19120d0 (ldrsb r2, [r1, r0]),
but it is expected to be 0xe11120d0 (ldrsb r2, [r1, -r0]).

This patch fixes it and adds more encoding tests.

fixes #20701

Change-Id: Ic1fb46438d71a978dbef06d97494a70c95fcbf3a
Reviewed-on: https://go-review.googlesource.com/45996
Run-TryBot: Cherry Zhang 
TryBot-Result: Gobot Gobot 
Reviewed-by: Cherry Zhang

cmd/internal/obj/arm: fix MOVW to/from FPSR

2017-06-13T14:06:58+00:00

"MOVW FPSR, g" should be assembled to 0xeef1aa10, but actually
0xee30a110 (RFS). "MOVW g, FPSR" should be 0xeee1aa10, but actually
0xee20a110 (WFS). They should be updated to VFP forms, since the ARM
back end doesn't support non-VFP floating points.

The patch fixes them and adds more assembly encoding tests.

fixes #20643

Change-Id: I3b29490337c6e8d891b400fcedc8b0a87b82b527
Reviewed-on: https://go-review.googlesource.com/45276
Run-TryBot: Cherry Zhang 
TryBot-Result: Gobot Gobot 
Reviewed-by: Cherry Zhang

cmd/internal/obj/arm: fix encoding of move register/immediate to CPSR

2017-06-09T14:14:30+00:00

"MOVW R1, CPSR" is assembled to 0xe129f001, which should be 0xe12cf001.
"MOVW $255, CPSR" is assembled to 0xe329f0ff, which should be 0xe32cf0ff.

This patch fixes them and adds more assembly encoding tests.

fix #20626

Change-Id: Iefc945879ea774edf40438ce39f52c144e1501a1
Reviewed-on: https://go-review.googlesource.com/45170
Reviewed-by: Cherry Zhang

cmd/internal/obj/arm: fix constant decomposition

2017-06-05T17:03:54+00:00

There are two issues in constant decomposition.

1. A typo in "func immrot2s" blocks "case 107" of []optab be triggered.

2. Though "ADD $0xffff, R0, R0" is decomposed to "ADD $0xff00, R0, R0" and
   "ADD $0x00ff, R0, R0" as expected, "ADD $0xffff, R0" still uses the
   constant pool, which should be the same as "ADD $0xffff, R0, R0".

This patch fixes them and adds more instruction encoding tests.

fix #20516

Change-Id: Icd7bdfa1946b29db15580dcb429111266f1384c6
Reviewed-on: https://go-review.googlesource.com/44335
Run-TryBot: Cherry Zhang 
TryBot-Result: Gobot Gobot 
Reviewed-by: Cherry Zhang

cmd/asm/internal/asm: fix a bug in ARM assembly encoding test

2017-05-25T18:23:20+00:00

It is expected to test assembly code for ARMv5, ARMv6 and ARMv7
in cmd/asm/internal/asm/endtoend_test.go. But actually the loop
in "func TestARMEndToEnd(t *testing.T)" runs three times all
for ARMv5.

This patch fixes that bug and adds a new armv6.s which is only tested
with GOARM=6.

fixes #20465

Change-Id: I5dbf00809a47ace2c195335e2c9bdd768479aada
Reviewed-on: https://go-review.googlesource.com/43930
Reviewed-by: Brad Fitzpatrick 
Reviewed-by: Cherry Zhang 
Run-TryBot: Brad Fitzpatrick 
TryBot-Result: Gobot Gobot

cmd/internal/obj/arm: fix illegal forms of ARM VFP instruction

2017-05-25T14:32:35+00:00

"ADDF F0, R1, F2" is silently accepted by the arm assembler and
assembled to the same binary code of "ADDF F0, F1, F2". So does
"CMPF F0, R1".

"ABSF F0, F1, F2" is also silently accepted and assembled to a
different instruction.

This patch reports those illegal forms and adds test cases.

fix #20464

Change-Id: I88b80dc29de24c6266ac7bf7bce1578c5adbc68c
Reviewed-on: https://go-review.googlesource.com/43931
Run-TryBot: Cherry Zhang 
TryBot-Result: Gobot Gobot 
Reviewed-by: Cherry Zhang

cmd/internal/obj/arm: report invalid .S/.P/.W suffix in ARM instructions

2017-05-22T13:44:12+00:00

Many instructions can not have a .S suffix, such as MULS, SWI, CLZ,
CMP, STREX and others. And so do .P and .W suffixes. Even wrong
assembly code is generated for some instructions with invalid
suffixes.

This patch tries to simplify .S/.W/.P checks. And a wrong assembly
test for arm is added.

fixes #20377

Change-Id: Iba1c99d9e6b7b16a749b4d93ca2102e17c5822fe
Reviewed-on: https://go-review.googlesource.com/43561
Reviewed-by: Cherry Zhang