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authorTorbjorn Granlund <tg@gmplib.org>2020-01-10 15:13:59 +0100
committerTorbjorn Granlund <tg@gmplib.org>2020-01-10 15:13:59 +0100
commit3d54e58eb9d92ed7f1977a3034b1c2716d53f487 (patch)
treef2155d1c16b85c1895d008250d73199bfbcbd83b
parent252824932c0555aefbf11e0f86e64f8acf5d944f (diff)
downloadgmp-3d54e58eb9d92ed7f1977a3034b1c2716d53f487.tar.gz
Whitespace cleanup.
-rw-r--r--mpn/x86/gcd_11.asm2
1 files changed, 1 insertions, 1 deletions
diff --git a/mpn/x86/gcd_11.asm b/mpn/x86/gcd_11.asm
index 58d557c41..af691353d 100644
--- a/mpn/x86/gcd_11.asm
+++ b/mpn/x86/gcd_11.asm
@@ -35,7 +35,7 @@ include(`../config.m4')
dnl Rudimentary code for x86-32, i.e. for CPUs without cmov. Also, the bsf
dnl instruction is assumed to be so slow it is useless. Instead a teble is
dnl used.
-dnl
+dnl
dnl The loop benefits from OoO, in-order CPUs might want a different loop.
dnl The ebx and ecx registers could be combined if the assigment of ecx were
dnl postponed until ebx died, but that would at least hurt in-order CPUs.