From 4d37c8aa01de8894ff5a2554888a0f752d31fb04 Mon Sep 17 00:00:00 2001 From: Ulrich Drepper Date: Thu, 6 Jan 2005 21:52:35 +0000 Subject: Update. 2004-12-22 Steven Munroe * math/libm-test.inc (rint_test_tonearest): New test. (rint_test_towardzero): New test. (rint_test_downward): New test. (rint_test_upward): New test. * sysdeps/powerpc/powerpc32/fpu/s_ceil.S: Fix -0.0 case. Remove redundant const values. * sysdeps/powerpc/powerpc32/fpu/s_ceilf.S: Fix -0.0 case. Remove redundant const values. Use float const. * sysdeps/powerpc/powerpc32/fpu/s_floor.S: Fix -0.0 case. * sysdeps/powerpc/powerpc32/fpu/s_floorf.S: Fix -0.0 case. Use float const. * sysdeps/powerpc/powerpc32/fpu/s_rint.S: Fix -0.0 case. * sysdeps/powerpc/powerpc32/fpu/s_rintf.S: Fix -0.0 case. Use float const. * sysdeps/powerpc/powerpc32/fpu/s_round.S: Fix -0.0 case. Remove redundant const values. * sysdeps/powerpc/powerpc32/fpu/s_roundf.S: Fix -0.0 case. Remove redundant const values. Use float const. * sysdeps/powerpc/powerpc32/fpu/s_trunc.S: Fix -0.0 case. Remove redundant const values. * sysdeps/powerpc/powerpc32/fpu/s_truncf.S: Fix -0.0 case. Remove redundant const values. Use float const. * sysdeps/powerpc/powerpc64/fpu/s_ceil.S: Use EALIGN for Quadword alignment. Fix -0.0 case. Remove redundant const values. * sysdeps/powerpc/powerpc64/fpu/s_ceilf.S: Use EALIGN for Quadword alignment. Fix -0.0 case. Remove redundant const values. Use float const. * sysdeps/powerpc/powerpc64/fpu/s_floor.S: Use EALIGN for Quadword alignment. Fix -0.0 case. * sysdeps/powerpc/powerpc64/fpu/s_floorf.S: Use EALIGN for Quadword alignment. Fix -0.0 case. Use float const. * sysdeps/powerpc/powerpc64/fpu/s_rint.S: Use EALIGN for Quadword alignment. Fix -0.0 case. * sysdeps/powerpc/powerpc64/fpu/s_rintf.S: Use EALIGN for Quadword alignment. Fix -0.0 case. Use float const. * sysdeps/powerpc/powerpc64/fpu/s_round.S: Use EALIGN for Quadword alignment. Fix -0.0 case. Remove redundant const values. * sysdeps/powerpc/powerpc64/fpu/s_roundf.S: Use EALIGN for Quadword alignment. Fix -0.0 case. Remove redundant const values. Use float const. * sysdeps/powerpc/powerpc64/fpu/s_trunc.S: Use EALIGN for Quadword alignment. Fix -0.0 case. * sysdeps/powerpc/powerpc64/fpu/s_truncf.S: Use EALIGN for Quadword alignment. Fix -0.0 case. Remove redundant const values. Use float const. --- sysdeps/powerpc/powerpc64/fpu/s_ceil.S | 13 ++++++------- sysdeps/powerpc/powerpc64/fpu/s_ceilf.S | 17 ++++++++--------- sysdeps/powerpc/powerpc64/fpu/s_floor.S | 9 +++++---- sysdeps/powerpc/powerpc64/fpu/s_floorf.S | 13 +++++++------ sysdeps/powerpc/powerpc64/fpu/s_rint.S | 13 +++++++------ sysdeps/powerpc/powerpc64/fpu/s_rintf.S | 17 +++++++++-------- sysdeps/powerpc/powerpc64/fpu/s_round.S | 15 +++++++-------- sysdeps/powerpc/powerpc64/fpu/s_roundf.S | 23 +++++++++++------------ sysdeps/powerpc/powerpc64/fpu/s_trunc.S | 13 ++++++------- sysdeps/powerpc/powerpc64/fpu/s_truncf.S | 17 ++++++++--------- 10 files changed, 74 insertions(+), 76 deletions(-) (limited to 'sysdeps/powerpc/powerpc64/fpu') diff --git a/sysdeps/powerpc/powerpc64/fpu/s_ceil.S b/sysdeps/powerpc/powerpc64/fpu/s_ceil.S index a1bfaa70c2..9809e24d26 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_ceil.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_ceil.S @@ -22,11 +22,9 @@ .section ".toc","aw" .LC0: /* 2**52 */ .tc FD_43300000_0[TC],0x4330000000000000 -.LC1: /* -0.0 */ - .tc FD_80000000_0[TC],0x8000000000000000 .section ".text" -ENTRY (__ceil) +EALIGN (__ceil, 4, 0) CALL_MCOUNT 0 mffs fp11 /* Save current FPU rounding mode. */ lfd fp13,.LC0@toc(2) @@ -39,17 +37,18 @@ ENTRY (__ceil) ble- cr6,.L4 fadd fp1,fp1,fp13 /* x+= TWO52; */ fsub fp1,fp1,fp13 /* x-= TWO52; */ -.L9: + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ mtfsf 0x01,fp11 /* restore previous rounding mode. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ fsub fp1,fp1,fp13 /* x-= TWO52; */ fadd fp1,fp1,fp13 /* x+= TWO52; */ - fcmpu cr5,fp1,fp12 /* if (x > 0.0) */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ +.L9: mtfsf 0x01,fp11 /* restore previous rounding mode. */ - bnelr+ cr5 - lfd fp1,.LC1@toc(2) /* x must be -0.0 for the 0.0 case. */ blr END (__ceil) diff --git a/sysdeps/powerpc/powerpc64/fpu/s_ceilf.S b/sysdeps/powerpc/powerpc64/fpu/s_ceilf.S index 42eb274389..1ccd133b66 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_ceilf.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_ceilf.S @@ -21,15 +21,13 @@ .section ".toc","aw" .LC0: /* 2**23 */ - .tc FD_41600000_0[TC],0x4160000000000000 -.LC1: /* -0.0 */ - .tc FD_80000000_0[TC],0x8000000000000000 + .tc FD_4b000000_0[TC],0x4b00000000000000 .section ".text" -ENTRY (__ceilf) +EALIGN (__ceilf, 4, 0) CALL_MCOUNT 0 mffs fp11 /* Save current FPU rounding mode. */ - lfd fp13,.LC0@toc(2) + lfs fp13,.LC0@toc(2) fabs fp0,fp1 fsubs fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ @@ -39,17 +37,18 @@ ENTRY (__ceilf) ble- cr6,.L4 fadds fp1,fp1,fp13 /* x+= TWO23; */ fsubs fp1,fp1,fp13 /* x-= TWO23; */ -.L9: + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ mtfsf 0x01,fp11 /* restore previous rounding mode. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ fsubs fp1,fp1,fp13 /* x-= TWO23; */ fadds fp1,fp1,fp13 /* x+= TWO23; */ - fcmpu cr5,fp1,fp12 /* if (x > 0.0) */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ +.L9: mtfsf 0x01,fp11 /* restore previous rounding mode. */ - bnelr+ cr5 - lfd fp1,.LC1@toc(2) /* x must be -0.0 for the 0.0 case. */ blr END (__ceilf) diff --git a/sysdeps/powerpc/powerpc64/fpu/s_floor.S b/sysdeps/powerpc/powerpc64/fpu/s_floor.S index 80cbdc5709..183423c2b3 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_floor.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_floor.S @@ -24,7 +24,7 @@ .tc FD_43300000_0[TC],0x4330000000000000 .section ".text" -ENTRY (__floor) +EALIGN (__floor, 4, 0) CALL_MCOUNT 0 mffs fp11 /* Save current FPU rounding mode. */ lfd fp13,.LC0@toc(2) @@ -37,15 +37,16 @@ ENTRY (__floor) ble- cr6,.L4 fadd fp1,fp1,fp13 /* x+= TWO52; */ fsub fp1,fp1,fp13 /* x-= TWO52; */ - fcmpu cr5,fp1,fp12 /* if (x > 0.0) */ + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ mtfsf 0x01,fp11 /* restore previous rounding mode. */ - bnelr+ cr5 - fmr fp1,fp12 /* x must be +0.0 for the 0.0 case. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ fsub fp1,fp1,fp13 /* x-= TWO52; */ fadd fp1,fp1,fp13 /* x+= TWO52; */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ .L9: mtfsf 0x01,fp11 /* restore previous rounding mode. */ blr diff --git a/sysdeps/powerpc/powerpc64/fpu/s_floorf.S b/sysdeps/powerpc/powerpc64/fpu/s_floorf.S index 20cbb15ebd..bcdbf7823d 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_floorf.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_floorf.S @@ -21,13 +21,13 @@ .section ".toc","aw" .LC0: /* 2**23 */ - .tc FD_41600000_0[TC],0x4160000000000000 + .tc FD_4b000000_0[TC],0x4b00000000000000 .section ".text" -ENTRY (__floorf) +EALIGN (__floorf, 4, 0) CALL_MCOUNT 0 mffs fp11 /* Save current FPU rounding mode. */ - lfd fp13,.LC0@toc(2) + lfs fp13,.LC0@toc(2) fabs fp0,fp1 fsubs fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ @@ -37,15 +37,16 @@ ENTRY (__floorf) ble- cr6,.L4 fadds fp1,fp1,fp13 /* x+= TWO23; */ fsubs fp1,fp1,fp13 /* x-= TWO23; */ - fcmpu cr5,fp1,fp12 /* if (x > 0.0) */ + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ mtfsf 0x01,fp11 /* restore previous rounding mode. */ - bnelr+ cr5 - fmr fp1,fp12 /* x must be +0.0 for the 0.0 case. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ fsubs fp1,fp1,fp13 /* x-= TWO23; */ fadds fp1,fp1,fp13 /* x+= TWO23; */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ .L9: mtfsf 0x01,fp11 /* restore previous rounding mode. */ blr diff --git a/sysdeps/powerpc/powerpc64/fpu/s_rint.S b/sysdeps/powerpc/powerpc64/fpu/s_rint.S index 79e807269d..0c0e0ba67b 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_rint.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_rint.S @@ -27,7 +27,7 @@ .tc FD_43300000_0[TC],0x4330000000000000 .section ".text" -ENTRY (__rint) +EALIGN (__rint, 4, 0) CALL_MCOUNT 0 lfd fp13,.LC0@toc(2) fabs fp0,fp1 @@ -38,13 +38,14 @@ ENTRY (__rint) bng- cr6,.L4 fadd fp1,fp1,fp13 /* x+= TWO52; */ fsub fp1,fp1,fp13 /* x-= TWO52; */ - blr + fabs fp1,fp1 /* if (x == 0.0) */ + blr /* x = 0.0; */ .L4: bnllr- cr6 /* if (x < 0.0) */ - fsub fp1,fp13,fp1 /* x = TWO52 - x; */ - fsub fp0,fp1,fp13 /* x = - (x - TWO52); */ - fneg fp1,fp0 - blr + fsub fp1,fp1,fp13 /* x-= TWO52; */ + fadd fp1,fp1,fp13 /* x+= TWO52; */ + fnabs fp1,fp1 /* if (x == 0.0) */ + blr /* x = -0.0; */ END (__rint) weak_alias (__rint, rint) diff --git a/sysdeps/powerpc/powerpc64/fpu/s_rintf.S b/sysdeps/powerpc/powerpc64/fpu/s_rintf.S index eb34dd5e77..e4fa9ba2e6 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_rintf.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_rintf.S @@ -21,12 +21,12 @@ .section ".toc","aw" .LC0: /* 2**23 */ - .tc FD_41600000_0[TC],0x4160000000000000 + .tc FD_4b000000_0[TC],0x4b00000000000000 .section ".text" -ENTRY (__rintf) +EALIGN (__rintf, 4, 0) CALL_MCOUNT 0 - lfd fp13,.LC0@toc(2) + lfs fp13,.LC0@toc(2) fabs fp0,fp1 fsubs fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ @@ -35,13 +35,14 @@ ENTRY (__rintf) bng- cr6,.L4 fadds fp1,fp1,fp13 /* x+= TWO23; */ fsubs fp1,fp1,fp13 /* x-= TWO23; */ - blr + fabs fp1,fp1 /* if (x == 0.0) */ + blr /* x = 0.0; */ .L4: bnllr- cr6 /* if (x < 0.0) */ - fsubs fp1,fp13,fp1 /* x = TWO23 - x; */ - fsubs fp0,fp1,fp13 /* x = - (x - TWO23); */ - fneg fp1,fp0 - blr + fsubs fp1,fp1,fp13 /* x-= TWO23; */ + fadds fp1,fp1,fp13 /* x+= TWO23; */ + fnabs fp1,fp1 /* if (x == 0.0) */ + blr /* x = -0.0; */ END (__rintf) weak_alias (__rintf, rintf) diff --git a/sysdeps/powerpc/powerpc64/fpu/s_round.S b/sysdeps/powerpc/powerpc64/fpu/s_round.S index c0b6d46fea..b07a7ea15a 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_round.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_round.S @@ -24,8 +24,6 @@ .tc FD_43300000_0[TC],0x4330000000000000 .LC1: /* 0.5 */ .tc FD_3fe00000_0[TC],0x3fe0000000000000 -.LC2: /* -0.0 */ - .tc FD_80000000_0[TC],0x8000000000000000 .section ".text" /* double [fp1] round (double x [fp1]) @@ -38,7 +36,7 @@ "Round toward Zero" mode and round by adding +-0.5 before rounding to the integer value. */ -ENTRY (__round) +EALIGN (__round, 4, 0) CALL_MCOUNT 0 mffs fp11 /* Save current FPU rounding mode. */ lfd fp13,.LC0@toc(2) @@ -53,7 +51,8 @@ ENTRY (__round) fadd fp1,fp1,fp10 /* x+= 0.5; */ fadd fp1,fp1,fp13 /* x+= TWO52; */ fsub fp1,fp1,fp13 /* x-= TWO52; */ -.L9: + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ mtfsf 0x01,fp11 /* restore previous rounding mode. */ blr .L4: @@ -61,10 +60,10 @@ ENTRY (__round) bge- cr6,.L9 /* if (x < 0.0) */ fsub fp1,fp9,fp13 /* x-= TWO52; */ fadd fp1,fp1,fp13 /* x+= TWO52; */ - fcmpu cr5,fp1,fp12 /* if (x > 0.0) */ - mtfsf 0x01,fp11 /* restore previous rounding mode. */ - bnelr+ cr5 - lfd fp1,.LC2@toc(2) /* x must be -0.0 for the 0.0 case. */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ +.L9: + mtfsf 0x01,fp11 /* restore previous rounding mode. */ blr END (__round) diff --git a/sysdeps/powerpc/powerpc64/fpu/s_roundf.S b/sysdeps/powerpc/powerpc64/fpu/s_roundf.S index 23ee4c052b..d2e29fdb8f 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_roundf.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_roundf.S @@ -21,11 +21,9 @@ .section ".toc","aw" .LC0: /* 2**23 */ - .tc FD_41600000_0[TC],0x4160000000000000 + .tc FD_4b000000_0[TC],0x4b00000000000000 .LC1: /* 0.5 */ - .tc FD_3fe00000_0[TC],0x3fe0000000000000 -.LC2: /* -0.0 */ - .tc FD_80000000_0[TC],0x8000000000000000 + .tc FD_3f000000_0[TC],0x3f00000000000000 .section ".text" /* float [fp1] roundf (float x [fp1]) @@ -38,22 +36,23 @@ "Round toward Zero" mode and round by adding +-0.5 before rounding to the integer value. */ -ENTRY (__roundf ) +EALIGN (__roundf, 4, 0) CALL_MCOUNT 0 mffs fp11 /* Save current FPU rounding mode. */ - lfd fp13,.LC0@toc(2) + lfs fp13,.LC0@toc(2) fabs fp0,fp1 fsubs fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ fcmpu cr6,fp1,fp12 /* if (x > 0.0) */ bnllr- cr7 mtfsfi 7,1 /* Set rounding mode toward 0. */ - lfd fp10,.LC1@toc(2) + lfs fp10,.LC1@toc(2) ble- cr6,.L4 fadds fp1,fp1,fp10 /* x+= 0.5; */ fadds fp1,fp1,fp13 /* x+= TWO23; */ fsubs fp1,fp1,fp13 /* x-= TWO23; */ -.L9: + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ mtfsf 0x01,fp11 /* restore previous rounding mode. */ blr .L4: @@ -61,10 +60,10 @@ ENTRY (__roundf ) bge- cr6,.L9 /* if (x < 0.0) */ fsubs fp1,fp9,fp13 /* x-= TWO23; */ fadds fp1,fp1,fp13 /* x+= TWO23; */ - fcmpu cr5,fp1,fp12 /* if (x > 0.0) */ - mtfsf 0x01,fp11 /* restore previous rounding mode. */ - bnelr+ cr5 - lfd fp1,.LC2@toc(2) /* x must be -0.0 for the 0.0 case. */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ +.L9: + mtfsf 0x01,fp11 /* restore previous rounding mode. */ blr END (__roundf) diff --git a/sysdeps/powerpc/powerpc64/fpu/s_trunc.S b/sysdeps/powerpc/powerpc64/fpu/s_trunc.S index 3ddd298525..d69e371b61 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_trunc.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_trunc.S @@ -22,8 +22,6 @@ .section ".toc","aw" .LC0: /* 2**52 */ .tc FD_43300000_0[TC],0x4330000000000000 -.LC2: /* -0.0 */ - .tc FD_80000000_0[TC],0x8000000000000000 .section ".text" /* double [fp1] trunc (double x [fp1]) @@ -33,7 +31,7 @@ We set "round toward Zero" mode and trunc by adding +-2**52 then subtracting +-2**52. */ -ENTRY (__trunc) +EALIGN (__trunc, 4, 0) CALL_MCOUNT 0 mffs fp11 /* Save current FPU rounding mode. */ lfd fp13,.LC0@toc(2) @@ -46,17 +44,18 @@ ENTRY (__trunc) ble- cr6,.L4 fadd fp1,fp1,fp13 /* x+= TWO52; */ fsub fp1,fp1,fp13 /* x-= TWO52; */ -.L9: + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ mtfsf 0x01,fp11 /* restore previous truncing mode. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ fsub fp1,fp1,fp13 /* x-= TWO52; */ fadd fp1,fp1,fp13 /* x+= TWO52; */ - fcmpu cr5,fp1,fp12 /* if (x > 0.0) */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ +.L9: mtfsf 0x01,fp11 /* restore previous rounding mode. */ - bnelr+ cr5 - lfd fp1,.LC2@toc(2) /* x must be -0.0 for the 0.0 case. */ blr END (__trunc) diff --git a/sysdeps/powerpc/powerpc64/fpu/s_truncf.S b/sysdeps/powerpc/powerpc64/fpu/s_truncf.S index b38b722a6f..15f53da8ca 100644 --- a/sysdeps/powerpc/powerpc64/fpu/s_truncf.S +++ b/sysdeps/powerpc/powerpc64/fpu/s_truncf.S @@ -21,9 +21,7 @@ .section ".toc","aw" .LC0: /* 2**23 */ - .tc FD_41600000_0[TC],0x4160000000000000 -.LC2: /* -0.0 */ - .tc FD_80000000_0[TC],0x8000000000000000 + .tc FD_4b000000_0[TC],0x4b00000000000000 .section ".text" /* float [fp1] truncf (float x [fp1]) @@ -33,10 +31,10 @@ We set "round toward Zero" mode and trunc by adding +-2**23 then subtracting +-2**23. */ -ENTRY (__truncf) +EALIGN (__truncf, 4, 0) CALL_MCOUNT 0 mffs fp11 /* Save current FPU rounding mode. */ - lfd fp13,.LC0@toc(2) + lfs fp13,.LC0@toc(2) fabs fp0,fp1 fsubs fp12,fp13,fp13 /* generate 0.0 */ fcmpu cr7,fp0,fp13 /* if (fabs(x) > TWO23) */ @@ -46,17 +44,18 @@ ENTRY (__truncf) ble- cr6,.L4 fadds fp1,fp1,fp13 /* x+= TWO23; */ fsubs fp1,fp1,fp13 /* x-= TWO23; */ -.L9: + fabs fp1,fp1 /* if (x == 0.0) */ + /* x = 0.0; */ mtfsf 0x01,fp11 /* restore previous truncing mode. */ blr .L4: bge- cr6,.L9 /* if (x < 0.0) */ fsubs fp1,fp1,fp13 /* x-= TWO23; */ fadds fp1,fp1,fp13 /* x+= TWO23; */ - fcmpu cr5,fp1,fp12 /* if (x > 0.0) */ + fnabs fp1,fp1 /* if (x == 0.0) */ + /* x = -0.0; */ +.L9: mtfsf 0x01,fp11 /* restore previous rounding mode. */ - bnelr+ cr5 - lfd fp1,.LC2@toc(2) /* x must be -0.0 for the 0.0 case. */ blr END (__truncf) -- cgit v1.2.1