From db9bab09a51188bf57afeb47040ce6837b878367 Mon Sep 17 00:00:00 2001 From: Siddhesh Poyarekar Date: Mon, 23 Oct 2017 20:19:34 +0530 Subject: Document cache information sysconf variables Write short descriptions for each of the cache information sysconf variables. * manual/conf.texi (_SC_LEVEL1_ICACHE_SIZE, _SC_LEVEL1_ICACHE_ASSOC, _SC_LEVEL1_ICACHE_LINESIZE, _SC_LEVEL1_DCACHE_SIZE, _SC_LEVEL1_DCACHE_ASSOC, _SC_LEVEL1_DCACHE_LINESIZE, _SC_LEVEL2_CACHE_SIZE, _SC_LEVEL2_CACHE_ASSOC, _SC_LEVEL2_CACHE_LINESIZE, _SC_LEVEL3_CACHE_SIZE, _SC_LEVEL3_CACHE_ASSOC, _SC_LEVEL3_CACHE_LINESIZE, _SC_LEVEL4_CACHE_SIZE, _SC_LEVEL4_CACHE_ASSOC, _SC_LEVEL4_CACHE_LINESIZE): New variables. Reviewed-by: Rical Jasan --- ChangeLog | 12 +++++++++++ manual/conf.texi | 61 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 73 insertions(+) diff --git a/ChangeLog b/ChangeLog index 1316b401ae..890443736b 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,15 @@ +2017-10-23 Siddhesh Poyarekar + + * manual/conf.texi (_SC_LEVEL1_ICACHE_SIZE, + _SC_LEVEL1_ICACHE_ASSOC, _SC_LEVEL1_ICACHE_LINESIZE, + _SC_LEVEL1_DCACHE_SIZE, _SC_LEVEL1_DCACHE_ASSOC, + _SC_LEVEL1_DCACHE_LINESIZE, _SC_LEVEL2_CACHE_SIZE, + _SC_LEVEL2_CACHE_ASSOC, _SC_LEVEL2_CACHE_LINESIZE, + _SC_LEVEL3_CACHE_SIZE, _SC_LEVEL3_CACHE_ASSOC, + _SC_LEVEL3_CACHE_LINESIZE, _SC_LEVEL4_CACHE_SIZE, + _SC_LEVEL4_CACHE_ASSOC, _SC_LEVEL4_CACHE_LINESIZE): New + variables. + 2017-10-23 Michael Collison * sysdeps/aarch64/fpu/e_sqrt.c (ieee754_sqrt): Replace asm statements diff --git a/manual/conf.texi b/manual/conf.texi index 875862c847..079bdb295e 100644 --- a/manual/conf.texi +++ b/manual/conf.texi @@ -678,6 +678,67 @@ Inquire about the number of available physical pages in the system. Inquire about the number of functions which can be registered as termination functions for @code{atexit}; @pxref{Cleanups on Exit}. +@item _SC_LEVEL1_ICACHE_SIZE +@standards{GNU, unistd.h} +Inquire about the size of the Level 1 instruction cache. + +@item _SC_LEVEL1_ICACHE_ASSOC +@standards{GNU, unistd.h} +Inquire about the associativity of the Level 1 instruction cache. + +@item _SC_LEVEL1_ICACHE_LINESIZE +@standards{GNU, unistd.h} +Inquire about the line length of the Level 1 instruction cache. + +@item _SC_LEVEL1_DCACHE_SIZE +@standards{GNU, unistd.h} +Inquire about the size of the Level 1 data cache. + +@item _SC_LEVEL1_DCACHE_ASSOC +@standards{GNU, unistd.h} +Inquire about the associativity of the Level 1 data cache. + +@item _SC_LEVEL1_DCACHE_LINESIZE +@standards{GNU, unistd.h} +Inquire about the line length of the Level 1 data cache. + +@item _SC_LEVEL2_CACHE_SIZE +@standards{GNU, unistd.h} +Inquire about the size of the Level 2 cache. + +@item _SC_LEVEL2_CACHE_ASSOC +@standards{GNU, unistd.h} +Inquire about the associativity of the Level 2 cache. + +@item _SC_LEVEL2_CACHE_LINESIZE +@standards{GNU, unistd.h} +Inquire about the line length of the Level 2 cache. + +@item _SC_LEVEL3_CACHE_SIZE +@standards{GNU, unistd.h} +Inquire about the size of the Level 3 cache. + +@item _SC_LEVEL3_CACHE_ASSOC +@standards{GNU, unistd.h} +Inquire about the associativity of the Level 3 cache. + +@item _SC_LEVEL3_CACHE_LINESIZE +@standards{GNU, unistd.h} +Inquire about the line length of the Level 3 cache. + +@item _SC_LEVEL4_CACHE_SIZE +@standards{GNU, unistd.h} +Inquire about the size of the Level 4 cache. + +@item _SC_LEVEL4_CACHE_ASSOC +@standards{GNU, unistd.h} +Inquire about the associativity of the Level 4 cache. + +@item _SC_LEVEL4_CACHE_LINESIZE +@standards{GNU, unistd.h} +Inquire about the line length of the Level 4 cache. + + @item _SC_XOPEN_VERSION @standards{X/Open, unistd.h} Inquire about the parameter corresponding to @code{_XOPEN_VERSION}. -- cgit v1.2.1