From fc56738bdc79ae5f9df33ec8ad4cadb2ff1dd298 Mon Sep 17 00:00:00 2001 From: hjagasia Date: Wed, 16 Nov 2011 17:31:38 +0000 Subject: * doc/invoke.texi: Document AMD bdver1 and btver1. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181417 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/doc/invoke.texi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'gcc/doc') diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 1fc44372e32..e58ed1b4ac5 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -12803,6 +12803,15 @@ Improved versions of k8, opteron and athlon64 with SSE3 instruction set support. AMD Family 10h core based CPUs with x86-64 instruction set support. (This supersets MMX, SSE, SSE2, SSE3, SSE4A, 3DNow!, enhanced 3DNow!, ABM and 64-bit instruction set extensions.) +@item bdver1 +AMD Family 15h core based CPUs with x86-64 instruction set support. (This +supersets FMA4, AVX, XOP, LWP, AES, PCL_MUL, CX16, MMX, SSE, SSE2, SSE3, SSE4A, +SSSE3, SSE4.1, SSE4.2, 3DNow!, enhanced 3DNow!, ABM and 64-bit +instruction set extensions.) +@item btver1 +AMD Family 14h core based CPUs with x86-64 instruction set support. (This +supersets MMX, SSE, SSE2, SSE3, SSSE3, SSE4A, CX16, ABM and 64-bit +instruction set extensions.) @item winchip-c6 IDT Winchip C6 CPU, dealt in same way as i486 with additional MMX instruction set support. -- cgit v1.2.1 From 821b85a2a0869b5128bd67e192a5a97748cbd90d Mon Sep 17 00:00:00 2001 From: hjl Date: Fri, 18 Nov 2011 19:02:45 +0000 Subject: Add _mm_stream_si64. 2011-11-18 H.J. Lu PR target/33944 * doc/extend.texi: Document __builtin_ia32_movnti64. * config/i386/emmintrin.h (_mm_stream_si64): New. * config/i386/i386-builtin-types.def: Add VOID_FTYPE_PLONGLONG_LONGLONG. * config/i386/i386.c (ix86_builtins): Add IX86_BUILTIN_MOVNTI64. (bdesc_special_args): Update __builtin_ia32_movnti. Add __builtin_ia32_movnti64. (ix86_expand_special_args_builtin): Handle VOID_FTYPE_PLONGLONG_LONGLONG. * config/i386/i386.md (UNSPEC_MOVNTI): New. * config/i386/sse.md (sse2_movntsi): Renamed to ... (sse2_movnti): This. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181491 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/doc/extend.texi | 1 + 1 file changed, 1 insertion(+) (limited to 'gcc/doc') diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 15238c1b39e..de483a3d354 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -9384,6 +9384,7 @@ v2df __builtin_ia32_loadlpd (v2df, double const *) int __builtin_ia32_movmskpd (v2df) int __builtin_ia32_pmovmskb128 (v16qi) void __builtin_ia32_movnti (int *, int) +void __builtin_ia32_movnti64 (long long int *, long long int) void __builtin_ia32_movntpd (double *, v2df) void __builtin_ia32_movntdq (v2df *, v2df) v4si __builtin_ia32_pshufd (v4si, int) -- cgit v1.2.1 From e3ef604c3a6dd7012d4372d7dd2a9f12bb401fc8 Mon Sep 17 00:00:00 2001 From: iains Date: Tue, 22 Nov 2011 10:19:19 +0000 Subject: gcc: * target.def (tm_clone_table_section): New hook. * doc/tm.texi.in (TARGET_ASM_TM_CLONE_TABLE_SECTION): Define. * doc/tm.texi: Regenerate. * varasm.c (dump_tm_clone_pairs): Use target tm_clone_table_section. * output.h (default_clone_table_section): New prototype. * config/darwin.h (TARGET_ASM_TM_CLONE_TABLE_SECTION): New. * config/darwin-protos.h (darwin_tm_clone_table_section): New prototype. * config/darwin.c (darwin_tm_clone_table_section): New. gcc/testsuite: * gcc.dg/tm/20100615.c: Adjust for Darwin tm_clone_table section name. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181613 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/doc/tm.texi | 4 ++++ gcc/doc/tm.texi.in | 2 ++ 2 files changed, 6 insertions(+) (limited to 'gcc/doc') diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 10fd876fd09..c079ce29b7e 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -7090,6 +7090,10 @@ section names for mergeable constant data. Define this macro to override the string if a different section name should be used. @end deftypevr +@deftypefn {Target Hook} {section *} TARGET_ASM_TM_CLONE_TABLE_SECTION (void) +Return the section that should be used for transactional memory clone tables. +@end deftypefn + @deftypefn {Target Hook} {section *} TARGET_ASM_SELECT_RTX_SECTION (enum machine_mode @var{mode}, rtx @var{x}, unsigned HOST_WIDE_INT @var{align}) Return the section into which a constant @var{x}, of mode @var{mode}, should be placed. You can assume that @var{x} is some kind of diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in index cebeb1fa777..d03d7f656a2 100644 --- a/gcc/doc/tm.texi.in +++ b/gcc/doc/tm.texi.in @@ -7013,6 +7013,8 @@ otherwise. @hook TARGET_ASM_MERGEABLE_RODATA_PREFIX +@hook TARGET_ASM_TM_CLONE_TABLE_SECTION + @hook TARGET_ASM_SELECT_RTX_SECTION Return the section into which a constant @var{x}, of mode @var{mode}, should be placed. You can assume that @var{x} is some kind of -- cgit v1.2.1 From d387a10addf1181f5247772c1fce9a688955b583 Mon Sep 17 00:00:00 2001 From: ian Date: Tue, 22 Nov 2011 17:25:51 +0000 Subject: * doc/install.texi (Configuration): Correct doc of --enable-build-poststage1-with-cxx: it is not experimental. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181628 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/doc/install.texi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'gcc/doc') diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index 1daddb865e4..46c5824cc71 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/install.texi @@ -1298,8 +1298,7 @@ experimental option which may become the default in a later release. @item --enable-build-poststage1-with-cxx When bootstrapping, build stages 2 and 3 of GCC using a C++ compiler rather than a C compiler. Stage 1 is still built with a C compiler. -This is an experimental option which may become the default in a later -release. This is enabled by default and may be disabled using +This is enabled by default and may be disabled using @option{--disable-build-poststage1-with-cxx}. @item --enable-maintainer-mode -- cgit v1.2.1 From 412f575fbe8deb6876ccbaab6a0d9b1174776508 Mon Sep 17 00:00:00 2001 From: law Date: Tue, 22 Nov 2011 20:32:19 +0000 Subject: * doc/contrib.texi: Add entry for David Binderman. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181634 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/doc/contrib.texi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'gcc/doc') diff --git a/gcc/doc/contrib.texi b/gcc/doc/contrib.texi index f76cce8d234..ffefecc8607 100644 --- a/gcc/doc/contrib.texi +++ b/gcc/doc/contrib.texi @@ -65,6 +65,10 @@ improved alias analysis, plus migrating GCC to Bugzilla. @item Geoff Berry for his Java object serialization work and various patches. +@item +David Binderman tests weekly snapshots of GCC trunk against Fedora Rawhide +for several architectures. + @item Uros Bizjak for the implementation of x87 math built-in functions and for various middle end and i386 back end improvements and bug fixes. -- cgit v1.2.1 From 0cb057cb45a7da7e21d222a4866f99e4de947aa9 Mon Sep 17 00:00:00 2001 From: vmakarov Date: Wed, 23 Nov 2011 18:51:17 +0000 Subject: 2011-11-23 Vladimir Makarov PR rtl-optimization/48455 * doc/invoke.texi (-fira-region): Document default values. * flags-types.h (enum ira_region): Add new value IRA_REGION_AUTODETECT. * common.opt (fira-region): Set up initial value to IRA_REGION_AUTODETECT. * toplev.c (process_options): Set up flag_ira_region depending on -O options. * ira.c (ira.c): Remove optimize guard for ira_build. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181675 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/doc/invoke.texi | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) (limited to 'gcc/doc') diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index e58ed1b4ac5..4e6edb9414e 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -6731,13 +6731,16 @@ rule generates a better code. Use specified regions for the integrated register allocator. The @var{region} argument should be one of @code{all}, @code{mixed}, or @code{one}. The first value means using all loops as register -allocation regions, the second value which is the default means using -all loops except for loops with small register pressure as the -regions, and third one means using all function as a single region. -The first value can give best result for machines with small size and -irregular register set, the third one results in faster and generates -decent code and the smallest size code, and the default value usually -give the best results in most cases and for most architectures. +allocation regions, the second value which is enabled by default when +compiling with optimization for speed (@option{-O}, @option{-O2}, +@dots{}) means using all loops except for loops with small register +pressure as the regions, and third one which is enabled by default for +@option{-Os} or @option{-O0} means using all function as a single +region. The first value can give best result for machines with small +size and irregular register set, the third one results in faster and +generates decent code and the smallest size code, and the second value +usually give the best results in most cases and for most +architectures. @item -fira-loop-pressure @opindex fira-loop-pressure -- cgit v1.2.1 From 384f63614958afaf8e5349f1d8066e17563553da Mon Sep 17 00:00:00 2001 From: gjl Date: Mon, 28 Nov 2011 09:58:37 +0000 Subject: * doc/extend.texi (AVR Built-in Functions): Add documentation for __builtin_avr_map8 and __builtin_avr_map16. * config/avr/avr.md: Document new %t and %T asm output codes. (define_c_enum "unspec"): Add UNSPEC_MAP_BITS. (adjust_len): Add map_bits. (map_bitsqi, map_bitshi): New insns. * config/avr/avr-protos.h (avr_out_map_bits): New. * config/avr/avr-protos.c (print_operand): Implement %t and %T. (adjust_insn_length): Handle ADJUST_LEN_MAP_BITS. (avr_double_int_push_digit): New function. (avr_map, avr_revert_map, avr_swap_map, avr_id_map): New functions. (avr_sig_map, avr_map_hamming_byte): New functions. (avr_out_swap_bits, avr_out_revert_bits, avr_move_bits, avr_out_map_bits): New functions. (enum avr_builtin_id): Add AVR_BUILTIN_MAP8, AVR_BUILTIN_MAP16. (avr_init_builtins): Populate __builtin_avr_map8, __builtin_avr_map16. (bdesc_2arg): Add __builtin_avr_map8, __builtin_avr_map16 ... (avr_expand_builtin): ...and expand them. * config/avr/avr-c.c (avr_cpu_cpp_builtins): New built-in defines: __BUILTIN_AVR_MAP8, __BUILTIN_AVR_MAP16. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181773 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/doc/extend.texi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'gcc/doc') diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index de483a3d354..d52f9a0cf29 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -8594,11 +8594,41 @@ implements void __builtin_avr_delay_cycles (unsigned long ticks) @end smallexample +@noindent @code{ticks} is the number of ticks to delay execution. Note that this built-in does not take into account the effect of interrupts which might increase delay time. @code{ticks} must be a compile time integer constant; delays with a variable number of cycles are not supported. +@smallexample + unsigned char __builtin_avr_map8 (unsigned long map, unsigned char val) +@end smallexample + +@noindent +Each bit of the result is copied from a specific bit of @code{val}. +@code{map} is a compile time constant that represents a map composed +of 8 nibbles (4-bit groups): +The @var{n}-th nibble of @code{map} specifies which bit of @code{val} +is to be moved to the @var{n}-th bit of the result. +For example, @code{map = 0x76543210} represents identity: The MSB of +the result is read from the 7-th bit of @code{val}, the LSB is +read from the 0-th bit to @code{val}, etc. +Two more examples: @code{0x01234567} reverses the bit order and +@code{0x32107654} is equivalent to a @code{swap} instruction. + +@noindent +One typical use case for this and the following built-in is adjusting input and +output values to non-contiguous port layouts. + +@smallexample + unsigned int __builtin_avr_map16 (unsigned long long map, unsigned int val) +@end smallexample + +@noindent +Similar to the previous built-in except that it operates on @code{int} +and thus 16 bits are involved. Again, @code{map} must be a compile +time constant. + @node Blackfin Built-in Functions @subsection Blackfin Built-in Functions -- cgit v1.2.1