From 9eb6eca93458ff6539e89fe774cc379883bc90c4 Mon Sep 17 00:00:00 2001 From: davem Date: Mon, 31 Oct 2011 22:09:12 +0000 Subject: Allow zero operand in sparc VIS3 cmask patterns. * config/sparc/sparc.md (cmask patterns): Allow zero operand. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@180715 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/config/sparc/sparc.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'gcc/config/sparc/sparc.md') diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 6dd390952c3..fbd1a871921 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -8452,7 +8452,7 @@ ;; Conditional moves are possible via fcmpX --> cmaskX -> bshuffle (define_insn "cmask8_vis" [(set (reg:DI GSR_REG) - (unspec:DI [(match_operand:P 0 "register_operand" "r") + (unspec:DI [(match_operand:P 0 "register_or_zero_operand" "rJ") (reg:DI GSR_REG)] UNSPEC_CMASK8))] "TARGET_VIS3" @@ -8460,7 +8460,7 @@ (define_insn "cmask16_vis" [(set (reg:DI GSR_REG) - (unspec:DI [(match_operand:P 0 "register_operand" "r") + (unspec:DI [(match_operand:P 0 "register_or_zero_operand" "rJ") (reg:DI GSR_REG)] UNSPEC_CMASK16))] "TARGET_VIS3" @@ -8468,7 +8468,7 @@ (define_insn "cmask32_vis" [(set (reg:DI GSR_REG) - (unspec:DI [(match_operand:P 0 "register_operand" "r") + (unspec:DI [(match_operand:P 0 "register_or_zero_operand" "rJ") (reg:DI GSR_REG)] UNSPEC_CMASK32))] "TARGET_VIS3" -- cgit v1.2.1