From 07127a0a3b7a73f24105b80dd63c12d38fe84bf1 Mon Sep 17 00:00:00 2001 From: DJ Delorie Date: Wed, 8 Mar 2006 22:09:37 -0500 Subject: addsub.md (addqi3): Disparage a0/a1. * config/m32c/addsub.md (addqi3): Disparage a0/a1. (addpsi3): Expand to include memory operands. Remove reload-specific splits. * config/m32c/bitops.md (bset_qi, bset_hi, bclr_qi): New. (andqi3_16, andhi3_16, iorqi3_16, iorhi3_16): New. (andqi3_24, andhi3_24, iorqi3_24, iorhi3_24): New. (andqi3, andhi3, iorqi3, iorhi3): Convert to expanders. (shift1_qi, shift1_hi, insv): New. * config/m32c/cond.md (cbranchqi4, cbranchhi4): Remove. (cbranch4, stzx_16, stzx_24_, stzx_reversed, cmp, b, s, s_24, movqicc, movhicc, cond_to_int): New. * config/m32c/m32c-protos.h: Update as needed. * config/m32c/m32c.c (m32c_reg_class_from_constraint): Don't default the Rcr, Rcl, Raw, and Ral constraints. Add Ra0 and Ra1. Fail for unrecognized R* constraints. (m32c_cannot_change_mode_class): Be more picky about pseudos. (m32c_const_ok_for_constraint_p): Add Imb, Imw, and I00. (m32c_extra_constraint_p2): Allow (mem (plus (plus fb int) int)). Add Sp constraint. (m32c_init_libfuncs): New. (m32c_legitimate_address_p): Add debug wrapper. (m32c_rtx_costs): New. (m32c_address_cost): New. (conversions): Add 'B' prefix. (m32c_print_operand): 'h' and 'H' pick lower and upper halves of operands, or word regnames for QI operands. 'B' prints bit position. (m32c_expand_setmemhi): New. (m32c_expand_movmemhi): New. (m32c_expand_movstr): New. (m32c_expand_cmpstr): New. (m32c_prepare_shift): Shift counts are limited to 16 bits at a time. (m32c_expand_neg_mulpsi3): Handle non-ints. (m32c_cmp_flg_0): New. (m32c_expand_movcc): New. (m32c_expand_insv): New. (m32c_scc_pattern): New. * config/m32c/m32c.h (reg classes): Add AO_REGS and A1_REGS. Take a0/a1 out of SIregs. (STORE_FLAG_VALUE): New. * config/m32c/m32c.md: Add unspecs for string moves. Define various mode and code macros. (no_insn): New. * config/m32c/mov.md: Make constraints more liberal. (zero_extendqihi2): Optimize r0/r1 case. * config/m32c/muldiv.md (mulpsi3): Check for intvals. * config/m32c/predicates.md (m32c_any_operand): New. (m32c_nonimmediate_operand): New. (m32c_hl_operand): New. (m32c_r3_operand): New. (ap_operand): New. (ma_operand): New. (memsym_operand): New. (memimmed_operand): New. (a_qi_operand): New. (m32c_eqne_operator): New. (m32c_1bit8_operand): New. (m32c_1bit16_operand): New. (m32c_1mask8_operand): New. (m32c_1mask16_operand): New. * config/m32c/blkmov.md: New file. * config/m32c/t-m32c (MD_FILES): Add blkmov. From-SVN: r111859 --- gcc/config/m32c/m32c-protos.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'gcc/config/m32c/m32c-protos.h') diff --git a/gcc/config/m32c/m32c-protos.h b/gcc/config/m32c/m32c-protos.h index ebc4526eef8..eb977961bd9 100644 --- a/gcc/config/m32c/m32c-protos.h +++ b/gcc/config/m32c/m32c-protos.h @@ -58,8 +58,16 @@ rtx m32c_function_value (tree, tree); int m32c_cannot_change_mode_class (MM, MM, int); int m32c_class_max_nregs (int, MM); +rtx m32c_cmp_flg_0 (rtx); rtx m32c_eh_return_stackadj_rtx (void); void m32c_emit_eh_epilogue (rtx); +int m32c_expand_cmpstr (rtx *); +int m32c_expand_insv (rtx *); +int m32c_expand_movcc (rtx *); +int m32c_expand_movmemhi (rtx *); +int m32c_expand_movstr (rtx *); +void m32c_expand_neg_mulpsi3 (rtx *); +int m32c_expand_setmemhi (rtx *); int m32c_extra_constraint_p (rtx, char, const char *); int m32c_extra_constraint_p2 (rtx, char, const char *); int m32c_hard_regno_nregs (int, MM); @@ -86,6 +94,7 @@ int m32c_reg_ok_for_base_p (rtx, int); int m32c_register_move_cost (MM, int, int); MM m32c_regno_reg_class (int); rtx m32c_return_addr_rtx (int); +const char *m32c_scc_pattern (rtx *, RTX_CODE); int m32c_secondary_reload_class (int, MM, rtx); int m32c_split_move (rtx *, MM, int); int m32c_split_psi_p (rtx *); -- cgit v1.2.1