From 6fc76bb02fac69d05787ea749a9cf8230b59afed Mon Sep 17 00:00:00 2001 From: hjagasia Date: Fri, 14 May 2010 17:35:11 +0000 Subject: 2010-05-14 Harsha Jagasia * config.gcc: Add support for --with-cpu option for bdver1. * config/i386/i386.h (TARGET_BDVER1): New macro. (ix86_tune_indices): Change SSE_UNALIGNED_MOVE_OPTIMAL to SSE_UNALIGNED_LOAD_OPTIMAL. Add SSE_UNALIGNED_STORE_OPTIMAL. (ix86_tune_features) :Change SSE_UNALIGNED_MOVE_OPTIMAL to SSE_UNALIGNED_LOAD_OPTIMAL. Add SSE_UNALIGNED_STORE_OPTIMAL. Add SSE_PACKED_SINGLE_INSN_OPTIMAL. (TARGET_CPU_DEFAULT_NAMES): Add bdver1. (processor_type): Add PROCESSOR_BDVER1. * config/i386/i386.md: Add bdver1 as a new cpu attribute to match processor_type in config/i386/i386.h. Add check for TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL to emit movaps instead of movapd when replacing movsd or movss for SSE and AVX. Add check for TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL to emit packed xor instead of packed double/packed integer xor for SSE and AVX when moving a zero value. * config/i386/sse.md: Add check for TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL to emit movaps instead of movapd/movdqa for SSE and AVX. Add check for TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL to emit packed single logical operations i.e and, or and xor instead of packed double logical operations for SSE and AVX. * config/i386/i386-c.c: (ix86_target_macros_internal): Add PROCESSOR_BDVER1. * config/i386/driver-i386.c: Turn on -mtune=native for BDVER1. (has_fma4, has_xop): New. * config/i386/i386.c (bdver1_cost): New variable. (m_BDVER1): New macro. (m_AMD_MULTIPLE): Add m_BDVER1. (x86_tune_use_leave, x86_tune_push_memory, x86_tune_unroll_strlen, x86_tune_deep_branch_prediction, x86_tune_use_sahf, x86_tune_movx, x86_tune_use_simode_fiop, x86_tune_promote_qimode, x86_tune_add_esp_8, x86_tune_tune_sub_esp_4, x86_tune_sub_esp_8, x86_tune_integer_dfmode_moves, x86_tune_partial_reg_dependency, x86_tune_sse_partial_reg_dependency, x86_tune_sse_unaligned_load_optimal, x86_tune_sse_unaligned_store_optimal, x86_tune_sse_typeless_stores, x86_tune_memory_mismatch_stall, x86_tune_use_ffreep, x86_tune_inter_unit_moves, x86_tune_inter_unit_conversions, x86_tune_use_bt, x86_tune_pad_returns, x86_tune_slow_imul_imm32_mem, x86_tune_slow_imul_imm8, x86_tune_fuse_cmp_and_branch): Enable/disable for bdver1. (processor_target_table): Add bdver1_cost. (cpu_names): Add bdver1. (override_options): Set up PROCESSOR_BDVER1 for bdver1 entry in processor_alias_table. (ix86_expand_vector_move_misalign): Change TARGET_SSE_UNALIGNED_MOVE_OPTIMAL to TARGET_SSE_UNALIGNED_LOAD_OPTIMAL. Check for TARGET_SSE_UNALIGNED_STORE_OPTIMAL. Check for TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL to emit movups instead of movupd/movdqu for SSE and AVX. (ix86_tune_issue_rate): Add PROCESSOR_BDVER1. (ix86_tune_adjust_cost): Add code for bdver1. (standard_sse_constant_opcode): Add check for TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL to emit packed single xor instead of packed double xor for SSE and AVX. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@159399 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/config.gcc | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) (limited to 'gcc/config.gcc') diff --git a/gcc/config.gcc b/gcc/config.gcc index 21433fc690a..da56fbecc20 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -1139,7 +1139,7 @@ i[34567]86-*-linux* | i[34567]86-*-kfreebsd*-gnu | i[34567]86-*-knetbsd*-gnu | i need_64bit_hwint=yes need_64bit_isa=yes case X"${with_cpu}" in - Xgeneric|Xatom|Xcore2|Xnocona|Xx86-64|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3) + Xgeneric|Xatom|Xcore2|Xnocona|Xx86-64|Xbdver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3) ;; X) if test x$with_cpu_64 = x; then @@ -1148,7 +1148,7 @@ i[34567]86-*-linux* | i[34567]86-*-kfreebsd*-gnu | i[34567]86-*-knetbsd*-gnu | i ;; *) echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2 - echo "generic atom core2 nocona x86-64 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2 + echo "generic atom core2 nocona x86-64 bdver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2 exit 1 ;; esac @@ -1266,7 +1266,7 @@ i[34567]86-*-solaris2*) need_64bit_isa=yes use_gcc_stdint=wrap case X"${with_cpu}" in - Xgeneric|Xatom|Xcore2|Xnocona|Xx86-64|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3) + Xgeneric|Xatom|Xcore2|Xnocona|Xx86-64|Xbdver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3) ;; X) if test x$with_cpu_64 = x; then @@ -1275,7 +1275,7 @@ i[34567]86-*-solaris2*) ;; *) echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2 - echo "generic atom core2 nocona x86-64 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2 + echo "generic atom core2 nocona x86-64 bdver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2 exit 1 ;; esac @@ -1346,7 +1346,7 @@ i[34567]86-*-mingw* | x86_64-*-mingw*) if test x$enable_targets = xall; then tm_defines="${tm_defines} TARGET_BI_ARCH=1" case X"${with_cpu}" in - Xgeneric|Xatom|Xcore2|Xnocona|Xx86-64|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3) + Xgeneric|Xatom|Xcore2|Xnocona|Xx86-64|Xbdver1|Xamdfam10|Xbarcelona|Xk8|Xopteron|Xathlon64|Xathlon-fx|Xathlon64-sse3|Xk8-sse3|Xopteron-sse3) ;; X) if test x$with_cpu_64 = x; then @@ -1355,7 +1355,7 @@ i[34567]86-*-mingw* | x86_64-*-mingw*) ;; *) echo "Unsupported CPU used in --with-cpu=$with_cpu, supported values:" 1>&2 - echo "generic atom core2 nocona x86-64 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2 + echo "generic atom core2 nocona x86-64 bdver1 amdfam10 barcelona k8 opteron athlon64 athlon-fx athlon64-sse3 k8-sse3 opteron-sse3" 1>&2 exit 1 ;; esac @@ -2626,6 +2626,10 @@ case ${target} in ;; i686-*-* | i786-*-*) case ${target_noncanonical} in + bdver1-*) + arch=bdver1 + cpu=bdver1 + ;; amdfam10-*|barcelona-*) arch=amdfam10 cpu=amdfam10 @@ -2703,6 +2707,10 @@ case ${target} in ;; x86_64-*-*) case ${target_noncanonical} in + bdver1-*) + arch=bdver1 + cpu=bdver1 + ;; amdfam10-*|barcelona-*) arch=amdfam10 cpu=amdfam10 @@ -3109,8 +3117,8 @@ case "${target}" in ;; "" | x86-64 | generic | native \ | k8 | k8-sse3 | athlon64 | athlon64-sse3 | opteron \ - | opteron-sse3 | athlon-fx | amdfam10 | barcelona \ - | nocona | core2 | atom) + | opteron-sse3 | athlon-fx | bdver1 | amdfam10 \ + | barcelona | nocona | core2 | atom) # OK ;; *) -- cgit v1.2.1