From f7c26a033eef4b8de277c0e0db793cacf3b760af Mon Sep 17 00:00:00 2001 From: segher Date: Thu, 29 Jun 2017 17:28:47 +0000 Subject: combine: Print insns with the cost dump In the combine dump file, at the start there is a list of the RTL cost of every insn. The only thing listed about the insns is the UID though. To make it more useful, this patch prints the insn itself as well (in slim format). * combine.c (combine_instructions): Print insns to dump_file, together with their costs. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@249802 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/combine.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'gcc/combine.c') diff --git a/gcc/combine.c b/gcc/combine.c index 2d49bc2233c..e99382685c3 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -1213,8 +1213,10 @@ combine_instructions (rtx_insn *f, unsigned int nregs) INSN_COST (insn) = insn_rtx_cost (PATTERN (insn), optimize_this_for_speed_p); if (dump_file) - fprintf (dump_file, "insn_cost %d: %d\n", - INSN_UID (insn), INSN_COST (insn)); + { + fprintf (dump_file, "insn_cost %d for ", INSN_COST (insn)); + dump_insn_slim (dump_file, insn); + } } } -- cgit v1.2.1 From 582adad157b7100aafcba02df50583e30941acdf Mon Sep 17 00:00:00 2001 From: rsandifo Date: Wed, 5 Jul 2017 15:29:27 +0000 Subject: Remove enum before machine_mode r216834 did a mass removal of "enum" before "machine_mode". This patch removes some new uses that have been added since then. 2017-07-05 Richard Sandiford Alan Hayward David Sherwood gcc/ * combine.c (simplify_if_then_else): Remove "enum" before "machine_mode". * compare-elim.c (can_eliminate_compare): Likewise. * config/aarch64/aarch64-builtins.c (aarch64_simd_builtin_std_type): Likewise. (aarch64_lookup_simd_builtin_type): Likewise. (aarch64_simd_builtin_type): Likewise. (aarch64_init_simd_builtin_types): Likewise. (aarch64_simd_expand_args): Likewise. * config/aarch64/aarch64-protos.h (aarch64_simd_attr_length_rglist): Likewise. (aarch64_reverse_mask): Likewise. (aarch64_simd_emit_reg_reg_move): Likewise. (aarch64_gen_adjusted_ldpstp): Likewise. (aarch64_ccmp_mode_to_code): Likewise. (aarch64_operands_ok_for_ldpstp): Likewise. (aarch64_operands_adjust_ok_for_ldpstp): Likewise. * config/aarch64/aarch64.c (aarch64_ira_change_pseudo_allocno_class): Likewise. (aarch64_min_divisions_for_recip_mul): Likewise. (aarch64_reassociation_width): Likewise. (aarch64_get_condition_code_1): Likewise. (aarch64_simd_emit_reg_reg_move): Likewise. (aarch64_simd_attr_length_rglist): Likewise. (aarch64_reverse_mask): Likewise. (aarch64_operands_ok_for_ldpstp): Likewise. (aarch64_operands_adjust_ok_for_ldpstp): Likewise. (aarch64_gen_adjusted_ldpstp): Likewise. * config/aarch64/cortex-a57-fma-steering.c (fma_node::rename): Likewise. * config/arc/arc.c (legitimate_offset_address_p): Likewise. * config/arm/arm-builtins.c (arm_simd_builtin_std_type): Likewise. (arm_lookup_simd_builtin_type): Likewise. (arm_simd_builtin_type): Likewise. (arm_init_simd_builtin_types): Likewise. (arm_expand_builtin_args): Likewise. * config/arm/arm-protos.h (arm_expand_builtin): Likewise. * config/ft32/ft32.c (ft32_libcall_value): Likewise. (ft32_setup_incoming_varargs): Likewise. (ft32_function_arg): Likewise. (ft32_function_arg_advance): Likewise. (ft32_pass_by_reference): Likewise. (ft32_arg_partial_bytes): Likewise. (ft32_valid_pointer_mode): Likewise. (ft32_addr_space_pointer_mode): Likewise. (ft32_addr_space_legitimate_address_p): Likewise. * config/i386/i386-protos.h (ix86_operands_ok_for_move_multiple): Likewise. * config/i386/i386.c (ix86_setup_incoming_vararg_bounds): Likewise. (ix86_emit_outlined_ms2sysv_restore): Likewise. (iamcu_alignment): Likewise. (canonicalize_vector_int_perm): Likewise. (ix86_noce_conversion_profitable_p): Likewise. (ix86_mpx_bound_mode): Likewise. (ix86_operands_ok_for_move_multiple): Likewise. * config/microblaze/microblaze-protos.h (microblaze_expand_conditional_branch_reg): Likewise. * config/microblaze/microblaze.c (microblaze_expand_conditional_branch_reg): Likewise. * config/powerpcspe/powerpcspe.c (rs6000_init_hard_regno_mode_ok): Likewise. (rs6000_reassociation_width): Likewise. (rs6000_invalid_binary_op): Likewise. (fusion_p9_p): Likewise. (emit_fusion_p9_load): Likewise. (emit_fusion_p9_store): Likewise. * config/riscv/riscv-protos.h (riscv_regno_mode_ok_for_base_p): Likewise. (riscv_hard_regno_mode_ok_p): Likewise. (riscv_address_insns): Likewise. (riscv_split_symbol): Likewise. (riscv_legitimize_move): Likewise. (riscv_function_value): Likewise. (riscv_hard_regno_nregs): Likewise. (riscv_expand_builtin): Likewise. * config/riscv/riscv.c (riscv_build_integer_1): Likewise. (riscv_build_integer): Likewise. (riscv_split_integer): Likewise. (riscv_legitimate_constant_p): Likewise. (riscv_cannot_force_const_mem): Likewise. (riscv_regno_mode_ok_for_base_p): Likewise. (riscv_valid_base_register_p): Likewise. (riscv_valid_offset_p): Likewise. (riscv_valid_lo_sum_p): Likewise. (riscv_classify_address): Likewise. (riscv_legitimate_address_p): Likewise. (riscv_address_insns): Likewise. (riscv_load_store_insns): Likewise. (riscv_force_binary): Likewise. (riscv_split_symbol): Likewise. (riscv_force_address): Likewise. (riscv_legitimize_address): Likewise. (riscv_move_integer): Likewise. (riscv_legitimize_const_move): Likewise. (riscv_legitimize_move): Likewise. (riscv_address_cost): Likewise. (riscv_subword): Likewise. (riscv_output_move): Likewise. (riscv_canonicalize_int_order_test): Likewise. (riscv_emit_int_order_test): Likewise. (riscv_function_arg_boundary): Likewise. (riscv_pass_mode_in_fpr_p): Likewise. (riscv_pass_fpr_single): Likewise. (riscv_pass_fpr_pair): Likewise. (riscv_get_arg_info): Likewise. (riscv_function_arg): Likewise. (riscv_function_arg_advance): Likewise. (riscv_arg_partial_bytes): Likewise. (riscv_function_value): Likewise. (riscv_pass_by_reference): Likewise. (riscv_setup_incoming_varargs): Likewise. (riscv_print_operand): Likewise. (riscv_elf_select_rtx_section): Likewise. (riscv_save_restore_reg): Likewise. (riscv_for_each_saved_reg): Likewise. (riscv_register_move_cost): Likewise. (riscv_hard_regno_mode_ok_p): Likewise. (riscv_hard_regno_nregs): Likewise. (riscv_class_max_nregs): Likewise. (riscv_memory_move_cost): Likewise. * config/rl78/rl78-protos.h (rl78_split_movsi): Likewise. * config/rl78/rl78.c (rl78_split_movsi): Likewise. (rl78_addr_space_address_mode): Likewise. * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Likewise. * config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Likewise. (rs6000_reassociation_width): Likewise. (rs6000_invalid_binary_op): Likewise. (fusion_p9_p): Likewise. (emit_fusion_p9_load): Likewise. (emit_fusion_p9_store): Likewise. * config/visium/visium-protos.h (prepare_move_operands): Likewise. (ok_for_simple_move_operands): Likewise. (ok_for_simple_move_strict_operands): Likewise. (ok_for_simple_arith_logic_operands): Likewise. (visium_legitimize_reload_address): Likewise. (visium_select_cc_mode): Likewise. (output_cbranch): Likewise. (visium_split_double_move): Likewise. (visium_expand_copysign): Likewise. (visium_expand_int_cstore): Likewise. (visium_expand_fp_cstore): Likewise. * config/visium/visium.c (visium_pass_by_reference): Likewise. (visium_function_arg): Likewise. (visium_function_arg_advance): Likewise. (visium_libcall_value): Likewise. (visium_setup_incoming_varargs): Likewise. (visium_legitimate_constant_p): Likewise. (visium_legitimate_address_p): Likewise. (visium_legitimize_address): Likewise. (visium_secondary_reload): Likewise. (visium_register_move_cost): Likewise. (visium_memory_move_cost): Likewise. (prepare_move_operands): Likewise. (ok_for_simple_move_operands): Likewise. (ok_for_simple_move_strict_operands): Likewise. (ok_for_simple_arith_logic_operands): Likewise. (visium_function_value_1): Likewise. (rtx_ok_for_offset_p): Likewise. (visium_legitimize_reload_address): Likewise. (visium_split_double_move): Likewise. (visium_expand_copysign): Likewise. (visium_expand_int_cstore): Likewise. (visium_expand_fp_cstore): Likewise. (visium_split_cstore): Likewise. (visium_select_cc_mode): Likewise. (visium_split_cbranch): Likewise. (output_cbranch): Likewise. (visium_print_operand_address): Likewise. * expmed.c (flip_storage_order): Likewise. * expmed.h (emit_cstore): Likewise. (flip_storage_order): Likewise. * genrecog.c (validate_pattern): Likewise. * hsa-gen.c (gen_hsa_addr): Likewise. * internal-fn.c (expand_arith_overflow): Likewise. * ira-color.c (allocno_copy_cost_saving): Likewise. * lra-assigns.c (find_hard_regno_for_1): Likewise. * lra-constraints.c (prohibited_class_reg_set_mode_p): Likewise. (process_invariant_for_inheritance): Likewise. * lra-eliminations.c (move_plus_up): Likewise. * omp-low.c (lower_oacc_reductions): Likewise. * simplify-rtx.c (simplify_subreg): Likewise. * target.def (TARGET_SETUP_INCOMING_VARARG_BOUNDS): Likewise. (TARGET_CHKP_BOUND_MODE): Likewise.. * targhooks.c (default_chkp_bound_mode): Likewise. (default_setup_incoming_vararg_bounds): Likewise. * targhooks.h (default_chkp_bound_mode): Likewise. (default_setup_incoming_vararg_bounds): Likewise. * tree-ssa-math-opts.c (divmod_candidate_p): Likewise. * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise. (have_whole_vector_shift): Likewise. * tree-vect-stmts.c (vectorizable_load): Likewise. * doc/tm.texi: Regenerate. gcc/brig/ * brig-c.h (brig_type_for_mode): Remove "enum" before "machine_mode". * brig-lang.c (brig_langhook_type_for_mode): Likewise. gcc/jit/ * dummy-frontend.c (jit_langhook_type_for_mode): Remove "enum" before "machine_mode". git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@250003 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/combine.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'gcc/combine.c') diff --git a/gcc/combine.c b/gcc/combine.c index e99382685c3..c1eec91a5d1 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -6584,7 +6584,7 @@ simplify_if_then_else (rtx x) && (i = exact_log2 (UINTVAL (true_rtx) & GET_MODE_MASK (mode))) >= 0) { rtx val = XEXP (cond, 0); - enum machine_mode val_mode = GET_MODE (val); + machine_mode val_mode = GET_MODE (val); if (val_mode == mode) return val; else if (GET_MODE_PRECISION (val_mode) < GET_MODE_PRECISION (mode)) -- cgit v1.2.1 From 3d8f3c24d5940be74f42182b2a2cdd4268d890fd Mon Sep 17 00:00:00 2001 From: segher Date: Wed, 19 Jul 2017 19:31:26 +0000 Subject: combine: Fix for PR81423 We here have an AND of a SUBREG of an LSHIFTRT. If that SUBREG is paradoxical, the extraction we form is the length of the size of the inner mode, which includes some bits that should not be in the result. Just give up in that case. PR rtl-optimization/81423 * combine.c (make_compound_operation_int): Don't try to optimize the AND of a SUBREG of an LSHIFTRT if that SUBREG is paradoxical. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@250365 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/combine.c | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) (limited to 'gcc/combine.c') diff --git a/gcc/combine.c b/gcc/combine.c index c1eec91a5d1..8dc62b57266 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -7956,18 +7956,9 @@ make_compound_operation_int (machine_mode mode, rtx *x_ptr, XEXP (inner_x0, 1), i, 1, 0, in_code == COMPARE); - if (new_rtx) - { - /* If we narrowed the mode when dropping the subreg, then - we must zero-extend to keep the semantics of the AND. */ - if (GET_MODE_SIZE (inner_mode) >= GET_MODE_SIZE (mode)) - ; - else if (SCALAR_INT_MODE_P (inner_mode)) - new_rtx = simplify_gen_unary (ZERO_EXTEND, mode, - new_rtx, inner_mode); - else - new_rtx = NULL; - } + /* If we narrowed the mode when dropping the subreg, then we lose. */ + if (GET_MODE_SIZE (inner_mode) < GET_MODE_SIZE (mode)) + new_rtx = NULL; /* If that didn't give anything, see if the AND simplifies on its own. */ -- cgit v1.2.1