From 7cfc36c0b1eb368f70a4997fe6cdcf22c3f6ad03 Mon Sep 17 00:00:00 2001 From: hjl Date: Wed, 12 May 2010 00:52:27 +0000 Subject: Add storent and 2: absneg patches for AVX. 2010-05-11 H.J. Lu * config/i386/sse.md (storent): New for AVX. (2: absneg): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/vect256@159302 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog.vect256 | 5 +++++ gcc/config/i386/sse.md | 15 +++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/gcc/ChangeLog.vect256 b/gcc/ChangeLog.vect256 index 0c7e2530b40..689b742b213 100644 --- a/gcc/ChangeLog.vect256 +++ b/gcc/ChangeLog.vect256 @@ -1,3 +1,8 @@ +2010-05-11 H.J. Lu + + * config/i386/sse.md (storent): New for AVX. + (2: absneg): Likewise. + 2010-05-11 H.J. Lu * config/i386/i386.h (UNITS_PER_SIMD_WORD_MAX): Use diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 7eb3ad20514..dd4f24389c2 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -495,6 +495,14 @@ ; that directly map to insns are defined; it would be possible to ; define patterns for other modes that would expand to several insns. +(define_expand "storent" + [(set (match_operand:AVX256MODEF2P 0 "memory_operand" "") + (unspec:AVX256MODEF2P + [(match_operand:AVX256MODEF2P 1 "register_operand" "")] + UNSPEC_MOVNT))] + "AVX256_VEC_FLOAT_MODE_P (mode)" + "") + (define_expand "storent" [(set (match_operand:SSEMODEF2P 0 "memory_operand" "") (unspec:SSEMODEF2P @@ -531,6 +539,13 @@ ;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +(define_expand "2" + [(set (match_operand:AVX256MODEF2P 0 "register_operand" "") + (absneg:AVX256MODEF2P + (match_operand:AVX256MODEF2P 1 "register_operand" "")))] + "AVX256_VEC_FLOAT_MODE_P (mode)" + "ix86_expand_fp_absneg_operator (, mode, operands); DONE;") + (define_expand "2" [(set (match_operand:SSEMODEF2P 0 "register_operand" "") (absneg:SSEMODEF2P -- cgit v1.2.1