* config/i386/i386.md (UNSPEC_VSIBADDR): New.

	* config/i386/predicates.md (vsib_address_operand,
	vsib_mem_operator): New predicates.
	* config/i386/i386.c (ix86_print_operand_address): Handle
	UNSPEC_VSIBADDR addresses.
	* config/i386/sse.md (avx2_gathersi<mode>, avx2_gatherdi<mode>,
	avx2_gatherdi<mode>256): Adjust expanders to use MEM with
	UNSPEC_VSIBADDR address.
	(*avx2_gathersi<mode>, *avx2_gatherdi<mode>, *avx2_gatherdi<mode>256):
	Adjust insns to use MEM with UNSPEC_VSIBADDR address.

	* gcc.target/i386/avx2-i32gatherd-1.c: Adjust scan-assembler regex
	to work also with -masm=intel and additionally test the xmm vs. ymm
	register type combination on mask/dest and in vsib.
	* gcc.target/i386/avx2-i32gatherd256-1.c: Likewise.
	* gcc.target/i386/avx2-i32gatherd256-3.c: Likewise.
	* gcc.target/i386/avx2-i32gatherd-3.c: Likewise.
	* gcc.target/i386/avx2-i32gatherpd-1.c: Likewise.
	* gcc.target/i386/avx2-i32gatherpd256-1.c: Likewise.
	* gcc.target/i386/avx2-i32gatherpd256-3.c: Likewise.
	* gcc.target/i386/avx2-i32gatherpd-3.c: Likewise.
	* gcc.target/i386/avx2-i32gatherps-1.c: Likewise.
	* gcc.target/i386/avx2-i32gatherps256-1.c: Likewise.
	* gcc.target/i386/avx2-i32gatherps256-3.c: Likewise.
	* gcc.target/i386/avx2-i32gatherps-3.c: Likewise.
	* gcc.target/i386/avx2-i32gatherq-1.c: Likewise.
	* gcc.target/i386/avx2-i32gatherq256-1.c: Likewise.
	* gcc.target/i386/avx2-i32gatherq256-3.c: Likewise.
	* gcc.target/i386/avx2-i32gatherq-3.c: Likewise.
	* gcc.target/i386/avx2-i64gatherd-1.c: Likewise.
	* gcc.target/i386/avx2-i64gatherd256-1.c: Likewise.
	* gcc.target/i386/avx2-i64gatherd256-3.c: Likewise.
	* gcc.target/i386/avx2-i64gatherd-3.c: Likewise.
	* gcc.target/i386/avx2-i64gatherpd-1.c: Likewise.
	* gcc.target/i386/avx2-i64gatherpd256-1.c: Likewise.
	* gcc.target/i386/avx2-i64gatherpd256-3.c: Likewise.
	* gcc.target/i386/avx2-i64gatherpd-3.c: Likewise.
	* gcc.target/i386/avx2-i64gatherps-1.c: Likewise.
	* gcc.target/i386/avx2-i64gatherps256-1.c: Likewise.
	* gcc.target/i386/avx2-i64gatherps256-3.c: Likewise.
	* gcc.target/i386/avx2-i64gatherps-3.c: Likewise.
	* gcc.target/i386/avx2-i64gatherq-1.c: Likewise.
	* gcc.target/i386/avx2-i64gatherq256-1.c: Likewise.
	* gcc.target/i386/avx2-i64gatherq256-3.c: Likewise.
	* gcc.target/i386/avx2-i64gatherq-3.c: Likewise.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@180520 138bc75d-0d04-0410-961f-82ee72b054a4

1 files changed, 60 insertions, 30 deletions

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 31c40d36584..73429e472ba 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -12693,28 +12693,38 @@
   [(parallel [(set (match_operand:VEC_GATHER_MODE 0 "register_operand" "")
 		   (unspec:VEC_GATHER_MODE
 		     [(match_operand:VEC_GATHER_MODE 1 "register_operand" "")
-		      (match_operand 2 "register_operand" "")
+		      (mem:<ssescalarmode>
+			(match_par_dup 7
+			  [(match_operand 2 "vsib_address_operand" "")
+			   (match_operand:<VEC_GATHER_MODE> 3 "register_operand" "")
+			   (match_operand:SI 5 "const1248_operand " "")]))
 		      (mem:BLK (scratch))
-		      (match_operand:<VEC_GATHER_MODE> 3 "register_operand" "")
-		      (match_operand:VEC_GATHER_MODE 4 "register_operand" "")
-		      (match_operand:SI 5 "const1248_operand " "")]
+		      (match_operand:VEC_GATHER_MODE 4 "register_operand" "")]
 		     UNSPEC_GATHER))
 	      (clobber (match_scratch:VEC_GATHER_MODE 6 ""))])]
-  "TARGET_AVX2")
+  "TARGET_AVX2"
+{
+  operands[7]
+    = gen_rtx_UNSPEC (Pmode, gen_rtvec (3, operands[2], operands[3],
+					operands[5]), UNSPEC_VSIBADDR);
+})
 
 (define_insn "*avx2_gathersi<mode>"
   [(set (match_operand:VEC_GATHER_MODE 0 "register_operand" "=&x")
 	(unspec:VEC_GATHER_MODE
 	  [(match_operand:VEC_GATHER_MODE 2 "register_operand" "0")
-	   (match_operand:P 3 "register_operand" "r")
+	   (match_operator:<ssescalarmode> 7 "vsib_mem_operator"
+	     [(unspec:P
+		[(match_operand:P 3 "vsib_address_operand" "p")
+		 (match_operand:<VEC_GATHER_MODE> 4 "register_operand" "x")
+		 (match_operand:SI 6 "const1248_operand" "n")]
+		UNSPEC_VSIBADDR)])
 	   (mem:BLK (scratch))
-	   (match_operand:<VEC_GATHER_MODE> 4 "register_operand" "x")
-	   (match_operand:VEC_GATHER_MODE 5 "register_operand" "1")
-	   (match_operand:SI 6 "const1248_operand" "n")]
+	   (match_operand:VEC_GATHER_MODE 5 "register_operand" "1")]
 	  UNSPEC_GATHER))
    (clobber (match_scratch:VEC_GATHER_MODE 1 "=&x"))]
   "TARGET_AVX2"
-  "v<sseintprefix>gatherd<ssemodesuffix>\t{%1, (%3, %4, %p6), %0|%0, (%3, %4, %p6), %1}"
+  "v<sseintprefix>gatherd<ssemodesuffix>\t{%1, %7, %0|%0, %7, %1}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<sseinsnmode>")])
@@ -12723,28 +12733,38 @@
   [(parallel [(set (match_operand:VEC_GATHER_MODE 0 "register_operand" "")
 		   (unspec:VEC_GATHER_MODE
 		     [(match_operand:VEC_GATHER_MODE 1 "register_operand" "")
-		      (match_operand 2 "register_operand" "")
+		      (mem:<ssescalarmode>
+			(match_par_dup 7
+			  [(match_operand 2 "vsib_address_operand" "")
+			   (match_operand:<AVXMODE48P_DI> 3 "register_operand" "")
+			   (match_operand:SI 5 "const1248_operand " "")]))
 		      (mem:BLK (scratch))
-		      (match_operand:<AVXMODE48P_DI> 3 "register_operand" "")
-		      (match_operand:VEC_GATHER_MODE 4 "register_operand" "")
-		      (match_operand:SI 5 "const1248_operand " "")]
+		      (match_operand:VEC_GATHER_MODE 4 "register_operand" "")]
 		     UNSPEC_GATHER))
 	      (clobber (match_scratch:VEC_GATHER_MODE 6 ""))])]
-  "TARGET_AVX2")
+  "TARGET_AVX2"
+{
+  operands[7]
+    = gen_rtx_UNSPEC (Pmode, gen_rtvec (3, operands[2], operands[3],
+					operands[5]), UNSPEC_VSIBADDR);
+})
 
 (define_insn "*avx2_gatherdi<mode>"
   [(set (match_operand:AVXMODE48P_DI 0 "register_operand" "=&x")
 	(unspec:AVXMODE48P_DI
 	  [(match_operand:AVXMODE48P_DI 2 "register_operand" "0")
-	   (match_operand:P 3 "register_operand" "r")
+	   (match_operator:<ssescalarmode> 7 "vsib_mem_operator"
+	     [(unspec:P
+		[(match_operand:P 3 "vsib_address_operand" "p")
+		 (match_operand:<AVXMODE48P_DI> 4 "register_operand" "x")
+		 (match_operand:SI 6 "const1248_operand" "n")]
+		UNSPEC_VSIBADDR)])
 	   (mem:BLK (scratch))
-	   (match_operand:<AVXMODE48P_DI> 4 "register_operand" "x")
-	   (match_operand:AVXMODE48P_DI 5 "register_operand" "1")
-	   (match_operand:SI 6 "const1248_operand" "n")]
+	   (match_operand:AVXMODE48P_DI 5 "register_operand" "1")]
 	  UNSPEC_GATHER))
    (clobber (match_scratch:AVXMODE48P_DI 1 "=&x"))]
   "TARGET_AVX2"
-  "v<sseintprefix>gatherq<ssemodesuffix>\t{%1, (%3, %4, %p6), %0|%0, (%3, %4, %p6), %1}"
+  "v<sseintprefix>gatherq<ssemodesuffix>\t{%1, %7, %0|%0, %7, %1}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<sseinsnmode>")])
@@ -12755,28 +12775,38 @@
   [(parallel [(set (match_operand:VI4F_128 0 "register_operand" "")
 		   (unspec:VI4F_128
 		     [(match_operand:VI4F_128 1 "register_operand" "")
-		      (match_operand 2 "register_operand" "")
+		      (mem:<ssescalarmode>
+			(match_par_dup 7
+			  [(match_operand 2 "vsib_address_operand" "")
+			   (match_operand:V4DI 3 "register_operand" "")
+			   (match_operand:SI 5 "const1248_operand " "")]))
 		      (mem:BLK (scratch))
-		      (match_operand:V4DI 3 "register_operand" "")
-		      (match_operand:VI4F_128 4 "register_operand" "")
-		      (match_operand:SI 5 "const1248_operand " "")]
+		      (match_operand:VI4F_128 4 "register_operand" "")]
 		     UNSPEC_GATHER))
 	      (clobber (match_scratch:VI4F_128 6 ""))])]
-  "TARGET_AVX2")
+  "TARGET_AVX2"
+{
+  operands[7]
+    = gen_rtx_UNSPEC (Pmode, gen_rtvec (3, operands[2], operands[3],
+					operands[5]), UNSPEC_VSIBADDR);
+})
 
 (define_insn "*avx2_gatherdi<mode>256"
   [(set (match_operand:VI4F_128 0 "register_operand" "=x")
 	(unspec:VI4F_128
 	  [(match_operand:VI4F_128 2 "register_operand" "0")
-	   (match_operand:P 3 "register_operand" "r")
+	   (match_operator:<ssescalarmode> 7 "vsib_mem_operator"
+	     [(unspec:P
+		[(match_operand:P 3 "vsib_address_operand" "p")
+		 (match_operand:V4DI 4 "register_operand" "x")
+		 (match_operand:SI 6 "const1248_operand" "n")]
+		UNSPEC_VSIBADDR)])
 	   (mem:BLK (scratch))
-	   (match_operand:V4DI 4 "register_operand" "x")
-	   (match_operand:VI4F_128 5 "register_operand" "1")
-	   (match_operand:SI 6 "const1248_operand" "n")]
+	   (match_operand:VI4F_128 5 "register_operand" "1")]
 	  UNSPEC_GATHER)) 
    (clobber (match_scratch:VI4F_128 1 "=&x"))]
   "TARGET_AVX2"
-  "v<sseintprefix>gatherq<ssemodesuffix>\t{%1, (%3, %4, %p6), %0|%0, (%3, %4, %p6), %1}"
+  "v<sseintprefix>gatherq<ssemodesuffix>\t{%1, %7, %0|%0, %7, %1}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "vex")
    (set_attr "mode" "<sseinsnmode>")])