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| author | cfang <cfang@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-06-28 23:35:52 +0000 |
|---|---|---|
| committer | cfang <cfang@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-06-28 23:35:52 +0000 |
| commit | ac2b0367dd3dd81594f76fdc93f87d4105798460 (patch) | |
| tree | 22b93a24de19b445ab72048bea1bf7aece549700 /gcc/config/i386/sse.md | |
| parent | 55fb66543e0edd00ce9117c13262052569863873 (diff) | |
| download | gcc-ac2b0367dd3dd81594f76fdc93f87d4105798460.tar.gz | |
Don't assert unaligned 256bit load/store.
* config/i386/sse.md (*avx_mov<mode>_internal): Don't assert
unaligned 256bit load/store.
(*avx_movu<ssemodesuffix><avxmodesuffix>): Likewise.
(*avx_movdqu<avxmodesuffix>): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_6-branch@175610 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/i386/sse.md')
| -rw-r--r-- | gcc/config/i386/sse.md | 26 |
1 files changed, 2 insertions, 24 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index b880cd82731..af56a55756c 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -203,12 +203,6 @@ return standard_sse_constant_opcode (insn, operands[1]); case 1: case 2: - if (GET_MODE_ALIGNMENT (<MODE>mode) == 256 - && ((TARGET_AVX256_SPLIT_UNALIGNED_STORE - && misaligned_operand (operands[0], <MODE>mode)) - || (TARGET_AVX256_SPLIT_UNALIGNED_LOAD - && misaligned_operand (operands[1], <MODE>mode)))) - gcc_unreachable (); switch (get_attr_mode (insn)) { case MODE_V8SF: @@ -416,15 +410,7 @@ UNSPEC_MOVU))] "AVX_VEC_FLOAT_MODE_P (<MODE>mode) && !(MEM_P (operands[0]) && MEM_P (operands[1]))" -{ - if (GET_MODE_ALIGNMENT (<MODE>mode) == 256 - && ((TARGET_AVX256_SPLIT_UNALIGNED_STORE - && misaligned_operand (operands[0], <MODE>mode)) - || (TARGET_AVX256_SPLIT_UNALIGNED_LOAD - && misaligned_operand (operands[1], <MODE>mode)))) - gcc_unreachable (); - return "vmovu<ssemodesuffix>\t{%1, %0|%0, %1}"; -} + "vmovu<ssemodesuffix>\t{%1, %0|%0, %1}" [(set_attr "type" "ssemov") (set_attr "movu" "1") (set_attr "prefix" "vex") @@ -483,15 +469,7 @@ [(match_operand:AVXMODEQI 1 "nonimmediate_operand" "xm,x")] UNSPEC_MOVU))] "TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))" -{ - if (GET_MODE_ALIGNMENT (<MODE>mode) == 256 - && ((TARGET_AVX256_SPLIT_UNALIGNED_STORE - && misaligned_operand (operands[0], <MODE>mode)) - || (TARGET_AVX256_SPLIT_UNALIGNED_LOAD - && misaligned_operand (operands[1], <MODE>mode)))) - gcc_unreachable (); - return "vmovdqu\t{%1, %0|%0, %1}"; -} + "vmovdqu\t{%1, %0|%0, %1}" [(set_attr "type" "ssemov") (set_attr "movu" "1") (set_attr "prefix" "vex") |