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author | H.J. Lu <hjl.tools@gmail.com> | 2012-06-26 11:54:24 -0700 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2012-06-26 11:54:24 -0700 |
commit | 24fe62c79a89d579257790e268b0b9ea87940a89 (patch) | |
tree | 026afc7ae12564c6a1af236b4e76286fe9c79ae9 /gcc/config/i386/sse.md | |
parent | 7258422b5896985803cc53aa219b5bfad7115475 (diff) | |
parent | ad29bc7a3bd276c44379f4808b75f8449e0ee150 (diff) | |
download | gcc-24fe62c79a89d579257790e268b0b9ea87940a89.tar.gz |
Merge remote-tracking branch 'origin/gcc-4_6-branch' into hjl/x32/gcc-4_6-branchhjl/x32/gcc-4_6-branch
Diffstat (limited to 'gcc/config/i386/sse.md')
-rw-r--r-- | gcc/config/i386/sse.md | 53 |
1 files changed, 5 insertions, 48 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 1c61dbb3ade..938c073df90 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -392,18 +392,7 @@ DONE; }) -(define_expand "avx_movu<ssemodesuffix><avxmodesuffix>" - [(set (match_operand:AVXMODEF2P 0 "nonimmediate_operand" "") - (unspec:AVXMODEF2P - [(match_operand:AVXMODEF2P 1 "nonimmediate_operand" "")] - UNSPEC_MOVU))] - "AVX_VEC_FLOAT_MODE_P (<MODE>mode)" -{ - if (MEM_P (operands[0]) && MEM_P (operands[1])) - operands[1] = force_reg (<MODE>mode, operands[1]); -}) - -(define_insn "*avx_movu<ssemodesuffix><avxmodesuffix>" +(define_insn "avx_movu<ssemodesuffix><avxmodesuffix>" [(set (match_operand:AVXMODEF2P 0 "nonimmediate_operand" "=x,m") (unspec:AVXMODEF2P [(match_operand:AVXMODEF2P 1 "nonimmediate_operand" "xm,x")] @@ -429,18 +418,7 @@ (set_attr "prefix" "maybe_vex") (set_attr "mode" "TI")]) -(define_expand "<sse>_movu<ssemodesuffix>" - [(set (match_operand:SSEMODEF2P 0 "nonimmediate_operand" "") - (unspec:SSEMODEF2P - [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "")] - UNSPEC_MOVU))] - "SSE_VEC_FLOAT_MODE_P (<MODE>mode)" -{ - if (MEM_P (operands[0]) && MEM_P (operands[1])) - operands[1] = force_reg (<MODE>mode, operands[1]); -}) - -(define_insn "*<sse>_movu<ssemodesuffix>" +(define_insn "<sse>_movu<ssemodesuffix>" [(set (match_operand:SSEMODEF2P 0 "nonimmediate_operand" "=x,m") (unspec:SSEMODEF2P [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "xm,x")] @@ -452,18 +430,7 @@ (set_attr "movu" "1") (set_attr "mode" "<MODE>")]) -(define_expand "avx_movdqu<avxmodesuffix>" - [(set (match_operand:AVXMODEQI 0 "nonimmediate_operand" "") - (unspec:AVXMODEQI - [(match_operand:AVXMODEQI 1 "nonimmediate_operand" "")] - UNSPEC_MOVU))] - "TARGET_AVX" -{ - if (MEM_P (operands[0]) && MEM_P (operands[1])) - operands[1] = force_reg (<MODE>mode, operands[1]); -}) - -(define_insn "*avx_movdqu<avxmodesuffix>" +(define_insn "avx_movdqu<avxmodesuffix>" [(set (match_operand:AVXMODEQI 0 "nonimmediate_operand" "=x,m") (unspec:AVXMODEQI [(match_operand:AVXMODEQI 1 "nonimmediate_operand" "xm,x")] @@ -475,17 +442,7 @@ (set_attr "prefix" "vex") (set_attr "mode" "<avxvecmode>")]) -(define_expand "sse2_movdqu" - [(set (match_operand:V16QI 0 "nonimmediate_operand" "") - (unspec:V16QI [(match_operand:V16QI 1 "nonimmediate_operand" "")] - UNSPEC_MOVU))] - "TARGET_SSE2" -{ - if (MEM_P (operands[0]) && MEM_P (operands[1])) - operands[1] = force_reg (V16QImode, operands[1]); -}) - -(define_insn "*sse2_movdqu" +(define_insn "sse2_movdqu" [(set (match_operand:V16QI 0 "nonimmediate_operand" "=x,m") (unspec:V16QI [(match_operand:V16QI 1 "nonimmediate_operand" "xm,x")] UNSPEC_MOVU))] @@ -12095,7 +12052,7 @@ (unspec:V8SF [(match_operand:V8HI 1 "register_operand" "x")] UNSPEC_VCVTPH2PS) (parallel [(const_int 0) (const_int 1) - (const_int 1) (const_int 2)])))] + (const_int 2) (const_int 3)])))] "TARGET_F16C" "vcvtph2ps\t{%1, %0|%0, %1}" [(set_attr "type" "ssecvt") |