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author | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-09-05 19:57:01 +0000 |
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committer | rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2017-09-05 19:57:01 +0000 |
commit | 517be012cd01f8215d79d1e1779e03f840a0ebf2 (patch) | |
tree | 1748d5d00e74e2cc0822a013b07953ae10671f16 /gcc/config/c6x | |
parent | e2cd4ccd1e0d88d4fa9ab9b55426228c03ea82ac (diff) | |
download | gcc-517be012cd01f8215d79d1e1779e03f840a0ebf2.tar.gz |
Make more use of int_mode_for_size
This patch converts more places that could use int_mode_for_size instead
of mode_for_size. This is in preparation for an upcoming patch that
makes mode_for_size itself return an opt_mode.
require () seems like the right choice in expand_builtin_powi
because we have got past the point of backing out. We go on to do:
op1 = expand_expr (arg1, NULL_RTX, mode2, EXPAND_NORMAL);
if (GET_MODE (op1) != mode2)
op1 = convert_to_mode (mode2, op1, 0);
which would be invalid for (and have failed for) BLKmode.
In get_builtin_sync_mode and expand_ifn_atomic_compare_exchange,
the possible bitsizes are {8, 16, 32, 64, 128}, all of which give
target-independent integer modes (up to TImode). The comment above
the call in get_builtin_sync_mode makes clear that an integer mode
must be found.
We can use require () in expand_builtin_atomic_clear and
expand_builtin_atomic_test_and_set because there's always an integer
mode for the boolean type. The same goes for the POINTER_SIZE request
in layout_type. Similarly we can use require () in combine_instructions
and gen_lowpart_common because there's always an integer mode for
HOST_BITS_PER_WIDE_INT (DImode when BITS_PER_UNIT == 8), and
HOST_BITS_PER_DOUBLE_INT (TImode).
The calls in aarch64_function_value, arm_function_value,
aapcs_allocate_return_reg and mips_function_value_1 are handling
cases in which a big-endian target passes or returns values at
the most significant end of a register. In each case the ABI
constrains the size to a small amount and does not handle
non-power-of-2 sizes wider than a word.
The calls in c6x_expand_movmem, i386.c:emit_memset,
lm32_block_move_inline, microblaze_block_move_straight and
mips_block_move_straight are dealing with expansions of
block memory operations using register-wise operations,
and those registers must have non-BLK mode.
The reason for using require () in ix86_expand_sse_cmp,
mips_expand_ins_as_unaligned_store, spu.c:adjust_operand and
spu_emit_branch_and_set is that we go on to emit non-call
instructions that use registers of that mode, which wouldn't
be valid for BLKmode.
2017-09-05 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* builtins.c (expand_builtin_powi): Use int_mode_for_size.
(get_builtin_sync_mode): Likewise.
(expand_ifn_atomic_compare_exchange): Likewise.
(expand_builtin_atomic_clear): Likewise.
(expand_builtin_atomic_test_and_set): Likewise.
(fold_builtin_atomic_always_lock_free): Likewise.
* calls.c (compute_argument_addresses): Likewise.
(emit_library_call_value_1): Likewise.
(store_one_arg): Likewise.
* combine.c (combine_instructions): Likewise.
* config/aarch64/aarch64.c (aarch64_function_value): Likewise.
* config/arm/arm.c (arm_function_value): Likewise.
(aapcs_allocate_return_reg): Likewise.
* config/c6x/c6x.c (c6x_expand_movmem): Likewise.
* config/i386/i386.c (construct_container): Likewise.
(ix86_gimplify_va_arg): Likewise.
(ix86_expand_sse_cmp): Likewise.
(emit_memmov): Likewise.
(emit_memset): Likewise.
(expand_small_movmem_or_setmem): Likewise.
(ix86_expand_pextr): Likewise.
(ix86_expand_pinsr): Likewise.
* config/lm32/lm32.c (lm32_block_move_inline): Likewise.
* config/microblaze/microblaze.c (microblaze_block_move_straight):
Likewise.
* config/mips/mips.c (mips_function_value_1) Likewise.
(mips_block_move_straight): Likewise.
(mips_expand_ins_as_unaligned_store): Likewise.
* config/powerpcspe/powerpcspe.c
(rs6000_darwin64_record_arg_advance_flush): Likewise.
(rs6000_darwin64_record_arg_flush): Likewise.
* config/rs6000/rs6000.c
(rs6000_darwin64_record_arg_advance_flush): Likewise.
(rs6000_darwin64_record_arg_flush): Likewise.
* config/sparc/sparc.c (sparc_function_arg_1): Likewise.
(sparc_function_value_1): Likewise.
* config/spu/spu.c (adjust_operand): Likewise.
(spu_emit_branch_or_set): Likewise.
(arith_immediate_p): Likewise.
* emit-rtl.c (gen_lowpart_common): Likewise.
* expr.c (expand_expr_real_1): Likewise.
* function.c (assign_parm_setup_block): Likewise.
* gimple-ssa-store-merging.c (encode_tree_to_bitpos): Likewise.
* reload1.c (alter_reg): Likewise.
* stor-layout.c (mode_for_vector): Likewise.
(layout_type): Likewise.
gcc/ada/
* gcc-interface/utils2.c (build_load_modify_store):
Use int_mode_for_size.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@251726 138bc75d-0d04-0410-961f-82ee72b054a4
Diffstat (limited to 'gcc/config/c6x')
-rw-r--r-- | gcc/config/c6x/c6x.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c index 3e26bed316e..c5b1679c547 100644 --- a/gcc/config/c6x/c6x.c +++ b/gcc/config/c6x/c6x.c @@ -1758,8 +1758,8 @@ c6x_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp, if (dst_size > src_size) dst_size = src_size; - srcmode = mode_for_size (src_size * BITS_PER_UNIT, MODE_INT, 0); - dstmode = mode_for_size (dst_size * BITS_PER_UNIT, MODE_INT, 0); + srcmode = int_mode_for_size (src_size * BITS_PER_UNIT, 0).require (); + dstmode = int_mode_for_size (dst_size * BITS_PER_UNIT, 0).require (); if (src_size >= 4) reg_lowpart = reg = gen_reg_rtx (srcmode); else |