diff options
author | Christophe Lyon <christophe.lyon@linaro.org> | 2016-03-10 15:09:57 +0100 |
---|---|---|
committer | Linaro Code Review <review@review.linaro.org> | 2016-03-15 12:53:49 +0000 |
commit | c944830cfc730587925617a2b2ef6d6d04e426dc (patch) | |
tree | 784f441dfe9355d21db0f96bfb7d3e55e1f8e752 | |
parent | df4df12b06bddcc2297e0393790b08771fe6c3da (diff) | |
download | gcc-c944830cfc730587925617a2b2ef6d6d04e426dc.tar.gz |
gcc/
Backport from trunk r234108.
2016-03-10 Christophe Lyon <christophe.lyon@linaro.org>
PR target/70113.
* config/aarch64/aarch64.h (TARGET_FIX_ERR_A53_843419_DEFAULT):
Always define to 0 or 1.
(TARGET_FIX_ERR_A53_843419): New macro.
* config/aarch64/aarch64-elf-raw.h
(TARGET_FIX_ERR_A53_843419_DEFAULT): Update for above changes.
* config/aarch64/aarch64-linux.h: Likewise.
* config/aarch64/aarch64.c
(aarch64_override_options_after_change_1): Do not default
aarch64_nopcrelative_literal_loads to true if Cortex-A53 erratum
843419 is on.
(aarch64_attributes): Handle fix-cortex-a53-843419.
(aarch64_can_inline_p): Likewise.
* config/aarch64/aarch64.opt (aarch64_fix_a53_err843419): Save.
Change-Id: I989fb10b3b7cc2653f2157932085b8ffa193370e
-rw-r--r-- | gcc/config/aarch64/aarch64-elf-raw.h | 2 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64-linux.h | 2 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64.c | 23 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64.h | 14 | ||||
-rw-r--r-- | gcc/config/aarch64/aarch64.opt | 2 |
5 files changed, 37 insertions, 6 deletions
diff --git a/gcc/config/aarch64/aarch64-elf-raw.h b/gcc/config/aarch64/aarch64-elf-raw.h index ecd35908aa2..02fbd28a749 100644 --- a/gcc/config/aarch64/aarch64-elf-raw.h +++ b/gcc/config/aarch64/aarch64-elf-raw.h @@ -35,7 +35,7 @@ " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}" #endif -#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT +#if TARGET_FIX_ERR_A53_843419_DEFAULT #define CA53_ERR_843419_SPEC \ " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}" #else diff --git a/gcc/config/aarch64/aarch64-linux.h b/gcc/config/aarch64/aarch64-linux.h index e41ca25cd7b..1fd6ca507bd 100644 --- a/gcc/config/aarch64/aarch64-linux.h +++ b/gcc/config/aarch64/aarch64-linux.h @@ -53,7 +53,7 @@ " %{mfix-cortex-a53-835769:--fix-cortex-a53-835769}" #endif -#ifdef TARGET_FIX_ERR_A53_843419_DEFAULT +#if TARGET_FIX_ERR_A53_843419_DEFAULT #define CA53_ERR_843419_SPEC \ " %{!mno-fix-cortex-a53-843419:--fix-cortex-a53-843419}" #else diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 81d713705cc..59c96507ecb 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -7669,9 +7669,18 @@ aarch64_override_options_after_change_1 (struct gcc_options *opts) if (opts->x_nopcrelative_literal_loads == 1) aarch64_nopcrelative_literal_loads = false; - /* If it is not set on the command line, we default to no - pc relative literal loads. */ - if (opts->x_nopcrelative_literal_loads == 2) + /* If it is not set on the command line, we default to no pc + relative literal loads, unless the workaround for Cortex-A53 + erratum 843419 is in effect. */ + /* This is PR70113. When building the Linux kernel with + CONFIG_ARM64_ERRATUM_843419, support for relocations + R_AARCH64_ADR_PREL_PG_HI21 and R_AARCH64_ADR_PREL_PG_HI21_NC is + removed from the kernel to avoid loading objects with possibly + offending sequences. With nopcrelative_literal_loads, we would + generate such relocations, preventing the kernel build from + succeeding. */ + if (opts->x_nopcrelative_literal_loads == 2 + && !TARGET_FIX_ERR_A53_843419) aarch64_nopcrelative_literal_loads = true; /* In the tiny memory model it makes no sense @@ -8325,6 +8334,8 @@ static const struct aarch64_attribute_info aarch64_attributes[] = OPT_mgeneral_regs_only }, { "fix-cortex-a53-835769", aarch64_attr_bool, true, NULL, OPT_mfix_cortex_a53_835769 }, + { "fix-cortex-a53-843419", aarch64_attr_bool, true, NULL, + OPT_mfix_cortex_a53_843419 }, { "cmodel", aarch64_attr_enum, false, NULL, OPT_mcmodel_ }, { "strict-align", aarch64_attr_mask, false, NULL, OPT_mstrict_align }, { "omit-leaf-frame-pointer", aarch64_attr_bool, true, NULL, @@ -8739,6 +8750,12 @@ aarch64_can_inline_p (tree caller, tree callee) 2, TARGET_FIX_ERR_A53_835769_DEFAULT)) return false; + if (!aarch64_tribools_ok_for_inlining_p ( + caller_opts->x_aarch64_fix_a53_err843419, + callee_opts->x_aarch64_fix_a53_err843419, + 2, TARGET_FIX_ERR_A53_843419)) + return false; + /* If the user explicitly specified -momit-leaf-frame-pointer for the caller and calle and they don't match up, reject inlining. */ if (!aarch64_tribools_ok_for_inlining_p ( diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 76bcca59eab..10506a79d8e 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -181,6 +181,20 @@ extern unsigned aarch64_architecture_version; ((aarch64_fix_a53_err835769 == 2) \ ? TARGET_FIX_ERR_A53_835769_DEFAULT : aarch64_fix_a53_err835769) +/* Make sure this is always defined so we don't have to check for ifdefs + but rather use normal ifs. */ +#ifndef TARGET_FIX_ERR_A53_843419_DEFAULT +#define TARGET_FIX_ERR_A53_843419_DEFAULT 0 +#else +#undef TARGET_FIX_ERR_A53_843419_DEFAULT +#define TARGET_FIX_ERR_A53_843419_DEFAULT 1 +#endif + +/* Apply the workaround for Cortex-A53 erratum 843419. */ +#define TARGET_FIX_ERR_A53_843419 \ + ((aarch64_fix_a53_err843419 == 2) \ + ? TARGET_FIX_ERR_A53_843419_DEFAULT : aarch64_fix_a53_err843419) + /* ARMv8.1 Adv.SIMD support. */ #define TARGET_SIMD_RDMA (TARGET_SIMD && AARCH64_ISA_RDMA) diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt index a1ce58d4ea8..53b1b968c4c 100644 --- a/gcc/config/aarch64/aarch64.opt +++ b/gcc/config/aarch64/aarch64.opt @@ -73,7 +73,7 @@ Target Report Var(aarch64_fix_a53_err835769) Init(2) Save Workaround for ARM Cortex-A53 Erratum number 835769 mfix-cortex-a53-843419 -Target Report +Target Report Var(aarch64_fix_a53_err843419) Init(2) Save Workaround for ARM Cortex-A53 Erratum number 843419 mlittle-endian |