/* Copyright 2022 The ChromiumOS Authors
 * Use of this source code is governed by a BSD-style license that can be
 * found in the LICENSE file.
 */

/ {
	gpio-interrupts {
		compatible = "cros-ec,gpio-interrupts";

		int_lid_open: lid_open {
			irq-pin = <&gpio_lid_open>;
			flags = <GPIO_INT_EDGE_BOTH>;
			handler = "lid_interrupt";
		};
		int_ac_present: ac_present {
			irq-pin = <&gpio_acok_od>;
			flags = <GPIO_INT_EDGE_BOTH>;
			handler = "extpower_interrupt";
		};
		int_power_button: power_button {
			irq-pin = <&gpio_ec_mech_pwr_btn_odl>;
			flags = <GPIO_INT_EDGE_BOTH>;
			handler = "power_button_interrupt";
		};
		int_slp_s3: slp_s3 {
			irq-pin = <&gpio_slp_s3_l>;
			flags = <GPIO_INT_EDGE_BOTH>;
			handler = "baseboard_en_pwr_s0";
		};
		int_slp_s5: slp_s5 {
			irq-pin = <&gpio_slp_s5_l>;
			flags = <GPIO_INT_EDGE_BOTH>;
			handler = "baseboard_set_en_pwr_s3";
		};
		int_s5_pgood: s5_pgood {
			irq-pin = <&gpio_pg_pwr_s5>;
			flags = <GPIO_INT_EDGE_BOTH>;
			handler = "baseboard_s5_pgood";
		};
		int_pg_groupc_s0: pg_groupc_s0 {
			irq-pin = <&gpio_pg_groupc_s0_od>;
			flags = <GPIO_INT_EDGE_BOTH>;
			handler = "baseboard_set_en_pwr_pcore";
		};
		int_pg_lpddr_s3: pg_lpddr_s3 {
			irq-pin = <&gpio_pg_lpddr5_s3_od>;
			flags = <GPIO_INT_EDGE_BOTH>;
			handler = "baseboard_set_en_pwr_pcore";
		};
		int_s0_pgood: s0_pgood {
			irq-pin = <&gpio_pg_groupc_s0_od>;
			flags = <GPIO_INT_EDGE_BOTH>;
			handler = "baseboard_s0_pgood";
		};
		int_soc_thermtrip: soc_thermtrip {
			irq-pin = <&gpio_soc_thermtrip_r_odl>;
			flags = <GPIO_INT_EDGE_FALLING>;
			handler = "baseboard_soc_thermtrip";
		};
		int_volume_up: volume_up {
			irq-pin = <&gpio_volup_btn_odl>;
			flags = <GPIO_INT_EDGE_BOTH>;
			handler = "button_interrupt";
		};
		int_volume_down: volume_down {
			irq-pin = <&gpio_voldn_btn_odl>;
			flags = <GPIO_INT_EDGE_BOTH>;
			handler = "button_interrupt";
		};
		int_usb_c0_c1_sbu_fault: c0_c1_sbu_fault {
			irq-pin = <&gpio_usb_c0_c1_fault_odl>;
			flags = <GPIO_INT_EDGE_FALLING>;
			handler = "sbu_fault_interrupt";
		};
		int_usb_c0_ppc: usb_c0_ppc {
			irq-pin = <&gpio_usb_c0_ppc_int_odl>;
			flags = <GPIO_INT_EDGE_FALLING>;
			handler = "ppc_interrupt";
		};
		int_usb_c1_ppc: usb_c1_ppc {
			irq-pin = <&gpio_usb_c1_ppc_int_odl>;
			flags = <GPIO_INT_EDGE_FALLING>;
			handler = "ppc_interrupt";
		};
		int_usb_pd_soc: usb_pd_soc {
			irq-pin = <&gpio_ec_c0_retimer_int_odl>;
			flags = <GPIO_INT_EDGE_FALLING>;
			handler = "usb_pd_soc_interrupt";
		};
		int_lid_accel: lid_accel {
			irq-pin = <&gpio_3axis_int_l>;
			flags = <GPIO_INT_EDGE_FALLING>;
			handler = "bma4xx_interrupt";
		};
		int_accel_gyro: accel_gyro {
			irq-pin = <&gpio_6axis_int_l>;
			flags = <GPIO_INT_EDGE_FALLING>;
			handler = "bmi3xx_interrupt";
		};
		int_prochot: prochot {
			irq-pin = <&gpio_ec_prochot_odl>;
			flags = <GPIO_INT_EDGE_BOTH>;
			handler = "throttle_ap_prochot_input_interrupt";
		};
	};
};