/* * Copyright 2015 The Chromium OS Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ /* This file is autogenerated by the g_regs utility. Do not edit. */ #ifndef __EC_CHIP_G_CR50_FPGA_REGDEFS_H #define __EC_CHIP_G_CR50_FPGA_REGDEFS_H #define GC___REVA__ 1 #define GC___REVB__ 2 #define GC___REVC__ 3 #define GC___REVD__ 4 #define GC___REVE__ 5 #define GC___HAVEN__ 1 #define GC___MAJOR_REV__ __REVB__ #define GC___MINOR_REV__ 1 #define GC_PINMUX_DIOA0_SEL 0x19 #define GC_PINMUX_DIOA1_SEL 0x18 #define GC_PINMUX_DIOA2_SEL 0x17 #define GC_PINMUX_DIOA3_SEL 0x16 #define GC_PINMUX_DIOA4_SEL 0x15 #define GC_PINMUX_DIOA5_SEL 0x14 #define GC_PINMUX_DIOA6_SEL 0x13 #define GC_PINMUX_DIOA7_SEL 0x12 #define GC_PINMUX_DIOA8_SEL 0x11 #define GC_PINMUX_DIOA9_SEL 0x10 #define GC_PINMUX_DIOA10_SEL 0xf #define GC_PINMUX_DIOA11_SEL 0xe #define GC_PINMUX_DIOA12_SEL 0xd #define GC_PINMUX_DIOA13_SEL 0xc #define GC_PINMUX_DIOA14_SEL 0xb #define GC_PINMUX_DIOB0_SEL 0xa #define GC_PINMUX_DIOB1_SEL 0x9 #define GC_PINMUX_DIOB2_SEL 0x8 #define GC_PINMUX_DIOB3_SEL 0x7 #define GC_PINMUX_DIOB4_SEL 0x6 #define GC_PINMUX_DIOB5_SEL 0x5 #define GC_PINMUX_DIOB6_SEL 0x4 #define GC_PINMUX_DIOB7_SEL 0x3 #define GC_PINMUX_DIOM0_SEL 0x1e #define GC_PINMUX_DIOM1_SEL 0x1d #define GC_PINMUX_DIOM2_SEL 0x1c #define GC_PINMUX_DIOM3_SEL 0x1b #define GC_PINMUX_DIOM4_SEL 0x1a #define GC_PINMUX_GPIO0_GPIO0_SEL 0x1 #define GC_PINMUX_GPIO0_GPIO1_SEL 0x2 #define GC_PINMUX_GPIO0_GPIO2_SEL 0x3 #define GC_PINMUX_GPIO0_GPIO3_SEL 0x4 #define GC_PINMUX_GPIO0_GPIO4_SEL 0x5 #define GC_PINMUX_GPIO0_GPIO5_SEL 0x6 #define GC_PINMUX_GPIO0_GPIO6_SEL 0x7 #define GC_PINMUX_GPIO0_GPIO7_SEL 0x8 #define GC_PINMUX_GPIO0_GPIO8_SEL 0x9 #define GC_PINMUX_GPIO0_GPIO9_SEL 0xa #define GC_PINMUX_GPIO0_GPIO10_SEL 0xb #define GC_PINMUX_GPIO0_GPIO11_SEL 0xc #define GC_PINMUX_GPIO0_GPIO12_SEL 0xd #define GC_PINMUX_GPIO0_GPIO13_SEL 0xe #define GC_PINMUX_GPIO0_GPIO14_SEL 0xf #define GC_PINMUX_GPIO0_GPIO15_SEL 0x10 #define GC_PINMUX_GPIO1_GPIO0_SEL 0x11 #define GC_PINMUX_GPIO1_GPIO1_SEL 0x12 #define GC_PINMUX_GPIO1_GPIO2_SEL 0x13 #define GC_PINMUX_GPIO1_GPIO3_SEL 0x14 #define GC_PINMUX_GPIO1_GPIO4_SEL 0x15 #define GC_PINMUX_GPIO1_GPIO5_SEL 0x16 #define GC_PINMUX_GPIO1_GPIO6_SEL 0x17 #define GC_PINMUX_GPIO1_GPIO7_SEL 0x18 #define GC_PINMUX_GPIO1_GPIO8_SEL 0x19 #define GC_PINMUX_GPIO1_GPIO9_SEL 0x1a #define GC_PINMUX_GPIO1_GPIO10_SEL 0x1b #define GC_PINMUX_GPIO1_GPIO11_SEL 0x1c #define GC_PINMUX_GPIO1_GPIO12_SEL 0x1d #define GC_PINMUX_GPIO1_GPIO13_SEL 0x1e #define GC_PINMUX_GPIO1_GPIO14_SEL 0x1f #define GC_PINMUX_GPIO1_GPIO15_SEL 0x20 #define GC_PINMUX_I2C0_SCL_SEL 0x21 #define GC_PINMUX_I2C0_SDA_SEL 0x22 #define GC_PINMUX_I2C1_SCL_SEL 0x23 #define GC_PINMUX_I2C1_SDA_SEL 0x24 #define GC_PINMUX_I2CS0_SCL_SEL 0x25 #define GC_PINMUX_I2CS0_SDA_SEL 0x26 #define GC_PINMUX_PMU_BROWNOUT_DET_SEL 0x27 #define GC_PINMUX_PMU_TESTBUS0_SEL 0x28 #define GC_PINMUX_PMU_TESTBUS1_SEL 0x29 #define GC_PINMUX_PMU_TESTBUS2_SEL 0x2a #define GC_PINMUX_PMU_TESTBUS3_SEL 0x2b #define GC_PINMUX_PMU_TESTBUS4_SEL 0x2c #define GC_PINMUX_PMU_TESTBUS5_SEL 0x2d #define GC_PINMUX_PMU_TESTBUS6_SEL 0x2e #define GC_PINMUX_PMU_TESTBUS7_SEL 0x2f #define GC_PINMUX_RTC0_RTC_CLK_TEST_SEL 0x30 #define GC_PINMUX_SPI1_SPICLK_SEL 0x31 #define GC_PINMUX_SPI1_SPICSB_SEL 0x32 #define GC_PINMUX_SPI1_SPIMISO_SEL 0x33 #define GC_PINMUX_SPI1_SPIMOSI_SEL 0x34 #define GC_PINMUX_SPS0_TESTBUS0_SEL 0x35 #define GC_PINMUX_SPS0_TESTBUS1_SEL 0x36 #define GC_PINMUX_SPS0_TESTBUS2_SEL 0x37 #define GC_PINMUX_SPS0_TESTBUS3_SEL 0x38 #define GC_PINMUX_SPS0_TESTBUS4_SEL 0x39 #define GC_PINMUX_SPS0_TESTBUS5_SEL 0x3a #define GC_PINMUX_SPS0_TESTBUS6_SEL 0x3b #define GC_PINMUX_SPS0_TESTBUS7_SEL 0x3c #define GC_PINMUX_TEMP0_TST_ADC_CLK_SEL 0x3d #define GC_PINMUX_TEMP0_TST_ADC_HI_SER_SEL 0x3e #define GC_PINMUX_TEMP0_TST_ADC_LO_SER_SEL 0x3f #define GC_PINMUX_TEMP0_TST_ADC_VLD_SER_SEL 0x40 #define GC_PINMUX_TRNG0_TRNG_RO_DIV_SEL 0x41 #define GC_PINMUX_TRNG0_TRNG_RO_REF_DIV_SEL 0x42 #define GC_PINMUX_UART0_CTS_SEL 0x43 #define GC_PINMUX_UART0_RTS_SEL 0x44 #define GC_PINMUX_UART0_RX_SEL 0x45 #define GC_PINMUX_UART0_TX_SEL 0x46 #define GC_PINMUX_UART1_CTS_SEL 0x47 #define GC_PINMUX_UART1_RTS_SEL 0x48 #define GC_PINMUX_UART1_RX_SEL 0x49 #define GC_PINMUX_UART1_TX_SEL 0x4a #define GC_PINMUX_UART2_CTS_SEL 0x4b #define GC_PINMUX_UART2_RTS_SEL 0x4c #define GC_PINMUX_UART2_RX_SEL 0x4d #define GC_PINMUX_UART2_TX_SEL 0x4e #define GC_PINMUX_USB0_EXT_DM_PULLUP_EN_SEL 0x4f #define GC_PINMUX_USB0_EXT_DP_RPU1_ENB_SEL 0x50 #define GC_PINMUX_USB0_EXT_DP_RPU2_ENB_SEL 0x51 #define GC_PINMUX_USB0_EXT_FS_EDGE_SEL_SEL 0x52 #define GC_PINMUX_USB0_EXT_RX_DMI_SEL 0x53 #define GC_PINMUX_USB0_EXT_RX_DPI_SEL 0x54 #define GC_PINMUX_USB0_EXT_RX_RCV_SEL 0x55 #define GC_PINMUX_USB0_EXT_SUSPENDB_SEL 0x56 #define GC_PINMUX_USB0_EXT_TX_DMO_SEL 0x57 #define GC_PINMUX_USB0_EXT_TX_DPO_SEL 0x58 #define GC_PINMUX_USB0_EXT_TX_OEB_SEL 0x59 #define GC_PINMUX_VIO0_SEL 0x2 #define GC_PINMUX_VIO1_SEL 0x1 #define GC_PINMUX_VOLT0_TST_NEG_GLITCH_DET_SEL 0x5a #define GC_PINMUX_VOLT0_TST_POS_GLITCH_DET_SEL 0x5b #define GC_PINMUX_XO0_TESTBUS0_SEL 0x5c #define GC_PINMUX_XO0_TESTBUS1_SEL 0x5d #define GC_PINMUX_XO0_TESTBUS2_SEL 0x5e #define GC_PINMUX_XO0_TESTBUS3_SEL 0x5f #define GC_PINMUX_XO0_TESTBUS4_SEL 0x60 #define GC_PINMUX_XO0_TESTBUS5_SEL 0x61 #define GC_PINMUX_XO0_TESTBUS6_SEL 0x62 #define GC_PINMUX_XO0_TESTBUS7_SEL 0x63 #define GC_PINMUX_SEL_COUNT 129 #define GC_EXCEPTNUM_RESET 0x1 #define GC_EXCEPTNUM_NMI 0x2 #define GC_EXCEPTNUM_HARDFAULT 0x3 #define GC_EXCEPTNUM_MEMORYMANAGEMENT 0x4 #define GC_EXCEPTNUM_BUSFAULT 0x5 #define GC_EXCEPTNUM_USAGEFAULT 0x6 #define GC_EXCEPTNUM_RESERVED7 0x7 #define GC_EXCEPTNUM_RESERVED8 0x8 #define GC_EXCEPTNUM_RESERVED9 0x9 #define GC_EXCEPTNUM_RESERVED10 0xa #define GC_EXCEPTNUM_SVCALL 0xb #define GC_EXCEPTNUM_DEBUGMONITOR 0xc #define GC_EXCEPTNUM_RESERVED13 0xd #define GC_EXCEPTNUM_PENDSV 0xe #define GC_EXCEPTNUM_SYSTICK 0xf #define GC_EXCEPTNUM_CRYPTO0_BREAK_INT 0x10 #define GC_EXCEPTNUM_CRYPTO0_DMEM_PTRS_OVERFLOW_INT 0x11 #define GC_EXCEPTNUM_CRYPTO0_DONE_WIPE_SECRETS_INT 0x12 #define GC_EXCEPTNUM_CRYPTO0_DRF_PTRS_OVERFLOW_INT 0x13 #define GC_EXCEPTNUM_CRYPTO0_HOST_CMD_DONE_INT 0x14 #define GC_EXCEPTNUM_CRYPTO0_HOST_CMD_RECV_INT 0x15 #define GC_EXCEPTNUM_CRYPTO0_LOOP_STACK_OVERFLOW_INT 0x16 #define GC_EXCEPTNUM_CRYPTO0_LOOP_STACK_UNDERFLOW_INT 0x17 #define GC_EXCEPTNUM_CRYPTO0_MOD_OPERAND_OUT_OF_RANGE_INT 0x18 #define GC_EXCEPTNUM_CRYPTO0_PC_STACK_OVERFLOW_INT 0x19 #define GC_EXCEPTNUM_CRYPTO0_PGM_FAULT_INT 0x1a #define GC_EXCEPTNUM_CRYPTO0_TRAP_INT 0x1b #define GC_EXCEPTNUM_DMA0_INTR_COMPLETE_CHAN_INT 0x1c #define GC_EXCEPTNUM_DMA0_INTR_ERROR_CHAN_INT 0x1d #define GC_EXCEPTNUM_DMA0_INTR_PROG_CHAN_INT 0x1e #define GC_EXCEPTNUM_DMA0_INTR_TIMEOUT_CHAN_INT 0x1f #define GC_EXCEPTNUM_FLASH0_EDONEINT 0x20 #define GC_EXCEPTNUM_FLASH0_PDONEINT 0x21 #define GC_EXCEPTNUM_GLOBALSEC_CAMO0_BREACH_ALERT_INT 0x22 #define GC_EXCEPTNUM_GLOBALSEC_CRYPTO0_DMEM_PARITY_ALERT_INT 0x23 #define GC_EXCEPTNUM_GLOBALSEC_CRYPTO0_DRF_PARITY_ALERT_INT 0x24 #define GC_EXCEPTNUM_GLOBALSEC_CRYPTO0_IMEM_PARITY_ALERT_INT 0x25 #define GC_EXCEPTNUM_GLOBALSEC_CRYPTO0_PGM_FAULT_ALERT_INT 0x26 #define GC_EXCEPTNUM_GLOBALSEC_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_INT 0x27 #define GC_EXCEPTNUM_GLOBALSEC_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_INT 0x28 #define GC_EXCEPTNUM_GLOBALSEC_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_INT 0x29 #define GC_EXCEPTNUM_GLOBALSEC_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_INT 0x2a #define GC_EXCEPTNUM_GLOBALSEC_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_INT 0x2b #define GC_EXCEPTNUM_GLOBALSEC_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_INT 0x2c #define GC_EXCEPTNUM_GLOBALSEC_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_INT 0x2d #define GC_EXCEPTNUM_GLOBALSEC_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_INT 0x2e #define GC_EXCEPTNUM_GLOBALSEC_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_INT 0x2f #define GC_EXCEPTNUM_GLOBALSEC_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_INT 0x30 #define GC_EXCEPTNUM_GLOBALSEC_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_INT 0x31 #define GC_EXCEPTNUM_GLOBALSEC_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_INT 0x32 #define GC_EXCEPTNUM_GLOBALSEC_FUSE0_FUSE_DEFAULTS_ALERT_INT 0x33 #define GC_EXCEPTNUM_GLOBALSEC_GLOBALSEC_ALERT_GROUPA_INT 0x34 #define GC_EXCEPTNUM_GLOBALSEC_GLOBALSEC_ALERT_GROUPB_INT 0x35 #define GC_EXCEPTNUM_GLOBALSEC_GLOBALSEC_ALERT_GROUPC_INT 0x36 #define GC_EXCEPTNUM_GLOBALSEC_GLOBALSEC_DIFF_FAIL_ALERT_INT 0x37 #define GC_EXCEPTNUM_GLOBALSEC_GLOBALSEC_FW0_ALERT_INT 0x38 #define GC_EXCEPTNUM_GLOBALSEC_GLOBALSEC_FW1_ALERT_INT 0x39 #define GC_EXCEPTNUM_GLOBALSEC_GLOBALSEC_FW2_ALERT_INT 0x3a #define GC_EXCEPTNUM_GLOBALSEC_GLOBALSEC_FW3_ALERT_INT 0x3b #define GC_EXCEPTNUM_GLOBALSEC_GLOBALSEC_HEARTBEAT_FAIL_ALERT_INT 0x3c #define GC_EXCEPTNUM_GLOBALSEC_GLOBALSEC_PROC_OPCODE_HASH_ALERT_INT 0x3d #define GC_EXCEPTNUM_GLOBALSEC_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_INT 0x3e #define GC_EXCEPTNUM_GLOBALSEC_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_INT 0x3f #define GC_EXCEPTNUM_GLOBALSEC_KEYMGR0_AES_HKEY_ALERT_INT 0x40 #define GC_EXCEPTNUM_GLOBALSEC_KEYMGR0_CERT_LOOKUP_ALERT_INT 0x41 #define GC_EXCEPTNUM_GLOBALSEC_KEYMGR0_FLASH_ENTRY_ALERT_INT 0x42 #define GC_EXCEPTNUM_GLOBALSEC_KEYMGR0_PW_ALERT_INT 0x43 #define GC_EXCEPTNUM_GLOBALSEC_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_INT 0x44 #define GC_EXCEPTNUM_GLOBALSEC_KEYMGR0_SHA_FAULT_ALERT_INT 0x45 #define GC_EXCEPTNUM_GLOBALSEC_KEYMGR0_SHA_HKEY_ALERT_INT 0x46 #define GC_EXCEPTNUM_GLOBALSEC_PMU_BATTERY_MON_ALERT_INT 0x47 #define GC_EXCEPTNUM_GLOBALSEC_PMU_PMU_WDOG_ALERT_INT 0x48 #define GC_EXCEPTNUM_GLOBALSEC_RTC0_RTC_DEAD_ALERT_INT 0x49 #define GC_EXCEPTNUM_GLOBALSEC_TEMP0_MAX_TEMP_ALERT_INT 0x4a #define GC_EXCEPTNUM_GLOBALSEC_TEMP0_MAX_TEMP_DIFF_ALERT_INT 0x4b #define GC_EXCEPTNUM_GLOBALSEC_TEMP0_MIN_TEMP_ALERT_INT 0x4c #define GC_EXCEPTNUM_GLOBALSEC_TRNG0_OUT_OF_SPEC_ALERT_INT 0x4d #define GC_EXCEPTNUM_GLOBALSEC_TRNG0_TIMEOUT_ALERT_INT 0x4e #define GC_EXCEPTNUM_GLOBALSEC_VOLT0_VOLT_ERR_ALERT_INT 0x4f #define GC_EXCEPTNUM_GLOBALSEC_XO0_JITTERY_TRIM_DIS_ALERT_INT 0x50 #define GC_EXCEPTNUM_GPIO0_GPIO0INT 0x51 #define GC_EXCEPTNUM_GPIO0_GPIO1INT 0x52 #define GC_EXCEPTNUM_GPIO0_GPIO2INT 0x53 #define GC_EXCEPTNUM_GPIO0_GPIO3INT 0x54 #define GC_EXCEPTNUM_GPIO0_GPIO4INT 0x55 #define GC_EXCEPTNUM_GPIO0_GPIO5INT 0x56 #define GC_EXCEPTNUM_GPIO0_GPIO6INT 0x57 #define GC_EXCEPTNUM_GPIO0_GPIO7INT 0x58 #define GC_EXCEPTNUM_GPIO0_GPIO8INT 0x59 #define GC_EXCEPTNUM_GPIO0_GPIO9INT 0x5a #define GC_EXCEPTNUM_GPIO0_GPIO10INT 0x5b #define GC_EXCEPTNUM_GPIO0_GPIO11INT 0x5c #define GC_EXCEPTNUM_GPIO0_GPIO12INT 0x5d #define GC_EXCEPTNUM_GPIO0_GPIO13INT 0x5e #define GC_EXCEPTNUM_GPIO0_GPIO14INT 0x5f #define GC_EXCEPTNUM_GPIO0_GPIO15INT 0x60 #define GC_EXCEPTNUM_GPIO0_GPIOCOMBINT 0x61 #define GC_EXCEPTNUM_GPIO1_GPIO0INT 0x62 #define GC_EXCEPTNUM_GPIO1_GPIO1INT 0x63 #define GC_EXCEPTNUM_GPIO1_GPIO2INT 0x64 #define GC_EXCEPTNUM_GPIO1_GPIO3INT 0x65 #define GC_EXCEPTNUM_GPIO1_GPIO4INT 0x66 #define GC_EXCEPTNUM_GPIO1_GPIO5INT 0x67 #define GC_EXCEPTNUM_GPIO1_GPIO6INT 0x68 #define GC_EXCEPTNUM_GPIO1_GPIO7INT 0x69 #define GC_EXCEPTNUM_GPIO1_GPIO8INT 0x6a #define GC_EXCEPTNUM_GPIO1_GPIO9INT 0x6b #define GC_EXCEPTNUM_GPIO1_GPIO10INT 0x6c #define GC_EXCEPTNUM_GPIO1_GPIO11INT 0x6d #define GC_EXCEPTNUM_GPIO1_GPIO12INT 0x6e #define GC_EXCEPTNUM_GPIO1_GPIO13INT 0x6f #define GC_EXCEPTNUM_GPIO1_GPIO14INT 0x70 #define GC_EXCEPTNUM_GPIO1_GPIO15INT 0x71 #define GC_EXCEPTNUM_GPIO1_GPIOCOMBINT 0x72 #define GC_EXCEPTNUM_I2C0_I2CINT 0x73 #define GC_EXCEPTNUM_I2C1_I2CINT 0x74 #define GC_EXCEPTNUM_I2CS0_INTR_READ_BEGIN_INT 0x75 #define GC_EXCEPTNUM_I2CS0_INTR_READ_COMPLETE_INT 0x76 #define GC_EXCEPTNUM_I2CS0_INTR_WRITE_COMPLETE_INT 0x77 #define GC_EXCEPTNUM_KEYMGR0_AES_DONE_CIPHER_INT 0x78 #define GC_EXCEPTNUM_KEYMGR0_AES_DONE_KEYEXPANSION_INT 0x79 #define GC_EXCEPTNUM_KEYMGR0_AES_DONE_WIPE_SECRETS_INT 0x7a #define GC_EXCEPTNUM_KEYMGR0_AES_RFIFO_OVERFLOW_INT 0x7b #define GC_EXCEPTNUM_KEYMGR0_AES_RFIFO_UNDERFLOW_INT 0x7c #define GC_EXCEPTNUM_KEYMGR0_AES_WFIFO_OVERFLOW_INT 0x7d #define GC_EXCEPTNUM_KEYMGR0_DSHA_INT 0x7e #define GC_EXCEPTNUM_KEYMGR0_SHA_WFIFO_FULL_INT 0x7f #define GC_EXCEPTNUM_PMU_INTR_WAKEUP_INT 0x80 #define GC_EXCEPTNUM_RBOX0_INTR_AC_PRESENT_FED_INT 0x81 #define GC_EXCEPTNUM_RBOX0_INTR_AC_PRESENT_RED_INT 0x82 #define GC_EXCEPTNUM_RBOX0_INTR_BUTTON_COMBO0_RDY_INT 0x83 #define GC_EXCEPTNUM_RBOX0_INTR_BUTTON_COMBO1_RDY_INT 0x84 #define GC_EXCEPTNUM_RBOX0_INTR_BUTTON_COMBO2_RDY_INT 0x85 #define GC_EXCEPTNUM_RBOX0_INTR_EC_RST_FED_INT 0x86 #define GC_EXCEPTNUM_RBOX0_INTR_EC_RST_RED_INT 0x87 #define GC_EXCEPTNUM_RBOX0_INTR_KEY0_IN_FED_INT 0x88 #define GC_EXCEPTNUM_RBOX0_INTR_KEY0_IN_RED_INT 0x89 #define GC_EXCEPTNUM_RBOX0_INTR_KEY1_IN_FED_INT 0x8a #define GC_EXCEPTNUM_RBOX0_INTR_KEY1_IN_RED_INT 0x8b #define GC_EXCEPTNUM_RBOX0_INTR_PWRB_IN_FED_INT 0x8c #define GC_EXCEPTNUM_RBOX0_INTR_PWRB_IN_RED_INT 0x8d #define GC_EXCEPTNUM_RDD0_INTR_DEBUG_STATE_DETECTED_INT 0x8e #define GC_EXCEPTNUM_SPI0_SPITXINT 0x8f #define GC_EXCEPTNUM_SPI1_SPITXINT 0x90 #define GC_EXCEPTNUM_SPS0_CS_ASSERT_INTR 0x91 #define GC_EXCEPTNUM_SPS0_CS_DEASSERT_INTR 0x92 #define GC_EXCEPTNUM_SPS0_INTR_CMD_ADDR_FIFO_NOT_EMPTY_INT 0x93 #define GC_EXCEPTNUM_SPS0_INTR_CMD_ADDR_FIFO_OVFL_INT 0x94 #define GC_EXCEPTNUM_SPS0_INTR_CMD_MEM_OVFL_INT 0x95 #define GC_EXCEPTNUM_SPS0_INTR_RAM_PAGE0_LVL_INT 0x96 #define GC_EXCEPTNUM_SPS0_INTR_RAM_PAGE1_LVL_INT 0x97 #define GC_EXCEPTNUM_SPS0_INTR_RAM_PAGE2_LVL_INT 0x98 #define GC_EXCEPTNUM_SPS0_INTR_RAM_PAGE3_LVL_INT 0x99 #define GC_EXCEPTNUM_SPS0_RXFIFO_LVL_INTR 0x9a #define GC_EXCEPTNUM_SPS0_RXFIFO_OVERFLOW_INTR 0x9b #define GC_EXCEPTNUM_SPS0_SPSCTRLINT0 0x9c #define GC_EXCEPTNUM_SPS0_SPSCTRLINT1 0x9d #define GC_EXCEPTNUM_SPS0_SPSCTRLINT2 0x9e #define GC_EXCEPTNUM_SPS0_SPSCTRLINT3 0x9f #define GC_EXCEPTNUM_SPS0_SPSCTRLINT4 0xa0 #define GC_EXCEPTNUM_SPS0_SPSCTRLINT5 0xa1 #define GC_EXCEPTNUM_SPS0_SPSCTRLINT6 0xa2 #define GC_EXCEPTNUM_SPS0_SPSCTRLINT7 0xa3 #define GC_EXCEPTNUM_SPS0_TXFIFO_EMPTY_INTR 0xa4 #define GC_EXCEPTNUM_SPS0_TXFIFO_FULL_INTR 0xa5 #define GC_EXCEPTNUM_SPS0_TXFIFO_LVL_INTR 0xa6 #define GC_EXCEPTNUM_TEMP0_ADC_ICLKDV_INT 0xa7 #define GC_EXCEPTNUM_TEMP0_COMP_OVERFLOW_INT 0xa8 #define GC_EXCEPTNUM_TIMEHS0_TIMINT1 0xa9 #define GC_EXCEPTNUM_TIMEHS0_TIMINT2 0xaa #define GC_EXCEPTNUM_TIMEHS0_TIMINTC 0xab #define GC_EXCEPTNUM_TIMEHS1_TIMINT1 0xac #define GC_EXCEPTNUM_TIMEHS1_TIMINT2 0xad #define GC_EXCEPTNUM_TIMEHS1_TIMINTC 0xae #define GC_EXCEPTNUM_TIMELS0_TIMINT0 0xaf #define GC_EXCEPTNUM_TIMELS0_TIMINT1 0xb0 #define GC_EXCEPTNUM_TIMEUS0_INTR_MAX_COUNT_HIT0_INT 0xb1 #define GC_EXCEPTNUM_TIMEUS0_INTR_MAX_COUNT_HIT1_INT 0xb2 #define GC_EXCEPTNUM_TIMEUS0_INTR_MAX_COUNT_HIT2_INT 0xb3 #define GC_EXCEPTNUM_TIMEUS0_INTR_MAX_COUNT_HIT3_INT 0xb4 #define GC_EXCEPTNUM_TIMEUS0_INTR_PROG_COUNT_HIT0_INT 0xb5 #define GC_EXCEPTNUM_TIMEUS0_INTR_PROG_COUNT_HIT1_INT 0xb6 #define GC_EXCEPTNUM_TIMEUS0_INTR_PROG_COUNT_HIT2_INT 0xb7 #define GC_EXCEPTNUM_TIMEUS0_INTR_PROG_COUNT_HIT3_INT 0xb8 #define GC_EXCEPTNUM_TRNG0_INTR_BUFFER_FULL_INT 0xb9 #define GC_EXCEPTNUM_TRNG0_INTR_ONE_SHOT_DONE_INT 0xba #define GC_EXCEPTNUM_TRNG0_INTR_READ_EMPTY_INT 0xbb #define GC_EXCEPTNUM_UART0_RXBINT 0xbc #define GC_EXCEPTNUM_UART0_RXFINT 0xbd #define GC_EXCEPTNUM_UART0_RXINT 0xbe #define GC_EXCEPTNUM_UART0_RXOVINT 0xbf #define GC_EXCEPTNUM_UART0_RXTOINT 0xc0 #define GC_EXCEPTNUM_UART0_TXINT 0xc1 #define GC_EXCEPTNUM_UART0_TXOVINT 0xc2 #define GC_EXCEPTNUM_UART1_RXBINT 0xc3 #define GC_EXCEPTNUM_UART1_RXFINT 0xc4 #define GC_EXCEPTNUM_UART1_RXINT 0xc5 #define GC_EXCEPTNUM_UART1_RXOVINT 0xc6 #define GC_EXCEPTNUM_UART1_RXTOINT 0xc7 #define GC_EXCEPTNUM_UART1_TXINT 0xc8 #define GC_EXCEPTNUM_UART1_TXOVINT 0xc9 #define GC_EXCEPTNUM_UART2_RXBINT 0xca #define GC_EXCEPTNUM_UART2_RXFINT 0xcb #define GC_EXCEPTNUM_UART2_RXINT 0xcc #define GC_EXCEPTNUM_UART2_RXOVINT 0xcd #define GC_EXCEPTNUM_UART2_RXTOINT 0xce #define GC_EXCEPTNUM_UART2_TXINT 0xcf #define GC_EXCEPTNUM_UART2_TXOVINT 0xd0 #define GC_EXCEPTNUM_USB0_USBINTR 0xd1 #define GC_EXCEPTNUM_WATCHDOG0_WDOGINT 0xd2 #define GC_EXCEPTNUM_XO0_CLK_JTR_NOP_SEEN_INT 0xd3 #define GC_EXCEPTNUM_XO0_CLK_JTR_SW_TRIM_DONE_INT 0xd4 #define GC_EXCEPTNUM_XO0_CLK_TIMER_NOP_SEEN_INT 0xd5 #define GC_EXCEPTNUM_XO0_CLK_TIMER_SW_TRIM_DONE_INT 0xd6 #define GC_EXCEPTNUM_XO0_FAST_CALIB_OVERFLOW_INT 0xd7 #define GC_EXCEPTNUM_XO0_FAST_CALIB_UNDERRUN_INT 0xd8 #define GC_EXCEPTNUM_XO0_SLOW_CALIB_OVERFLOW_INT 0xd9 #define GC_EXCEPTNUM_XO0_SLOW_CALIB_UNDERRUN_INT 0xda #define GC_EXCEPTIONS_COUNT 218 #define GC_IRQNUM_RESET 0 #define GC_IRQNUM_NMI 0 #define GC_IRQNUM_HARDFAULT 0 #define GC_IRQNUM_MEMORYMANAGEMENT 0 #define GC_IRQNUM_BUSFAULT 0 #define GC_IRQNUM_USAGEFAULT 0 #define GC_IRQNUM_RESERVED7 0 #define GC_IRQNUM_RESERVED8 0 #define GC_IRQNUM_RESERVED9 0 #define GC_IRQNUM_RESERVED10 0 #define GC_IRQNUM_SVCALL 0 #define GC_IRQNUM_DEBUGMONITOR 0 #define GC_IRQNUM_RESERVED13 0 #define GC_IRQNUM_PENDSV 0 #define GC_IRQNUM_SYSTICK 0 #define GC_IRQNUM_CRYPTO0_BREAK_INT 0 #define GC_IRQNUM_CRYPTO0_DMEM_PTRS_OVERFLOW_INT 1 #define GC_IRQNUM_CRYPTO0_DONE_WIPE_SECRETS_INT 2 #define GC_IRQNUM_CRYPTO0_DRF_PTRS_OVERFLOW_INT 3 #define GC_IRQNUM_CRYPTO0_HOST_CMD_DONE_INT 4 #define GC_IRQNUM_CRYPTO0_HOST_CMD_RECV_INT 5 #define GC_IRQNUM_CRYPTO0_LOOP_STACK_OVERFLOW_INT 6 #define GC_IRQNUM_CRYPTO0_LOOP_STACK_UNDERFLOW_INT 7 #define GC_IRQNUM_CRYPTO0_MOD_OPERAND_OUT_OF_RANGE_INT 8 #define GC_IRQNUM_CRYPTO0_PC_STACK_OVERFLOW_INT 9 #define GC_IRQNUM_CRYPTO0_PGM_FAULT_INT 10 #define GC_IRQNUM_CRYPTO0_TRAP_INT 11 #define GC_IRQNUM_DMA0_INTR_COMPLETE_CHAN_INT 12 #define GC_IRQNUM_DMA0_INTR_ERROR_CHAN_INT 13 #define GC_IRQNUM_DMA0_INTR_PROG_CHAN_INT 14 #define GC_IRQNUM_DMA0_INTR_TIMEOUT_CHAN_INT 15 #define GC_IRQNUM_FLASH0_EDONEINT 16 #define GC_IRQNUM_FLASH0_PDONEINT 17 #define GC_IRQNUM_GLOBALSEC_CAMO0_BREACH_ALERT_INT 18 #define GC_IRQNUM_GLOBALSEC_CRYPTO0_DMEM_PARITY_ALERT_INT 19 #define GC_IRQNUM_GLOBALSEC_CRYPTO0_DRF_PARITY_ALERT_INT 20 #define GC_IRQNUM_GLOBALSEC_CRYPTO0_IMEM_PARITY_ALERT_INT 21 #define GC_IRQNUM_GLOBALSEC_CRYPTO0_PGM_FAULT_ALERT_INT 22 #define GC_IRQNUM_GLOBALSEC_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_INT 23 #define GC_IRQNUM_GLOBALSEC_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_INT 24 #define GC_IRQNUM_GLOBALSEC_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_INT 25 #define GC_IRQNUM_GLOBALSEC_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_INT 26 #define GC_IRQNUM_GLOBALSEC_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_INT 27 #define GC_IRQNUM_GLOBALSEC_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_INT 28 #define GC_IRQNUM_GLOBALSEC_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_INT 29 #define GC_IRQNUM_GLOBALSEC_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_INT 30 #define GC_IRQNUM_GLOBALSEC_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_INT 31 #define GC_IRQNUM_GLOBALSEC_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_INT 32 #define GC_IRQNUM_GLOBALSEC_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_INT 33 #define GC_IRQNUM_GLOBALSEC_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_INT 34 #define GC_IRQNUM_GLOBALSEC_FUSE0_FUSE_DEFAULTS_ALERT_INT 35 #define GC_IRQNUM_GLOBALSEC_GLOBALSEC_ALERT_GROUPA_INT 36 #define GC_IRQNUM_GLOBALSEC_GLOBALSEC_ALERT_GROUPB_INT 37 #define GC_IRQNUM_GLOBALSEC_GLOBALSEC_ALERT_GROUPC_INT 38 #define GC_IRQNUM_GLOBALSEC_GLOBALSEC_DIFF_FAIL_ALERT_INT 39 #define GC_IRQNUM_GLOBALSEC_GLOBALSEC_FW0_ALERT_INT 40 #define GC_IRQNUM_GLOBALSEC_GLOBALSEC_FW1_ALERT_INT 41 #define GC_IRQNUM_GLOBALSEC_GLOBALSEC_FW2_ALERT_INT 42 #define GC_IRQNUM_GLOBALSEC_GLOBALSEC_FW3_ALERT_INT 43 #define GC_IRQNUM_GLOBALSEC_GLOBALSEC_HEARTBEAT_FAIL_ALERT_INT 44 #define GC_IRQNUM_GLOBALSEC_GLOBALSEC_PROC_OPCODE_HASH_ALERT_INT 45 #define GC_IRQNUM_GLOBALSEC_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_INT 46 #define GC_IRQNUM_GLOBALSEC_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_INT 47 #define GC_IRQNUM_GLOBALSEC_KEYMGR0_AES_HKEY_ALERT_INT 48 #define GC_IRQNUM_GLOBALSEC_KEYMGR0_CERT_LOOKUP_ALERT_INT 49 #define GC_IRQNUM_GLOBALSEC_KEYMGR0_FLASH_ENTRY_ALERT_INT 50 #define GC_IRQNUM_GLOBALSEC_KEYMGR0_PW_ALERT_INT 51 #define GC_IRQNUM_GLOBALSEC_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_INT 52 #define GC_IRQNUM_GLOBALSEC_KEYMGR0_SHA_FAULT_ALERT_INT 53 #define GC_IRQNUM_GLOBALSEC_KEYMGR0_SHA_HKEY_ALERT_INT 54 #define GC_IRQNUM_GLOBALSEC_PMU_BATTERY_MON_ALERT_INT 55 #define GC_IRQNUM_GLOBALSEC_PMU_PMU_WDOG_ALERT_INT 56 #define GC_IRQNUM_GLOBALSEC_RTC0_RTC_DEAD_ALERT_INT 57 #define GC_IRQNUM_GLOBALSEC_TEMP0_MAX_TEMP_ALERT_INT 58 #define GC_IRQNUM_GLOBALSEC_TEMP0_MAX_TEMP_DIFF_ALERT_INT 59 #define GC_IRQNUM_GLOBALSEC_TEMP0_MIN_TEMP_ALERT_INT 60 #define GC_IRQNUM_GLOBALSEC_TRNG0_OUT_OF_SPEC_ALERT_INT 61 #define GC_IRQNUM_GLOBALSEC_TRNG0_TIMEOUT_ALERT_INT 62 #define GC_IRQNUM_GLOBALSEC_VOLT0_VOLT_ERR_ALERT_INT 63 #define GC_IRQNUM_GLOBALSEC_XO0_JITTERY_TRIM_DIS_ALERT_INT 64 #define GC_IRQNUM_GPIO0_GPIO0INT 65 #define GC_IRQNUM_GPIO0_GPIO1INT 66 #define GC_IRQNUM_GPIO0_GPIO2INT 67 #define GC_IRQNUM_GPIO0_GPIO3INT 68 #define GC_IRQNUM_GPIO0_GPIO4INT 69 #define GC_IRQNUM_GPIO0_GPIO5INT 70 #define GC_IRQNUM_GPIO0_GPIO6INT 71 #define GC_IRQNUM_GPIO0_GPIO7INT 72 #define GC_IRQNUM_GPIO0_GPIO8INT 73 #define GC_IRQNUM_GPIO0_GPIO9INT 74 #define GC_IRQNUM_GPIO0_GPIO10INT 75 #define GC_IRQNUM_GPIO0_GPIO11INT 76 #define GC_IRQNUM_GPIO0_GPIO12INT 77 #define GC_IRQNUM_GPIO0_GPIO13INT 78 #define GC_IRQNUM_GPIO0_GPIO14INT 79 #define GC_IRQNUM_GPIO0_GPIO15INT 80 #define GC_IRQNUM_GPIO0_GPIOCOMBINT 81 #define GC_IRQNUM_GPIO1_GPIO0INT 82 #define GC_IRQNUM_GPIO1_GPIO1INT 83 #define GC_IRQNUM_GPIO1_GPIO2INT 84 #define GC_IRQNUM_GPIO1_GPIO3INT 85 #define GC_IRQNUM_GPIO1_GPIO4INT 86 #define GC_IRQNUM_GPIO1_GPIO5INT 87 #define GC_IRQNUM_GPIO1_GPIO6INT 88 #define GC_IRQNUM_GPIO1_GPIO7INT 89 #define GC_IRQNUM_GPIO1_GPIO8INT 90 #define GC_IRQNUM_GPIO1_GPIO9INT 91 #define GC_IRQNUM_GPIO1_GPIO10INT 92 #define GC_IRQNUM_GPIO1_GPIO11INT 93 #define GC_IRQNUM_GPIO1_GPIO12INT 94 #define GC_IRQNUM_GPIO1_GPIO13INT 95 #define GC_IRQNUM_GPIO1_GPIO14INT 96 #define GC_IRQNUM_GPIO1_GPIO15INT 97 #define GC_IRQNUM_GPIO1_GPIOCOMBINT 98 #define GC_IRQNUM_I2C0_I2CINT 99 #define GC_IRQNUM_I2C1_I2CINT 100 #define GC_IRQNUM_I2CS0_INTR_READ_BEGIN_INT 101 #define GC_IRQNUM_I2CS0_INTR_READ_COMPLETE_INT 102 #define GC_IRQNUM_I2CS0_INTR_WRITE_COMPLETE_INT 103 #define GC_IRQNUM_KEYMGR0_AES_DONE_CIPHER_INT 104 #define GC_IRQNUM_KEYMGR0_AES_DONE_KEYEXPANSION_INT 105 #define GC_IRQNUM_KEYMGR0_AES_DONE_WIPE_SECRETS_INT 106 #define GC_IRQNUM_KEYMGR0_AES_RFIFO_OVERFLOW_INT 107 #define GC_IRQNUM_KEYMGR0_AES_RFIFO_UNDERFLOW_INT 108 #define GC_IRQNUM_KEYMGR0_AES_WFIFO_OVERFLOW_INT 109 #define GC_IRQNUM_KEYMGR0_DSHA_INT 110 #define GC_IRQNUM_KEYMGR0_SHA_WFIFO_FULL_INT 111 #define GC_IRQNUM_PMU_INTR_WAKEUP_INT 112 #define GC_IRQNUM_RBOX0_INTR_AC_PRESENT_FED_INT 113 #define GC_IRQNUM_RBOX0_INTR_AC_PRESENT_RED_INT 114 #define GC_IRQNUM_RBOX0_INTR_BUTTON_COMBO0_RDY_INT 115 #define GC_IRQNUM_RBOX0_INTR_BUTTON_COMBO1_RDY_INT 116 #define GC_IRQNUM_RBOX0_INTR_BUTTON_COMBO2_RDY_INT 117 #define GC_IRQNUM_RBOX0_INTR_EC_RST_FED_INT 118 #define GC_IRQNUM_RBOX0_INTR_EC_RST_RED_INT 119 #define GC_IRQNUM_RBOX0_INTR_KEY0_IN_FED_INT 120 #define GC_IRQNUM_RBOX0_INTR_KEY0_IN_RED_INT 121 #define GC_IRQNUM_RBOX0_INTR_KEY1_IN_FED_INT 122 #define GC_IRQNUM_RBOX0_INTR_KEY1_IN_RED_INT 123 #define GC_IRQNUM_RBOX0_INTR_PWRB_IN_FED_INT 124 #define GC_IRQNUM_RBOX0_INTR_PWRB_IN_RED_INT 125 #define GC_IRQNUM_RDD0_INTR_DEBUG_STATE_DETECTED_INT 126 #define GC_IRQNUM_SPI0_SPITXINT 127 #define GC_IRQNUM_SPI1_SPITXINT 128 #define GC_IRQNUM_SPS0_CS_ASSERT_INTR 129 #define GC_IRQNUM_SPS0_CS_DEASSERT_INTR 130 #define GC_IRQNUM_SPS0_INTR_CMD_ADDR_FIFO_NOT_EMPTY_INT 131 #define GC_IRQNUM_SPS0_INTR_CMD_ADDR_FIFO_OVFL_INT 132 #define GC_IRQNUM_SPS0_INTR_CMD_MEM_OVFL_INT 133 #define GC_IRQNUM_SPS0_INTR_RAM_PAGE0_LVL_INT 134 #define GC_IRQNUM_SPS0_INTR_RAM_PAGE1_LVL_INT 135 #define GC_IRQNUM_SPS0_INTR_RAM_PAGE2_LVL_INT 136 #define GC_IRQNUM_SPS0_INTR_RAM_PAGE3_LVL_INT 137 #define GC_IRQNUM_SPS0_RXFIFO_LVL_INTR 138 #define GC_IRQNUM_SPS0_RXFIFO_OVERFLOW_INTR 139 #define GC_IRQNUM_SPS0_SPSCTRLINT0 140 #define GC_IRQNUM_SPS0_SPSCTRLINT1 141 #define GC_IRQNUM_SPS0_SPSCTRLINT2 142 #define GC_IRQNUM_SPS0_SPSCTRLINT3 143 #define GC_IRQNUM_SPS0_SPSCTRLINT4 144 #define GC_IRQNUM_SPS0_SPSCTRLINT5 145 #define GC_IRQNUM_SPS0_SPSCTRLINT6 146 #define GC_IRQNUM_SPS0_SPSCTRLINT7 147 #define GC_IRQNUM_SPS0_TXFIFO_EMPTY_INTR 148 #define GC_IRQNUM_SPS0_TXFIFO_FULL_INTR 149 #define GC_IRQNUM_SPS0_TXFIFO_LVL_INTR 150 #define GC_IRQNUM_TEMP0_ADC_ICLKDV_INT 151 #define GC_IRQNUM_TEMP0_COMP_OVERFLOW_INT 152 #define GC_IRQNUM_TIMEHS0_TIMINT1 153 #define GC_IRQNUM_TIMEHS0_TIMINT2 154 #define GC_IRQNUM_TIMEHS0_TIMINTC 155 #define GC_IRQNUM_TIMEHS1_TIMINT1 156 #define GC_IRQNUM_TIMEHS1_TIMINT2 157 #define GC_IRQNUM_TIMEHS1_TIMINTC 158 #define GC_IRQNUM_TIMELS0_TIMINT0 159 #define GC_IRQNUM_TIMELS0_TIMINT1 160 #define GC_IRQNUM_TIMEUS0_INTR_MAX_COUNT_HIT0_INT 161 #define GC_IRQNUM_TIMEUS0_INTR_MAX_COUNT_HIT1_INT 162 #define GC_IRQNUM_TIMEUS0_INTR_MAX_COUNT_HIT2_INT 163 #define GC_IRQNUM_TIMEUS0_INTR_MAX_COUNT_HIT3_INT 164 #define GC_IRQNUM_TIMEUS0_INTR_PROG_COUNT_HIT0_INT 165 #define GC_IRQNUM_TIMEUS0_INTR_PROG_COUNT_HIT1_INT 166 #define GC_IRQNUM_TIMEUS0_INTR_PROG_COUNT_HIT2_INT 167 #define GC_IRQNUM_TIMEUS0_INTR_PROG_COUNT_HIT3_INT 168 #define GC_IRQNUM_TRNG0_INTR_BUFFER_FULL_INT 169 #define GC_IRQNUM_TRNG0_INTR_ONE_SHOT_DONE_INT 170 #define GC_IRQNUM_TRNG0_INTR_READ_EMPTY_INT 171 #define GC_IRQNUM_UART0_RXBINT 172 #define GC_IRQNUM_UART0_RXFINT 173 #define GC_IRQNUM_UART0_RXINT 174 #define GC_IRQNUM_UART0_RXOVINT 175 #define GC_IRQNUM_UART0_RXTOINT 176 #define GC_IRQNUM_UART0_TXINT 177 #define GC_IRQNUM_UART0_TXOVINT 178 #define GC_IRQNUM_UART1_RXBINT 179 #define GC_IRQNUM_UART1_RXFINT 180 #define GC_IRQNUM_UART1_RXINT 181 #define GC_IRQNUM_UART1_RXOVINT 182 #define GC_IRQNUM_UART1_RXTOINT 183 #define GC_IRQNUM_UART1_TXINT 184 #define GC_IRQNUM_UART1_TXOVINT 185 #define GC_IRQNUM_UART2_RXBINT 186 #define GC_IRQNUM_UART2_RXFINT 187 #define GC_IRQNUM_UART2_RXINT 188 #define GC_IRQNUM_UART2_RXOVINT 189 #define GC_IRQNUM_UART2_RXTOINT 190 #define GC_IRQNUM_UART2_TXINT 191 #define GC_IRQNUM_UART2_TXOVINT 192 #define GC_IRQNUM_USB0_USBINTR 193 #define GC_IRQNUM_WATCHDOG0_WDOGINT 194 #define GC_IRQNUM_XO0_CLK_JTR_NOP_SEEN_INT 195 #define GC_IRQNUM_XO0_CLK_JTR_SW_TRIM_DONE_INT 196 #define GC_IRQNUM_XO0_CLK_TIMER_NOP_SEEN_INT 197 #define GC_IRQNUM_XO0_CLK_TIMER_SW_TRIM_DONE_INT 198 #define GC_IRQNUM_XO0_FAST_CALIB_OVERFLOW_INT 199 #define GC_IRQNUM_XO0_FAST_CALIB_UNDERRUN_INT 200 #define GC_IRQNUM_XO0_SLOW_CALIB_OVERFLOW_INT 201 #define GC_IRQNUM_XO0_SLOW_CALIB_UNDERRUN_INT 202 #define GC_INTERRUPTS_COUNT 218 #define GC_CAMO0_BASE_ADDR 0x40560000 #define GC_CAMO_BASE_ADDR 0x40560000 #define GC_CRYPTO0_BASE_ADDR 0x40420000 #define GC_CRYPTO_BASE_ADDR 0x40420000 #define GC_DMA0_BASE_ADDR 0x40430000 #define GC_DMA_BASE_ADDR 0x40430000 #define GC_FLASH0_BASE_ADDR 0x40720000 #define GC_FLASH_BASE_ADDR 0x40720000 #define GC_FUSE0_BASE_ADDR 0x40450000 #define GC_FUSE_BASE_ADDR 0x40450000 #define GC_GLOBALSEC_BASE_ADDR 0x40090000 #define GC_GPIO0_BASE_ADDR 0x40200000 #define GC_GPIO_BASE_ADDR 0x40200000 #define GC_GPIO1_BASE_ADDR 0x40210000 #define GC_I2C0_BASE_ADDR 0x40630000 #define GC_I2C_BASE_ADDR 0x40630000 #define GC_I2C1_BASE_ADDR 0x40640000 #define GC_I2CS0_BASE_ADDR 0x40530000 #define GC_I2CS_BASE_ADDR 0x40530000 #define GC_KEYMGR0_BASE_ADDR 0x40570000 #define GC_KEYMGR_BASE_ADDR 0x40570000 #define GC_PINMUX_BASE_ADDR 0x40060000 #define GC_PMU_BASE_ADDR 0x40000000 #define GC_M3_BASE_ADDR 0xe0000000 #define GC_RBOX0_BASE_ADDR 0x40550000 #define GC_RBOX_BASE_ADDR 0x40550000 #define GC_RDD0_BASE_ADDR 0x40440000 #define GC_RDD_BASE_ADDR 0x40440000 #define GC_RTC0_BASE_ADDR 0x400a0000 #define GC_RTC_BASE_ADDR 0x400a0000 #define GC_SPI0_BASE_ADDR 0x40700000 #define GC_SPI_BASE_ADDR 0x40700000 #define GC_SPI1_BASE_ADDR 0x40710000 #define GC_SPS0_BASE_ADDR 0x40510000 #define GC_SPS_BASE_ADDR 0x40510000 #define GC_SWDP0_BASE_ADDR 0x40520000 #define GC_SWDP_BASE_ADDR 0x40520000 #define GC_TEMP0_BASE_ADDR 0x40400000 #define GC_TEMP_BASE_ADDR 0x40400000 #define GC_TIMEHS0_BASE_ADDR 0x40650000 #define GC_TIMEHS_BASE_ADDR 0x40650000 #define GC_TIMEHS1_BASE_ADDR 0x40660000 #define GC_TIMELS0_BASE_ADDR 0x40540000 #define GC_TIMELS_BASE_ADDR 0x40540000 #define GC_TIMEUS0_BASE_ADDR 0x40670000 #define GC_TIMEUS_BASE_ADDR 0x40670000 #define GC_TRNG0_BASE_ADDR 0x40410000 #define GC_TRNG_BASE_ADDR 0x40410000 #define GC_UART0_BASE_ADDR 0x40600000 #define GC_UART_BASE_ADDR 0x40600000 #define GC_UART1_BASE_ADDR 0x40610000 #define GC_UART2_BASE_ADDR 0x40620000 #define GC_USB0_BASE_ADDR 0x40300000 #define GC_USB_BASE_ADDR 0x40300000 #define GC_VOLT0_BASE_ADDR 0x40460000 #define GC_VOLT_BASE_ADDR 0x40460000 #define GC_WATCHDOG0_BASE_ADDR 0x40500000 #define GC_WATCHDOG_BASE_ADDR 0x40500000 #define GC_XO0_BASE_ADDR 0x400b0000 #define GC_XO_BASE_ADDR 0x400b0000 #define GC_CAMO_BREACH_COUNT_OFFSET 0x0 #define GC_CAMO_BREACH_COUNT_DEFAULT 0x0 #define GC_CAMO_CLEAR_COUNTER_OFFSET 0x4 #define GC_CAMO_CLEAR_COUNTER_DEFAULT 0x0 #define GC_CAMO_VERSION_OFFSET 0x8 #define GC_CAMO_VERSION_DEFAULT 0x1014125 #define GC_CRYPTO_VERSION_OFFSET 0x0 #define GC_CRYPTO_VERSION_DEFAULT 0x101424a #define GC_CRYPTO_CONTROL_OFFSET 0x4 #define GC_CRYPTO_CONTROL_DEFAULT 0x0 #define GC_CRYPTO_PARITY_CFG_OFFSET 0x8 #define GC_CRYPTO_PARITY_CFG_DEFAULT 0x10 #define GC_CRYPTO_IMEM_SCRUB_RANGE_OFFSET 0xc #define GC_CRYPTO_IMEM_SCRUB_RANGE_DEFAULT 0x3ff #define GC_CRYPTO_DMEM_SCRUB_RANGE_OFFSET 0x10 #define GC_CRYPTO_DMEM_SCRUB_RANGE_DEFAULT 0x7f #define GC_CRYPTO_INT_ENABLE_OFFSET 0x14 #define GC_CRYPTO_INT_ENABLE_DEFAULT 0x0 #define GC_CRYPTO_INT_STATE_OFFSET 0x18 #define GC_CRYPTO_INT_STATE_DEFAULT 0x0 #define GC_CRYPTO_INT_TEST_OFFSET 0x1c #define GC_CRYPTO_INT_TEST_DEFAULT 0x0 #define GC_CRYPTO_HOST_CMD_OFFSET 0x20 #define GC_CRYPTO_HOST_CMD_DEFAULT 0xffffffff #define GC_CRYPTO_INSTR_OFFSET 0x24 #define GC_CRYPTO_INSTR_DEFAULT 0x0 #define GC_CRYPTO_STATUS_OFFSET 0x28 #define GC_CRYPTO_STATUS_DEFAULT 0x0 #define GC_CRYPTO_AUX_CC_OFFSET 0x2c #define GC_CRYPTO_AUX_CC_DEFAULT 0x0 #define GC_CRYPTO_RAND_STALL_CTL_OFFSET 0x30 #define GC_CRYPTO_RAND_STALL_CTL_DEFAULT 0x5 #define GC_CRYPTO_RAND256_OFFSET 0x34 #define GC_CRYPTO_RAND256_DEFAULT 0x1 #define GC_CRYPTO_IMEM_PARITY_ERRS_CTR_STATE_OFFSET 0x38 #define GC_CRYPTO_IMEM_PARITY_ERRS_CTR_STATE_DEFAULT 0x0 #define GC_CRYPTO_DMEM_PARITY_ERRS_CTR_STATE_OFFSET 0x3c #define GC_CRYPTO_DMEM_PARITY_ERRS_CTR_STATE_DEFAULT 0x0 #define GC_CRYPTO_DRF_PARITY_ERRS_CTR_STATE_OFFSET 0x40 #define GC_CRYPTO_DRF_PARITY_ERRS_CTR_STATE_DEFAULT 0x0 #define GC_CRYPTO_PGM_LFSR_OFFSET 0x44 #define GC_CRYPTO_PGM_LFSR_DEFAULT 0x0 #define GC_CRYPTO_DEBUG_BRKPT0_OFFSET 0x48 #define GC_CRYPTO_DEBUG_BRKPT0_DEFAULT 0x0 #define GC_CRYPTO_DEBUG_BRKPT1_OFFSET 0x4c #define GC_CRYPTO_DEBUG_BRKPT1_DEFAULT 0x0 #define GC_CRYPTO_WIPE_SECRETS_OFFSET 0x50 #define GC_CRYPTO_WIPE_SECRETS_DEFAULT 0x0 #define GC_CRYPTO_DMEM_DUMMY_OFFSET 0x4000 #define GC_CRYPTO_IMEM_DUMMY_OFFSET 0x8000 #define GC_DMA_VERSION_OFFSET 0x0 #define GC_DMA_VERSION_DEFAULT 0x101424a #define GC_DMA_INT_ENABLE_OFFSET 0x4 #define GC_DMA_INT_ENABLE_DEFAULT 0x0 #define GC_DMA_INT_STATE_OFFSET 0x8 #define GC_DMA_INT_STATE_DEFAULT 0x0 #define GC_DMA_INT_TEST_OFFSET 0xc #define GC_DMA_INT_TEST_DEFAULT 0x0 #define GC_DMA_START_CHAN0_OFFSET 0x100 #define GC_DMA_START_CHAN0_DEFAULT 0x0 #define GC_DMA_STOP_CHAN0_OFFSET 0x104 #define GC_DMA_STOP_CHAN0_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN0_OFFSET 0x108 #define GC_DMA_CTRL_CHAN0_DEFAULT 0xa #define GC_DMA_SRC_ADDR_CHAN0_OFFSET 0x10c #define GC_DMA_SRC_ADDR_CHAN0_DEFAULT 0x0 #define GC_DMA_DST_ADDR_CHAN0_OFFSET 0x110 #define GC_DMA_DST_ADDR_CHAN0_DEFAULT 0x0 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN0_OFFSET 0x114 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN0_DEFAULT 0x3ff #define GC_DMA_PROG_COUNT_CHAN0_OFFSET 0x118 #define GC_DMA_PROG_COUNT_CHAN0_DEFAULT 0x0 #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN0_OFFSET 0x11c #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN0_DEFAULT 0x0 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN0_OFFSET 0x120 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN0_DEFAULT 0xf9f #define GC_DMA_PAUSE_COUNTER_CHAN0_OFFSET 0x124 #define GC_DMA_PAUSE_COUNTER_CHAN0_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN0_OFFSET 0x128 #define GC_DMA_FSM_STATE_CHAN0_DEFAULT 0x1 #define GC_DMA_START_CHAN1_OFFSET 0x200 #define GC_DMA_START_CHAN1_DEFAULT 0x0 #define GC_DMA_STOP_CHAN1_OFFSET 0x204 #define GC_DMA_STOP_CHAN1_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN1_OFFSET 0x208 #define GC_DMA_CTRL_CHAN1_DEFAULT 0xa #define GC_DMA_SRC_ADDR_CHAN1_OFFSET 0x20c #define GC_DMA_SRC_ADDR_CHAN1_DEFAULT 0x0 #define GC_DMA_DST_ADDR_CHAN1_OFFSET 0x210 #define GC_DMA_DST_ADDR_CHAN1_DEFAULT 0x0 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN1_OFFSET 0x214 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN1_DEFAULT 0x3ff #define GC_DMA_PROG_COUNT_CHAN1_OFFSET 0x218 #define GC_DMA_PROG_COUNT_CHAN1_DEFAULT 0x0 #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN1_OFFSET 0x21c #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN1_DEFAULT 0x0 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN1_OFFSET 0x220 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN1_DEFAULT 0xf9f #define GC_DMA_PAUSE_COUNTER_CHAN1_OFFSET 0x224 #define GC_DMA_PAUSE_COUNTER_CHAN1_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN1_OFFSET 0x228 #define GC_DMA_FSM_STATE_CHAN1_DEFAULT 0x1 #define GC_DMA_START_CHAN2_OFFSET 0x300 #define GC_DMA_START_CHAN2_DEFAULT 0x0 #define GC_DMA_STOP_CHAN2_OFFSET 0x304 #define GC_DMA_STOP_CHAN2_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN2_OFFSET 0x308 #define GC_DMA_CTRL_CHAN2_DEFAULT 0xa #define GC_DMA_SRC_ADDR_CHAN2_OFFSET 0x30c #define GC_DMA_SRC_ADDR_CHAN2_DEFAULT 0x0 #define GC_DMA_DST_ADDR_CHAN2_OFFSET 0x310 #define GC_DMA_DST_ADDR_CHAN2_DEFAULT 0x0 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN2_OFFSET 0x314 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN2_DEFAULT 0x3ff #define GC_DMA_PROG_COUNT_CHAN2_OFFSET 0x318 #define GC_DMA_PROG_COUNT_CHAN2_DEFAULT 0x0 #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN2_OFFSET 0x31c #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN2_DEFAULT 0x0 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN2_OFFSET 0x320 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN2_DEFAULT 0xf9f #define GC_DMA_PAUSE_COUNTER_CHAN2_OFFSET 0x324 #define GC_DMA_PAUSE_COUNTER_CHAN2_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN2_OFFSET 0x328 #define GC_DMA_FSM_STATE_CHAN2_DEFAULT 0x1 #define GC_DMA_START_CHAN3_OFFSET 0x400 #define GC_DMA_START_CHAN3_DEFAULT 0x0 #define GC_DMA_STOP_CHAN3_OFFSET 0x404 #define GC_DMA_STOP_CHAN3_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN3_OFFSET 0x408 #define GC_DMA_CTRL_CHAN3_DEFAULT 0xa #define GC_DMA_SRC_ADDR_CHAN3_OFFSET 0x40c #define GC_DMA_SRC_ADDR_CHAN3_DEFAULT 0x0 #define GC_DMA_DST_ADDR_CHAN3_OFFSET 0x410 #define GC_DMA_DST_ADDR_CHAN3_DEFAULT 0x0 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN3_OFFSET 0x414 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN3_DEFAULT 0x3ff #define GC_DMA_PROG_COUNT_CHAN3_OFFSET 0x418 #define GC_DMA_PROG_COUNT_CHAN3_DEFAULT 0x0 #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN3_OFFSET 0x41c #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN3_DEFAULT 0x0 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN3_OFFSET 0x420 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN3_DEFAULT 0xf9f #define GC_DMA_PAUSE_COUNTER_CHAN3_OFFSET 0x424 #define GC_DMA_PAUSE_COUNTER_CHAN3_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN3_OFFSET 0x428 #define GC_DMA_FSM_STATE_CHAN3_DEFAULT 0x1 #define GC_DMA_START_CHAN4_OFFSET 0x500 #define GC_DMA_START_CHAN4_DEFAULT 0x0 #define GC_DMA_STOP_CHAN4_OFFSET 0x504 #define GC_DMA_STOP_CHAN4_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN4_OFFSET 0x508 #define GC_DMA_CTRL_CHAN4_DEFAULT 0xa #define GC_DMA_SRC_ADDR_CHAN4_OFFSET 0x50c #define GC_DMA_SRC_ADDR_CHAN4_DEFAULT 0x0 #define GC_DMA_DST_ADDR_CHAN4_OFFSET 0x510 #define GC_DMA_DST_ADDR_CHAN4_DEFAULT 0x0 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN4_OFFSET 0x514 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN4_DEFAULT 0x3ff #define GC_DMA_PROG_COUNT_CHAN4_OFFSET 0x518 #define GC_DMA_PROG_COUNT_CHAN4_DEFAULT 0x0 #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN4_OFFSET 0x51c #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN4_DEFAULT 0x0 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN4_OFFSET 0x520 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN4_DEFAULT 0xf9f #define GC_DMA_PAUSE_COUNTER_CHAN4_OFFSET 0x524 #define GC_DMA_PAUSE_COUNTER_CHAN4_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN4_OFFSET 0x528 #define GC_DMA_FSM_STATE_CHAN4_DEFAULT 0x1 #define GC_DMA_START_CHAN5_OFFSET 0x600 #define GC_DMA_START_CHAN5_DEFAULT 0x0 #define GC_DMA_STOP_CHAN5_OFFSET 0x604 #define GC_DMA_STOP_CHAN5_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN5_OFFSET 0x608 #define GC_DMA_CTRL_CHAN5_DEFAULT 0xa #define GC_DMA_SRC_ADDR_CHAN5_OFFSET 0x60c #define GC_DMA_SRC_ADDR_CHAN5_DEFAULT 0x0 #define GC_DMA_DST_ADDR_CHAN5_OFFSET 0x610 #define GC_DMA_DST_ADDR_CHAN5_DEFAULT 0x0 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN5_OFFSET 0x614 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN5_DEFAULT 0x3ff #define GC_DMA_PROG_COUNT_CHAN5_OFFSET 0x618 #define GC_DMA_PROG_COUNT_CHAN5_DEFAULT 0x0 #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN5_OFFSET 0x61c #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN5_DEFAULT 0x0 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN5_OFFSET 0x620 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN5_DEFAULT 0xf9f #define GC_DMA_PAUSE_COUNTER_CHAN5_OFFSET 0x624 #define GC_DMA_PAUSE_COUNTER_CHAN5_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN5_OFFSET 0x628 #define GC_DMA_FSM_STATE_CHAN5_DEFAULT 0x1 #define GC_DMA_START_CHAN6_OFFSET 0x700 #define GC_DMA_START_CHAN6_DEFAULT 0x0 #define GC_DMA_STOP_CHAN6_OFFSET 0x704 #define GC_DMA_STOP_CHAN6_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN6_OFFSET 0x708 #define GC_DMA_CTRL_CHAN6_DEFAULT 0xa #define GC_DMA_SRC_ADDR_CHAN6_OFFSET 0x70c #define GC_DMA_SRC_ADDR_CHAN6_DEFAULT 0x0 #define GC_DMA_DST_ADDR_CHAN6_OFFSET 0x710 #define GC_DMA_DST_ADDR_CHAN6_DEFAULT 0x0 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN6_OFFSET 0x714 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN6_DEFAULT 0x3ff #define GC_DMA_PROG_COUNT_CHAN6_OFFSET 0x718 #define GC_DMA_PROG_COUNT_CHAN6_DEFAULT 0x0 #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN6_OFFSET 0x71c #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN6_DEFAULT 0x0 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN6_OFFSET 0x720 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN6_DEFAULT 0xf9f #define GC_DMA_PAUSE_COUNTER_CHAN6_OFFSET 0x724 #define GC_DMA_PAUSE_COUNTER_CHAN6_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN6_OFFSET 0x728 #define GC_DMA_FSM_STATE_CHAN6_DEFAULT 0x1 #define GC_DMA_START_CHAN7_OFFSET 0x800 #define GC_DMA_START_CHAN7_DEFAULT 0x0 #define GC_DMA_STOP_CHAN7_OFFSET 0x804 #define GC_DMA_STOP_CHAN7_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN7_OFFSET 0x808 #define GC_DMA_CTRL_CHAN7_DEFAULT 0xa #define GC_DMA_SRC_ADDR_CHAN7_OFFSET 0x80c #define GC_DMA_SRC_ADDR_CHAN7_DEFAULT 0x0 #define GC_DMA_DST_ADDR_CHAN7_OFFSET 0x810 #define GC_DMA_DST_ADDR_CHAN7_DEFAULT 0x0 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN7_OFFSET 0x814 #define GC_DMA_NUM_TRANSACTION_COUNT_CHAN7_DEFAULT 0x3ff #define GC_DMA_PROG_COUNT_CHAN7_OFFSET 0x818 #define GC_DMA_PROG_COUNT_CHAN7_DEFAULT 0x0 #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN7_OFFSET 0x81c #define GC_DMA_CURRENT_NUM_TRANSACTION_COUNT_CHAN7_DEFAULT 0x0 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN7_OFFSET 0x820 #define GC_DMA_MAX_NUM_TIMEOUT_CHAN7_DEFAULT 0xf9f #define GC_DMA_PAUSE_COUNTER_CHAN7_OFFSET 0x824 #define GC_DMA_PAUSE_COUNTER_CHAN7_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN7_OFFSET 0x828 #define GC_DMA_FSM_STATE_CHAN7_DEFAULT 0x1 #define GC_FLASH_FSH_PE_CONTROL0_OFFSET 0x0 #define GC_FLASH_FSH_PE_CONTROL0_DEFAULT 0x0 #define GC_FLASH_FSH_PE_CONTROL0_PROG 0x27182818 #define GC_FLASH_FSH_PE_CONTROL0_READ 0x16021765 #define GC_FLASH_FSH_PE_CONTROL0_BULKERASE 0x1d1e2bad #define GC_FLASH_FSH_PE_CONTROL0_ERASE 0x31415927 #define GC_FLASH_FSH_PE_CONTROL1_OFFSET 0x4 #define GC_FLASH_FSH_PE_CONTROL1_DEFAULT 0x0 #define GC_FLASH_FSH_PE_CONTROL1_PROG 0x27182818 #define GC_FLASH_FSH_PE_CONTROL1_READ 0x16021765 #define GC_FLASH_FSH_PE_CONTROL1_BULKERASE 0x1d1e2bad #define GC_FLASH_FSH_PE_CONTROL1_ERASE 0x31415927 #define GC_FLASH_FSH_TRANS_OFFSET 0x8 #define GC_FLASH_FSH_TRANS_DEFAULT 0x0 #define GC_FLASH_FSH_PROTECT_INFO1_OFFSET 0xc #define GC_FLASH_FSH_PROTECT_INFO1_DEFAULT 0x0 #define GC_FLASH_FSH_ENABLE_INFO0_SHADOW_READ_OFFSET 0x10 #define GC_FLASH_FSH_ENABLE_INFO0_SHADOW_READ_DEFAULT 0x0 #define GC_FLASH_FSH_ICTRL_OFFSET 0x14 #define GC_FLASH_FSH_ICTRL_DEFAULT 0x0 #define GC_FLASH_FSH_ISTATE_OFFSET 0x18 #define GC_FLASH_FSH_ISTATE_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD0_UNLOCK_OFFSET 0x1c #define GC_FLASH_FSH_OVRD0_UNLOCK_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD0_UNLOCK_KEY 0x13806488 #define GC_FLASH_FSH_OVRD1_UNLOCK_OFFSET 0x20 #define GC_FLASH_FSH_OVRD1_UNLOCK_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD1_UNLOCK_KEY 0x13806488 #define GC_FLASH_FSH_OVRD_SIGVAL_DIN_OFFSET 0x24 #define GC_FLASH_FSH_OVRD_SIGVAL_DIN_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_OFFSET_OFFSET 0x28 #define GC_FLASH_FSH_OVRD_SIGVAL_OFFSET_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_OFFSET 0x2c #define GC_FLASH_FSH_OVRD_SIGVAL_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_DEFAULT 0x0 #define GC_FLASH_FSH_NO_WAIT_ON_BOUT_SEQ_OFFSET 0x34 #define GC_FLASH_FSH_NO_WAIT_ON_BOUT_SEQ_DEFAULT 0x0 #define GC_FLASH_FSH_DOUT_VAL0_OFFSET 0x38 #define GC_FLASH_FSH_DOUT_VAL0_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_TC0_OFFSET 0x3c #define GC_FLASH_FSH_OVRD_SIGVAL_TC0_DEFAULT 0x0 #define GC_FLASH_FSH_DOUT_VAL1_OFFSET 0x40 #define GC_FLASH_FSH_DOUT_VAL1_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_TC1_OFFSET 0x44 #define GC_FLASH_FSH_OVRD_SIGVAL_TC1_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA0_OFFSET 0x48 #define GC_FLASH_FSH_WR_DATA0_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA1_OFFSET 0x4c #define GC_FLASH_FSH_WR_DATA1_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA2_OFFSET 0x50 #define GC_FLASH_FSH_WR_DATA2_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA3_OFFSET 0x54 #define GC_FLASH_FSH_WR_DATA3_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA4_OFFSET 0x58 #define GC_FLASH_FSH_WR_DATA4_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA5_OFFSET 0x5c #define GC_FLASH_FSH_WR_DATA5_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA6_OFFSET 0x60 #define GC_FLASH_FSH_WR_DATA6_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA7_OFFSET 0x64 #define GC_FLASH_FSH_WR_DATA7_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA8_OFFSET 0x68 #define GC_FLASH_FSH_WR_DATA8_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA9_OFFSET 0x6c #define GC_FLASH_FSH_WR_DATA9_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA10_OFFSET 0x70 #define GC_FLASH_FSH_WR_DATA10_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA11_OFFSET 0x74 #define GC_FLASH_FSH_WR_DATA11_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA12_OFFSET 0x78 #define GC_FLASH_FSH_WR_DATA12_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA13_OFFSET 0x7c #define GC_FLASH_FSH_WR_DATA13_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA14_OFFSET 0x80 #define GC_FLASH_FSH_WR_DATA14_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA15_OFFSET 0x84 #define GC_FLASH_FSH_WR_DATA15_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA16_OFFSET 0x88 #define GC_FLASH_FSH_WR_DATA16_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA17_OFFSET 0x8c #define GC_FLASH_FSH_WR_DATA17_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA18_OFFSET 0x90 #define GC_FLASH_FSH_WR_DATA18_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA19_OFFSET 0x94 #define GC_FLASH_FSH_WR_DATA19_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA20_OFFSET 0x98 #define GC_FLASH_FSH_WR_DATA20_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA21_OFFSET 0x9c #define GC_FLASH_FSH_WR_DATA21_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA22_OFFSET 0xa0 #define GC_FLASH_FSH_WR_DATA22_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA23_OFFSET 0xa4 #define GC_FLASH_FSH_WR_DATA23_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA24_OFFSET 0xa8 #define GC_FLASH_FSH_WR_DATA24_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA25_OFFSET 0xac #define GC_FLASH_FSH_WR_DATA25_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA26_OFFSET 0xb0 #define GC_FLASH_FSH_WR_DATA26_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA27_OFFSET 0xb4 #define GC_FLASH_FSH_WR_DATA27_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA28_OFFSET 0xb8 #define GC_FLASH_FSH_WR_DATA28_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA29_OFFSET 0xbc #define GC_FLASH_FSH_WR_DATA29_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA30_OFFSET 0xc0 #define GC_FLASH_FSH_WR_DATA30_DEFAULT 0x0 #define GC_FLASH_FSH_WR_DATA31_OFFSET 0xc4 #define GC_FLASH_FSH_WR_DATA31_DEFAULT 0x0 #define GC_FLASH_FSH_PE_EN_OFFSET 0xc8 #define GC_FLASH_FSH_PE_EN_DEFAULT 0x0 #define GC_FLASH_FSH_PE_EN_KEY 0xb11924e1 #define GC_FLASH_FSH_REDUN0_OFFSET 0xcc #define GC_FLASH_FSH_REDUN0_DEFAULT 0x0 #define GC_FLASH_FSH_REDUN1_OFFSET 0xd0 #define GC_FLASH_FSH_REDUN1_DEFAULT 0x0 #define GC_FLASH_FSH_ERROR_OFFSET 0xd4 #define GC_FLASH_FSH_ERROR_DEFAULT 0x0 #define GC_FLASH_FSH_TIMING_READ_TOTAL_CYC_OFFSET 0xd8 #define GC_FLASH_FSH_TIMING_READ_TOTAL_CYC_DEFAULT 0x1 #define GC_FLASH_FSH_TIMING_READ_XE_FRST_CYC_OFFSET 0xdc #define GC_FLASH_FSH_TIMING_READ_XE_FRST_CYC_DEFAULT 0x0 #define GC_FLASH_FSH_TIMING_READ_XE_LAST_CYC_OFFSET 0xe0 #define GC_FLASH_FSH_TIMING_READ_XE_LAST_CYC_DEFAULT 0x0 #define GC_FLASH_FSH_TIMING_READ_YE_FRST_CYC_OFFSET 0xe4 #define GC_FLASH_FSH_TIMING_READ_YE_FRST_CYC_DEFAULT 0x0 #define GC_FLASH_FSH_TIMING_READ_YE_LAST_CYC_OFFSET 0xe8 #define GC_FLASH_FSH_TIMING_READ_YE_LAST_CYC_DEFAULT 0x0 #define GC_FLASH_FSH_TIMING_READ_SE_FRST_CYC_OFFSET 0xec #define GC_FLASH_FSH_TIMING_READ_SE_FRST_CYC_DEFAULT 0x0 #define GC_FLASH_FSH_TIMING_READ_SE_LAST_CYC_OFFSET 0xf0 #define GC_FLASH_FSH_TIMING_READ_SE_LAST_CYC_DEFAULT 0x0 #define GC_FLASH_FSH_TIMING_READ_PV_FRST_CYC_OFFSET 0xf4 #define GC_FLASH_FSH_TIMING_READ_PV_FRST_CYC_DEFAULT 0x0 #define GC_FLASH_FSH_TIMING_READ_PV_LAST_CYC_OFFSET 0xf8 #define GC_FLASH_FSH_TIMING_READ_PV_LAST_CYC_DEFAULT 0x0 #define GC_FLASH_FSH_TIMING_READ_EV_FRST_CYC_OFFSET 0xfc #define GC_FLASH_FSH_TIMING_READ_EV_FRST_CYC_DEFAULT 0x0 #define GC_FLASH_FSH_TIMING_READ_EV_LAST_CYC_OFFSET 0x100 #define GC_FLASH_FSH_TIMING_READ_EV_LAST_CYC_DEFAULT 0x0 #define GC_FLASH_FSH_TIMING_PROG_SMART_ALGO_ON_OFFSET 0x104 #define GC_FLASH_FSH_TIMING_PROG_SMART_ALGO_ON_DEFAULT 0x1 #define GC_FLASH_FSH_TIMING_PROG_TOTAL_CYC_OFFSET 0x108 #define GC_FLASH_FSH_TIMING_PROG_TOTAL_CYC_DEFAULT 0x37e #define GC_FLASH_FSH_TIMING_PROG_XE_FRST_CYC_OFFSET 0x10c #define GC_FLASH_FSH_TIMING_PROG_XE_FRST_CYC_DEFAULT 0x0 #define GC_FLASH_FSH_TIMING_PROG_XE_LAST_CYC_OFFSET 0x110 #define GC_FLASH_FSH_TIMING_PROG_XE_LAST_CYC_DEFAULT 0x265 #define GC_FLASH_FSH_TIMING_PROG_YE_FRST_CYC_OFFSET 0x114 #define GC_FLASH_FSH_TIMING_PROG_YE_FRST_CYC_DEFAULT 0x1a7 #define GC_FLASH_FSH_TIMING_PROG_YE_LAST_CYC_OFFSET 0x118 #define GC_FLASH_FSH_TIMING_PROG_YE_LAST_CYC_DEFAULT 0x1d6 #define GC_FLASH_FSH_TIMING_PROG_ONEWRD_FRST_CYC_OFFSET 0x11c #define GC_FLASH_FSH_TIMING_PROG_ONEWRD_FRST_CYC_DEFAULT 0x1a6 #define GC_FLASH_FSH_TIMING_PROG_ONEWRD_LAST_CYC_OFFSET 0x120 #define GC_FLASH_FSH_TIMING_PROG_ONEWRD_LAST_CYC_DEFAULT 0x1d7 #define GC_FLASH_FSH_TIMING_PROG_PROGSIG_FRST_CYC_OFFSET 0x124 #define GC_FLASH_FSH_TIMING_PROG_PROGSIG_FRST_CYC_DEFAULT 0x1 #define GC_FLASH_FSH_TIMING_PROG_PROGSIG_LAST_CYC_OFFSET 0x128 #define GC_FLASH_FSH_TIMING_PROG_PROGSIG_LAST_CYC_DEFAULT 0x1d7 #define GC_FLASH_FSH_TIMING_PROG_NVSTR_FRST_CYC_OFFSET 0x12c #define GC_FLASH_FSH_TIMING_PROG_NVSTR_FRST_CYC_DEFAULT 0x8d #define GC_FLASH_FSH_TIMING_PROG_NVSTR_LAST_CYC_OFFSET 0x130 #define GC_FLASH_FSH_TIMING_PROG_NVSTR_LAST_CYC_DEFAULT 0x264 #define GC_FLASH_FSH_TIMING_ERASE_SMART_ALGO_ON_OFFSET 0x134 #define GC_FLASH_FSH_TIMING_ERASE_SMART_ALGO_ON_DEFAULT 0x1 #define GC_FLASH_FSH_TIMING_ERASE_TOTAL_CYC_OFFSET 0x138 #define GC_FLASH_FSH_TIMING_ERASE_TOTAL_CYC_DEFAULT 0xbb12 #define GC_FLASH_FSH_TIMING_ERASE_XE_FRST_CYC_OFFSET 0x13c #define GC_FLASH_FSH_TIMING_ERASE_XE_FRST_CYC_DEFAULT 0x0 #define GC_FLASH_FSH_TIMING_ERASE_XE_LAST_CYC_OFFSET 0x140 #define GC_FLASH_FSH_TIMING_ERASE_XE_LAST_CYC_DEFAULT 0xb9f9 #define GC_FLASH_FSH_TIMING_ERASE_ERASESIG_FRST_CYC_OFFSET 0x144 #define GC_FLASH_FSH_TIMING_ERASE_ERASESIG_FRST_CYC_DEFAULT 0x1 #define GC_FLASH_FSH_TIMING_ERASE_ERASESIG_LAST_CYC_OFFSET 0x148 #define GC_FLASH_FSH_TIMING_ERASE_ERASESIG_LAST_CYC_DEFAULT 0xb96b #define GC_FLASH_FSH_TIMING_ERASE_NVSTR_FRST_CYC_OFFSET 0x14c #define GC_FLASH_FSH_TIMING_ERASE_NVSTR_FRST_CYC_DEFAULT 0x8d #define GC_FLASH_FSH_TIMING_ERASE_NVSTR_LAST_CYC_OFFSET 0x150 #define GC_FLASH_FSH_TIMING_ERASE_NVSTR_LAST_CYC_DEFAULT 0xb9f8 #define GC_FLASH_FSH_TIMING_BULKERASE_SMART_ALGO_ON_OFFSET 0x154 #define GC_FLASH_FSH_TIMING_BULKERASE_SMART_ALGO_ON_DEFAULT 0x1 #define GC_FLASH_FSH_TIMING_BULKERASE_TOTAL_CYC_OFFSET 0x158 #define GC_FLASH_FSH_TIMING_BULKERASE_TOTAL_CYC_DEFAULT 0xc585 #define GC_FLASH_FSH_TIMING_BULKERASE_XE_FRST_CYC_OFFSET 0x15c #define GC_FLASH_FSH_TIMING_BULKERASE_XE_FRST_CYC_DEFAULT 0x0 #define GC_FLASH_FSH_TIMING_BULKERASE_XE_LAST_CYC_OFFSET 0x160 #define GC_FLASH_FSH_TIMING_BULKERASE_XE_LAST_CYC_DEFAULT 0xc46c #define GC_FLASH_FSH_TIMING_BULKERASE_ERASESIG_FRST_CYC_OFFSET 0x164 #define GC_FLASH_FSH_TIMING_BULKERASE_ERASESIG_FRST_CYC_DEFAULT 0x1 #define GC_FLASH_FSH_TIMING_BULKERASE_ERASESIG_LAST_CYC_OFFSET 0x168 #define GC_FLASH_FSH_TIMING_BULKERASE_ERASESIG_LAST_CYC_DEFAULT 0xb96b #define GC_FLASH_FSH_TIMING_BULKERASE_MAS1_FRST_CYC_OFFSET 0x16c #define GC_FLASH_FSH_TIMING_BULKERASE_MAS1_FRST_CYC_DEFAULT 0x0 #define GC_FLASH_FSH_TIMING_BULKERASE_MAS1_LAST_CYC_OFFSET 0x170 #define GC_FLASH_FSH_TIMING_BULKERASE_MAS1_LAST_CYC_DEFAULT 0xc46c #define GC_FLASH_FSH_TIMING_BULKERASE_NVSTR_FRST_CYC_OFFSET 0x174 #define GC_FLASH_FSH_TIMING_BULKERASE_NVSTR_FRST_CYC_DEFAULT 0x8d #define GC_FLASH_FSH_TIMING_BULKERASE_NVSTR_LAST_CYC_OFFSET 0x178 #define GC_FLASH_FSH_TIMING_BULKERASE_NVSTR_LAST_CYC_DEFAULT 0xc46b #define GC_FLASH_FSH_DBG_OFFSET 0x17c #define GC_FLASH_FSH_DBG_DEFAULT 0x0 #define GC_FLASH_FSH_ITCR_OFFSET 0xf00 #define GC_FLASH_FSH_ITCR_DEFAULT 0x0 #define GC_FLASH_FSH_ITOP_OFFSET 0xf04 #define GC_FLASH_FSH_ITOP_DEFAULT 0x0 #define GC_FUSE_STATUS_OFFSET 0x0 #define GC_FUSE_STATUS_DEFAULT 0x0 #define GC_FUSE_READ_START_OFFSET 0x4 #define GC_FUSE_READ_START_DEFAULT 0x0 #define GC_FUSE_READ_START_DISABLE 0x0 #define GC_FUSE_READ_START_ENABLE 0xc8eca61e #define GC_FUSE_PROG_START_OFFSET 0x8 #define GC_FUSE_PROG_START_DEFAULT 0x0 #define GC_FUSE_PROG_START_DISABLE 0x0 #define GC_FUSE_PROG_START_ENABLE 0xdc98157b #define GC_FUSE_OVERRIDE_START_OFFSET 0xc #define GC_FUSE_OVERRIDE_START_DEFAULT 0x0 #define GC_FUSE_OVERRIDE_START_DISABLE 0x0 #define GC_FUSE_OVERRIDE_START_ENABLE 0x894e4cf3 #define GC_FUSE_FPGA_MODEL_CTRL_OFFSET 0x10 #define GC_FUSE_FPGA_MODEL_CTRL_DEFAULT 0x0 #define GC_FUSE_SCRUB_PRBS_CLK_DIV_OFFSET 0x14 #define GC_FUSE_SCRUB_PRBS_CLK_DIV_DEFAULT 0xffffff #define GC_FUSE_SCRUB_PRBS_THRESHOLD_VAL_OFFSET 0x18 #define GC_FUSE_SCRUB_PRBS_THRESHOLD_VAL_DEFAULT 0x7fff #define GC_FUSE_SCRUB_ENABLE_OFFSET 0x1c #define GC_FUSE_SCRUB_ENABLE_DEFAULT 0x0 #define GC_FUSE_SCRUB_ENABLE_DISABLE 0x0 #define GC_FUSE_SCRUB_ENABLE_ENABLE 0x5 #define GC_FUSE_ERROR_INJECT_OFFSET 0x20 #define GC_FUSE_ERROR_INJECT_DEFAULT 0x0 #define GC_FUSE_ERROR_INJECT_DISABLE 0x0 #define GC_FUSE_ERROR_INJECT_ENABLE 0x690c7334 #define GC_FUSE_VDDQ_RAMP_TIMING_OFFSET 0x24 #define GC_FUSE_VDDQ_RAMP_TIMING_DEFAULT 0x1d4c0 #define GC_FUSE_ANTEST_EN_OFFSET 0x28 #define GC_FUSE_ANTEST_EN_DEFAULT 0x0 #define GC_FUSE_VERSION_OFFSET 0x2c #define GC_FUSE_VERSION_DEFAULT 0x1014125 #define GC_FUSE_BNK0_INTG_CHKSUM_OFFSET 0x30 #define GC_FUSE_BNK0_INTG_CHKSUM_DEFAULT 0x55000000 #define GC_FUSE_BNK0_INTG_LOCK_OFFSET 0x34 #define GC_FUSE_BNK0_INTG_LOCK_DEFAULT 0x55555550 #define GC_FUSE_DS_GRP0_OFFSET 0x38 #define GC_FUSE_DS_GRP0_DEFAULT 0x55555400 #define GC_FUSE_DS_GRP1_OFFSET 0x3c #define GC_FUSE_DS_GRP1_DEFAULT 0x55555400 #define GC_FUSE_DS_GRP2_OFFSET 0x40 #define GC_FUSE_DS_GRP2_DEFAULT 0x55555400 #define GC_FUSE_DEV_ID0_OFFSET 0x44 #define GC_FUSE_DEV_ID0_DEFAULT 0x0 #define GC_FUSE_DEV_ID1_OFFSET 0x48 #define GC_FUSE_DEV_ID1_DEFAULT 0x0 #define GC_FUSE_BNK1_INTG_CHKSUM_OFFSET 0x4c #define GC_FUSE_BNK1_INTG_CHKSUM_DEFAULT 0x55000000 #define GC_FUSE_BNK1_INTG_LOCK_OFFSET 0x50 #define GC_FUSE_BNK1_INTG_LOCK_DEFAULT 0x55555550 #define GC_FUSE_LB0_POST_OVRD_OFFSET 0x54 #define GC_FUSE_LB0_POST_OVRD_DEFAULT 0x55555550 #define GC_FUSE_LB0_POST_PATCNT_OFFSET 0x58 #define GC_FUSE_LB0_POST_PATCNT_DEFAULT 0x55555554 #define GC_FUSE_LB0_POST_WARMUP_OVRD_OFFSET 0x5c #define GC_FUSE_LB0_POST_WARMUP_OVRD_DEFAULT 0x55555550 #define GC_FUSE_LB0_POST_WARMUP_CNT_OFFSET 0x60 #define GC_FUSE_LB0_POST_WARMUP_CNT_DEFAULT 0x55555554 #define GC_FUSE_LB1_POST_OVRD_OFFSET 0x64 #define GC_FUSE_LB1_POST_OVRD_DEFAULT 0x55555550 #define GC_FUSE_LB1_POST_PATCNT_OFFSET 0x68 #define GC_FUSE_LB1_POST_PATCNT_DEFAULT 0x55555554 #define GC_FUSE_LB1_POST_WARMUP_OVRD_OFFSET 0x6c #define GC_FUSE_LB1_POST_WARMUP_OVRD_DEFAULT 0x55555550 #define GC_FUSE_LB1_POST_WARMUP_CNT_OFFSET 0x70 #define GC_FUSE_LB1_POST_WARMUP_CNT_DEFAULT 0x55555554 #define GC_FUSE_LB2_POST_OVRD_OFFSET 0x74 #define GC_FUSE_LB2_POST_OVRD_DEFAULT 0x55555550 #define GC_FUSE_LB2_POST_PATCNT_OFFSET 0x78 #define GC_FUSE_LB2_POST_PATCNT_DEFAULT 0x55555554 #define GC_FUSE_LB2_POST_WARMUP_OVRD_OFFSET 0x7c #define GC_FUSE_LB2_POST_WARMUP_OVRD_DEFAULT 0x55555550 #define GC_FUSE_LB2_POST_WARMUP_CNT_OFFSET 0x80 #define GC_FUSE_LB2_POST_WARMUP_CNT_DEFAULT 0x55555554 #define GC_FUSE_LB3_POST_OVRD_OFFSET 0x84 #define GC_FUSE_LB3_POST_OVRD_DEFAULT 0x55555550 #define GC_FUSE_LB3_POST_PATCNT_OFFSET 0x88 #define GC_FUSE_LB3_POST_PATCNT_DEFAULT 0x55555554 #define GC_FUSE_LB3_POST_WARMUP_OVRD_OFFSET 0x8c #define GC_FUSE_LB3_POST_WARMUP_OVRD_DEFAULT 0x55555550 #define GC_FUSE_LB3_POST_WARMUP_CNT_OFFSET 0x90 #define GC_FUSE_LB3_POST_WARMUP_CNT_DEFAULT 0x55555554 #define GC_FUSE_LB4_POST_OVRD_OFFSET 0x94 #define GC_FUSE_LB4_POST_OVRD_DEFAULT 0x55555550 #define GC_FUSE_LB4_POST_PATCNT_OFFSET 0x98 #define GC_FUSE_LB4_POST_PATCNT_DEFAULT 0x55555554 #define GC_FUSE_LB4_POST_WARMUP_OVRD_OFFSET 0x9c #define GC_FUSE_LB4_POST_WARMUP_OVRD_DEFAULT 0x55555550 #define GC_FUSE_LB4_POST_WARMUP_CNT_OFFSET 0xa0 #define GC_FUSE_LB4_POST_WARMUP_CNT_DEFAULT 0x55555554 #define GC_FUSE_MBIST_POST_SEQ_OFFSET 0xa4 #define GC_FUSE_MBIST_POST_SEQ_DEFAULT 0x54000000 #define GC_FUSE_LBIST_POST_SEQ_OFFSET 0xa8 #define GC_FUSE_LBIST_POST_SEQ_DEFAULT 0x54000000 #define GC_FUSE_LBIST_VIA_TAP_DIS_OFFSET 0xac #define GC_FUSE_LBIST_VIA_TAP_DIS_DEFAULT 0x55555550 #define GC_FUSE_MBIST_VIA_TAP_DIS_OFFSET 0xb0 #define GC_FUSE_MBIST_VIA_TAP_DIS_DEFAULT 0x55555550 #define GC_FUSE_TAP_DISABLE_OFFSET 0xb4 #define GC_FUSE_TAP_DISABLE_DEFAULT 0x55555550 #define GC_FUSE_RNGBIST_AR_EN_OFFSET 0xb8 #define GC_FUSE_RNGBIST_AR_EN_DEFAULT 0x55555550 #define GC_FUSE_TESTMODE_KEYS_EN_OFFSET 0xbc #define GC_FUSE_TESTMODE_KEYS_EN_DEFAULT 0x55555550 #define GC_FUSE_PKG_ID_OFFSET 0xc0 #define GC_FUSE_PKG_ID_DEFAULT 0x55555550 #define GC_FUSE_BIN_ID_OFFSET 0xc4 #define GC_FUSE_BIN_ID_DEFAULT 0x55555550 #define GC_FUSE_RC_JTR_OSC48_CC_TRIM_OFFSET 0xc8 #define GC_FUSE_RC_JTR_OSC48_CC_TRIM_DEFAULT 0x55555500 #define GC_FUSE_RC_JTR_OSC48_CC_EN_OFFSET 0xcc #define GC_FUSE_RC_JTR_OSC48_CC_EN_DEFAULT 0x55555550 #define GC_FUSE_RC_JTR_OSC60_CC_TRIM_OFFSET 0xd0 #define GC_FUSE_RC_JTR_OSC60_CC_TRIM_DEFAULT 0x55555500 #define GC_FUSE_RC_JTR_OSC60_CC_EN_OFFSET 0xd4 #define GC_FUSE_RC_JTR_OSC60_CC_EN_DEFAULT 0x55555550 #define GC_FUSE_RC_TIMER_OSC48_CC_TRIM_OFFSET 0xd8 #define GC_FUSE_RC_TIMER_OSC48_CC_TRIM_DEFAULT 0x55555500 #define GC_FUSE_RC_TIMER_OSC48_CC_EN_OFFSET 0xdc #define GC_FUSE_RC_TIMER_OSC48_CC_EN_DEFAULT 0x55555550 #define GC_FUSE_RC_TIMER_OSC48_FC_TRIM_OFFSET 0xe0 #define GC_FUSE_RC_TIMER_OSC48_FC_TRIM_DEFAULT 0x55555540 #define GC_FUSE_RC_TIMER_OSC48_FC_EN_OFFSET 0xe4 #define GC_FUSE_RC_TIMER_OSC48_FC_EN_DEFAULT 0x55555550 #define GC_FUSE_RC_RTC_OSC256K_CC_TRIM_OFFSET 0xe8 #define GC_FUSE_RC_RTC_OSC256K_CC_TRIM_DEFAULT 0x55555500 #define GC_FUSE_RC_RTC_OSC256K_CC_EN_OFFSET 0xec #define GC_FUSE_RC_RTC_OSC256K_CC_EN_DEFAULT 0x55555550 #define GC_FUSE_SEL_VREG_REG_EN_OFFSET 0xf0 #define GC_FUSE_SEL_VREG_REG_EN_DEFAULT 0x55555550 #define GC_FUSE_SEL_VREF_REG_OFFSET 0xf4 #define GC_FUSE_SEL_VREF_REG_DEFAULT 0x55555550 #define GC_FUSE_SEL_VREF_BATMON_EN_OFFSET 0xf8 #define GC_FUSE_SEL_VREF_BATMON_EN_DEFAULT 0x55555550 #define GC_FUSE_SEL_VREF_BATMON_OFFSET 0xfc #define GC_FUSE_SEL_VREF_BATMON_DEFAULT 0x55555550 #define GC_FUSE_X_OSC_LDO_CTRL_EN_OFFSET 0x100 #define GC_FUSE_X_OSC_LDO_CTRL_EN_DEFAULT 0x55555550 #define GC_FUSE_X_OSC_LDO_CTRL_OFFSET 0x104 #define GC_FUSE_X_OSC_LDO_CTRL_DEFAULT 0x55555550 #define GC_FUSE_TEMP_OFFSET_CAL_OFFSET 0x108 #define GC_FUSE_TEMP_OFFSET_CAL_DEFAULT 0x55555000 #define GC_FUSE_TRNG_LDO_CTRL_EN_OFFSET 0x10c #define GC_FUSE_TRNG_LDO_CTRL_EN_DEFAULT 0x55555550 #define GC_FUSE_TRNG_LDO_CTRL_OFFSET 0x110 #define GC_FUSE_TRNG_LDO_CTRL_DEFAULT 0x55555540 #define GC_FUSE_TRNG_ANALOG_CTRL_EN_OFFSET 0x114 #define GC_FUSE_TRNG_ANALOG_CTRL_EN_DEFAULT 0x55555550 #define GC_FUSE_TRNG_ANALOG_CTRL_OFFSET 0x118 #define GC_FUSE_TRNG_ANALOG_CTRL_DEFAULT 0x55555550 #define GC_FUSE_EXT_XTAL_PDB_OFFSET 0x11c #define GC_FUSE_EXT_XTAL_PDB_DEFAULT 0x55555554 #define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_OFFSET 0x120 #define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_DEFAULT 0x55555550 #define GC_FUSE_OBFUSCATION_EN_OFFSET 0x124 #define GC_FUSE_OBFUSCATION_EN_DEFAULT 0x55555550 #define GC_FUSE_HIK_CREATE_LOCK_OFFSET 0x128 #define GC_FUSE_HIK_CREATE_LOCK_DEFAULT 0x55555550 #define GC_FUSE_BNK2_INTG_CHKSUM_OFFSET 0x12c #define GC_FUSE_BNK2_INTG_CHKSUM_DEFAULT 0x55000000 #define GC_FUSE_BNK2_INTG_LOCK_OFFSET 0x130 #define GC_FUSE_BNK2_INTG_LOCK_DEFAULT 0x55555550 #define GC_FUSE_TESTMODE_OTPW_DIS_OFFSET 0x134 #define GC_FUSE_TESTMODE_OTPW_DIS_DEFAULT 0x55555550 #define GC_FUSE_HKEY_WDOG_TIMER_EN_OFFSET 0x138 #define GC_FUSE_HKEY_WDOG_TIMER_EN_DEFAULT 0x55555550 #define GC_FUSE_FLASH_PERSO_PAGE_LOCK_OFFSET 0x13c #define GC_FUSE_FLASH_PERSO_PAGE_LOCK_DEFAULT 0x55555550 #define GC_FUSE_ALERT_RSP_CFG_OFFSET 0x140 #define GC_FUSE_ALERT_RSP_CFG_DEFAULT 0x55555500 #define GC_FUSE_BNK3_INTG_CHKSUM_OFFSET 0x144 #define GC_FUSE_BNK3_INTG_CHKSUM_DEFAULT 0x55000000 #define GC_FUSE_BNK3_INTG_LOCK_OFFSET 0x148 #define GC_FUSE_BNK3_INTG_LOCK_DEFAULT 0x55555550 #define GC_FUSE_FW_DEFINED_DATA_BLK0_OFFSET 0x14c #define GC_FUSE_FW_DEFINED_DATA_BLK0_DEFAULT 0x55555500 #define GC_FUSE_FW_DEFINED_BROM_ERR_RESPONSE_OFFSET 0x150 #define GC_FUSE_FW_DEFINED_BROM_ERR_RESPONSE_DEFAULT 0x55550000 #define GC_FUSE_FW_DEFINED_BROM_APPLYSEC_OFFSET 0x154 #define GC_FUSE_FW_DEFINED_BROM_APPLYSEC_DEFAULT 0x55555000 #define GC_FUSE_FW_DEFINED_BROM_CONFIG0_OFFSET 0x158 #define GC_FUSE_FW_DEFINED_BROM_CONFIG0_DEFAULT 0x55555500 #define GC_FUSE_FW_DEFINED_BROM_CONFIG1_OFFSET 0x15c #define GC_FUSE_FW_DEFINED_BROM_CONFIG1_DEFAULT 0x55555500 #define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_OFFSET 0x160 #define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_DEFAULT 0x55555554 #define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_OFFSET 0x164 #define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_DEFAULT 0x55555500 #define GC_FUSE_RBOX_CLK10HZ_COUNT_OFFSET 0x168 #define GC_FUSE_RBOX_CLK10HZ_COUNT_DEFAULT 0x55550000 #define GC_FUSE_RBOX_SHORT_DELAY_COUNT_OFFSET 0x16c #define GC_FUSE_RBOX_SHORT_DELAY_COUNT_DEFAULT 0x55550000 #define GC_FUSE_RBOX_LONG_DELAY_COUNT_OFFSET 0x170 #define GC_FUSE_RBOX_LONG_DELAY_COUNT_DEFAULT 0x55555500 #define GC_FUSE_RBOX_DEBOUNCE_PERIOD_OFFSET 0x174 #define GC_FUSE_RBOX_DEBOUNCE_PERIOD_DEFAULT 0x55550000 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_OFFSET 0x178 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_DEFAULT 0x55555554 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_OFFSET 0x17c #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_DEFAULT 0x55555554 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_OFFSET 0x180 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_DEFAULT 0x55555554 #define GC_FUSE_RBOX_KEY_COMBO0_VAL_OFFSET 0x184 #define GC_FUSE_RBOX_KEY_COMBO0_VAL_DEFAULT 0x55555500 #define GC_FUSE_RBOX_KEY_COMBO1_VAL_OFFSET 0x188 #define GC_FUSE_RBOX_KEY_COMBO1_VAL_DEFAULT 0x55555500 #define GC_FUSE_RBOX_KEY_COMBO2_VAL_OFFSET 0x18c #define GC_FUSE_RBOX_KEY_COMBO2_VAL_DEFAULT 0x55555500 #define GC_FUSE_RBOX_KEY_COMBO0_HOLD_OFFSET 0x190 #define GC_FUSE_RBOX_KEY_COMBO0_HOLD_DEFAULT 0x55555500 #define GC_FUSE_RBOX_KEY_COMBO1_HOLD_OFFSET 0x194 #define GC_FUSE_RBOX_KEY_COMBO1_HOLD_DEFAULT 0x55555500 #define GC_FUSE_RBOX_KEY_COMBO2_HOLD_OFFSET 0x198 #define GC_FUSE_RBOX_KEY_COMBO2_HOLD_DEFAULT 0x55555500 #define GC_FUSE_RBOX_BLOCK_KEY0_SEL_OFFSET 0x19c #define GC_FUSE_RBOX_BLOCK_KEY0_SEL_DEFAULT 0x55555554 #define GC_FUSE_RBOX_BLOCK_KEY1_SEL_OFFSET 0x1a0 #define GC_FUSE_RBOX_BLOCK_KEY1_SEL_DEFAULT 0x55555554 #define GC_FUSE_RBOX_BLOCK_KEY0_VAL_OFFSET 0x1a4 #define GC_FUSE_RBOX_BLOCK_KEY0_VAL_DEFAULT 0x55555554 #define GC_FUSE_RBOX_BLOCK_KEY1_VAL_OFFSET 0x1a8 #define GC_FUSE_RBOX_BLOCK_KEY1_VAL_DEFAULT 0x55555554 #define GC_FUSE_RBOX_POL_AC_PRESENT_OFFSET 0x1ac #define GC_FUSE_RBOX_POL_AC_PRESENT_DEFAULT 0x55555554 #define GC_FUSE_RBOX_POL_PWRB_IN_OFFSET 0x1b0 #define GC_FUSE_RBOX_POL_PWRB_IN_DEFAULT 0x55555554 #define GC_FUSE_RBOX_POL_PWRB_OUT_OFFSET 0x1b4 #define GC_FUSE_RBOX_POL_PWRB_OUT_DEFAULT 0x55555554 #define GC_FUSE_RBOX_POL_KEY0_IN_OFFSET 0x1b8 #define GC_FUSE_RBOX_POL_KEY0_IN_DEFAULT 0x55555554 #define GC_FUSE_RBOX_POL_KEY0_OUT_OFFSET 0x1bc #define GC_FUSE_RBOX_POL_KEY0_OUT_DEFAULT 0x55555554 #define GC_FUSE_RBOX_POL_KEY1_IN_OFFSET 0x1c0 #define GC_FUSE_RBOX_POL_KEY1_IN_DEFAULT 0x55555554 #define GC_FUSE_RBOX_POL_KEY1_OUT_OFFSET 0x1c4 #define GC_FUSE_RBOX_POL_KEY1_OUT_DEFAULT 0x55555554 #define GC_FUSE_RBOX_POL_EC_RST_OFFSET 0x1c8 #define GC_FUSE_RBOX_POL_EC_RST_DEFAULT 0x55555554 #define GC_FUSE_RBOX_POL_BATT_DISABLE_OFFSET 0x1cc #define GC_FUSE_RBOX_POL_BATT_DISABLE_DEFAULT 0x55555554 #define GC_FUSE_RBOX_TERM_AC_PRESENT_OFFSET 0x1d0 #define GC_FUSE_RBOX_TERM_AC_PRESENT_DEFAULT 0x55555554 #define GC_FUSE_RBOX_TERM_ENTERING_RW_OFFSET 0x1d4 #define GC_FUSE_RBOX_TERM_ENTERING_RW_DEFAULT 0x55555554 #define GC_FUSE_RBOX_TERM_PWRB_IN_OFFSET 0x1d8 #define GC_FUSE_RBOX_TERM_PWRB_IN_DEFAULT 0x55555554 #define GC_FUSE_RBOX_TERM_PWRB_OUT_OFFSET 0x1dc #define GC_FUSE_RBOX_TERM_PWRB_OUT_DEFAULT 0x55555554 #define GC_FUSE_RBOX_TERM_KEY0_IN_OFFSET 0x1e0 #define GC_FUSE_RBOX_TERM_KEY0_IN_DEFAULT 0x55555554 #define GC_FUSE_RBOX_TERM_KEY0_OUT_OFFSET 0x1e4 #define GC_FUSE_RBOX_TERM_KEY0_OUT_DEFAULT 0x55555554 #define GC_FUSE_RBOX_TERM_KEY1_IN_OFFSET 0x1e8 #define GC_FUSE_RBOX_TERM_KEY1_IN_DEFAULT 0x55555554 #define GC_FUSE_RBOX_TERM_KEY1_OUT_OFFSET 0x1ec #define GC_FUSE_RBOX_TERM_KEY1_OUT_DEFAULT 0x55555554 #define GC_FUSE_RBOX_DRIVE_PWRB_OUT_OFFSET 0x1f0 #define GC_FUSE_RBOX_DRIVE_PWRB_OUT_DEFAULT 0x55555554 #define GC_FUSE_RBOX_DRIVE_KEY0_OUT_OFFSET 0x1f4 #define GC_FUSE_RBOX_DRIVE_KEY0_OUT_DEFAULT 0x55555554 #define GC_FUSE_RBOX_DRIVE_KEY1_OUT_OFFSET 0x1f8 #define GC_FUSE_RBOX_DRIVE_KEY1_OUT_DEFAULT 0x55555554 #define GC_FUSE_RBOX_DRIVE_EC_RST_OFFSET 0x1fc #define GC_FUSE_RBOX_DRIVE_EC_RST_DEFAULT 0x55555554 #define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_OFFSET 0x200 #define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_DEFAULT 0x55555554 #define GC_FUSE_BNK4_INTG_CHKSUM_OFFSET 0x204 #define GC_FUSE_BNK4_INTG_CHKSUM_DEFAULT 0x55000000 #define GC_FUSE_BNK4_INTG_LOCK_OFFSET 0x208 #define GC_FUSE_BNK4_INTG_LOCK_DEFAULT 0x55555550 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_OFFSET 0x20c #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_DEFAULT 0x55555500 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_OFFSET 0x210 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_DEFAULT 0x55555500 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_OFFSET 0x214 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_DEFAULT 0x55555500 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_OFFSET 0x218 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_DEFAULT 0x55555500 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_OFFSET 0x21c #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_DEFAULT 0x55555500 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_OFFSET 0x220 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_DEFAULT 0x55555500 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_OFFSET 0x224 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_DEFAULT 0x55555540 #define GC_FUSE_PROG_BNK0_INTG_CHKSUM_OFFSET 0x228 #define GC_FUSE_PROG_BNK0_INTG_CHKSUM_DEFAULT 0x0 #define GC_FUSE_PROG_BNK0_INTG_LOCK_OFFSET 0x22c #define GC_FUSE_PROG_BNK0_INTG_LOCK_DEFAULT 0x0 #define GC_FUSE_PROG_DS_GRP0_OFFSET 0x230 #define GC_FUSE_PROG_DS_GRP0_DEFAULT 0x0 #define GC_FUSE_PROG_DS_GRP1_OFFSET 0x234 #define GC_FUSE_PROG_DS_GRP1_DEFAULT 0x0 #define GC_FUSE_PROG_DS_GRP2_OFFSET 0x238 #define GC_FUSE_PROG_DS_GRP2_DEFAULT 0x0 #define GC_FUSE_PROG_DEV_ID0_OFFSET 0x23c #define GC_FUSE_PROG_DEV_ID0_DEFAULT 0x0 #define GC_FUSE_PROG_DEV_ID1_OFFSET 0x240 #define GC_FUSE_PROG_DEV_ID1_DEFAULT 0x0 #define GC_FUSE_PROG_BNK1_INTG_CHKSUM_OFFSET 0x244 #define GC_FUSE_PROG_BNK1_INTG_CHKSUM_DEFAULT 0x0 #define GC_FUSE_PROG_BNK1_INTG_LOCK_OFFSET 0x248 #define GC_FUSE_PROG_BNK1_INTG_LOCK_DEFAULT 0x0 #define GC_FUSE_PROG_LB0_POST_OVRD_OFFSET 0x24c #define GC_FUSE_PROG_LB0_POST_OVRD_DEFAULT 0x0 #define GC_FUSE_PROG_LB0_POST_PATCNT_OFFSET 0x250 #define GC_FUSE_PROG_LB0_POST_PATCNT_DEFAULT 0x0 #define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_OFFSET 0x254 #define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_DEFAULT 0x0 #define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_OFFSET 0x258 #define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_DEFAULT 0x0 #define GC_FUSE_PROG_LB1_POST_OVRD_OFFSET 0x25c #define GC_FUSE_PROG_LB1_POST_OVRD_DEFAULT 0x0 #define GC_FUSE_PROG_LB1_POST_PATCNT_OFFSET 0x260 #define GC_FUSE_PROG_LB1_POST_PATCNT_DEFAULT 0x0 #define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_OFFSET 0x264 #define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_DEFAULT 0x0 #define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_OFFSET 0x268 #define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_DEFAULT 0x0 #define GC_FUSE_PROG_LB2_POST_OVRD_OFFSET 0x26c #define GC_FUSE_PROG_LB2_POST_OVRD_DEFAULT 0x0 #define GC_FUSE_PROG_LB2_POST_PATCNT_OFFSET 0x270 #define GC_FUSE_PROG_LB2_POST_PATCNT_DEFAULT 0x0 #define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_OFFSET 0x274 #define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_DEFAULT 0x0 #define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_OFFSET 0x278 #define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_DEFAULT 0x0 #define GC_FUSE_PROG_LB3_POST_OVRD_OFFSET 0x27c #define GC_FUSE_PROG_LB3_POST_OVRD_DEFAULT 0x0 #define GC_FUSE_PROG_LB3_POST_PATCNT_OFFSET 0x280 #define GC_FUSE_PROG_LB3_POST_PATCNT_DEFAULT 0x0 #define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_OFFSET 0x284 #define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_DEFAULT 0x0 #define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_OFFSET 0x288 #define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_DEFAULT 0x0 #define GC_FUSE_PROG_LB4_POST_OVRD_OFFSET 0x28c #define GC_FUSE_PROG_LB4_POST_OVRD_DEFAULT 0x0 #define GC_FUSE_PROG_LB4_POST_PATCNT_OFFSET 0x290 #define GC_FUSE_PROG_LB4_POST_PATCNT_DEFAULT 0x0 #define GC_FUSE_PROG_LB4_POST_WARMUP_OVRD_OFFSET 0x294 #define GC_FUSE_PROG_LB4_POST_WARMUP_OVRD_DEFAULT 0x0 #define GC_FUSE_PROG_LB4_POST_WARMUP_CNT_OFFSET 0x298 #define GC_FUSE_PROG_LB4_POST_WARMUP_CNT_DEFAULT 0x0 #define GC_FUSE_PROG_MBIST_POST_SEQ_OFFSET 0x29c #define GC_FUSE_PROG_MBIST_POST_SEQ_DEFAULT 0x0 #define GC_FUSE_PROG_LBIST_POST_SEQ_OFFSET 0x2a0 #define GC_FUSE_PROG_LBIST_POST_SEQ_DEFAULT 0x0 #define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_OFFSET 0x2a4 #define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_DEFAULT 0x0 #define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_OFFSET 0x2a8 #define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_DEFAULT 0x0 #define GC_FUSE_PROG_MBIST_BOOTROM_MISR_EN_OFFSET 0x2ac #define GC_FUSE_PROG_MBIST_BOOTROM_MISR_EN_DEFAULT 0x0 #define GC_FUSE_PROG_MBIST_BOOTROM_MISR_OFFSET 0x2b0 #define GC_FUSE_PROG_MBIST_BOOTROM_MISR_DEFAULT 0x0 #define GC_FUSE_PROG_TAP_DISABLE_OFFSET 0x2b4 #define GC_FUSE_PROG_TAP_DISABLE_DEFAULT 0x0 #define GC_FUSE_PROG_RNGBIST_AR_EN_OFFSET 0x2b8 #define GC_FUSE_PROG_RNGBIST_AR_EN_DEFAULT 0x0 #define GC_FUSE_PROG_TESTMODE_KEYS_EN_OFFSET 0x2bc #define GC_FUSE_PROG_TESTMODE_KEYS_EN_DEFAULT 0x0 #define GC_FUSE_PROG_PKG_ID_OFFSET 0x2c0 #define GC_FUSE_PROG_PKG_ID_DEFAULT 0x0 #define GC_FUSE_PROG_BIN_ID_OFFSET 0x2c4 #define GC_FUSE_PROG_BIN_ID_DEFAULT 0x0 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_OFFSET 0x2c8 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_DEFAULT 0x0 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_OFFSET 0x2cc #define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_DEFAULT 0x0 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_OFFSET 0x2d0 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_DEFAULT 0x0 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_OFFSET 0x2d4 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_DEFAULT 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_OFFSET 0x2d8 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_DEFAULT 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_OFFSET 0x2dc #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_DEFAULT 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_OFFSET 0x2e0 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_DEFAULT 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_OFFSET 0x2e4 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_DEFAULT 0x0 #define GC_FUSE_PROG_RC_RTC_OSC256K_CC_TRIM_OFFSET 0x2e8 #define GC_FUSE_PROG_RC_RTC_OSC256K_CC_TRIM_DEFAULT 0x0 #define GC_FUSE_PROG_RC_RTC_OSC256K_CC_EN_OFFSET 0x2ec #define GC_FUSE_PROG_RC_RTC_OSC256K_CC_EN_DEFAULT 0x0 #define GC_FUSE_PROG_SEL_VREG_REG_EN_OFFSET 0x2f0 #define GC_FUSE_PROG_SEL_VREG_REG_EN_DEFAULT 0x0 #define GC_FUSE_PROG_SEL_VREF_REG_OFFSET 0x2f4 #define GC_FUSE_PROG_SEL_VREF_REG_DEFAULT 0x0 #define GC_FUSE_PROG_SEL_VREF_BATMON_EN_OFFSET 0x2f8 #define GC_FUSE_PROG_SEL_VREF_BATMON_EN_DEFAULT 0x0 #define GC_FUSE_PROG_SEL_VREF_BATMON_OFFSET 0x2fc #define GC_FUSE_PROG_SEL_VREF_BATMON_DEFAULT 0x0 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_OFFSET 0x300 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_DEFAULT 0x0 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_OFFSET 0x304 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_DEFAULT 0x0 #define GC_FUSE_PROG_TEMP_OFFSET_CAL_OFFSET 0x308 #define GC_FUSE_PROG_TEMP_OFFSET_CAL_DEFAULT 0x0 #define GC_FUSE_PROG_TRNG_LDO_CTRL_EN_OFFSET 0x30c #define GC_FUSE_PROG_TRNG_LDO_CTRL_EN_DEFAULT 0x0 #define GC_FUSE_PROG_TRNG_LDO_CTRL_OFFSET 0x310 #define GC_FUSE_PROG_TRNG_LDO_CTRL_DEFAULT 0x0 #define GC_FUSE_PROG_TRNG_ANALOG_CTRL_EN_OFFSET 0x314 #define GC_FUSE_PROG_TRNG_ANALOG_CTRL_EN_DEFAULT 0x0 #define GC_FUSE_PROG_TRNG_ANALOG_CTRL_OFFSET 0x318 #define GC_FUSE_PROG_TRNG_ANALOG_CTRL_DEFAULT 0x0 #define GC_FUSE_PROG_EXT_XTAL_PDB_OFFSET 0x31c #define GC_FUSE_PROG_EXT_XTAL_PDB_DEFAULT 0x0 #define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_OFFSET 0x320 #define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_DEFAULT 0x0 #define GC_FUSE_PROG_OBFUSCATION_EN_OFFSET 0x324 #define GC_FUSE_PROG_OBFUSCATION_EN_DEFAULT 0x0 #define GC_FUSE_PROG_OBS0_OFFSET 0x328 #define GC_FUSE_PROG_OBS0_DEFAULT 0x0 #define GC_FUSE_PROG_OBS1_OFFSET 0x32c #define GC_FUSE_PROG_OBS1_DEFAULT 0x0 #define GC_FUSE_PROG_OBS2_OFFSET 0x330 #define GC_FUSE_PROG_OBS2_DEFAULT 0x0 #define GC_FUSE_PROG_OBS3_OFFSET 0x334 #define GC_FUSE_PROG_OBS3_DEFAULT 0x0 #define GC_FUSE_PROG_OBS4_OFFSET 0x338 #define GC_FUSE_PROG_OBS4_DEFAULT 0x0 #define GC_FUSE_PROG_OBS5_OFFSET 0x33c #define GC_FUSE_PROG_OBS5_DEFAULT 0x0 #define GC_FUSE_PROG_OBS6_OFFSET 0x340 #define GC_FUSE_PROG_OBS6_DEFAULT 0x0 #define GC_FUSE_PROG_OBS7_OFFSET 0x344 #define GC_FUSE_PROG_OBS7_DEFAULT 0x0 #define GC_FUSE_PROG_HIK_CREATE_LOCK_OFFSET 0x348 #define GC_FUSE_PROG_HIK_CREATE_LOCK_DEFAULT 0x0 #define GC_FUSE_PROG_BNK2_INTG_CHKSUM_OFFSET 0x34c #define GC_FUSE_PROG_BNK2_INTG_CHKSUM_DEFAULT 0x0 #define GC_FUSE_PROG_BNK2_INTG_LOCK_OFFSET 0x350 #define GC_FUSE_PROG_BNK2_INTG_LOCK_DEFAULT 0x0 #define GC_FUSE_PROG_TESTMODE_OTPW_DIS_OFFSET 0x354 #define GC_FUSE_PROG_TESTMODE_OTPW_DIS_DEFAULT 0x0 #define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_OFFSET 0x358 #define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_DEFAULT 0x0 #define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_OFFSET 0x35c #define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_DEFAULT 0x0 #define GC_FUSE_PROG_ALERT_RSP_CFG_OFFSET 0x360 #define GC_FUSE_PROG_ALERT_RSP_CFG_DEFAULT 0x0 #define GC_FUSE_PROG_BNK3_INTG_CHKSUM_OFFSET 0x364 #define GC_FUSE_PROG_BNK3_INTG_CHKSUM_DEFAULT 0x0 #define GC_FUSE_PROG_BNK3_INTG_LOCK_OFFSET 0x368 #define GC_FUSE_PROG_BNK3_INTG_LOCK_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_OFFSET 0x36c #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_BROM_ERR_RESPONSE_OFFSET 0x370 #define GC_FUSE_PROG_FW_DEFINED_BROM_ERR_RESPONSE_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_BROM_APPLYSEC_OFFSET 0x374 #define GC_FUSE_PROG_FW_DEFINED_BROM_APPLYSEC_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_BROM_CONFIG0_OFFSET 0x378 #define GC_FUSE_PROG_FW_DEFINED_BROM_CONFIG0_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_BROM_CONFIG1_OFFSET 0x37c #define GC_FUSE_PROG_FW_DEFINED_BROM_CONFIG1_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_OFFSET 0x380 #define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_OFFSET 0x384 #define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_OFFSET 0x388 #define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_OFFSET 0x38c #define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_OFFSET 0x390 #define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_OFFSET 0x394 #define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_OFFSET 0x398 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_OFFSET 0x39c #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_OFFSET 0x3a0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_OFFSET 0x3a4 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_OFFSET 0x3a8 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_OFFSET 0x3ac #define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_OFFSET 0x3b0 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_OFFSET 0x3b4 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_OFFSET 0x3b8 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_OFFSET 0x3bc #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_OFFSET 0x3c0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_OFFSET 0x3c4 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_OFFSET 0x3c8 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_OFFSET 0x3cc #define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_PWRB_IN_OFFSET 0x3d0 #define GC_FUSE_PROG_RBOX_POL_PWRB_IN_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_OFFSET 0x3d4 #define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY0_IN_OFFSET 0x3d8 #define GC_FUSE_PROG_RBOX_POL_KEY0_IN_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_OFFSET 0x3dc #define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY1_IN_OFFSET 0x3e0 #define GC_FUSE_PROG_RBOX_POL_KEY1_IN_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_OFFSET 0x3e4 #define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_EC_RST_OFFSET 0x3e8 #define GC_FUSE_PROG_RBOX_POL_EC_RST_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_OFFSET 0x3ec #define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_OFFSET 0x3f0 #define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_OFFSET 0x3f4 #define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_OFFSET 0x3f8 #define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_OFFSET 0x3fc #define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_OFFSET 0x400 #define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_OFFSET 0x404 #define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_OFFSET 0x408 #define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_OFFSET 0x40c #define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_OFFSET 0x410 #define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_OFFSET 0x414 #define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_OFFSET 0x418 #define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_OFFSET 0x41c #define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_OFFSET 0x420 #define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_DEFAULT 0x0 #define GC_FUSE_PROG_BNK4_INTG_CHKSUM_OFFSET 0x424 #define GC_FUSE_PROG_BNK4_INTG_CHKSUM_DEFAULT 0x0 #define GC_FUSE_PROG_BNK4_INTG_LOCK_OFFSET 0x428 #define GC_FUSE_PROG_BNK4_INTG_LOCK_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_OFFSET 0x42c #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_OFFSET 0x430 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_OFFSET 0x434 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_OFFSET 0x438 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_OFFSET 0x43c #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_OFFSET 0x440 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_OFFSET 0x444 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_OFFSET 0x0 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_DEFAULT 0x7 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_OFFSET 0x4 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_DEFAULT 0x7 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_OFFSET 0x8 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_DEFAULT 0x7 #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_OFFSET 0xc #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_DEFAULT 0x7 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_OFFSET 0x10 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_DEFAULT 0x7 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_OFFSET 0x14 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_DEFAULT 0x7 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_OFFSET 0x18 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_DEFAULT 0x7 #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_OFFSET 0x1c #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_DEFAULT 0x7 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_CFG_EN_OFFSET 0x20 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_CFG_EN_OFFSET 0x24 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_CFG_EN_OFFSET 0x28 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_CFG_EN_OFFSET 0x2c #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_CFG_EN_OFFSET 0x30 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_CFG_EN_OFFSET 0x34 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_CFG_EN_OFFSET 0x38 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_CFG_EN_OFFSET 0x3c #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_OFFSET 0x40 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_DEFAULT 0x7 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_OFFSET 0x44 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_DEFAULT 0x7 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_OFFSET 0x48 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_DEFAULT 0x7 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_OFFSET 0x4c #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_DEFAULT 0x7 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_CFG_EN_OFFSET 0x50 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_CFG_EN_OFFSET 0x54 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_CFG_EN_OFFSET 0x58 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_CFG_EN_OFFSET 0x5c #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_OFFSET 0x60 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_OFFSET 0x64 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_OFFSET 0x68 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_OFFSET 0x6c #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_OFFSET 0x70 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_OFFSET 0x74 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_OFFSET 0x78 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_OFFSET 0x7c #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_OFFSET 0x80 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_OFFSET 0x84 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_OFFSET 0x88 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_OFFSET 0x8c #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_CFG_EN_OFFSET 0x90 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_CFG_EN_OFFSET 0x94 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_CFG_EN_OFFSET 0x98 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_CFG_EN_OFFSET 0x9c #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_OFFSET 0xa0 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_OFFSET 0xa4 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_OFFSET 0xa8 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_OFFSET 0xac #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_CFG_EN_OFFSET 0xb0 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_CFG_EN_OFFSET 0xb4 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_CFG_EN_OFFSET 0xb8 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_CFG_EN_OFFSET 0xbc #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_OFFSET 0xc0 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_OFFSET 0xc4 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_OFFSET 0xc8 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_OFFSET 0xcc #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_CFG_EN_OFFSET 0xd0 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_CFG_EN_OFFSET 0xd4 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_CFG_EN_OFFSET 0xd8 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_CFG_EN_OFFSET 0xdc #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_OFFSET 0xe0 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_OFFSET 0xe4 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_OFFSET 0xe8 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION3_CTRL_OFFSET 0xec #define GC_GLOBALSEC_FLASH_REGION3_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_OFFSET 0xf0 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_OFFSET 0xf4 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_OFFSET 0xf8 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION7_CTRL_OFFSET 0xfc #define GC_GLOBALSEC_FLASH_REGION7_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_CFG_EN_OFFSET 0x100 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_CFG_EN_OFFSET 0x104 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_CFG_EN_OFFSET 0x108 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_FLASH_REGION3_CTRL_CFG_EN_OFFSET 0x10c #define GC_GLOBALSEC_FLASH_REGION3_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_CFG_EN_OFFSET 0x110 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_CFG_EN_OFFSET 0x114 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_CFG_EN_OFFSET 0x118 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_FLASH_REGION7_CTRL_CFG_EN_OFFSET 0x11c #define GC_GLOBALSEC_FLASH_REGION7_CTRL_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_FLASH0_BULKERASE_CFG_EN_OFFSET 0x120 #define GC_GLOBALSEC_FLASH0_BULKERASE_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_FLASH0_BULKERASE_CTRL_OFFSET 0x124 #define GC_GLOBALSEC_FLASH0_BULKERASE_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH1_BULKERASE_CFG_EN_OFFSET 0x128 #define GC_GLOBALSEC_FLASH1_BULKERASE_CFG_EN_DEFAULT 0x1 #define GC_GLOBALSEC_FLASH1_BULKERASE_CTRL_OFFSET 0x12c #define GC_GLOBALSEC_FLASH1_BULKERASE_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_REGION0_BASE_ADDR_OFFSET 0x130 #define GC_GLOBALSEC_CPU0_D_REGION0_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_REGION0_SIZE_OFFSET 0x134 #define GC_GLOBALSEC_CPU0_D_REGION0_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_D_REGION1_BASE_ADDR_OFFSET 0x138 #define GC_GLOBALSEC_CPU0_D_REGION1_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_REGION1_SIZE_OFFSET 0x13c #define GC_GLOBALSEC_CPU0_D_REGION1_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_D_REGION2_BASE_ADDR_OFFSET 0x140 #define GC_GLOBALSEC_CPU0_D_REGION2_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_REGION2_SIZE_OFFSET 0x144 #define GC_GLOBALSEC_CPU0_D_REGION2_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_D_REGION3_BASE_ADDR_OFFSET 0x148 #define GC_GLOBALSEC_CPU0_D_REGION3_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_REGION3_SIZE_OFFSET 0x14c #define GC_GLOBALSEC_CPU0_D_REGION3_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_D_REGION4_BASE_ADDR_OFFSET 0x150 #define GC_GLOBALSEC_CPU0_D_REGION4_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_REGION4_SIZE_OFFSET 0x154 #define GC_GLOBALSEC_CPU0_D_REGION4_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_D_REGION5_BASE_ADDR_OFFSET 0x158 #define GC_GLOBALSEC_CPU0_D_REGION5_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_REGION5_SIZE_OFFSET 0x15c #define GC_GLOBALSEC_CPU0_D_REGION5_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_D_REGION6_BASE_ADDR_OFFSET 0x160 #define GC_GLOBALSEC_CPU0_D_REGION6_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_REGION6_SIZE_OFFSET 0x164 #define GC_GLOBALSEC_CPU0_D_REGION6_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_D_REGION7_BASE_ADDR_OFFSET 0x168 #define GC_GLOBALSEC_CPU0_D_REGION7_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_REGION7_SIZE_OFFSET 0x16c #define GC_GLOBALSEC_CPU0_D_REGION7_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_BASE_ADDR_OFFSET 0x170 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_SIZE_OFFSET 0x174 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_BASE_ADDR_OFFSET 0x178 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_SIZE_OFFSET 0x17c #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_BASE_ADDR_OFFSET 0x180 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_SIZE_OFFSET 0x184 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_BASE_ADDR_OFFSET 0x188 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_SIZE_OFFSET 0x18c #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_I_REGION0_BASE_ADDR_OFFSET 0x190 #define GC_GLOBALSEC_CPU0_I_REGION0_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION0_SIZE_OFFSET 0x194 #define GC_GLOBALSEC_CPU0_I_REGION0_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_I_REGION1_BASE_ADDR_OFFSET 0x198 #define GC_GLOBALSEC_CPU0_I_REGION1_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION1_SIZE_OFFSET 0x19c #define GC_GLOBALSEC_CPU0_I_REGION1_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_I_REGION2_BASE_ADDR_OFFSET 0x1a0 #define GC_GLOBALSEC_CPU0_I_REGION2_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION2_SIZE_OFFSET 0x1a4 #define GC_GLOBALSEC_CPU0_I_REGION2_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_I_REGION3_BASE_ADDR_OFFSET 0x1a8 #define GC_GLOBALSEC_CPU0_I_REGION3_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION3_SIZE_OFFSET 0x1ac #define GC_GLOBALSEC_CPU0_I_REGION3_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_I_REGION4_BASE_ADDR_OFFSET 0x1b0 #define GC_GLOBALSEC_CPU0_I_REGION4_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION4_SIZE_OFFSET 0x1b4 #define GC_GLOBALSEC_CPU0_I_REGION4_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_I_REGION5_BASE_ADDR_OFFSET 0x1b8 #define GC_GLOBALSEC_CPU0_I_REGION5_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION5_SIZE_OFFSET 0x1bc #define GC_GLOBALSEC_CPU0_I_REGION5_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_I_REGION6_BASE_ADDR_OFFSET 0x1c0 #define GC_GLOBALSEC_CPU0_I_REGION6_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION6_SIZE_OFFSET 0x1c4 #define GC_GLOBALSEC_CPU0_I_REGION6_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_CPU0_I_REGION7_BASE_ADDR_OFFSET 0x1c8 #define GC_GLOBALSEC_CPU0_I_REGION7_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION7_SIZE_OFFSET 0x1cc #define GC_GLOBALSEC_CPU0_I_REGION7_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_DDMA0_REGION0_BASE_ADDR_OFFSET 0x1d0 #define GC_GLOBALSEC_DDMA0_REGION0_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION0_SIZE_OFFSET 0x1d4 #define GC_GLOBALSEC_DDMA0_REGION0_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_DDMA0_REGION1_BASE_ADDR_OFFSET 0x1d8 #define GC_GLOBALSEC_DDMA0_REGION1_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION1_SIZE_OFFSET 0x1dc #define GC_GLOBALSEC_DDMA0_REGION1_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_DDMA0_REGION2_BASE_ADDR_OFFSET 0x1e0 #define GC_GLOBALSEC_DDMA0_REGION2_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION2_SIZE_OFFSET 0x1e4 #define GC_GLOBALSEC_DDMA0_REGION2_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_DDMA0_REGION3_BASE_ADDR_OFFSET 0x1e8 #define GC_GLOBALSEC_DDMA0_REGION3_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION3_SIZE_OFFSET 0x1ec #define GC_GLOBALSEC_DDMA0_REGION3_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_DSPS0_REGION0_BASE_ADDR_OFFSET 0x1f0 #define GC_GLOBALSEC_DSPS0_REGION0_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION0_SIZE_OFFSET 0x1f4 #define GC_GLOBALSEC_DSPS0_REGION0_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_DSPS0_REGION1_BASE_ADDR_OFFSET 0x1f8 #define GC_GLOBALSEC_DSPS0_REGION1_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION1_SIZE_OFFSET 0x1fc #define GC_GLOBALSEC_DSPS0_REGION1_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_DSPS0_REGION2_BASE_ADDR_OFFSET 0x200 #define GC_GLOBALSEC_DSPS0_REGION2_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION2_SIZE_OFFSET 0x204 #define GC_GLOBALSEC_DSPS0_REGION2_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_DSPS0_REGION3_BASE_ADDR_OFFSET 0x208 #define GC_GLOBALSEC_DSPS0_REGION3_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION3_SIZE_OFFSET 0x20c #define GC_GLOBALSEC_DSPS0_REGION3_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_DUSB0_REGION0_BASE_ADDR_OFFSET 0x210 #define GC_GLOBALSEC_DUSB0_REGION0_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION0_SIZE_OFFSET 0x214 #define GC_GLOBALSEC_DUSB0_REGION0_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_DUSB0_REGION1_BASE_ADDR_OFFSET 0x218 #define GC_GLOBALSEC_DUSB0_REGION1_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION1_SIZE_OFFSET 0x21c #define GC_GLOBALSEC_DUSB0_REGION1_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_DUSB0_REGION2_BASE_ADDR_OFFSET 0x220 #define GC_GLOBALSEC_DUSB0_REGION2_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION2_SIZE_OFFSET 0x224 #define GC_GLOBALSEC_DUSB0_REGION2_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_DUSB0_REGION3_BASE_ADDR_OFFSET 0x228 #define GC_GLOBALSEC_DUSB0_REGION3_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION3_SIZE_OFFSET 0x22c #define GC_GLOBALSEC_DUSB0_REGION3_SIZE_DEFAULT 0xffffffff #define GC_GLOBALSEC_FLASH_REGION0_BASE_ADDR_OFFSET 0x230 #define GC_GLOBALSEC_FLASH_REGION0_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION0_SIZE_OFFSET 0x234 #define GC_GLOBALSEC_FLASH_REGION0_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION1_BASE_ADDR_OFFSET 0x238 #define GC_GLOBALSEC_FLASH_REGION1_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION1_SIZE_OFFSET 0x23c #define GC_GLOBALSEC_FLASH_REGION1_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION2_BASE_ADDR_OFFSET 0x240 #define GC_GLOBALSEC_FLASH_REGION2_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION2_SIZE_OFFSET 0x244 #define GC_GLOBALSEC_FLASH_REGION2_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION3_BASE_ADDR_OFFSET 0x248 #define GC_GLOBALSEC_FLASH_REGION3_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION3_SIZE_OFFSET 0x24c #define GC_GLOBALSEC_FLASH_REGION3_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION4_BASE_ADDR_OFFSET 0x250 #define GC_GLOBALSEC_FLASH_REGION4_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION4_SIZE_OFFSET 0x254 #define GC_GLOBALSEC_FLASH_REGION4_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION5_BASE_ADDR_OFFSET 0x258 #define GC_GLOBALSEC_FLASH_REGION5_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION5_SIZE_OFFSET 0x25c #define GC_GLOBALSEC_FLASH_REGION5_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION6_BASE_ADDR_OFFSET 0x260 #define GC_GLOBALSEC_FLASH_REGION6_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION6_SIZE_OFFSET 0x264 #define GC_GLOBALSEC_FLASH_REGION6_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION7_BASE_ADDR_OFFSET 0x268 #define GC_GLOBALSEC_FLASH_REGION7_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION7_SIZE_OFFSET 0x26c #define GC_GLOBALSEC_FLASH_REGION7_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_OFFSET 0x270 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_BASE_ADDR_OFFSET 0x274 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_SIZE_OFFSET 0x278 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_OFFSET 0x27c #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_BASE_ADDR_OFFSET 0x280 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_SIZE_OFFSET 0x284 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_OFFSET 0x288 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_BASE_ADDR_OFFSET 0x28c #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_SIZE_OFFSET 0x290 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_OFFSET 0x294 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_BASE_ADDR_OFFSET 0x298 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_SIZE_OFFSET 0x29c #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_OFFSET 0x2a0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_BASE_ADDR_OFFSET 0x2a4 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_SIZE_OFFSET 0x2a8 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_OFFSET 0x2ac #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_BASE_ADDR_OFFSET 0x2b0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_SIZE_OFFSET 0x2b4 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_OFFSET 0x2b8 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_BASE_ADDR_OFFSET 0x2bc #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_SIZE_OFFSET 0x2c0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_OFFSET 0x2c4 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_BASE_ADDR_OFFSET 0x2c8 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_BASE_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_SIZE_OFFSET 0x2cc #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_SIZE_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_S_PERMISSION_OFFSET 0x2d0 #define GC_GLOBALSEC_CPU0_S_PERMISSION_DEFAULT 0x55 #define GC_GLOBALSEC_CPU0_S_DAP_PERMISSION_OFFSET 0x2d4 #define GC_GLOBALSEC_CPU0_S_DAP_PERMISSION_DEFAULT 0x55 #define GC_GLOBALSEC_DDMA0_PERMISSION_OFFSET 0x2d8 #define GC_GLOBALSEC_DDMA0_PERMISSION_DEFAULT 0x55 #define GC_GLOBALSEC_SOFTWARE_LVL_OFFSET 0x2dc #define GC_GLOBALSEC_SOFTWARE_LVL_DEFAULT 0x55 #define GC_GLOBALSEC_SB_COMP_STATUS_OFFSET 0x1000 #define GC_GLOBALSEC_SB_COMP_STATUS_DEFAULT 0x0 #define GC_GLOBALSEC_SB_BL_SIG0_OFFSET 0x1004 #define GC_GLOBALSEC_SB_BL_SIG0_DEFAULT 0xfacecafe #define GC_GLOBALSEC_SB_BL_SIG1_OFFSET 0x1008 #define GC_GLOBALSEC_SB_BL_SIG1_DEFAULT 0xfacecafe #define GC_GLOBALSEC_SB_BL_SIG2_OFFSET 0x100c #define GC_GLOBALSEC_SB_BL_SIG2_DEFAULT 0xfacecafe #define GC_GLOBALSEC_SB_BL_SIG3_OFFSET 0x1010 #define GC_GLOBALSEC_SB_BL_SIG3_DEFAULT 0xfacecafe #define GC_GLOBALSEC_SB_BL_SIG4_OFFSET 0x1014 #define GC_GLOBALSEC_SB_BL_SIG4_DEFAULT 0xfacecafe #define GC_GLOBALSEC_SB_BL_SIG5_OFFSET 0x1018 #define GC_GLOBALSEC_SB_BL_SIG5_DEFAULT 0xfacecafe #define GC_GLOBALSEC_SB_BL_SIG6_OFFSET 0x101c #define GC_GLOBALSEC_SB_BL_SIG6_DEFAULT 0xfacecafe #define GC_GLOBALSEC_SB_BL_SIG7_OFFSET 0x1020 #define GC_GLOBALSEC_SB_BL_SIG7_DEFAULT 0xfacecafe #define GC_GLOBALSEC_SIG_UNLOCK_OFFSET 0x1024 #define GC_GLOBALSEC_SIG_UNLOCK_DEFAULT 0x0 #define GC_GLOBALSEC_INT_ERR_FLAGS_OFFSET 0x1028 #define GC_GLOBALSEC_INT_ERR_FLAGS_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CFG_LOCK_OFFSET 0x102c #define GC_GLOBALSEC_ALERT_CFG_LOCK_DEFAULT 0x1 #define GC_GLOBALSEC_ALERT_FW_TRIGGER_OFFSET 0x4000 #define GC_GLOBALSEC_ALERT_FW_TRIGGER_DEFAULT 0xaa #define GC_GLOBALSEC_ALERT_INTR_STS0_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS1_OFFSET 0x4008 #define GC_GLOBALSEC_ALERT_INTR_STS1_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN1_OFFSET 0x4010 #define GC_GLOBALSEC_ALERT_NMI_EN1_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_OFFSET 0x4018 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_OFFSET 0x4020 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_OFFSET 0x4028 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_OFFSET 0x4030 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_OFFSET 0x4038 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_OFFSET 0x4040 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_CTR_OFFSET 0x4044 #define GC_GLOBALSEC_ALERT_GROUPA_CTR_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_CTR_OFFSET 0x4048 #define GC_GLOBALSEC_ALERT_GROUPB_CTR_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_CTR_OFFSET 0x404c #define GC_GLOBALSEC_ALERT_GROUPC_CTR_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_THRESHOLD_OFFSET 0x4050 #define GC_GLOBALSEC_ALERT_GROUPA_THRESHOLD_DEFAULT 0x64 #define GC_GLOBALSEC_ALERT_GROUPB_THRESHOLD_OFFSET 0x4054 #define GC_GLOBALSEC_ALERT_GROUPB_THRESHOLD_DEFAULT 0x64 #define GC_GLOBALSEC_ALERT_GROUPC_THRESHOLD_OFFSET 0x4058 #define GC_GLOBALSEC_ALERT_GROUPC_THRESHOLD_DEFAULT 0x64 #define GC_GLOBALSEC_ALERT_CONTROL_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_OFFSET 0x4060 #define GC_GLOBALSEC_ALERT_DLYCTR0_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_OFFSET 0x4064 #define GC_GLOBALSEC_ALERT_DLYCTR1_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_OFFSET 0x4068 #define GC_GLOBALSEC_ALERT_DLYCTR2_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_LEN_OFFSET 0x406c #define GC_GLOBALSEC_ALERT_DLYCTR0_LEN_DEFAULT 0xffff #define GC_GLOBALSEC_ALERT_DLYCTR1_LEN_OFFSET 0x4070 #define GC_GLOBALSEC_ALERT_DLYCTR1_LEN_DEFAULT 0xffff #define GC_GLOBALSEC_ALERT_DLYCTR2_LEN_OFFSET 0x4074 #define GC_GLOBALSEC_ALERT_DLYCTR2_LEN_DEFAULT 0xffff #define GC_GLOBALSEC_ALERT_DLYCTR0_SHUTDOWN_EN_OFFSET 0x4078 #define GC_GLOBALSEC_ALERT_DLYCTR0_SHUTDOWN_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_SHUTDOWN_EN_OFFSET 0x407c #define GC_GLOBALSEC_ALERT_DLYCTR1_SHUTDOWN_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_SHUTDOWN_EN_OFFSET 0x4080 #define GC_GLOBALSEC_ALERT_DLYCTR2_SHUTDOWN_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_CLEAR_OFFSET 0x4084 #define GC_GLOBALSEC_ALERT_DLYCTR0_CLEAR_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_CLEAR_OFFSET 0x4088 #define GC_GLOBALSEC_ALERT_DLYCTR1_CLEAR_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_CLEAR_OFFSET 0x408c #define GC_GLOBALSEC_ALERT_DLYCTR2_CLEAR_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_ERROR_HISTORY_OFFSET 0x4090 #define GC_GLOBALSEC_CPU0_D_ERROR_HISTORY_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_D_ERROR_HISTORY_EMPTY_OFFSET 0x4094 #define GC_GLOBALSEC_CPU0_D_ERROR_HISTORY_EMPTY_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_ERROR_HISTORY_OFFSET 0x4098 #define GC_GLOBALSEC_CPU0_I_ERROR_HISTORY_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_ERROR_HISTORY_EMPTY_OFFSET 0x409c #define GC_GLOBALSEC_CPU0_I_ERROR_HISTORY_EMPTY_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_S_ERROR_HISTORY_OFFSET 0x40a0 #define GC_GLOBALSEC_CPU0_S_ERROR_HISTORY_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_S_ERROR_HISTORY_EMPTY_OFFSET 0x40a4 #define GC_GLOBALSEC_CPU0_S_ERROR_HISTORY_EMPTY_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_ERROR_HISTORY_OFFSET 0x40a8 #define GC_GLOBALSEC_DSPS0_ERROR_HISTORY_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_ERROR_HISTORY_EMPTY_OFFSET 0x40ac #define GC_GLOBALSEC_DSPS0_ERROR_HISTORY_EMPTY_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_ERROR_HISTORY_OFFSET 0x40b0 #define GC_GLOBALSEC_DUSB0_ERROR_HISTORY_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_ERROR_HISTORY_EMPTY_OFFSET 0x40b4 #define GC_GLOBALSEC_DUSB0_ERROR_HISTORY_EMPTY_DEFAULT 0x0 #define GC_GLOBALSEC_OBFS_SW_EN_OFFSET 0x40b8 #define GC_GLOBALSEC_OBFS_SW_EN_DEFAULT 0x0 #define GC_GLOBALSEC_TRANSMISSION_PARITY_EN_OFFSET 0x40bc #define GC_GLOBALSEC_TRANSMISSION_PARITY_EN_DEFAULT 0x0 #define GC_GLOBALSEC_SRAM_PARITY_CHECK_ENABLE_OFFSET 0x40c0 #define GC_GLOBALSEC_SRAM_PARITY_CHECK_ENABLE_DEFAULT 0x0 #define GC_GLOBALSEC_SRAM_PARITY_SCRUB_FREQ_OFFSET 0x40c4 #define GC_GLOBALSEC_SRAM_PARITY_SCRUB_FREQ_DEFAULT 0x0 #define GC_GLOBALSEC_SRAM_PARITY_SCRUB_ERROR_COUNT_OFFSET 0x40c8 #define GC_GLOBALSEC_SRAM_PARITY_SCRUB_ERROR_COUNT_DEFAULT 0x0 #define GC_GLOBALSEC_SRAM_PARITY_SCRUB_ERROR_ADDR_OFFSET 0x40cc #define GC_GLOBALSEC_SRAM_PARITY_SCRUB_ERROR_ADDR_DEFAULT 0x0 #define GC_GLOBALSEC_HIDE_ROM_OFFSET 0x40d0 #define GC_GLOBALSEC_HIDE_ROM_DEFAULT 0x0 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_OFFSET 0x40d4 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_DEFAULT 0x2f #define GC_GLOBALSEC_ANTEST_SEN_LSR_OUTPUT_OFFSET 0x40d8 #define GC_GLOBALSEC_ANTEST_SEN_LSR_OUTPUT_DEFAULT 0x0 #define GC_GLOBALSEC_VERSION_OFFSET 0x40dc #define GC_GLOBALSEC_VERSION_DEFAULT 0x59010913 #define GC_GPIO_DATAIN_OFFSET 0x0 #define GC_GPIO_DATAIN_DEFAULT 0x0 #define GC_GPIO_DOUT_OFFSET 0x4 #define GC_GPIO_DOUT_DEFAULT 0x0 #define GC_GPIO_SETDOUTEN_OFFSET 0x10 #define GC_GPIO_SETDOUTEN_DEFAULT 0x0 #define GC_GPIO_CLRDOUTEN_OFFSET 0x14 #define GC_GPIO_CLRDOUTEN_DEFAULT 0x0 #define GC_GPIO_RESERVED0_OFFSET 0x18 #define GC_GPIO_RESERVED0_DEFAULT 0x0 #define GC_GPIO_RESERVED1_OFFSET 0x1c #define GC_GPIO_RESERVED1_DEFAULT 0x0 #define GC_GPIO_SETINTEN_OFFSET 0x20 #define GC_GPIO_SETINTEN_DEFAULT 0x0 #define GC_GPIO_CLRINTEN_OFFSET 0x24 #define GC_GPIO_CLRINTEN_DEFAULT 0x0 #define GC_GPIO_SETINTTYPE_OFFSET 0x28 #define GC_GPIO_SETINTTYPE_DEFAULT 0x0 #define GC_GPIO_CLRINTTYPE_OFFSET 0x2c #define GC_GPIO_CLRINTTYPE_DEFAULT 0x0 #define GC_GPIO_SETINTPOL_OFFSET 0x30 #define GC_GPIO_SETINTPOL_DEFAULT 0x0 #define GC_GPIO_CLRINTPOL_OFFSET 0x34 #define GC_GPIO_CLRINTPOL_DEFAULT 0x0 #define GC_GPIO_CLRINTSTAT_OFFSET 0x38 #define GC_GPIO_CLRINTSTAT_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_400_OFFSET 0x400 #define GC_GPIO_MASKLOWBYTE_400_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_404_OFFSET 0x404 #define GC_GPIO_MASKLOWBYTE_404_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_408_OFFSET 0x408 #define GC_GPIO_MASKLOWBYTE_408_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_40C_OFFSET 0x40c #define GC_GPIO_MASKLOWBYTE_40C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_410_OFFSET 0x410 #define GC_GPIO_MASKLOWBYTE_410_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_414_OFFSET 0x414 #define GC_GPIO_MASKLOWBYTE_414_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_418_OFFSET 0x418 #define GC_GPIO_MASKLOWBYTE_418_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_41C_OFFSET 0x41c #define GC_GPIO_MASKLOWBYTE_41C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_420_OFFSET 0x420 #define GC_GPIO_MASKLOWBYTE_420_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_424_OFFSET 0x424 #define GC_GPIO_MASKLOWBYTE_424_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_428_OFFSET 0x428 #define GC_GPIO_MASKLOWBYTE_428_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_42C_OFFSET 0x42c #define GC_GPIO_MASKLOWBYTE_42C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_430_OFFSET 0x430 #define GC_GPIO_MASKLOWBYTE_430_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_434_OFFSET 0x434 #define GC_GPIO_MASKLOWBYTE_434_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_438_OFFSET 0x438 #define GC_GPIO_MASKLOWBYTE_438_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_43C_OFFSET 0x43c #define GC_GPIO_MASKLOWBYTE_43C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_440_OFFSET 0x440 #define GC_GPIO_MASKLOWBYTE_440_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_444_OFFSET 0x444 #define GC_GPIO_MASKLOWBYTE_444_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_448_OFFSET 0x448 #define GC_GPIO_MASKLOWBYTE_448_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_44C_OFFSET 0x44c #define GC_GPIO_MASKLOWBYTE_44C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_450_OFFSET 0x450 #define GC_GPIO_MASKLOWBYTE_450_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_454_OFFSET 0x454 #define GC_GPIO_MASKLOWBYTE_454_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_458_OFFSET 0x458 #define GC_GPIO_MASKLOWBYTE_458_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_45C_OFFSET 0x45c #define GC_GPIO_MASKLOWBYTE_45C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_460_OFFSET 0x460 #define GC_GPIO_MASKLOWBYTE_460_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_464_OFFSET 0x464 #define GC_GPIO_MASKLOWBYTE_464_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_468_OFFSET 0x468 #define GC_GPIO_MASKLOWBYTE_468_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_46C_OFFSET 0x46c #define GC_GPIO_MASKLOWBYTE_46C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_470_OFFSET 0x470 #define GC_GPIO_MASKLOWBYTE_470_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_474_OFFSET 0x474 #define GC_GPIO_MASKLOWBYTE_474_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_478_OFFSET 0x478 #define GC_GPIO_MASKLOWBYTE_478_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_47C_OFFSET 0x47c #define GC_GPIO_MASKLOWBYTE_47C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_480_OFFSET 0x480 #define GC_GPIO_MASKLOWBYTE_480_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_484_OFFSET 0x484 #define GC_GPIO_MASKLOWBYTE_484_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_488_OFFSET 0x488 #define GC_GPIO_MASKLOWBYTE_488_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_48C_OFFSET 0x48c #define GC_GPIO_MASKLOWBYTE_48C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_490_OFFSET 0x490 #define GC_GPIO_MASKLOWBYTE_490_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_494_OFFSET 0x494 #define GC_GPIO_MASKLOWBYTE_494_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_498_OFFSET 0x498 #define GC_GPIO_MASKLOWBYTE_498_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_49C_OFFSET 0x49c #define GC_GPIO_MASKLOWBYTE_49C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4A0_OFFSET 0x4a0 #define GC_GPIO_MASKLOWBYTE_4A0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4A4_OFFSET 0x4a4 #define GC_GPIO_MASKLOWBYTE_4A4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4A8_OFFSET 0x4a8 #define GC_GPIO_MASKLOWBYTE_4A8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4AC_OFFSET 0x4ac #define GC_GPIO_MASKLOWBYTE_4AC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4B0_OFFSET 0x4b0 #define GC_GPIO_MASKLOWBYTE_4B0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4B4_OFFSET 0x4b4 #define GC_GPIO_MASKLOWBYTE_4B4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4B8_OFFSET 0x4b8 #define GC_GPIO_MASKLOWBYTE_4B8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4BC_OFFSET 0x4bc #define GC_GPIO_MASKLOWBYTE_4BC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4C0_OFFSET 0x4c0 #define GC_GPIO_MASKLOWBYTE_4C0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4C4_OFFSET 0x4c4 #define GC_GPIO_MASKLOWBYTE_4C4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4C8_OFFSET 0x4c8 #define GC_GPIO_MASKLOWBYTE_4C8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4CC_OFFSET 0x4cc #define GC_GPIO_MASKLOWBYTE_4CC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4D0_OFFSET 0x4d0 #define GC_GPIO_MASKLOWBYTE_4D0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4D4_OFFSET 0x4d4 #define GC_GPIO_MASKLOWBYTE_4D4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4D8_OFFSET 0x4d8 #define GC_GPIO_MASKLOWBYTE_4D8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4DC_OFFSET 0x4dc #define GC_GPIO_MASKLOWBYTE_4DC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4E0_OFFSET 0x4e0 #define GC_GPIO_MASKLOWBYTE_4E0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4E4_OFFSET 0x4e4 #define GC_GPIO_MASKLOWBYTE_4E4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4E8_OFFSET 0x4e8 #define GC_GPIO_MASKLOWBYTE_4E8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4EC_OFFSET 0x4ec #define GC_GPIO_MASKLOWBYTE_4EC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4F0_OFFSET 0x4f0 #define GC_GPIO_MASKLOWBYTE_4F0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4F4_OFFSET 0x4f4 #define GC_GPIO_MASKLOWBYTE_4F4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4F8_OFFSET 0x4f8 #define GC_GPIO_MASKLOWBYTE_4F8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_4FC_OFFSET 0x4fc #define GC_GPIO_MASKLOWBYTE_4FC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_500_OFFSET 0x500 #define GC_GPIO_MASKLOWBYTE_500_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_504_OFFSET 0x504 #define GC_GPIO_MASKLOWBYTE_504_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_508_OFFSET 0x508 #define GC_GPIO_MASKLOWBYTE_508_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_50C_OFFSET 0x50c #define GC_GPIO_MASKLOWBYTE_50C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_510_OFFSET 0x510 #define GC_GPIO_MASKLOWBYTE_510_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_514_OFFSET 0x514 #define GC_GPIO_MASKLOWBYTE_514_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_518_OFFSET 0x518 #define GC_GPIO_MASKLOWBYTE_518_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_51C_OFFSET 0x51c #define GC_GPIO_MASKLOWBYTE_51C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_520_OFFSET 0x520 #define GC_GPIO_MASKLOWBYTE_520_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_524_OFFSET 0x524 #define GC_GPIO_MASKLOWBYTE_524_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_528_OFFSET 0x528 #define GC_GPIO_MASKLOWBYTE_528_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_52C_OFFSET 0x52c #define GC_GPIO_MASKLOWBYTE_52C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_530_OFFSET 0x530 #define GC_GPIO_MASKLOWBYTE_530_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_534_OFFSET 0x534 #define GC_GPIO_MASKLOWBYTE_534_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_538_OFFSET 0x538 #define GC_GPIO_MASKLOWBYTE_538_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_53C_OFFSET 0x53c #define GC_GPIO_MASKLOWBYTE_53C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_540_OFFSET 0x540 #define GC_GPIO_MASKLOWBYTE_540_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_544_OFFSET 0x544 #define GC_GPIO_MASKLOWBYTE_544_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_548_OFFSET 0x548 #define GC_GPIO_MASKLOWBYTE_548_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_54C_OFFSET 0x54c #define GC_GPIO_MASKLOWBYTE_54C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_550_OFFSET 0x550 #define GC_GPIO_MASKLOWBYTE_550_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_554_OFFSET 0x554 #define GC_GPIO_MASKLOWBYTE_554_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_558_OFFSET 0x558 #define GC_GPIO_MASKLOWBYTE_558_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_55C_OFFSET 0x55c #define GC_GPIO_MASKLOWBYTE_55C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_560_OFFSET 0x560 #define GC_GPIO_MASKLOWBYTE_560_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_564_OFFSET 0x564 #define GC_GPIO_MASKLOWBYTE_564_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_568_OFFSET 0x568 #define GC_GPIO_MASKLOWBYTE_568_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_56C_OFFSET 0x56c #define GC_GPIO_MASKLOWBYTE_56C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_570_OFFSET 0x570 #define GC_GPIO_MASKLOWBYTE_570_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_574_OFFSET 0x574 #define GC_GPIO_MASKLOWBYTE_574_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_578_OFFSET 0x578 #define GC_GPIO_MASKLOWBYTE_578_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_57C_OFFSET 0x57c #define GC_GPIO_MASKLOWBYTE_57C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_580_OFFSET 0x580 #define GC_GPIO_MASKLOWBYTE_580_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_584_OFFSET 0x584 #define GC_GPIO_MASKLOWBYTE_584_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_588_OFFSET 0x588 #define GC_GPIO_MASKLOWBYTE_588_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_58C_OFFSET 0x58c #define GC_GPIO_MASKLOWBYTE_58C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_590_OFFSET 0x590 #define GC_GPIO_MASKLOWBYTE_590_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_594_OFFSET 0x594 #define GC_GPIO_MASKLOWBYTE_594_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_598_OFFSET 0x598 #define GC_GPIO_MASKLOWBYTE_598_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_59C_OFFSET 0x59c #define GC_GPIO_MASKLOWBYTE_59C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5A0_OFFSET 0x5a0 #define GC_GPIO_MASKLOWBYTE_5A0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5A4_OFFSET 0x5a4 #define GC_GPIO_MASKLOWBYTE_5A4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5A8_OFFSET 0x5a8 #define GC_GPIO_MASKLOWBYTE_5A8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5AC_OFFSET 0x5ac #define GC_GPIO_MASKLOWBYTE_5AC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5B0_OFFSET 0x5b0 #define GC_GPIO_MASKLOWBYTE_5B0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5B4_OFFSET 0x5b4 #define GC_GPIO_MASKLOWBYTE_5B4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5B8_OFFSET 0x5b8 #define GC_GPIO_MASKLOWBYTE_5B8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5BC_OFFSET 0x5bc #define GC_GPIO_MASKLOWBYTE_5BC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5C0_OFFSET 0x5c0 #define GC_GPIO_MASKLOWBYTE_5C0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5C4_OFFSET 0x5c4 #define GC_GPIO_MASKLOWBYTE_5C4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5C8_OFFSET 0x5c8 #define GC_GPIO_MASKLOWBYTE_5C8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5CC_OFFSET 0x5cc #define GC_GPIO_MASKLOWBYTE_5CC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5D0_OFFSET 0x5d0 #define GC_GPIO_MASKLOWBYTE_5D0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5D4_OFFSET 0x5d4 #define GC_GPIO_MASKLOWBYTE_5D4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5D8_OFFSET 0x5d8 #define GC_GPIO_MASKLOWBYTE_5D8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5DC_OFFSET 0x5dc #define GC_GPIO_MASKLOWBYTE_5DC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5E0_OFFSET 0x5e0 #define GC_GPIO_MASKLOWBYTE_5E0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5E4_OFFSET 0x5e4 #define GC_GPIO_MASKLOWBYTE_5E4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5E8_OFFSET 0x5e8 #define GC_GPIO_MASKLOWBYTE_5E8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5EC_OFFSET 0x5ec #define GC_GPIO_MASKLOWBYTE_5EC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5F0_OFFSET 0x5f0 #define GC_GPIO_MASKLOWBYTE_5F0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5F4_OFFSET 0x5f4 #define GC_GPIO_MASKLOWBYTE_5F4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5F8_OFFSET 0x5f8 #define GC_GPIO_MASKLOWBYTE_5F8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_5FC_OFFSET 0x5fc #define GC_GPIO_MASKLOWBYTE_5FC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_600_OFFSET 0x600 #define GC_GPIO_MASKLOWBYTE_600_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_604_OFFSET 0x604 #define GC_GPIO_MASKLOWBYTE_604_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_608_OFFSET 0x608 #define GC_GPIO_MASKLOWBYTE_608_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_60C_OFFSET 0x60c #define GC_GPIO_MASKLOWBYTE_60C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_610_OFFSET 0x610 #define GC_GPIO_MASKLOWBYTE_610_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_614_OFFSET 0x614 #define GC_GPIO_MASKLOWBYTE_614_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_618_OFFSET 0x618 #define GC_GPIO_MASKLOWBYTE_618_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_61C_OFFSET 0x61c #define GC_GPIO_MASKLOWBYTE_61C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_620_OFFSET 0x620 #define GC_GPIO_MASKLOWBYTE_620_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_624_OFFSET 0x624 #define GC_GPIO_MASKLOWBYTE_624_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_628_OFFSET 0x628 #define GC_GPIO_MASKLOWBYTE_628_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_62C_OFFSET 0x62c #define GC_GPIO_MASKLOWBYTE_62C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_630_OFFSET 0x630 #define GC_GPIO_MASKLOWBYTE_630_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_634_OFFSET 0x634 #define GC_GPIO_MASKLOWBYTE_634_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_638_OFFSET 0x638 #define GC_GPIO_MASKLOWBYTE_638_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_63C_OFFSET 0x63c #define GC_GPIO_MASKLOWBYTE_63C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_640_OFFSET 0x640 #define GC_GPIO_MASKLOWBYTE_640_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_644_OFFSET 0x644 #define GC_GPIO_MASKLOWBYTE_644_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_648_OFFSET 0x648 #define GC_GPIO_MASKLOWBYTE_648_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_64C_OFFSET 0x64c #define GC_GPIO_MASKLOWBYTE_64C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_650_OFFSET 0x650 #define GC_GPIO_MASKLOWBYTE_650_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_654_OFFSET 0x654 #define GC_GPIO_MASKLOWBYTE_654_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_658_OFFSET 0x658 #define GC_GPIO_MASKLOWBYTE_658_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_65C_OFFSET 0x65c #define GC_GPIO_MASKLOWBYTE_65C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_660_OFFSET 0x660 #define GC_GPIO_MASKLOWBYTE_660_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_664_OFFSET 0x664 #define GC_GPIO_MASKLOWBYTE_664_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_668_OFFSET 0x668 #define GC_GPIO_MASKLOWBYTE_668_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_66C_OFFSET 0x66c #define GC_GPIO_MASKLOWBYTE_66C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_670_OFFSET 0x670 #define GC_GPIO_MASKLOWBYTE_670_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_674_OFFSET 0x674 #define GC_GPIO_MASKLOWBYTE_674_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_678_OFFSET 0x678 #define GC_GPIO_MASKLOWBYTE_678_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_67C_OFFSET 0x67c #define GC_GPIO_MASKLOWBYTE_67C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_680_OFFSET 0x680 #define GC_GPIO_MASKLOWBYTE_680_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_684_OFFSET 0x684 #define GC_GPIO_MASKLOWBYTE_684_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_688_OFFSET 0x688 #define GC_GPIO_MASKLOWBYTE_688_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_68C_OFFSET 0x68c #define GC_GPIO_MASKLOWBYTE_68C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_690_OFFSET 0x690 #define GC_GPIO_MASKLOWBYTE_690_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_694_OFFSET 0x694 #define GC_GPIO_MASKLOWBYTE_694_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_698_OFFSET 0x698 #define GC_GPIO_MASKLOWBYTE_698_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_69C_OFFSET 0x69c #define GC_GPIO_MASKLOWBYTE_69C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6A0_OFFSET 0x6a0 #define GC_GPIO_MASKLOWBYTE_6A0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6A4_OFFSET 0x6a4 #define GC_GPIO_MASKLOWBYTE_6A4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6A8_OFFSET 0x6a8 #define GC_GPIO_MASKLOWBYTE_6A8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6AC_OFFSET 0x6ac #define GC_GPIO_MASKLOWBYTE_6AC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6B0_OFFSET 0x6b0 #define GC_GPIO_MASKLOWBYTE_6B0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6B4_OFFSET 0x6b4 #define GC_GPIO_MASKLOWBYTE_6B4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6B8_OFFSET 0x6b8 #define GC_GPIO_MASKLOWBYTE_6B8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6BC_OFFSET 0x6bc #define GC_GPIO_MASKLOWBYTE_6BC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6C0_OFFSET 0x6c0 #define GC_GPIO_MASKLOWBYTE_6C0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6C4_OFFSET 0x6c4 #define GC_GPIO_MASKLOWBYTE_6C4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6C8_OFFSET 0x6c8 #define GC_GPIO_MASKLOWBYTE_6C8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6CC_OFFSET 0x6cc #define GC_GPIO_MASKLOWBYTE_6CC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6D0_OFFSET 0x6d0 #define GC_GPIO_MASKLOWBYTE_6D0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6D4_OFFSET 0x6d4 #define GC_GPIO_MASKLOWBYTE_6D4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6D8_OFFSET 0x6d8 #define GC_GPIO_MASKLOWBYTE_6D8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6DC_OFFSET 0x6dc #define GC_GPIO_MASKLOWBYTE_6DC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6E0_OFFSET 0x6e0 #define GC_GPIO_MASKLOWBYTE_6E0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6E4_OFFSET 0x6e4 #define GC_GPIO_MASKLOWBYTE_6E4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6E8_OFFSET 0x6e8 #define GC_GPIO_MASKLOWBYTE_6E8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6EC_OFFSET 0x6ec #define GC_GPIO_MASKLOWBYTE_6EC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6F0_OFFSET 0x6f0 #define GC_GPIO_MASKLOWBYTE_6F0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6F4_OFFSET 0x6f4 #define GC_GPIO_MASKLOWBYTE_6F4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6F8_OFFSET 0x6f8 #define GC_GPIO_MASKLOWBYTE_6F8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_6FC_OFFSET 0x6fc #define GC_GPIO_MASKLOWBYTE_6FC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_700_OFFSET 0x700 #define GC_GPIO_MASKLOWBYTE_700_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_704_OFFSET 0x704 #define GC_GPIO_MASKLOWBYTE_704_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_708_OFFSET 0x708 #define GC_GPIO_MASKLOWBYTE_708_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_70C_OFFSET 0x70c #define GC_GPIO_MASKLOWBYTE_70C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_710_OFFSET 0x710 #define GC_GPIO_MASKLOWBYTE_710_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_714_OFFSET 0x714 #define GC_GPIO_MASKLOWBYTE_714_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_718_OFFSET 0x718 #define GC_GPIO_MASKLOWBYTE_718_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_71C_OFFSET 0x71c #define GC_GPIO_MASKLOWBYTE_71C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_720_OFFSET 0x720 #define GC_GPIO_MASKLOWBYTE_720_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_724_OFFSET 0x724 #define GC_GPIO_MASKLOWBYTE_724_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_728_OFFSET 0x728 #define GC_GPIO_MASKLOWBYTE_728_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_72C_OFFSET 0x72c #define GC_GPIO_MASKLOWBYTE_72C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_730_OFFSET 0x730 #define GC_GPIO_MASKLOWBYTE_730_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_734_OFFSET 0x734 #define GC_GPIO_MASKLOWBYTE_734_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_738_OFFSET 0x738 #define GC_GPIO_MASKLOWBYTE_738_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_73C_OFFSET 0x73c #define GC_GPIO_MASKLOWBYTE_73C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_740_OFFSET 0x740 #define GC_GPIO_MASKLOWBYTE_740_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_744_OFFSET 0x744 #define GC_GPIO_MASKLOWBYTE_744_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_748_OFFSET 0x748 #define GC_GPIO_MASKLOWBYTE_748_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_74C_OFFSET 0x74c #define GC_GPIO_MASKLOWBYTE_74C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_750_OFFSET 0x750 #define GC_GPIO_MASKLOWBYTE_750_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_754_OFFSET 0x754 #define GC_GPIO_MASKLOWBYTE_754_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_758_OFFSET 0x758 #define GC_GPIO_MASKLOWBYTE_758_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_75C_OFFSET 0x75c #define GC_GPIO_MASKLOWBYTE_75C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_760_OFFSET 0x760 #define GC_GPIO_MASKLOWBYTE_760_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_764_OFFSET 0x764 #define GC_GPIO_MASKLOWBYTE_764_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_768_OFFSET 0x768 #define GC_GPIO_MASKLOWBYTE_768_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_76C_OFFSET 0x76c #define GC_GPIO_MASKLOWBYTE_76C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_770_OFFSET 0x770 #define GC_GPIO_MASKLOWBYTE_770_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_774_OFFSET 0x774 #define GC_GPIO_MASKLOWBYTE_774_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_778_OFFSET 0x778 #define GC_GPIO_MASKLOWBYTE_778_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_77C_OFFSET 0x77c #define GC_GPIO_MASKLOWBYTE_77C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_780_OFFSET 0x780 #define GC_GPIO_MASKLOWBYTE_780_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_784_OFFSET 0x784 #define GC_GPIO_MASKLOWBYTE_784_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_788_OFFSET 0x788 #define GC_GPIO_MASKLOWBYTE_788_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_78C_OFFSET 0x78c #define GC_GPIO_MASKLOWBYTE_78C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_790_OFFSET 0x790 #define GC_GPIO_MASKLOWBYTE_790_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_794_OFFSET 0x794 #define GC_GPIO_MASKLOWBYTE_794_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_798_OFFSET 0x798 #define GC_GPIO_MASKLOWBYTE_798_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_79C_OFFSET 0x79c #define GC_GPIO_MASKLOWBYTE_79C_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7A0_OFFSET 0x7a0 #define GC_GPIO_MASKLOWBYTE_7A0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7A4_OFFSET 0x7a4 #define GC_GPIO_MASKLOWBYTE_7A4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7A8_OFFSET 0x7a8 #define GC_GPIO_MASKLOWBYTE_7A8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7AC_OFFSET 0x7ac #define GC_GPIO_MASKLOWBYTE_7AC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7B0_OFFSET 0x7b0 #define GC_GPIO_MASKLOWBYTE_7B0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7B4_OFFSET 0x7b4 #define GC_GPIO_MASKLOWBYTE_7B4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7B8_OFFSET 0x7b8 #define GC_GPIO_MASKLOWBYTE_7B8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7BC_OFFSET 0x7bc #define GC_GPIO_MASKLOWBYTE_7BC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7C0_OFFSET 0x7c0 #define GC_GPIO_MASKLOWBYTE_7C0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7C4_OFFSET 0x7c4 #define GC_GPIO_MASKLOWBYTE_7C4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7C8_OFFSET 0x7c8 #define GC_GPIO_MASKLOWBYTE_7C8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7CC_OFFSET 0x7cc #define GC_GPIO_MASKLOWBYTE_7CC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7D0_OFFSET 0x7d0 #define GC_GPIO_MASKLOWBYTE_7D0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7D4_OFFSET 0x7d4 #define GC_GPIO_MASKLOWBYTE_7D4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7D8_OFFSET 0x7d8 #define GC_GPIO_MASKLOWBYTE_7D8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7DC_OFFSET 0x7dc #define GC_GPIO_MASKLOWBYTE_7DC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7E0_OFFSET 0x7e0 #define GC_GPIO_MASKLOWBYTE_7E0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7E4_OFFSET 0x7e4 #define GC_GPIO_MASKLOWBYTE_7E4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7E8_OFFSET 0x7e8 #define GC_GPIO_MASKLOWBYTE_7E8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7EC_OFFSET 0x7ec #define GC_GPIO_MASKLOWBYTE_7EC_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7F0_OFFSET 0x7f0 #define GC_GPIO_MASKLOWBYTE_7F0_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7F4_OFFSET 0x7f4 #define GC_GPIO_MASKLOWBYTE_7F4_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7F8_OFFSET 0x7f8 #define GC_GPIO_MASKLOWBYTE_7F8_DEFAULT 0x0 #define GC_GPIO_MASKLOWBYTE_7FC_OFFSET 0x7fc #define GC_GPIO_MASKLOWBYTE_7FC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_800_OFFSET 0x800 #define GC_GPIO_MASKHIGHBYTE_800_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_804_OFFSET 0x804 #define GC_GPIO_MASKHIGHBYTE_804_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_808_OFFSET 0x808 #define GC_GPIO_MASKHIGHBYTE_808_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_80C_OFFSET 0x80c #define GC_GPIO_MASKHIGHBYTE_80C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_810_OFFSET 0x810 #define GC_GPIO_MASKHIGHBYTE_810_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_814_OFFSET 0x814 #define GC_GPIO_MASKHIGHBYTE_814_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_818_OFFSET 0x818 #define GC_GPIO_MASKHIGHBYTE_818_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_81C_OFFSET 0x81c #define GC_GPIO_MASKHIGHBYTE_81C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_820_OFFSET 0x820 #define GC_GPIO_MASKHIGHBYTE_820_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_824_OFFSET 0x824 #define GC_GPIO_MASKHIGHBYTE_824_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_828_OFFSET 0x828 #define GC_GPIO_MASKHIGHBYTE_828_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_82C_OFFSET 0x82c #define GC_GPIO_MASKHIGHBYTE_82C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_830_OFFSET 0x830 #define GC_GPIO_MASKHIGHBYTE_830_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_834_OFFSET 0x834 #define GC_GPIO_MASKHIGHBYTE_834_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_838_OFFSET 0x838 #define GC_GPIO_MASKHIGHBYTE_838_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_83C_OFFSET 0x83c #define GC_GPIO_MASKHIGHBYTE_83C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_840_OFFSET 0x840 #define GC_GPIO_MASKHIGHBYTE_840_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_844_OFFSET 0x844 #define GC_GPIO_MASKHIGHBYTE_844_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_848_OFFSET 0x848 #define GC_GPIO_MASKHIGHBYTE_848_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_84C_OFFSET 0x84c #define GC_GPIO_MASKHIGHBYTE_84C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_850_OFFSET 0x850 #define GC_GPIO_MASKHIGHBYTE_850_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_854_OFFSET 0x854 #define GC_GPIO_MASKHIGHBYTE_854_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_858_OFFSET 0x858 #define GC_GPIO_MASKHIGHBYTE_858_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_85C_OFFSET 0x85c #define GC_GPIO_MASKHIGHBYTE_85C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_860_OFFSET 0x860 #define GC_GPIO_MASKHIGHBYTE_860_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_864_OFFSET 0x864 #define GC_GPIO_MASKHIGHBYTE_864_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_868_OFFSET 0x868 #define GC_GPIO_MASKHIGHBYTE_868_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_86C_OFFSET 0x86c #define GC_GPIO_MASKHIGHBYTE_86C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_870_OFFSET 0x870 #define GC_GPIO_MASKHIGHBYTE_870_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_874_OFFSET 0x874 #define GC_GPIO_MASKHIGHBYTE_874_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_878_OFFSET 0x878 #define GC_GPIO_MASKHIGHBYTE_878_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_87C_OFFSET 0x87c #define GC_GPIO_MASKHIGHBYTE_87C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_880_OFFSET 0x880 #define GC_GPIO_MASKHIGHBYTE_880_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_884_OFFSET 0x884 #define GC_GPIO_MASKHIGHBYTE_884_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_888_OFFSET 0x888 #define GC_GPIO_MASKHIGHBYTE_888_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_88C_OFFSET 0x88c #define GC_GPIO_MASKHIGHBYTE_88C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_890_OFFSET 0x890 #define GC_GPIO_MASKHIGHBYTE_890_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_894_OFFSET 0x894 #define GC_GPIO_MASKHIGHBYTE_894_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_898_OFFSET 0x898 #define GC_GPIO_MASKHIGHBYTE_898_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_89C_OFFSET 0x89c #define GC_GPIO_MASKHIGHBYTE_89C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8A0_OFFSET 0x8a0 #define GC_GPIO_MASKHIGHBYTE_8A0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8A4_OFFSET 0x8a4 #define GC_GPIO_MASKHIGHBYTE_8A4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8A8_OFFSET 0x8a8 #define GC_GPIO_MASKHIGHBYTE_8A8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8AC_OFFSET 0x8ac #define GC_GPIO_MASKHIGHBYTE_8AC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8B0_OFFSET 0x8b0 #define GC_GPIO_MASKHIGHBYTE_8B0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8B4_OFFSET 0x8b4 #define GC_GPIO_MASKHIGHBYTE_8B4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8B8_OFFSET 0x8b8 #define GC_GPIO_MASKHIGHBYTE_8B8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8BC_OFFSET 0x8bc #define GC_GPIO_MASKHIGHBYTE_8BC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8C0_OFFSET 0x8c0 #define GC_GPIO_MASKHIGHBYTE_8C0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8C4_OFFSET 0x8c4 #define GC_GPIO_MASKHIGHBYTE_8C4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8C8_OFFSET 0x8c8 #define GC_GPIO_MASKHIGHBYTE_8C8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8CC_OFFSET 0x8cc #define GC_GPIO_MASKHIGHBYTE_8CC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8D0_OFFSET 0x8d0 #define GC_GPIO_MASKHIGHBYTE_8D0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8D4_OFFSET 0x8d4 #define GC_GPIO_MASKHIGHBYTE_8D4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8D8_OFFSET 0x8d8 #define GC_GPIO_MASKHIGHBYTE_8D8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8DC_OFFSET 0x8dc #define GC_GPIO_MASKHIGHBYTE_8DC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8E0_OFFSET 0x8e0 #define GC_GPIO_MASKHIGHBYTE_8E0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8E4_OFFSET 0x8e4 #define GC_GPIO_MASKHIGHBYTE_8E4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8E8_OFFSET 0x8e8 #define GC_GPIO_MASKHIGHBYTE_8E8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8EC_OFFSET 0x8ec #define GC_GPIO_MASKHIGHBYTE_8EC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8F0_OFFSET 0x8f0 #define GC_GPIO_MASKHIGHBYTE_8F0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8F4_OFFSET 0x8f4 #define GC_GPIO_MASKHIGHBYTE_8F4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8F8_OFFSET 0x8f8 #define GC_GPIO_MASKHIGHBYTE_8F8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_8FC_OFFSET 0x8fc #define GC_GPIO_MASKHIGHBYTE_8FC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_900_OFFSET 0x900 #define GC_GPIO_MASKHIGHBYTE_900_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_904_OFFSET 0x904 #define GC_GPIO_MASKHIGHBYTE_904_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_908_OFFSET 0x908 #define GC_GPIO_MASKHIGHBYTE_908_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_90C_OFFSET 0x90c #define GC_GPIO_MASKHIGHBYTE_90C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_910_OFFSET 0x910 #define GC_GPIO_MASKHIGHBYTE_910_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_914_OFFSET 0x914 #define GC_GPIO_MASKHIGHBYTE_914_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_918_OFFSET 0x918 #define GC_GPIO_MASKHIGHBYTE_918_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_91C_OFFSET 0x91c #define GC_GPIO_MASKHIGHBYTE_91C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_920_OFFSET 0x920 #define GC_GPIO_MASKHIGHBYTE_920_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_924_OFFSET 0x924 #define GC_GPIO_MASKHIGHBYTE_924_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_928_OFFSET 0x928 #define GC_GPIO_MASKHIGHBYTE_928_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_92C_OFFSET 0x92c #define GC_GPIO_MASKHIGHBYTE_92C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_930_OFFSET 0x930 #define GC_GPIO_MASKHIGHBYTE_930_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_934_OFFSET 0x934 #define GC_GPIO_MASKHIGHBYTE_934_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_938_OFFSET 0x938 #define GC_GPIO_MASKHIGHBYTE_938_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_93C_OFFSET 0x93c #define GC_GPIO_MASKHIGHBYTE_93C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_940_OFFSET 0x940 #define GC_GPIO_MASKHIGHBYTE_940_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_944_OFFSET 0x944 #define GC_GPIO_MASKHIGHBYTE_944_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_948_OFFSET 0x948 #define GC_GPIO_MASKHIGHBYTE_948_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_94C_OFFSET 0x94c #define GC_GPIO_MASKHIGHBYTE_94C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_950_OFFSET 0x950 #define GC_GPIO_MASKHIGHBYTE_950_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_954_OFFSET 0x954 #define GC_GPIO_MASKHIGHBYTE_954_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_958_OFFSET 0x958 #define GC_GPIO_MASKHIGHBYTE_958_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_95C_OFFSET 0x95c #define GC_GPIO_MASKHIGHBYTE_95C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_960_OFFSET 0x960 #define GC_GPIO_MASKHIGHBYTE_960_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_964_OFFSET 0x964 #define GC_GPIO_MASKHIGHBYTE_964_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_968_OFFSET 0x968 #define GC_GPIO_MASKHIGHBYTE_968_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_96C_OFFSET 0x96c #define GC_GPIO_MASKHIGHBYTE_96C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_970_OFFSET 0x970 #define GC_GPIO_MASKHIGHBYTE_970_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_974_OFFSET 0x974 #define GC_GPIO_MASKHIGHBYTE_974_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_978_OFFSET 0x978 #define GC_GPIO_MASKHIGHBYTE_978_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_97C_OFFSET 0x97c #define GC_GPIO_MASKHIGHBYTE_97C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_980_OFFSET 0x980 #define GC_GPIO_MASKHIGHBYTE_980_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_984_OFFSET 0x984 #define GC_GPIO_MASKHIGHBYTE_984_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_988_OFFSET 0x988 #define GC_GPIO_MASKHIGHBYTE_988_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_98C_OFFSET 0x98c #define GC_GPIO_MASKHIGHBYTE_98C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_990_OFFSET 0x990 #define GC_GPIO_MASKHIGHBYTE_990_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_994_OFFSET 0x994 #define GC_GPIO_MASKHIGHBYTE_994_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_998_OFFSET 0x998 #define GC_GPIO_MASKHIGHBYTE_998_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_99C_OFFSET 0x99c #define GC_GPIO_MASKHIGHBYTE_99C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9A0_OFFSET 0x9a0 #define GC_GPIO_MASKHIGHBYTE_9A0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9A4_OFFSET 0x9a4 #define GC_GPIO_MASKHIGHBYTE_9A4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9A8_OFFSET 0x9a8 #define GC_GPIO_MASKHIGHBYTE_9A8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9AC_OFFSET 0x9ac #define GC_GPIO_MASKHIGHBYTE_9AC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9B0_OFFSET 0x9b0 #define GC_GPIO_MASKHIGHBYTE_9B0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9B4_OFFSET 0x9b4 #define GC_GPIO_MASKHIGHBYTE_9B4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9B8_OFFSET 0x9b8 #define GC_GPIO_MASKHIGHBYTE_9B8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9BC_OFFSET 0x9bc #define GC_GPIO_MASKHIGHBYTE_9BC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9C0_OFFSET 0x9c0 #define GC_GPIO_MASKHIGHBYTE_9C0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9C4_OFFSET 0x9c4 #define GC_GPIO_MASKHIGHBYTE_9C4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9C8_OFFSET 0x9c8 #define GC_GPIO_MASKHIGHBYTE_9C8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9CC_OFFSET 0x9cc #define GC_GPIO_MASKHIGHBYTE_9CC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9D0_OFFSET 0x9d0 #define GC_GPIO_MASKHIGHBYTE_9D0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9D4_OFFSET 0x9d4 #define GC_GPIO_MASKHIGHBYTE_9D4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9D8_OFFSET 0x9d8 #define GC_GPIO_MASKHIGHBYTE_9D8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9DC_OFFSET 0x9dc #define GC_GPIO_MASKHIGHBYTE_9DC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9E0_OFFSET 0x9e0 #define GC_GPIO_MASKHIGHBYTE_9E0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9E4_OFFSET 0x9e4 #define GC_GPIO_MASKHIGHBYTE_9E4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9E8_OFFSET 0x9e8 #define GC_GPIO_MASKHIGHBYTE_9E8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9EC_OFFSET 0x9ec #define GC_GPIO_MASKHIGHBYTE_9EC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9F0_OFFSET 0x9f0 #define GC_GPIO_MASKHIGHBYTE_9F0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9F4_OFFSET 0x9f4 #define GC_GPIO_MASKHIGHBYTE_9F4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9F8_OFFSET 0x9f8 #define GC_GPIO_MASKHIGHBYTE_9F8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_9FC_OFFSET 0x9fc #define GC_GPIO_MASKHIGHBYTE_9FC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A00_OFFSET 0xa00 #define GC_GPIO_MASKHIGHBYTE_A00_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A04_OFFSET 0xa04 #define GC_GPIO_MASKHIGHBYTE_A04_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A08_OFFSET 0xa08 #define GC_GPIO_MASKHIGHBYTE_A08_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A0C_OFFSET 0xa0c #define GC_GPIO_MASKHIGHBYTE_A0C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A10_OFFSET 0xa10 #define GC_GPIO_MASKHIGHBYTE_A10_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A14_OFFSET 0xa14 #define GC_GPIO_MASKHIGHBYTE_A14_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A18_OFFSET 0xa18 #define GC_GPIO_MASKHIGHBYTE_A18_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A1C_OFFSET 0xa1c #define GC_GPIO_MASKHIGHBYTE_A1C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A20_OFFSET 0xa20 #define GC_GPIO_MASKHIGHBYTE_A20_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A24_OFFSET 0xa24 #define GC_GPIO_MASKHIGHBYTE_A24_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A28_OFFSET 0xa28 #define GC_GPIO_MASKHIGHBYTE_A28_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A2C_OFFSET 0xa2c #define GC_GPIO_MASKHIGHBYTE_A2C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A30_OFFSET 0xa30 #define GC_GPIO_MASKHIGHBYTE_A30_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A34_OFFSET 0xa34 #define GC_GPIO_MASKHIGHBYTE_A34_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A38_OFFSET 0xa38 #define GC_GPIO_MASKHIGHBYTE_A38_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A3C_OFFSET 0xa3c #define GC_GPIO_MASKHIGHBYTE_A3C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A40_OFFSET 0xa40 #define GC_GPIO_MASKHIGHBYTE_A40_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A44_OFFSET 0xa44 #define GC_GPIO_MASKHIGHBYTE_A44_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A48_OFFSET 0xa48 #define GC_GPIO_MASKHIGHBYTE_A48_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A4C_OFFSET 0xa4c #define GC_GPIO_MASKHIGHBYTE_A4C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A50_OFFSET 0xa50 #define GC_GPIO_MASKHIGHBYTE_A50_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A54_OFFSET 0xa54 #define GC_GPIO_MASKHIGHBYTE_A54_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A58_OFFSET 0xa58 #define GC_GPIO_MASKHIGHBYTE_A58_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A5C_OFFSET 0xa5c #define GC_GPIO_MASKHIGHBYTE_A5C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A60_OFFSET 0xa60 #define GC_GPIO_MASKHIGHBYTE_A60_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A64_OFFSET 0xa64 #define GC_GPIO_MASKHIGHBYTE_A64_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A68_OFFSET 0xa68 #define GC_GPIO_MASKHIGHBYTE_A68_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A6C_OFFSET 0xa6c #define GC_GPIO_MASKHIGHBYTE_A6C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A70_OFFSET 0xa70 #define GC_GPIO_MASKHIGHBYTE_A70_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A74_OFFSET 0xa74 #define GC_GPIO_MASKHIGHBYTE_A74_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A78_OFFSET 0xa78 #define GC_GPIO_MASKHIGHBYTE_A78_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A7C_OFFSET 0xa7c #define GC_GPIO_MASKHIGHBYTE_A7C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A80_OFFSET 0xa80 #define GC_GPIO_MASKHIGHBYTE_A80_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A84_OFFSET 0xa84 #define GC_GPIO_MASKHIGHBYTE_A84_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A88_OFFSET 0xa88 #define GC_GPIO_MASKHIGHBYTE_A88_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A8C_OFFSET 0xa8c #define GC_GPIO_MASKHIGHBYTE_A8C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A90_OFFSET 0xa90 #define GC_GPIO_MASKHIGHBYTE_A90_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A94_OFFSET 0xa94 #define GC_GPIO_MASKHIGHBYTE_A94_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A98_OFFSET 0xa98 #define GC_GPIO_MASKHIGHBYTE_A98_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_A9C_OFFSET 0xa9c #define GC_GPIO_MASKHIGHBYTE_A9C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AA0_OFFSET 0xaa0 #define GC_GPIO_MASKHIGHBYTE_AA0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AA4_OFFSET 0xaa4 #define GC_GPIO_MASKHIGHBYTE_AA4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AA8_OFFSET 0xaa8 #define GC_GPIO_MASKHIGHBYTE_AA8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AAC_OFFSET 0xaac #define GC_GPIO_MASKHIGHBYTE_AAC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AB0_OFFSET 0xab0 #define GC_GPIO_MASKHIGHBYTE_AB0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AB4_OFFSET 0xab4 #define GC_GPIO_MASKHIGHBYTE_AB4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AB8_OFFSET 0xab8 #define GC_GPIO_MASKHIGHBYTE_AB8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_ABC_OFFSET 0xabc #define GC_GPIO_MASKHIGHBYTE_ABC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AC0_OFFSET 0xac0 #define GC_GPIO_MASKHIGHBYTE_AC0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AC4_OFFSET 0xac4 #define GC_GPIO_MASKHIGHBYTE_AC4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AC8_OFFSET 0xac8 #define GC_GPIO_MASKHIGHBYTE_AC8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_ACC_OFFSET 0xacc #define GC_GPIO_MASKHIGHBYTE_ACC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AD0_OFFSET 0xad0 #define GC_GPIO_MASKHIGHBYTE_AD0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AD4_OFFSET 0xad4 #define GC_GPIO_MASKHIGHBYTE_AD4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AD8_OFFSET 0xad8 #define GC_GPIO_MASKHIGHBYTE_AD8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_ADC_OFFSET 0xadc #define GC_GPIO_MASKHIGHBYTE_ADC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AE0_OFFSET 0xae0 #define GC_GPIO_MASKHIGHBYTE_AE0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AE4_OFFSET 0xae4 #define GC_GPIO_MASKHIGHBYTE_AE4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AE8_OFFSET 0xae8 #define GC_GPIO_MASKHIGHBYTE_AE8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AEC_OFFSET 0xaec #define GC_GPIO_MASKHIGHBYTE_AEC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AF0_OFFSET 0xaf0 #define GC_GPIO_MASKHIGHBYTE_AF0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AF4_OFFSET 0xaf4 #define GC_GPIO_MASKHIGHBYTE_AF4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AF8_OFFSET 0xaf8 #define GC_GPIO_MASKHIGHBYTE_AF8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_AFC_OFFSET 0xafc #define GC_GPIO_MASKHIGHBYTE_AFC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B00_OFFSET 0xb00 #define GC_GPIO_MASKHIGHBYTE_B00_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B04_OFFSET 0xb04 #define GC_GPIO_MASKHIGHBYTE_B04_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B08_OFFSET 0xb08 #define GC_GPIO_MASKHIGHBYTE_B08_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B0C_OFFSET 0xb0c #define GC_GPIO_MASKHIGHBYTE_B0C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B10_OFFSET 0xb10 #define GC_GPIO_MASKHIGHBYTE_B10_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B14_OFFSET 0xb14 #define GC_GPIO_MASKHIGHBYTE_B14_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B18_OFFSET 0xb18 #define GC_GPIO_MASKHIGHBYTE_B18_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B1C_OFFSET 0xb1c #define GC_GPIO_MASKHIGHBYTE_B1C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B20_OFFSET 0xb20 #define GC_GPIO_MASKHIGHBYTE_B20_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B24_OFFSET 0xb24 #define GC_GPIO_MASKHIGHBYTE_B24_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B28_OFFSET 0xb28 #define GC_GPIO_MASKHIGHBYTE_B28_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B2C_OFFSET 0xb2c #define GC_GPIO_MASKHIGHBYTE_B2C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B30_OFFSET 0xb30 #define GC_GPIO_MASKHIGHBYTE_B30_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B34_OFFSET 0xb34 #define GC_GPIO_MASKHIGHBYTE_B34_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B38_OFFSET 0xb38 #define GC_GPIO_MASKHIGHBYTE_B38_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B3C_OFFSET 0xb3c #define GC_GPIO_MASKHIGHBYTE_B3C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B40_OFFSET 0xb40 #define GC_GPIO_MASKHIGHBYTE_B40_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B44_OFFSET 0xb44 #define GC_GPIO_MASKHIGHBYTE_B44_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B48_OFFSET 0xb48 #define GC_GPIO_MASKHIGHBYTE_B48_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B4C_OFFSET 0xb4c #define GC_GPIO_MASKHIGHBYTE_B4C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B50_OFFSET 0xb50 #define GC_GPIO_MASKHIGHBYTE_B50_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B54_OFFSET 0xb54 #define GC_GPIO_MASKHIGHBYTE_B54_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B58_OFFSET 0xb58 #define GC_GPIO_MASKHIGHBYTE_B58_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B5C_OFFSET 0xb5c #define GC_GPIO_MASKHIGHBYTE_B5C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B60_OFFSET 0xb60 #define GC_GPIO_MASKHIGHBYTE_B60_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B64_OFFSET 0xb64 #define GC_GPIO_MASKHIGHBYTE_B64_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B68_OFFSET 0xb68 #define GC_GPIO_MASKHIGHBYTE_B68_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B6C_OFFSET 0xb6c #define GC_GPIO_MASKHIGHBYTE_B6C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B70_OFFSET 0xb70 #define GC_GPIO_MASKHIGHBYTE_B70_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B74_OFFSET 0xb74 #define GC_GPIO_MASKHIGHBYTE_B74_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B78_OFFSET 0xb78 #define GC_GPIO_MASKHIGHBYTE_B78_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B7C_OFFSET 0xb7c #define GC_GPIO_MASKHIGHBYTE_B7C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B80_OFFSET 0xb80 #define GC_GPIO_MASKHIGHBYTE_B80_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B84_OFFSET 0xb84 #define GC_GPIO_MASKHIGHBYTE_B84_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B88_OFFSET 0xb88 #define GC_GPIO_MASKHIGHBYTE_B88_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B8C_OFFSET 0xb8c #define GC_GPIO_MASKHIGHBYTE_B8C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B90_OFFSET 0xb90 #define GC_GPIO_MASKHIGHBYTE_B90_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B94_OFFSET 0xb94 #define GC_GPIO_MASKHIGHBYTE_B94_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B98_OFFSET 0xb98 #define GC_GPIO_MASKHIGHBYTE_B98_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_B9C_OFFSET 0xb9c #define GC_GPIO_MASKHIGHBYTE_B9C_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BA0_OFFSET 0xba0 #define GC_GPIO_MASKHIGHBYTE_BA0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BA4_OFFSET 0xba4 #define GC_GPIO_MASKHIGHBYTE_BA4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BA8_OFFSET 0xba8 #define GC_GPIO_MASKHIGHBYTE_BA8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BAC_OFFSET 0xbac #define GC_GPIO_MASKHIGHBYTE_BAC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BB0_OFFSET 0xbb0 #define GC_GPIO_MASKHIGHBYTE_BB0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BB4_OFFSET 0xbb4 #define GC_GPIO_MASKHIGHBYTE_BB4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BB8_OFFSET 0xbb8 #define GC_GPIO_MASKHIGHBYTE_BB8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BBC_OFFSET 0xbbc #define GC_GPIO_MASKHIGHBYTE_BBC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BC0_OFFSET 0xbc0 #define GC_GPIO_MASKHIGHBYTE_BC0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BC4_OFFSET 0xbc4 #define GC_GPIO_MASKHIGHBYTE_BC4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BC8_OFFSET 0xbc8 #define GC_GPIO_MASKHIGHBYTE_BC8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BCC_OFFSET 0xbcc #define GC_GPIO_MASKHIGHBYTE_BCC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BD0_OFFSET 0xbd0 #define GC_GPIO_MASKHIGHBYTE_BD0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BD4_OFFSET 0xbd4 #define GC_GPIO_MASKHIGHBYTE_BD4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BD8_OFFSET 0xbd8 #define GC_GPIO_MASKHIGHBYTE_BD8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BDC_OFFSET 0xbdc #define GC_GPIO_MASKHIGHBYTE_BDC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BE0_OFFSET 0xbe0 #define GC_GPIO_MASKHIGHBYTE_BE0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BE4_OFFSET 0xbe4 #define GC_GPIO_MASKHIGHBYTE_BE4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BE8_OFFSET 0xbe8 #define GC_GPIO_MASKHIGHBYTE_BE8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BEC_OFFSET 0xbec #define GC_GPIO_MASKHIGHBYTE_BEC_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BF0_OFFSET 0xbf0 #define GC_GPIO_MASKHIGHBYTE_BF0_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BF4_OFFSET 0xbf4 #define GC_GPIO_MASKHIGHBYTE_BF4_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BF8_OFFSET 0xbf8 #define GC_GPIO_MASKHIGHBYTE_BF8_DEFAULT 0x0 #define GC_GPIO_MASKHIGHBYTE_BFC_OFFSET 0xbfc #define GC_GPIO_MASKHIGHBYTE_BFC_DEFAULT 0x0 #define GC_GPIO_ARMPID4_OFFSET 0xfd0 #define GC_GPIO_ARMPID4_DEFAULT 0x4 #define GC_GPIO_ARMPID5_OFFSET 0xfd4 #define GC_GPIO_ARMPID5_DEFAULT 0x0 #define GC_GPIO_ARMPID6_OFFSET 0xfd8 #define GC_GPIO_ARMPID6_DEFAULT 0x0 #define GC_GPIO_ARMPID7_OFFSET 0xfdc #define GC_GPIO_ARMPID7_DEFAULT 0x0 #define GC_GPIO_ARMPID0_OFFSET 0xfe0 #define GC_GPIO_ARMPID0_DEFAULT 0x20 #define GC_GPIO_ARMPID1_OFFSET 0xfe4 #define GC_GPIO_ARMPID1_DEFAULT 0xb8 #define GC_GPIO_ARMPID2_OFFSET 0xfe8 #define GC_GPIO_ARMPID2_DEFAULT 0xb #define GC_GPIO_ARMPID3_OFFSET 0xfec #define GC_GPIO_ARMPID3_DEFAULT 0x0 #define GC_GPIO_ARMCID0_OFFSET 0xff0 #define GC_GPIO_ARMCID0_DEFAULT 0xd #define GC_GPIO_ARMCID1_OFFSET 0xff4 #define GC_GPIO_ARMCID1_DEFAULT 0xf0 #define GC_GPIO_ARMCID2_OFFSET 0xff8 #define GC_GPIO_ARMCID2_DEFAULT 0x5 #define GC_GPIO_ARMCID3_OFFSET 0xffc #define GC_GPIO_ARMCID3_DEFAULT 0xb1 #define GC_I2C_CTRL_MODE_OFFSET 0x0 #define GC_I2C_CTRL_MODE_DEFAULT 0x0 #define GC_I2C_CTRL_CLKDIV_OFFSET 0x4 #define GC_I2C_CTRL_CLKDIV_DEFAULT 0xa #define GC_I2C_CTRL_PHASESTEPS_OFFSET 0x8 #define GC_I2C_CTRL_PHASESTEPS_DEFAULT 0x188186 #define GC_I2C_CTRL_SDA_VAL_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_DEFAULT 0x1897f0f #define GC_I2C_CTRL_SDA_OVRD_OFFSET 0x10 #define GC_I2C_CTRL_SDA_OVRD_DEFAULT 0x300 #define GC_I2C_CTRL_SCL_VAL_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_DEFAULT 0x67666e #define GC_I2C_CTRL_SCL_OVRD_OFFSET 0x18 #define GC_I2C_CTRL_SCL_OVRD_DEFAULT 0x600 #define GC_I2C_CTRL_INT_EN_OFFSET 0x1c #define GC_I2C_CTRL_INT_EN_DEFAULT 0x1 #define GC_I2C_CTRL_AL_OFFSET 0x20 #define GC_I2C_CTRL_AL_DEFAULT 0x1f #define GC_I2C_CTRL_CS_OFFSET 0x24 #define GC_I2C_CTRL_CS_DEFAULT 0x13883 #define GC_I2C_INST_OFFSET 0x28 #define GC_I2C_INST_DEFAULT 0x0 #define GC_I2C_STATUS_OFFSET 0x2c #define GC_I2C_STATUS_DEFAULT 0x0 #define GC_I2C_FW_OFFSET 0x30 #define GC_I2C_FW_DEFAULT 0x0 #define GC_I2C_RW_PTR_OFFSET 0x34 #define GC_I2C_RW_PTR_DEFAULT 0x0 #define GC_I2C_RW0_OFFSET 0x38 #define GC_I2C_RW0_DEFAULT 0x0 #define GC_I2C_RW1_OFFSET 0x3c #define GC_I2C_RW1_DEFAULT 0x0 #define GC_I2C_RW2_OFFSET 0x40 #define GC_I2C_RW2_DEFAULT 0x0 #define GC_I2C_RW3_OFFSET 0x44 #define GC_I2C_RW3_DEFAULT 0x0 #define GC_I2C_RW4_OFFSET 0x48 #define GC_I2C_RW4_DEFAULT 0x0 #define GC_I2C_RW5_OFFSET 0x4c #define GC_I2C_RW5_DEFAULT 0x0 #define GC_I2C_RW6_OFFSET 0x50 #define GC_I2C_RW6_DEFAULT 0x0 #define GC_I2C_RW7_OFFSET 0x54 #define GC_I2C_RW7_DEFAULT 0x0 #define GC_I2C_RW8_OFFSET 0x58 #define GC_I2C_RW8_DEFAULT 0x0 #define GC_I2C_RW9_OFFSET 0x5c #define GC_I2C_RW9_DEFAULT 0x0 #define GC_I2C_RW10_OFFSET 0x60 #define GC_I2C_RW10_DEFAULT 0x0 #define GC_I2C_RW11_OFFSET 0x64 #define GC_I2C_RW11_DEFAULT 0x0 #define GC_I2C_RW12_OFFSET 0x68 #define GC_I2C_RW12_DEFAULT 0x0 #define GC_I2C_RW13_OFFSET 0x6c #define GC_I2C_RW13_DEFAULT 0x0 #define GC_I2C_RW14_OFFSET 0x70 #define GC_I2C_RW14_DEFAULT 0x0 #define GC_I2C_RW15_OFFSET 0x74 #define GC_I2C_RW15_DEFAULT 0x0 #define GC_I2C_READVAL_OFFSET 0x78 #define GC_I2C_READVAL_DEFAULT 0x0 #define GC_I2C_CTRL_MSR_OFFSET 0x7c #define GC_I2C_CTRL_MSR_DEFAULT 0xa #define GC_I2C_ITCR_OFFSET 0xf00 #define GC_I2C_ITCR_DEFAULT 0x0 #define GC_I2C_ITOP_OFFSET 0xf04 #define GC_I2C_ITOP_DEFAULT 0x0 #define GC_I2CS_VERSION_OFFSET 0x0 #define GC_I2CS_VERSION_DEFAULT 0x101424a #define GC_I2CS_INT_ENABLE_OFFSET 0x4 #define GC_I2CS_INT_ENABLE_DEFAULT 0x0 #define GC_I2CS_INT_STATE_OFFSET 0x8 #define GC_I2CS_INT_STATE_DEFAULT 0x0 #define GC_I2CS_INT_TEST_OFFSET 0xc #define GC_I2CS_INT_TEST_DEFAULT 0x0 #define GC_I2CS_CTRL_SDA_VAL_OFFSET 0x10 #define GC_I2CS_CTRL_SDA_VAL_DEFAULT 0x3d #define GC_I2CS_SLAVE_DEVADDRVAL_OFFSET 0x14 #define GC_I2CS_SLAVE_DEVADDRVAL_DEFAULT 0x0 #define GC_I2CS_CLOCK_STRETCH_OFFSET 0x18 #define GC_I2CS_CLOCK_STRETCH_DEFAULT 0x0 #define GC_I2CS_AUTO_WAIT_AFTER_WRITE_MODE_OFFSET 0x1c #define GC_I2CS_AUTO_WAIT_AFTER_WRITE_MODE_DEFAULT 0x0 #define GC_I2CS_CLOCK_STRETCH_MODE_OFFSET 0x20 #define GC_I2CS_CLOCK_STRETCH_MODE_DEFAULT 0x0 #define GC_I2CS_READ_PTR_OFFSET 0x24 #define GC_I2CS_READ_PTR_DEFAULT 0x0 #define GC_I2CS_WRITE_PTR_OFFSET 0x28 #define GC_I2CS_WRITE_PTR_DEFAULT 0x0 #define GC_I2CS_READVAL_OFFSET 0x2c #define GC_I2CS_READVAL_DEFAULT 0x0 #define GC_I2CS_CTRL_MSR_OFFSET 0x30 #define GC_I2CS_CTRL_MSR_DEFAULT 0xa #define GC_I2CS_READ_BUFFER0_OFFSET 0x34 #define GC_I2CS_READ_BUFFER0_DEFAULT 0x0 #define GC_I2CS_READ_BUFFER1_OFFSET 0x38 #define GC_I2CS_READ_BUFFER1_DEFAULT 0x0 #define GC_I2CS_READ_BUFFER2_OFFSET 0x3c #define GC_I2CS_READ_BUFFER2_DEFAULT 0x0 #define GC_I2CS_READ_BUFFER3_OFFSET 0x40 #define GC_I2CS_READ_BUFFER3_DEFAULT 0x0 #define GC_I2CS_READ_BUFFER4_OFFSET 0x44 #define GC_I2CS_READ_BUFFER4_DEFAULT 0x0 #define GC_I2CS_READ_BUFFER5_OFFSET 0x48 #define GC_I2CS_READ_BUFFER5_DEFAULT 0x0 #define GC_I2CS_READ_BUFFER6_OFFSET 0x4c #define GC_I2CS_READ_BUFFER6_DEFAULT 0x0 #define GC_I2CS_READ_BUFFER7_OFFSET 0x50 #define GC_I2CS_READ_BUFFER7_DEFAULT 0x0 #define GC_I2CS_READ_BUFFER8_OFFSET 0x54 #define GC_I2CS_READ_BUFFER8_DEFAULT 0x0 #define GC_I2CS_READ_BUFFER9_OFFSET 0x58 #define GC_I2CS_READ_BUFFER9_DEFAULT 0x0 #define GC_I2CS_READ_BUFFER10_OFFSET 0x5c #define GC_I2CS_READ_BUFFER10_DEFAULT 0x0 #define GC_I2CS_READ_BUFFER11_OFFSET 0x60 #define GC_I2CS_READ_BUFFER11_DEFAULT 0x0 #define GC_I2CS_READ_BUFFER12_OFFSET 0x64 #define GC_I2CS_READ_BUFFER12_DEFAULT 0x0 #define GC_I2CS_READ_BUFFER13_OFFSET 0x68 #define GC_I2CS_READ_BUFFER13_DEFAULT 0x0 #define GC_I2CS_READ_BUFFER14_OFFSET 0x6c #define GC_I2CS_READ_BUFFER14_DEFAULT 0x0 #define GC_I2CS_READ_BUFFER15_OFFSET 0x70 #define GC_I2CS_READ_BUFFER15_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER0_OFFSET 0x74 #define GC_I2CS_WRITE_BUFFER0_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER1_OFFSET 0x78 #define GC_I2CS_WRITE_BUFFER1_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER2_OFFSET 0x7c #define GC_I2CS_WRITE_BUFFER2_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER3_OFFSET 0x80 #define GC_I2CS_WRITE_BUFFER3_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER4_OFFSET 0x84 #define GC_I2CS_WRITE_BUFFER4_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER5_OFFSET 0x88 #define GC_I2CS_WRITE_BUFFER5_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER6_OFFSET 0x8c #define GC_I2CS_WRITE_BUFFER6_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER7_OFFSET 0x90 #define GC_I2CS_WRITE_BUFFER7_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER8_OFFSET 0x94 #define GC_I2CS_WRITE_BUFFER8_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER9_OFFSET 0x98 #define GC_I2CS_WRITE_BUFFER9_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER10_OFFSET 0x9c #define GC_I2CS_WRITE_BUFFER10_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER11_OFFSET 0xa0 #define GC_I2CS_WRITE_BUFFER11_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER12_OFFSET 0xa4 #define GC_I2CS_WRITE_BUFFER12_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER13_OFFSET 0xa8 #define GC_I2CS_WRITE_BUFFER13_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER14_OFFSET 0xac #define GC_I2CS_WRITE_BUFFER14_DEFAULT 0x0 #define GC_I2CS_WRITE_BUFFER15_OFFSET 0xb0 #define GC_I2CS_WRITE_BUFFER15_DEFAULT 0x0 #define GC_KEYMGR_AES_CTRL_OFFSET 0x0 #define GC_KEYMGR_AES_CTRL_DEFAULT 0x0 #define GC_KEYMGR_AES_WFIFO_DATA_OFFSET 0x8 #define GC_KEYMGR_AES_WFIFO_DATA_DEFAULT 0xdeadbeef #define GC_KEYMGR_AES_RFIFO_DATA_OFFSET 0xc #define GC_KEYMGR_AES_RFIFO_DATA_DEFAULT 0xdeadbeef #define GC_KEYMGR_AES_KEY0_OFFSET 0x2c #define GC_KEYMGR_AES_KEY0_DEFAULT 0x0 #define GC_KEYMGR_AES_KEY1_OFFSET 0x30 #define GC_KEYMGR_AES_KEY1_DEFAULT 0x0 #define GC_KEYMGR_AES_KEY2_OFFSET 0x34 #define GC_KEYMGR_AES_KEY2_DEFAULT 0x0 #define GC_KEYMGR_AES_KEY3_OFFSET 0x38 #define GC_KEYMGR_AES_KEY3_DEFAULT 0x0 #define GC_KEYMGR_AES_KEY4_OFFSET 0x3c #define GC_KEYMGR_AES_KEY4_DEFAULT 0x0 #define GC_KEYMGR_AES_KEY5_OFFSET 0x40 #define GC_KEYMGR_AES_KEY5_DEFAULT 0x0 #define GC_KEYMGR_AES_KEY6_OFFSET 0x44 #define GC_KEYMGR_AES_KEY6_DEFAULT 0x0 #define GC_KEYMGR_AES_KEY7_OFFSET 0x48 #define GC_KEYMGR_AES_KEY7_DEFAULT 0x0 #define GC_KEYMGR_AES_KEY_START_OFFSET 0x4c #define GC_KEYMGR_AES_KEY_START_DEFAULT 0x0 #define GC_KEYMGR_AES_CTR0_OFFSET 0x50 #define GC_KEYMGR_AES_CTR0_DEFAULT 0x0 #define GC_KEYMGR_AES_CTR1_OFFSET 0x54 #define GC_KEYMGR_AES_CTR1_DEFAULT 0x0 #define GC_KEYMGR_AES_CTR2_OFFSET 0x58 #define GC_KEYMGR_AES_CTR2_DEFAULT 0x0 #define GC_KEYMGR_AES_CTR3_OFFSET 0x5c #define GC_KEYMGR_AES_CTR3_DEFAULT 0x0 #define GC_KEYMGR_AES_RAND_STALL_CTL_OFFSET 0x60 #define GC_KEYMGR_AES_RAND_STALL_CTL_DEFAULT 0x7 #define GC_KEYMGR_AES_WFIFO_LEVEL_OFFSET 0x64 #define GC_KEYMGR_AES_WFIFO_LEVEL_DEFAULT 0x0 #define GC_KEYMGR_AES_WFIFO_FULL_OFFSET 0x68 #define GC_KEYMGR_AES_WFIFO_FULL_DEFAULT 0x0 #define GC_KEYMGR_AES_RFIFO_LEVEL_OFFSET 0x6c #define GC_KEYMGR_AES_RFIFO_LEVEL_DEFAULT 0x0 #define GC_KEYMGR_AES_RFIFO_EMPTY_OFFSET 0x70 #define GC_KEYMGR_AES_RFIFO_EMPTY_DEFAULT 0x1 #define GC_KEYMGR_AES_EXECUTE_COUNT_STATE_OFFSET 0x74 #define GC_KEYMGR_AES_EXECUTE_COUNT_STATE_DEFAULT 0x0 #define GC_KEYMGR_AES_EXECUTE_COUNT_MAX_OFFSET 0x78 #define GC_KEYMGR_AES_EXECUTE_COUNT_MAX_DEFAULT 0x0 #define GC_KEYMGR_GCM_DO_ACC_OFFSET 0x7c #define GC_KEYMGR_GCM_DO_ACC_DEFAULT 0x0 #define GC_KEYMGR_GCM_H0_OFFSET 0x80 #define GC_KEYMGR_GCM_H0_DEFAULT 0x0 #define GC_KEYMGR_GCM_H1_OFFSET 0x84 #define GC_KEYMGR_GCM_H1_DEFAULT 0x0 #define GC_KEYMGR_GCM_H2_OFFSET 0x88 #define GC_KEYMGR_GCM_H2_DEFAULT 0x0 #define GC_KEYMGR_GCM_H3_OFFSET 0x8c #define GC_KEYMGR_GCM_H3_DEFAULT 0x0 #define GC_KEYMGR_GCM_MAC0_OFFSET 0x90 #define GC_KEYMGR_GCM_MAC0_DEFAULT 0x0 #define GC_KEYMGR_GCM_MAC1_OFFSET 0x94 #define GC_KEYMGR_GCM_MAC1_DEFAULT 0x0 #define GC_KEYMGR_GCM_MAC2_OFFSET 0x98 #define GC_KEYMGR_GCM_MAC2_DEFAULT 0x0 #define GC_KEYMGR_GCM_MAC3_OFFSET 0x9c #define GC_KEYMGR_GCM_MAC3_DEFAULT 0x0 #define GC_KEYMGR_GCM_HASH_IN0_OFFSET 0xa0 #define GC_KEYMGR_GCM_HASH_IN0_DEFAULT 0x0 #define GC_KEYMGR_GCM_HASH_IN1_OFFSET 0xa4 #define GC_KEYMGR_GCM_HASH_IN1_DEFAULT 0x0 #define GC_KEYMGR_GCM_HASH_IN2_OFFSET 0xa8 #define GC_KEYMGR_GCM_HASH_IN2_DEFAULT 0x0 #define GC_KEYMGR_GCM_HASH_IN3_OFFSET 0xac #define GC_KEYMGR_GCM_HASH_IN3_DEFAULT 0x0 #define GC_KEYMGR_AES_WIPE_SECRETS_OFFSET 0xb0 #define GC_KEYMGR_AES_WIPE_SECRETS_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_ENABLE_OFFSET 0xb4 #define GC_KEYMGR_AES_INT_ENABLE_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_STATE_OFFSET 0xb8 #define GC_KEYMGR_AES_INT_STATE_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_TEST_OFFSET 0xbc #define GC_KEYMGR_AES_INT_TEST_DEFAULT 0x0 #define GC_KEYMGR_AES_USE_HIDDEN_KEY_OFFSET 0xc0 #define GC_KEYMGR_AES_USE_HIDDEN_KEY_DEFAULT 0x0 #define GC_KEYMGR_INT_ENABLE_OFFSET 0xc4 #define GC_KEYMGR_INT_ENABLE_DEFAULT 0x0 #define GC_KEYMGR_INT_STATE_OFFSET 0xc8 #define GC_KEYMGR_INT_STATE_DEFAULT 0x0 #define GC_KEYMGR_INT_TEST_OFFSET 0xcc #define GC_KEYMGR_INT_TEST_DEFAULT 0x0 #define GC_KEYMGR_SHA_CFG_MSGLEN_LO_OFFSET 0x400 #define GC_KEYMGR_SHA_CFG_MSGLEN_LO_DEFAULT 0x0 #define GC_KEYMGR_SHA_CFG_MSGLEN_HI_OFFSET 0x404 #define GC_KEYMGR_SHA_CFG_MSGLEN_HI_DEFAULT 0x0 #define GC_KEYMGR_SHA_CFG_EN_OFFSET 0x408 #define GC_KEYMGR_SHA_CFG_EN_DEFAULT 0x1 #define GC_KEYMGR_SHA_CFG_WR_EN_OFFSET 0x40c #define GC_KEYMGR_SHA_CFG_WR_EN_DEFAULT 0x1 #define GC_KEYMGR_SHA_TRIG_OFFSET 0x410 #define GC_KEYMGR_SHA_TRIG_DEFAULT 0x0 #define GC_KEYMGR_SHA_INPUT_FIFO_OFFSET 0x440 #define GC_KEYMGR_SHA_INPUT_FIFO_DEFAULT 0x0 #define GC_KEYMGR_SHA_STS_H0_OFFSET 0x444 #define GC_KEYMGR_SHA_STS_H0_DEFAULT 0x0 #define GC_KEYMGR_SHA_STS_H1_OFFSET 0x448 #define GC_KEYMGR_SHA_STS_H1_DEFAULT 0x0 #define GC_KEYMGR_SHA_STS_H2_OFFSET 0x44c #define GC_KEYMGR_SHA_STS_H2_DEFAULT 0x0 #define GC_KEYMGR_SHA_STS_H3_OFFSET 0x450 #define GC_KEYMGR_SHA_STS_H3_DEFAULT 0x0 #define GC_KEYMGR_SHA_STS_H4_OFFSET 0x454 #define GC_KEYMGR_SHA_STS_H4_DEFAULT 0x0 #define GC_KEYMGR_SHA_STS_H5_OFFSET 0x458 #define GC_KEYMGR_SHA_STS_H5_DEFAULT 0x0 #define GC_KEYMGR_SHA_STS_H6_OFFSET 0x45c #define GC_KEYMGR_SHA_STS_H6_DEFAULT 0x0 #define GC_KEYMGR_SHA_STS_H7_OFFSET 0x460 #define GC_KEYMGR_SHA_STS_H7_DEFAULT 0x0 #define GC_KEYMGR_SHA_KEY_W0_OFFSET 0x464 #define GC_KEYMGR_SHA_KEY_W0_DEFAULT 0x0 #define GC_KEYMGR_SHA_KEY_W1_OFFSET 0x468 #define GC_KEYMGR_SHA_KEY_W1_DEFAULT 0x0 #define GC_KEYMGR_SHA_KEY_W2_OFFSET 0x46c #define GC_KEYMGR_SHA_KEY_W2_DEFAULT 0x0 #define GC_KEYMGR_SHA_KEY_W3_OFFSET 0x470 #define GC_KEYMGR_SHA_KEY_W3_DEFAULT 0x0 #define GC_KEYMGR_SHA_KEY_W4_OFFSET 0x474 #define GC_KEYMGR_SHA_KEY_W4_DEFAULT 0x0 #define GC_KEYMGR_SHA_KEY_W5_OFFSET 0x478 #define GC_KEYMGR_SHA_KEY_W5_DEFAULT 0x0 #define GC_KEYMGR_SHA_KEY_W6_OFFSET 0x47c #define GC_KEYMGR_SHA_KEY_W6_DEFAULT 0x0 #define GC_KEYMGR_SHA_KEY_W7_OFFSET 0x480 #define GC_KEYMGR_SHA_KEY_W7_DEFAULT 0x0 #define GC_KEYMGR_SHA_STS_OFFSET 0x484 #define GC_KEYMGR_SHA_STS_DEFAULT 0x0 #define GC_KEYMGR_SHA_ITCR_OFFSET 0x488 #define GC_KEYMGR_SHA_ITCR_DEFAULT 0x0 #define GC_KEYMGR_SHA_ITOP_OFFSET 0x48c #define GC_KEYMGR_SHA_ITOP_DEFAULT 0x0 #define GC_KEYMGR_SHA_USE_HIDDEN_KEY_OFFSET 0x490 #define GC_KEYMGR_SHA_USE_HIDDEN_KEY_DEFAULT 0x0 #define GC_KEYMGR_SHA_USE_CERT_OFFSET 0x494 #define GC_KEYMGR_SHA_USE_CERT_DEFAULT 0x0 #define GC_KEYMGR_SHA_CERT_OVERRIDE_OFFSET 0x498 #define GC_KEYMGR_SHA_CERT_OVERRIDE_DEFAULT 0x0 #define GC_KEYMGR_SHA_RAND_STALL_CTL_OFFSET 0x49c #define GC_KEYMGR_SHA_RAND_STALL_CTL_DEFAULT 0x7 #define GC_KEYMGR_SHA_EXECUTE_COUNT_STATE_OFFSET 0x4a0 #define GC_KEYMGR_SHA_EXECUTE_COUNT_STATE_DEFAULT 0x0 #define GC_KEYMGR_SHA_EXECUTE_COUNT_MAX_OFFSET 0x4a4 #define GC_KEYMGR_SHA_EXECUTE_COUNT_MAX_DEFAULT 0x0 #define GC_KEYMGR_CERT_REVOKE_CTRL0_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DEFAULT 0xaaaaaaaa #define GC_KEYMGR_CERT_REVOKE_CTRL1_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_DEFAULT 0xaaaaaaaa #define GC_KEYMGR_CERT_REVOKE_CTRL2_OFFSET 0x4b0 #define GC_KEYMGR_CERT_REVOKE_CTRL2_DEFAULT 0xaaaa #define GC_KEYMGR_TM_PW_ATTEMPT0_OFFSET 0x2100 #define GC_KEYMGR_TM_PW_ATTEMPT0_DEFAULT 0x0 #define GC_KEYMGR_TM_PW_ATTEMPT1_OFFSET 0x2104 #define GC_KEYMGR_TM_PW_ATTEMPT1_DEFAULT 0x0 #define GC_KEYMGR_TM_PW_ATTEMPT2_OFFSET 0x2108 #define GC_KEYMGR_TM_PW_ATTEMPT2_DEFAULT 0x0 #define GC_KEYMGR_TM_PW_ATTEMPT3_OFFSET 0x210c #define GC_KEYMGR_TM_PW_ATTEMPT3_DEFAULT 0x0 #define GC_KEYMGR_TM_PW_ATTEMPT4_OFFSET 0x2110 #define GC_KEYMGR_TM_PW_ATTEMPT4_DEFAULT 0x0 #define GC_KEYMGR_TM_PW_ATTEMPT5_OFFSET 0x2114 #define GC_KEYMGR_TM_PW_ATTEMPT5_DEFAULT 0x0 #define GC_KEYMGR_TM_PW_ATTEMPT6_OFFSET 0x2118 #define GC_KEYMGR_TM_PW_ATTEMPT6_DEFAULT 0x0 #define GC_KEYMGR_TM_PW_ATTEMPT7_OFFSET 0x211c #define GC_KEYMGR_TM_PW_ATTEMPT7_DEFAULT 0x0 #define GC_KEYMGR_TM_PW_UNLOCK_OFFSET 0x2120 #define GC_KEYMGR_TM_PW_UNLOCK_DEFAULT 0x0 #define GC_KEYMGR_HKEY_RWR0_OFFSET 0x3000 #define GC_KEYMGR_HKEY_RWR0_DEFAULT 0x0 #define GC_KEYMGR_HKEY_RWR1_OFFSET 0x3004 #define GC_KEYMGR_HKEY_RWR1_DEFAULT 0x0 #define GC_KEYMGR_HKEY_RWR2_OFFSET 0x3008 #define GC_KEYMGR_HKEY_RWR2_DEFAULT 0x0 #define GC_KEYMGR_HKEY_RWR3_OFFSET 0x300c #define GC_KEYMGR_HKEY_RWR3_DEFAULT 0x0 #define GC_KEYMGR_HKEY_RWR4_OFFSET 0x3010 #define GC_KEYMGR_HKEY_RWR4_DEFAULT 0x0 #define GC_KEYMGR_HKEY_RWR5_OFFSET 0x3014 #define GC_KEYMGR_HKEY_RWR5_DEFAULT 0x0 #define GC_KEYMGR_HKEY_RWR6_OFFSET 0x3018 #define GC_KEYMGR_HKEY_RWR6_DEFAULT 0x0 #define GC_KEYMGR_HKEY_RWR7_OFFSET 0x301c #define GC_KEYMGR_HKEY_RWR7_DEFAULT 0x0 #define GC_KEYMGR_RWR_VLD_OFFSET 0x3020 #define GC_KEYMGR_RWR_VLD_DEFAULT 0x1 #define GC_KEYMGR_RWR_LOCK_OFFSET 0x3024 #define GC_KEYMGR_RWR_LOCK_DEFAULT 0x1 #define GC_KEYMGR_HKEY_FWR0_OFFSET 0x3100 #define GC_KEYMGR_HKEY_FWR0_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FWR1_OFFSET 0x3104 #define GC_KEYMGR_HKEY_FWR1_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FWR2_OFFSET 0x3108 #define GC_KEYMGR_HKEY_FWR2_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FWR3_OFFSET 0x310c #define GC_KEYMGR_HKEY_FWR3_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FWR4_OFFSET 0x3110 #define GC_KEYMGR_HKEY_FWR4_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FWR5_OFFSET 0x3114 #define GC_KEYMGR_HKEY_FWR5_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FWR6_OFFSET 0x3118 #define GC_KEYMGR_HKEY_FWR6_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FWR7_OFFSET 0x311c #define GC_KEYMGR_HKEY_FWR7_DEFAULT 0x0 #define GC_KEYMGR_FWR_VLD_OFFSET 0x3120 #define GC_KEYMGR_FWR_VLD_DEFAULT 0x1 #define GC_KEYMGR_FW_MAJOR_VERSION_OFFSET 0x3124 #define GC_KEYMGR_FW_MAJOR_VERSION_DEFAULT 0x0 #define GC_KEYMGR_FWR_LOCK_OFFSET 0x3128 #define GC_KEYMGR_FWR_LOCK_DEFAULT 0x1 #define GC_KEYMGR_HKEY_HWR0_OFFSET 0x3200 #define GC_KEYMGR_HKEY_HWR0_DEFAULT 0x0 #define GC_KEYMGR_HKEY_HWR1_OFFSET 0x3204 #define GC_KEYMGR_HKEY_HWR1_DEFAULT 0x0 #define GC_KEYMGR_HKEY_HWR2_OFFSET 0x3208 #define GC_KEYMGR_HKEY_HWR2_DEFAULT 0x0 #define GC_KEYMGR_HKEY_HWR3_OFFSET 0x320c #define GC_KEYMGR_HKEY_HWR3_DEFAULT 0x0 #define GC_KEYMGR_HKEY_HWR4_OFFSET 0x3210 #define GC_KEYMGR_HKEY_HWR4_DEFAULT 0x0 #define GC_KEYMGR_HKEY_HWR5_OFFSET 0x3214 #define GC_KEYMGR_HKEY_HWR5_DEFAULT 0x0 #define GC_KEYMGR_HKEY_HWR6_OFFSET 0x3218 #define GC_KEYMGR_HKEY_HWR6_DEFAULT 0x0 #define GC_KEYMGR_HKEY_HWR7_OFFSET 0x321c #define GC_KEYMGR_HKEY_HWR7_DEFAULT 0x0 #define GC_KEYMGR_HWR_VLD_OFFSET 0x3220 #define GC_KEYMGR_HWR_VLD_DEFAULT 0x1 #define GC_KEYMGR_HWR_LOCK_OFFSET 0x3224 #define GC_KEYMGR_HWR_LOCK_DEFAULT 0x1 #define GC_KEYMGR_HKEY_FRR0_OFFSET 0x3300 #define GC_KEYMGR_HKEY_FRR0_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FRR1_OFFSET 0x3304 #define GC_KEYMGR_HKEY_FRR1_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FRR2_OFFSET 0x3308 #define GC_KEYMGR_HKEY_FRR2_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FRR3_OFFSET 0x330c #define GC_KEYMGR_HKEY_FRR3_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FRR4_OFFSET 0x3310 #define GC_KEYMGR_HKEY_FRR4_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FRR5_OFFSET 0x3314 #define GC_KEYMGR_HKEY_FRR5_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FRR6_OFFSET 0x3318 #define GC_KEYMGR_HKEY_FRR6_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FRR7_OFFSET 0x331c #define GC_KEYMGR_HKEY_FRR7_DEFAULT 0x0 #define GC_KEYMGR_FLASH_RCV_WIPE_OFFSET 0x3320 #define GC_KEYMGR_FLASH_RCV_WIPE_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_CTRL_OFFSET 0x3328 #define GC_KEYMGR_HKEY_ERR_CTRL_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_OFFSET 0x332c #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_DEFAULT 0x0 #define GC_KEYMGR_HKEY_TESTMODE_UNLOCKED_STATUS_OFFSET 0x3330 #define GC_KEYMGR_HKEY_TESTMODE_UNLOCKED_STATUS_DEFAULT 0x0 #define GC_PINMUX_DIOM0_SEL_OFFSET 0x0 #define GC_PINMUX_DIOM0_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOM0_CTL_OFFSET 0x4 #define GC_PINMUX_DIOM0_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOM1_SEL_OFFSET 0x8 #define GC_PINMUX_DIOM1_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOM1_CTL_OFFSET 0xc #define GC_PINMUX_DIOM1_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOM2_SEL_OFFSET 0x10 #define GC_PINMUX_DIOM2_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOM2_CTL_OFFSET 0x14 #define GC_PINMUX_DIOM2_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOM3_SEL_OFFSET 0x18 #define GC_PINMUX_DIOM3_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOM3_CTL_OFFSET 0x1c #define GC_PINMUX_DIOM3_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOM4_SEL_OFFSET 0x20 #define GC_PINMUX_DIOM4_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOM4_CTL_OFFSET 0x24 #define GC_PINMUX_DIOM4_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOA0_SEL_OFFSET 0x28 #define GC_PINMUX_DIOA0_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOA0_CTL_OFFSET 0x2c #define GC_PINMUX_DIOA0_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOA1_SEL_OFFSET 0x30 #define GC_PINMUX_DIOA1_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOA1_CTL_OFFSET 0x34 #define GC_PINMUX_DIOA1_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOA2_SEL_OFFSET 0x38 #define GC_PINMUX_DIOA2_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOA2_CTL_OFFSET 0x3c #define GC_PINMUX_DIOA2_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOA3_SEL_OFFSET 0x40 #define GC_PINMUX_DIOA3_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOA3_CTL_OFFSET 0x44 #define GC_PINMUX_DIOA3_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOA4_SEL_OFFSET 0x48 #define GC_PINMUX_DIOA4_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOA4_CTL_OFFSET 0x4c #define GC_PINMUX_DIOA4_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOA5_SEL_OFFSET 0x50 #define GC_PINMUX_DIOA5_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOA5_CTL_OFFSET 0x54 #define GC_PINMUX_DIOA5_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOA6_SEL_OFFSET 0x58 #define GC_PINMUX_DIOA6_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOA6_CTL_OFFSET 0x5c #define GC_PINMUX_DIOA6_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOA7_SEL_OFFSET 0x60 #define GC_PINMUX_DIOA7_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOA7_CTL_OFFSET 0x64 #define GC_PINMUX_DIOA7_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOA8_SEL_OFFSET 0x68 #define GC_PINMUX_DIOA8_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOA8_CTL_OFFSET 0x6c #define GC_PINMUX_DIOA8_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOA9_SEL_OFFSET 0x70 #define GC_PINMUX_DIOA9_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOA9_CTL_OFFSET 0x74 #define GC_PINMUX_DIOA9_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOA10_SEL_OFFSET 0x78 #define GC_PINMUX_DIOA10_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOA10_CTL_OFFSET 0x7c #define GC_PINMUX_DIOA10_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOA11_SEL_OFFSET 0x80 #define GC_PINMUX_DIOA11_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOA11_CTL_OFFSET 0x84 #define GC_PINMUX_DIOA11_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOA12_SEL_OFFSET 0x88 #define GC_PINMUX_DIOA12_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOA12_CTL_OFFSET 0x8c #define GC_PINMUX_DIOA12_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOA13_SEL_OFFSET 0x90 #define GC_PINMUX_DIOA13_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOA13_CTL_OFFSET 0x94 #define GC_PINMUX_DIOA13_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOA14_SEL_OFFSET 0x98 #define GC_PINMUX_DIOA14_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOA14_CTL_OFFSET 0x9c #define GC_PINMUX_DIOA14_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOB0_SEL_OFFSET 0xa0 #define GC_PINMUX_DIOB0_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOB0_CTL_OFFSET 0xa4 #define GC_PINMUX_DIOB0_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOB1_SEL_OFFSET 0xa8 #define GC_PINMUX_DIOB1_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOB1_CTL_OFFSET 0xac #define GC_PINMUX_DIOB1_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOB2_SEL_OFFSET 0xb0 #define GC_PINMUX_DIOB2_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOB2_CTL_OFFSET 0xb4 #define GC_PINMUX_DIOB2_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOB3_SEL_OFFSET 0xb8 #define GC_PINMUX_DIOB3_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOB3_CTL_OFFSET 0xbc #define GC_PINMUX_DIOB3_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOB4_SEL_OFFSET 0xc0 #define GC_PINMUX_DIOB4_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOB4_CTL_OFFSET 0xc4 #define GC_PINMUX_DIOB4_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOB5_SEL_OFFSET 0xc8 #define GC_PINMUX_DIOB5_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOB5_CTL_OFFSET 0xcc #define GC_PINMUX_DIOB5_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOB6_SEL_OFFSET 0xd0 #define GC_PINMUX_DIOB6_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOB6_CTL_OFFSET 0xd4 #define GC_PINMUX_DIOB6_CTL_DEFAULT 0x3 #define GC_PINMUX_DIOB7_SEL_OFFSET 0xd8 #define GC_PINMUX_DIOB7_SEL_DEFAULT 0x0 #define GC_PINMUX_DIOB7_CTL_OFFSET 0xdc #define GC_PINMUX_DIOB7_CTL_DEFAULT 0x3 #define GC_PINMUX_RESETB_SEL_OFFSET 0xe0 #define GC_PINMUX_RESETB_SEL_DEFAULT 0x0 #define GC_PINMUX_RESETB_CTL_OFFSET 0xe4 #define GC_PINMUX_RESETB_CTL_DEFAULT 0x7 #define GC_PINMUX_VIO0_SEL_OFFSET 0xe8 #define GC_PINMUX_VIO0_SEL_DEFAULT 0x0 #define GC_PINMUX_VIO0_CTL_OFFSET 0xec #define GC_PINMUX_VIO0_CTL_DEFAULT 0x3 #define GC_PINMUX_VIO1_SEL_OFFSET 0xf0 #define GC_PINMUX_VIO1_SEL_DEFAULT 0x0 #define GC_PINMUX_VIO1_CTL_OFFSET 0xf4 #define GC_PINMUX_VIO1_CTL_DEFAULT 0x3 #define GC_PINMUX_GPIO0_GPIO0_SEL_OFFSET 0xf8 #define GC_PINMUX_GPIO0_GPIO0_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO0_GPIO1_SEL_OFFSET 0xfc #define GC_PINMUX_GPIO0_GPIO1_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO0_GPIO2_SEL_OFFSET 0x100 #define GC_PINMUX_GPIO0_GPIO2_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO0_GPIO3_SEL_OFFSET 0x104 #define GC_PINMUX_GPIO0_GPIO3_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO0_GPIO4_SEL_OFFSET 0x108 #define GC_PINMUX_GPIO0_GPIO4_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO0_GPIO5_SEL_OFFSET 0x10c #define GC_PINMUX_GPIO0_GPIO5_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO0_GPIO6_SEL_OFFSET 0x110 #define GC_PINMUX_GPIO0_GPIO6_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO0_GPIO7_SEL_OFFSET 0x114 #define GC_PINMUX_GPIO0_GPIO7_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO0_GPIO8_SEL_OFFSET 0x118 #define GC_PINMUX_GPIO0_GPIO8_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO0_GPIO9_SEL_OFFSET 0x11c #define GC_PINMUX_GPIO0_GPIO9_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO0_GPIO10_SEL_OFFSET 0x120 #define GC_PINMUX_GPIO0_GPIO10_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO0_GPIO11_SEL_OFFSET 0x124 #define GC_PINMUX_GPIO0_GPIO11_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO0_GPIO12_SEL_OFFSET 0x128 #define GC_PINMUX_GPIO0_GPIO12_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO0_GPIO13_SEL_OFFSET 0x12c #define GC_PINMUX_GPIO0_GPIO13_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO0_GPIO14_SEL_OFFSET 0x130 #define GC_PINMUX_GPIO0_GPIO14_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO0_GPIO15_SEL_OFFSET 0x134 #define GC_PINMUX_GPIO0_GPIO15_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO0_SEL_OFFSET 0x138 #define GC_PINMUX_GPIO1_GPIO0_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO1_SEL_OFFSET 0x13c #define GC_PINMUX_GPIO1_GPIO1_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO2_SEL_OFFSET 0x140 #define GC_PINMUX_GPIO1_GPIO2_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO3_SEL_OFFSET 0x144 #define GC_PINMUX_GPIO1_GPIO3_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO4_SEL_OFFSET 0x148 #define GC_PINMUX_GPIO1_GPIO4_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO5_SEL_OFFSET 0x14c #define GC_PINMUX_GPIO1_GPIO5_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO6_SEL_OFFSET 0x150 #define GC_PINMUX_GPIO1_GPIO6_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO7_SEL_OFFSET 0x154 #define GC_PINMUX_GPIO1_GPIO7_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO8_SEL_OFFSET 0x158 #define GC_PINMUX_GPIO1_GPIO8_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO9_SEL_OFFSET 0x15c #define GC_PINMUX_GPIO1_GPIO9_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO10_SEL_OFFSET 0x160 #define GC_PINMUX_GPIO1_GPIO10_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO11_SEL_OFFSET 0x164 #define GC_PINMUX_GPIO1_GPIO11_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO12_SEL_OFFSET 0x168 #define GC_PINMUX_GPIO1_GPIO12_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO13_SEL_OFFSET 0x16c #define GC_PINMUX_GPIO1_GPIO13_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO14_SEL_OFFSET 0x170 #define GC_PINMUX_GPIO1_GPIO14_SEL_DEFAULT 0x0 #define GC_PINMUX_GPIO1_GPIO15_SEL_OFFSET 0x174 #define GC_PINMUX_GPIO1_GPIO15_SEL_DEFAULT 0x0 #define GC_PINMUX_I2C0_SCL_SEL_OFFSET 0x178 #define GC_PINMUX_I2C0_SCL_SEL_DEFAULT 0x0 #define GC_PINMUX_I2C0_SDA_SEL_OFFSET 0x17c #define GC_PINMUX_I2C0_SDA_SEL_DEFAULT 0x0 #define GC_PINMUX_I2C1_SCL_SEL_OFFSET 0x180 #define GC_PINMUX_I2C1_SCL_SEL_DEFAULT 0x0 #define GC_PINMUX_I2C1_SDA_SEL_OFFSET 0x184 #define GC_PINMUX_I2C1_SDA_SEL_DEFAULT 0x0 #define GC_PINMUX_I2CS0_SCL_SEL_OFFSET 0x188 #define GC_PINMUX_I2CS0_SCL_SEL_DEFAULT 0x0 #define GC_PINMUX_I2CS0_SDA_SEL_OFFSET 0x18c #define GC_PINMUX_I2CS0_SDA_SEL_DEFAULT 0x0 #define GC_PINMUX_PMU_BROWNOUT_DET_SEL_OFFSET 0x190 #define GC_PINMUX_PMU_BROWNOUT_DET_SEL_DEFAULT 0x0 #define GC_PINMUX_PMU_TESTBUS0_SEL_OFFSET 0x194 #define GC_PINMUX_PMU_TESTBUS0_SEL_DEFAULT 0x0 #define GC_PINMUX_PMU_TESTBUS1_SEL_OFFSET 0x198 #define GC_PINMUX_PMU_TESTBUS1_SEL_DEFAULT 0x0 #define GC_PINMUX_PMU_TESTBUS2_SEL_OFFSET 0x19c #define GC_PINMUX_PMU_TESTBUS2_SEL_DEFAULT 0x0 #define GC_PINMUX_PMU_TESTBUS3_SEL_OFFSET 0x1a0 #define GC_PINMUX_PMU_TESTBUS3_SEL_DEFAULT 0x0 #define GC_PINMUX_PMU_TESTBUS4_SEL_OFFSET 0x1a4 #define GC_PINMUX_PMU_TESTBUS4_SEL_DEFAULT 0x0 #define GC_PINMUX_PMU_TESTBUS5_SEL_OFFSET 0x1a8 #define GC_PINMUX_PMU_TESTBUS5_SEL_DEFAULT 0x0 #define GC_PINMUX_PMU_TESTBUS6_SEL_OFFSET 0x1ac #define GC_PINMUX_PMU_TESTBUS6_SEL_DEFAULT 0x0 #define GC_PINMUX_PMU_TESTBUS7_SEL_OFFSET 0x1b0 #define GC_PINMUX_PMU_TESTBUS7_SEL_DEFAULT 0x0 #define GC_PINMUX_RTC0_RTC_CLK_TEST_SEL_OFFSET 0x1b4 #define GC_PINMUX_RTC0_RTC_CLK_TEST_SEL_DEFAULT 0x0 #define GC_PINMUX_SPI1_SPICLK_SEL_OFFSET 0x1b8 #define GC_PINMUX_SPI1_SPICLK_SEL_DEFAULT 0x0 #define GC_PINMUX_SPI1_SPICSB_SEL_OFFSET 0x1bc #define GC_PINMUX_SPI1_SPICSB_SEL_DEFAULT 0x0 #define GC_PINMUX_SPI1_SPIMISO_SEL_OFFSET 0x1c0 #define GC_PINMUX_SPI1_SPIMISO_SEL_DEFAULT 0x0 #define GC_PINMUX_SPI1_SPIMOSI_SEL_OFFSET 0x1c4 #define GC_PINMUX_SPI1_SPIMOSI_SEL_DEFAULT 0x0 #define GC_PINMUX_SPS0_TESTBUS0_SEL_OFFSET 0x1c8 #define GC_PINMUX_SPS0_TESTBUS0_SEL_DEFAULT 0x0 #define GC_PINMUX_SPS0_TESTBUS1_SEL_OFFSET 0x1cc #define GC_PINMUX_SPS0_TESTBUS1_SEL_DEFAULT 0x0 #define GC_PINMUX_SPS0_TESTBUS2_SEL_OFFSET 0x1d0 #define GC_PINMUX_SPS0_TESTBUS2_SEL_DEFAULT 0x0 #define GC_PINMUX_SPS0_TESTBUS3_SEL_OFFSET 0x1d4 #define GC_PINMUX_SPS0_TESTBUS3_SEL_DEFAULT 0x0 #define GC_PINMUX_SPS0_TESTBUS4_SEL_OFFSET 0x1d8 #define GC_PINMUX_SPS0_TESTBUS4_SEL_DEFAULT 0x0 #define GC_PINMUX_SPS0_TESTBUS5_SEL_OFFSET 0x1dc #define GC_PINMUX_SPS0_TESTBUS5_SEL_DEFAULT 0x0 #define GC_PINMUX_SPS0_TESTBUS6_SEL_OFFSET 0x1e0 #define GC_PINMUX_SPS0_TESTBUS6_SEL_DEFAULT 0x0 #define GC_PINMUX_SPS0_TESTBUS7_SEL_OFFSET 0x1e4 #define GC_PINMUX_SPS0_TESTBUS7_SEL_DEFAULT 0x0 #define GC_PINMUX_TEMP0_TST_ADC_CLK_SEL_OFFSET 0x1e8 #define GC_PINMUX_TEMP0_TST_ADC_CLK_SEL_DEFAULT 0x0 #define GC_PINMUX_TEMP0_TST_ADC_HI_SER_SEL_OFFSET 0x1ec #define GC_PINMUX_TEMP0_TST_ADC_HI_SER_SEL_DEFAULT 0x0 #define GC_PINMUX_TEMP0_TST_ADC_LO_SER_SEL_OFFSET 0x1f0 #define GC_PINMUX_TEMP0_TST_ADC_LO_SER_SEL_DEFAULT 0x0 #define GC_PINMUX_TEMP0_TST_ADC_VLD_SER_SEL_OFFSET 0x1f4 #define GC_PINMUX_TEMP0_TST_ADC_VLD_SER_SEL_DEFAULT 0x0 #define GC_PINMUX_TRNG0_TRNG_RO_DIV_SEL_OFFSET 0x1f8 #define GC_PINMUX_TRNG0_TRNG_RO_DIV_SEL_DEFAULT 0x0 #define GC_PINMUX_TRNG0_TRNG_RO_REF_DIV_SEL_OFFSET 0x1fc #define GC_PINMUX_TRNG0_TRNG_RO_REF_DIV_SEL_DEFAULT 0x0 #define GC_PINMUX_UART0_CTS_SEL_OFFSET 0x200 #define GC_PINMUX_UART0_CTS_SEL_DEFAULT 0x0 #define GC_PINMUX_UART0_RTS_SEL_OFFSET 0x204 #define GC_PINMUX_UART0_RTS_SEL_DEFAULT 0x0 #define GC_PINMUX_UART0_RX_SEL_OFFSET 0x208 #define GC_PINMUX_UART0_RX_SEL_DEFAULT 0x0 #define GC_PINMUX_UART0_TX_SEL_OFFSET 0x20c #define GC_PINMUX_UART0_TX_SEL_DEFAULT 0x0 #define GC_PINMUX_UART1_CTS_SEL_OFFSET 0x210 #define GC_PINMUX_UART1_CTS_SEL_DEFAULT 0x0 #define GC_PINMUX_UART1_RTS_SEL_OFFSET 0x214 #define GC_PINMUX_UART1_RTS_SEL_DEFAULT 0x0 #define GC_PINMUX_UART1_RX_SEL_OFFSET 0x218 #define GC_PINMUX_UART1_RX_SEL_DEFAULT 0x0 #define GC_PINMUX_UART1_TX_SEL_OFFSET 0x21c #define GC_PINMUX_UART1_TX_SEL_DEFAULT 0x0 #define GC_PINMUX_UART2_CTS_SEL_OFFSET 0x220 #define GC_PINMUX_UART2_CTS_SEL_DEFAULT 0x0 #define GC_PINMUX_UART2_RTS_SEL_OFFSET 0x224 #define GC_PINMUX_UART2_RTS_SEL_DEFAULT 0x0 #define GC_PINMUX_UART2_RX_SEL_OFFSET 0x228 #define GC_PINMUX_UART2_RX_SEL_DEFAULT 0x0 #define GC_PINMUX_UART2_TX_SEL_OFFSET 0x22c #define GC_PINMUX_UART2_TX_SEL_DEFAULT 0x0 #define GC_PINMUX_USB0_EXT_DM_PULLUP_EN_SEL_OFFSET 0x230 #define GC_PINMUX_USB0_EXT_DM_PULLUP_EN_SEL_DEFAULT 0x0 #define GC_PINMUX_USB0_EXT_DP_RPU1_ENB_SEL_OFFSET 0x234 #define GC_PINMUX_USB0_EXT_DP_RPU1_ENB_SEL_DEFAULT 0x0 #define GC_PINMUX_USB0_EXT_DP_RPU2_ENB_SEL_OFFSET 0x238 #define GC_PINMUX_USB0_EXT_DP_RPU2_ENB_SEL_DEFAULT 0x0 #define GC_PINMUX_USB0_EXT_FS_EDGE_SEL_SEL_OFFSET 0x23c #define GC_PINMUX_USB0_EXT_FS_EDGE_SEL_SEL_DEFAULT 0x0 #define GC_PINMUX_USB0_EXT_RX_DMI_SEL_OFFSET 0x240 #define GC_PINMUX_USB0_EXT_RX_DMI_SEL_DEFAULT 0x0 #define GC_PINMUX_USB0_EXT_RX_DPI_SEL_OFFSET 0x244 #define GC_PINMUX_USB0_EXT_RX_DPI_SEL_DEFAULT 0x0 #define GC_PINMUX_USB0_EXT_RX_RCV_SEL_OFFSET 0x248 #define GC_PINMUX_USB0_EXT_RX_RCV_SEL_DEFAULT 0x0 #define GC_PINMUX_USB0_EXT_SUSPENDB_SEL_OFFSET 0x24c #define GC_PINMUX_USB0_EXT_SUSPENDB_SEL_DEFAULT 0x0 #define GC_PINMUX_USB0_EXT_TX_DMO_SEL_OFFSET 0x250 #define GC_PINMUX_USB0_EXT_TX_DMO_SEL_DEFAULT 0x0 #define GC_PINMUX_USB0_EXT_TX_DPO_SEL_OFFSET 0x254 #define GC_PINMUX_USB0_EXT_TX_DPO_SEL_DEFAULT 0x0 #define GC_PINMUX_USB0_EXT_TX_OEB_SEL_OFFSET 0x258 #define GC_PINMUX_USB0_EXT_TX_OEB_SEL_DEFAULT 0x0 #define GC_PINMUX_VOLT0_TST_NEG_GLITCH_DET_SEL_OFFSET 0x25c #define GC_PINMUX_VOLT0_TST_NEG_GLITCH_DET_SEL_DEFAULT 0x0 #define GC_PINMUX_VOLT0_TST_POS_GLITCH_DET_SEL_OFFSET 0x260 #define GC_PINMUX_VOLT0_TST_POS_GLITCH_DET_SEL_DEFAULT 0x0 #define GC_PINMUX_XO0_TESTBUS0_SEL_OFFSET 0x264 #define GC_PINMUX_XO0_TESTBUS0_SEL_DEFAULT 0x0 #define GC_PINMUX_XO0_TESTBUS1_SEL_OFFSET 0x268 #define GC_PINMUX_XO0_TESTBUS1_SEL_DEFAULT 0x0 #define GC_PINMUX_XO0_TESTBUS2_SEL_OFFSET 0x26c #define GC_PINMUX_XO0_TESTBUS2_SEL_DEFAULT 0x0 #define GC_PINMUX_XO0_TESTBUS3_SEL_OFFSET 0x270 #define GC_PINMUX_XO0_TESTBUS3_SEL_DEFAULT 0x0 #define GC_PINMUX_XO0_TESTBUS4_SEL_OFFSET 0x274 #define GC_PINMUX_XO0_TESTBUS4_SEL_DEFAULT 0x0 #define GC_PINMUX_XO0_TESTBUS5_SEL_OFFSET 0x278 #define GC_PINMUX_XO0_TESTBUS5_SEL_DEFAULT 0x0 #define GC_PINMUX_XO0_TESTBUS6_SEL_OFFSET 0x27c #define GC_PINMUX_XO0_TESTBUS6_SEL_DEFAULT 0x0 #define GC_PINMUX_XO0_TESTBUS7_SEL_OFFSET 0x280 #define GC_PINMUX_XO0_TESTBUS7_SEL_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DEFAULT 0x0 #define GC_PINMUX_HOLD_OFFSET 0x290 #define GC_PINMUX_HOLD_DEFAULT 0x0 #define GC_PMU_RESET_OFFSET 0x0 #define GC_PMU_RESET_DEFAULT 0x3 #define GC_PMU_SETRST_OFFSET 0x4 #define GC_PMU_SETRST_DEFAULT 0x0 #define GC_PMU_CLRRST_OFFSET 0x8 #define GC_PMU_CLRRST_DEFAULT 0x0 #define GC_PMU_RSTSRC_OFFSET 0xc #define GC_PMU_RSTSRC_DEFAULT 0x0 #define GC_PMU_GLOBAL_RESET_OFFSET 0x10 #define GC_PMU_GLOBAL_RESET_DEFAULT 0x0 #define GC_PMU_GLOBAL_RESET_KEY 0x7041776 #define GC_PMU_LOW_POWER_DIS_OFFSET 0x14 #define GC_PMU_LOW_POWER_DIS_DEFAULT 0x1e #define GC_PMU_LOW_POWER_BYPASS_OFFSET 0x18 #define GC_PMU_LOW_POWER_BYPASS_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VALUE_OFFSET 0x1c #define GC_PMU_LOW_POWER_BYPASS_VALUE_DEFAULT 0x0 #define GC_PMU_SETWIC_OFFSET 0x20 #define GC_PMU_SETWIC_DEFAULT 0x0 #define GC_PMU_CLRWIC_OFFSET 0x24 #define GC_PMU_CLRWIC_DEFAULT 0x0 #define GC_PMU_SYSVTOR_OFFSET 0x28 #define GC_PMU_SYSVTOR_DEFAULT 0xffffffff #define GC_PMU_NAP_EN_OFFSET 0x2c #define GC_PMU_NAP_EN_DEFAULT 0x0 #define GC_PMU_SW_PDB_OFFSET 0x30 #define GC_PMU_SW_PDB_DEFAULT 0x0 #define GC_PMU_SW_PDB_SECURE_OFFSET 0x34 #define GC_PMU_SW_PDB_SECURE_DEFAULT 0x0 #define GC_PMU_VREF_OFFSET 0x38 #define GC_PMU_VREF_DEFAULT 0xdb #define GC_PMU_XTL_OSC_BYPASS_OFFSET 0x3c #define GC_PMU_XTL_OSC_BYPASS_DEFAULT 0x0 #define GC_PMU_FLASH_TM0_TEST_EN_BYPASS_OFFSET 0x40 #define GC_PMU_FLASH_TM0_TEST_EN_BYPASS_DEFAULT 0x0 #define GC_PMU_BAT_LVL_OK_OFFSET 0x44 #define GC_PMU_BAT_LVL_OK_DEFAULT 0x0 #define GC_PMU_B_REG_DIG_CTRL_OFFSET 0x48 #define GC_PMU_B_REG_DIG_CTRL_DEFAULT 0x2 #define GC_PMU_EXITPD_MASK_OFFSET 0x4c #define GC_PMU_EXITPD_MASK_DEFAULT 0x0 #define GC_PMU_EXITPD_SRC_OFFSET 0x50 #define GC_PMU_EXITPD_SRC_DEFAULT 0x0 #define GC_PMU_EXITPD_MON_OFFSET 0x54 #define GC_PMU_EXITPD_MON_DEFAULT 0x0 #define GC_PMU_OSC_CTRL_OFFSET 0x58 #define GC_PMU_OSC_CTRL_DEFAULT 0x1 #define GC_PMU_MEMCLKSET_OFFSET 0x5c #define GC_PMU_MEMCLKSET_DEFAULT 0x7f #define GC_PMU_MEMCLKCLR_OFFSET 0x60 #define GC_PMU_MEMCLKCLR_DEFAULT 0x7f #define GC_PMU_PERICLKSET0_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DEFAULT 0xff3fe0fb #define GC_PMU_PERICLKCLR0_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DEFAULT 0xff3fe0fb #define GC_PMU_PERICLKSET1_OFFSET 0x6c #define GC_PMU_PERICLKSET1_DEFAULT 0xff10 #define GC_PMU_PERICLKCLR1_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_DEFAULT 0xff10 #define GC_PMU_CLK_RO_MASK0_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DEFAULT 0x800fc0e1 #define GC_PMU_CLK_RO_MASK1_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_DEFAULT 0xcc00 #define GC_PMU_PERIGATEONSLEEPSET0_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_DEFAULT 0x0 #define GC_PMU_CLK0_OFFSET 0x8c #define GC_PMU_CLK0_DEFAULT 0x1f #define GC_PMU_RST0_WR_EN_OFFSET 0x90 #define GC_PMU_RST0_WR_EN_DEFAULT 0x1 #define GC_PMU_RST0_OFFSET 0x94 #define GC_PMU_RST0_DEFAULT 0x0 #define GC_PMU_RST1_WR_EN_OFFSET 0x98 #define GC_PMU_RST1_WR_EN_DEFAULT 0x1 #define GC_PMU_RST1_OFFSET 0x9c #define GC_PMU_RST1_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH0_OFFSET 0xa0 #define GC_PMU_PWRDN_SCRATCH0_DEFAULT 0x7020eceb #define GC_PMU_PWRDN_SCRATCH1_OFFSET 0xa4 #define GC_PMU_PWRDN_SCRATCH1_DEFAULT 0x2ebe9116 #define GC_PMU_PWRDN_SCRATCH2_OFFSET 0xa8 #define GC_PMU_PWRDN_SCRATCH2_DEFAULT 0x13b4a4d9 #define GC_PMU_PWRDN_SCRATCH3_OFFSET 0xac #define GC_PMU_PWRDN_SCRATCH3_DEFAULT 0x3d2dd072 #define GC_PMU_PWRDN_SCRATCH4_OFFSET 0xb0 #define GC_PMU_PWRDN_SCRATCH4_DEFAULT 0x13eda68b #define GC_PMU_PWRDN_SCRATCH5_OFFSET 0xb4 #define GC_PMU_PWRDN_SCRATCH5_DEFAULT 0x295c9f66 #define GC_PMU_PWRDN_SCRATCH6_OFFSET 0xb8 #define GC_PMU_PWRDN_SCRATCH6_DEFAULT 0x2a23c2db #define GC_PMU_PWRDN_SCRATCH7_OFFSET 0xbc #define GC_PMU_PWRDN_SCRATCH7_DEFAULT 0x8ef4ab68 #define GC_PMU_PWRDN_SCRATCH8_OFFSET 0xc0 #define GC_PMU_PWRDN_SCRATCH8_DEFAULT 0x35057fa1 #define GC_PMU_PWRDN_SCRATCH9_OFFSET 0xc4 #define GC_PMU_PWRDN_SCRATCH9_DEFAULT 0x4bfc60a3 #define GC_PMU_PWRDN_SCRATCH10_OFFSET 0xc8 #define GC_PMU_PWRDN_SCRATCH10_DEFAULT 0xa82ff9e #define GC_PMU_PWRDN_SCRATCH11_OFFSET 0xcc #define GC_PMU_PWRDN_SCRATCH11_DEFAULT 0x3898bda0 #define GC_PMU_PWRDN_SCRATCH12_OFFSET 0xd0 #define GC_PMU_PWRDN_SCRATCH12_DEFAULT 0x3c64367b #define GC_PMU_PWRDN_SCRATCH13_OFFSET 0xd4 #define GC_PMU_PWRDN_SCRATCH13_DEFAULT 0x1f653095 #define GC_PMU_PWRDN_SCRATCH14_OFFSET 0xd8 #define GC_PMU_PWRDN_SCRATCH14_DEFAULT 0x21d285ad #define GC_PMU_PWRDN_SCRATCH15_OFFSET 0xdc #define GC_PMU_PWRDN_SCRATCH15_DEFAULT 0x2fe32196 #define GC_PMU_PWRDN_SCRATCH16_OFFSET 0xe0 #define GC_PMU_PWRDN_SCRATCH16_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH17_OFFSET 0xe4 #define GC_PMU_PWRDN_SCRATCH17_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH18_OFFSET 0xe8 #define GC_PMU_PWRDN_SCRATCH18_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH19_OFFSET 0xec #define GC_PMU_PWRDN_SCRATCH19_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH20_OFFSET 0xf0 #define GC_PMU_PWRDN_SCRATCH20_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH21_OFFSET 0xf4 #define GC_PMU_PWRDN_SCRATCH21_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH22_OFFSET 0xf8 #define GC_PMU_PWRDN_SCRATCH22_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH23_OFFSET 0xfc #define GC_PMU_PWRDN_SCRATCH23_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH24_OFFSET 0x100 #define GC_PMU_PWRDN_SCRATCH24_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH25_OFFSET 0x104 #define GC_PMU_PWRDN_SCRATCH25_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH26_OFFSET 0x108 #define GC_PMU_PWRDN_SCRATCH26_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH27_OFFSET 0x10c #define GC_PMU_PWRDN_SCRATCH27_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH28_OFFSET 0x110 #define GC_PMU_PWRDN_SCRATCH28_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH29_OFFSET 0x114 #define GC_PMU_PWRDN_SCRATCH29_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH30_OFFSET 0x118 #define GC_PMU_PWRDN_SCRATCH30_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH31_OFFSET 0x11c #define GC_PMU_PWRDN_SCRATCH31_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH_LOCK_OFFSET 0x120 #define GC_PMU_PWRDN_SCRATCH_LOCK_DEFAULT 0x0 #define GC_PMU_PWRDN_SCRATCH_LOCK1_OFFSET 0x124 #define GC_PMU_PWRDN_SCRATCH_LOCK1_DEFAULT 0x0 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_OFFSET 0x128 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_DEFAULT 0x0 #define GC_PMU_LONG_LIFE_SCRATCH0_OFFSET 0x12c #define GC_PMU_LONG_LIFE_SCRATCH0_DEFAULT 0x0 #define GC_PMU_LONG_LIFE_SCRATCH1_OFFSET 0x130 #define GC_PMU_LONG_LIFE_SCRATCH1_DEFAULT 0x0 #define GC_PMU_LONG_LIFE_SCRATCH2_OFFSET 0x134 #define GC_PMU_LONG_LIFE_SCRATCH2_DEFAULT 0x0 #define GC_PMU_LONG_LIFE_SCRATCH3_OFFSET 0x138 #define GC_PMU_LONG_LIFE_SCRATCH3_DEFAULT 0x0 #define GC_PMU_INT_ENABLE_OFFSET 0x13c #define GC_PMU_INT_ENABLE_DEFAULT 0x0 #define GC_PMU_INT_STATE_OFFSET 0x140 #define GC_PMU_INT_STATE_DEFAULT 0x0 #define GC_PMU_INT_TEST_OFFSET 0x144 #define GC_PMU_INT_TEST_DEFAULT 0x0 #define GC_PMU_ANTEST_TOP_CTRL_OFFSET 0x1008 #define GC_PMU_ANTEST_TOP_CTRL_DEFAULT 0x3 #define GC_PMU_ANTEST_REGDIG_OFFSET 0x1010 #define GC_PMU_ANTEST_REGDIG_DEFAULT 0x0 #define GC_PMU_TESTBUS_CTRL_BOUT_EN_OFFSET 0x2000 #define GC_PMU_TESTBUS_CTRL_BOUT_EN_DEFAULT 0x0 #define GC_PMU_TESTBUS_CTRL_OFFSET 0x2004 #define GC_PMU_TESTBUS_CTRL_DEFAULT 0x0 #define GC_PMU_TESTBUS_STATUS_OFFSET 0x2008 #define GC_PMU_TESTBUS_STATUS_DEFAULT 0x0 #define GC_PMU_CHIP_ID_OFFSET 0x1fff8 #define GC_PMU_CHIP_ID_DEFAULT 0x1485694d #define GC_PMU_VERSION_OFFSET 0x1fffc #define GC_PMU_VERSION_DEFAULT 0x24011f6d #define GC_RBOX_INT_ENABLE_OFFSET 0x0 #define GC_RBOX_INT_ENABLE_DEFAULT 0x0 #define GC_RBOX_INT_STATE_OFFSET 0x4 #define GC_RBOX_INT_STATE_DEFAULT 0x0 #define GC_RBOX_INT_TEST_OFFSET 0x8 #define GC_RBOX_INT_TEST_DEFAULT 0x0 #define GC_RBOX_EC_WP_L_OFFSET 0xc #define GC_RBOX_EC_WP_L_DEFAULT 0x0 #define GC_RBOX_ASSERT_EC_RST_OFFSET 0x10 #define GC_RBOX_ASSERT_EC_RST_DEFAULT 0x0 #define GC_RBOX_OVERRIDE_OUTPUT_OFFSET 0x14 #define GC_RBOX_OVERRIDE_OUTPUT_DEFAULT 0x2e80 #define GC_RBOX_CHECK_INPUT_OFFSET 0x18 #define GC_RBOX_CHECK_INPUT_DEFAULT 0x0 #define GC_RBOX_CHECK_OUTPUT_OFFSET 0x1c #define GC_RBOX_CHECK_OUTPUT_DEFAULT 0x0 #define GC_RBOX_CHECK_OEN_OFFSET 0x20 #define GC_RBOX_CHECK_OEN_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_DEFAULT 0x0 #define GC_RBOX_STATUS_OFFSET 0x28 #define GC_RBOX_STATUS_DEFAULT 0x0 #define GC_RBOX_FUSE_CTRL_OFFSET 0x2c #define GC_RBOX_FUSE_CTRL_DEFAULT 0x0 #define GC_RBOX_DEBUG_DEBOUNCE_OFFSET 0x30 #define GC_RBOX_DEBUG_DEBOUNCE_DEFAULT 0x70000 #define GC_RBOX_DEBUG_KEY_COMBO0_OFFSET 0x34 #define GC_RBOX_DEBUG_KEY_COMBO0_DEFAULT 0xc0 #define GC_RBOX_DEBUG_KEY_COMBO1_OFFSET 0x38 #define GC_RBOX_DEBUG_KEY_COMBO1_DEFAULT 0x0 #define GC_RBOX_DEBUG_KEY_COMBO2_OFFSET 0x3c #define GC_RBOX_DEBUG_KEY_COMBO2_DEFAULT 0x0 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_OFFSET 0x40 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_DEFAULT 0x0 #define GC_RBOX_DEBUG_POL_OFFSET 0x44 #define GC_RBOX_DEBUG_POL_DEFAULT 0x1 #define GC_RBOX_DEBUG_TERM_OFFSET 0x48 #define GC_RBOX_DEBUG_TERM_DEFAULT 0x0 #define GC_RBOX_DEBUG_DRIVE_OFFSET 0x4c #define GC_RBOX_DEBUG_DRIVE_DEFAULT 0x17f #define GC_RBOX_DEBUG_CLK10HZ_COUNT_OFFSET 0x50 #define GC_RBOX_DEBUG_CLK10HZ_COUNT_DEFAULT 0x63ff #define GC_RBOX_DEBUG_SHORT_DELAY_COUNT_OFFSET 0x54 #define GC_RBOX_DEBUG_SHORT_DELAY_COUNT_DEFAULT 0x4ff #define GC_RBOX_DEBUG_LONG_DELAY_COUNT_OFFSET 0x58 #define GC_RBOX_DEBUG_LONG_DELAY_COUNT_DEFAULT 0x31 #define GC_RBOX_CHECK_STATE_ENABLE_OFFSET 0x5c #define GC_RBOX_CHECK_STATE_ENABLE_DEFAULT 0x0 #define GC_RBOX_CHECK_STATE0_OFFSET 0x60 #define GC_RBOX_CHECK_STATE0_DEFAULT 0x0 #define GC_RBOX_CHECK_STATE1_OFFSET 0x64 #define GC_RBOX_CHECK_STATE1_DEFAULT 0x0 #define GC_RBOX_CHECK_STATE2_OFFSET 0x68 #define GC_RBOX_CHECK_STATE2_DEFAULT 0x0 #define GC_RBOX_CONFIG_DEBOUNCE_OFFSET 0x6c #define GC_RBOX_CONFIG_DEBOUNCE_DEFAULT 0x0 #define GC_RBOX_CONFIG_KEY_COMBO0_OFFSET 0x70 #define GC_RBOX_CONFIG_KEY_COMBO0_DEFAULT 0x0 #define GC_RBOX_CONFIG_KEY_COMBO1_OFFSET 0x74 #define GC_RBOX_CONFIG_KEY_COMBO1_DEFAULT 0x0 #define GC_RBOX_CONFIG_KEY_COMBO2_OFFSET 0x78 #define GC_RBOX_CONFIG_KEY_COMBO2_DEFAULT 0x0 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_OFFSET 0x7c #define GC_RBOX_CONFIG_BLOCK_OUTPUT_DEFAULT 0x0 #define GC_RBOX_CONFIG_POL_OFFSET 0x80 #define GC_RBOX_CONFIG_POL_DEFAULT 0x1 #define GC_RBOX_CONFIG_TERM_OFFSET 0x84 #define GC_RBOX_CONFIG_TERM_DEFAULT 0x0 #define GC_RBOX_CONFIG_DRIVE_OFFSET 0x88 #define GC_RBOX_CONFIG_DRIVE_DEFAULT 0x0 #define GC_RBOX_CONFIG_CLK10HZ_COUNT_OFFSET 0x8c #define GC_RBOX_CONFIG_CLK10HZ_COUNT_DEFAULT 0x0 #define GC_RBOX_CONFIG_SHORT_DELAY_COUNT_OFFSET 0x90 #define GC_RBOX_CONFIG_SHORT_DELAY_COUNT_DEFAULT 0x0 #define GC_RBOX_CONFIG_LONG_DELAY_COUNT_OFFSET 0x94 #define GC_RBOX_CONFIG_LONG_DELAY_COUNT_DEFAULT 0x0 #define GC_RBOX_WAKEUP_OFFSET 0x98 #define GC_RBOX_WAKEUP_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_OFFSET 0x9c #define GC_RBOX_WAKEUP_INTR_DEFAULT 0x0 #define GC_RBOX_VERSION_OFFSET 0xa0 #define GC_RBOX_VERSION_DEFAULT 0x1014125 #define GC_RDD_VERSION_OFFSET 0x0 #define GC_RDD_VERSION_DEFAULT 0x24011f09 #define GC_RDD_INT_ENABLE_OFFSET 0x4 #define GC_RDD_INT_ENABLE_DEFAULT 0x0 #define GC_RDD_INT_STATE_OFFSET 0x8 #define GC_RDD_INT_STATE_DEFAULT 0x0 #define GC_RDD_INT_TEST_OFFSET 0xc #define GC_RDD_INT_TEST_DEFAULT 0x0 #define GC_RDD_POWER_DOWN_B_OFFSET 0x10 #define GC_RDD_POWER_DOWN_B_DEFAULT 0x0 #define GC_RDD_ANTEST_OFFSET 0x14 #define GC_RDD_ANTEST_DEFAULT 0x0 #define GC_RDD_MAX_WAIT_TIME_COUNTER_OFFSET 0x18 #define GC_RDD_MAX_WAIT_TIME_COUNTER_DEFAULT 0xc80 #define GC_RDD_CUR_WAIT_TIME_COUNTER_OFFSET 0x1c #define GC_RDD_CUR_WAIT_TIME_COUNTER_DEFAULT 0x0 #define GC_RDD_REF_ADJ_OFFSET 0x20 #define GC_RDD_REF_ADJ_DEFAULT 0x15 #define GC_RDD_INPUT_PIN_VALUES_OFFSET 0x24 #define GC_RDD_INPUT_PIN_VALUES_DEFAULT 0x18 #define GC_RDD_PROG_DEBUG_STATE_MAP_OFFSET 0x28 #define GC_RDD_PROG_DEBUG_STATE_MAP_DEFAULT 0x420 #define GC_RDD_CUR_STABLE_STATE_OFFSET 0x2c #define GC_RDD_CUR_STABLE_STATE_DEFAULT 0x2 #define GC_RTC_CTRL_OFFSET 0x0 #define GC_RTC_CTRL_DEFAULT 0x0 #define GC_RTC_PINMUX_EN_OFFSET 0x4 #define GC_RTC_PINMUX_EN_DEFAULT 0x0 #define GC_RTC_PULSE_STRETCH_OFFSET 0x8 #define GC_RTC_PULSE_STRETCH_DEFAULT 0x0 #define GC_RTC_SW_TRIM_EN_OFFSET 0xc #define GC_RTC_SW_TRIM_EN_DEFAULT 0x0 #define GC_RTC_SW_TRIM_COUNTER_OFFSET 0x10 #define GC_RTC_SW_TRIM_COUNTER_DEFAULT 0x0 #define GC_SPI_CTRL_OFFSET 0x0 #define GC_SPI_CTRL_DEFAULT 0x2800800 #define GC_SPI_XACT_OFFSET 0x4 #define GC_SPI_XACT_DEFAULT 0xe #define GC_SPI_ICTRL_OFFSET 0x8 #define GC_SPI_ICTRL_DEFAULT 0x0 #define GC_SPI_ISTATE_OFFSET 0xc #define GC_SPI_ISTATE_DEFAULT 0x0 #define GC_SPI_ISTATE_CLR_OFFSET 0x10 #define GC_SPI_ISTATE_CLR_DEFAULT 0x0 #define GC_SPI_OVRD_OFFSET 0x14 #define GC_SPI_OVRD_DEFAULT 0x8 #define GC_SPI_VAL_OFFSET 0x18 #define GC_SPI_VAL_DEFAULT 0x0 #define GC_SPI_ITCR_OFFSET 0xf00 #define GC_SPI_ITCR_DEFAULT 0x0 #define GC_SPI_ITOP_OFFSET 0xf04 #define GC_SPI_ITOP_DEFAULT 0x0 #define GC_SPI_DATA_OFFSET 0x1000 #define GC_SPI_TX_DATA_OFFSET 0x1000 #define GC_SPI_RX_DATA_OFFSET 0x1080 #define GC_SPS_CTRL_OFFSET 0x0 #define GC_SPS_CTRL_DEFAULT 0x1 #define GC_SPS_DUMMY_WORD_OFFSET 0x4 #define GC_SPS_DUMMY_WORD_DEFAULT 0xff #define GC_SPS_STATUS01_OFFSET 0x8 #define GC_SPS_STATUS01_DEFAULT 0x0 #define GC_SPS_STATUS23_OFFSET 0xc #define GC_SPS_STATUS23_DEFAULT 0x0 #define GC_SPS_STATUS45_OFFSET 0x10 #define GC_SPS_STATUS45_DEFAULT 0x0 #define GC_SPS_STATUS67_OFFSET 0x14 #define GC_SPS_STATUS67_DEFAULT 0x0 #define GC_SPS_CTRL01_OFFSET 0x18 #define GC_SPS_CTRL01_DEFAULT 0x0 #define GC_SPS_CTRL23_OFFSET 0x1c #define GC_SPS_CTRL23_DEFAULT 0x0 #define GC_SPS_CTRL45_OFFSET 0x20 #define GC_SPS_CTRL45_DEFAULT 0x0 #define GC_SPS_CTRL67_OFFSET 0x24 #define GC_SPS_CTRL67_DEFAULT 0x0 #define GC_SPS_FIFO_CTRL_OFFSET 0x28 #define GC_SPS_FIFO_CTRL_DEFAULT 0x0 #define GC_SPS_TXFIFO_SIZE_OFFSET 0x2c #define GC_SPS_TXFIFO_SIZE_DEFAULT 0x0 #define GC_SPS_TXFIFO_RPTR_OFFSET 0x30 #define GC_SPS_TXFIFO_RPTR_DEFAULT 0x0 #define GC_SPS_TXFIFO_WPTR_OFFSET 0x34 #define GC_SPS_TXFIFO_WPTR_DEFAULT 0x0 #define GC_SPS_TXFIFO_THRESHOLD_OFFSET 0x38 #define GC_SPS_TXFIFO_THRESHOLD_DEFAULT 0x0 #define GC_SPS_RXFIFO_SIZE_OFFSET 0x3c #define GC_SPS_RXFIFO_SIZE_DEFAULT 0x0 #define GC_SPS_RXFIFO_RPTR_OFFSET 0x40 #define GC_SPS_RXFIFO_RPTR_DEFAULT 0x0 #define GC_SPS_RXFIFO_WPTR_OFFSET 0x44 #define GC_SPS_RXFIFO_WPTR_DEFAULT 0x0 #define GC_SPS_RXFIFO_THRESHOLD_OFFSET 0x48 #define GC_SPS_RXFIFO_THRESHOLD_DEFAULT 0x0 #define GC_SPS_OVRD_OFFSET 0x4c #define GC_SPS_OVRD_DEFAULT 0x0 #define GC_SPS_VAL_OFFSET 0x50 #define GC_SPS_VAL_DEFAULT 0x0 #define GC_SPS_ISTATE_OFFSET 0x54 #define GC_SPS_ISTATE_DEFAULT 0x0 #define GC_SPS_ISTATE_CLR_OFFSET 0x58 #define GC_SPS_ISTATE_CLR_DEFAULT 0x0 #define GC_SPS_ITCR_OFFSET 0x5c #define GC_SPS_ITCR_DEFAULT 0x0 #define GC_SPS_ITOP_OFFSET 0x60 #define GC_SPS_ITOP_DEFAULT 0x0 #define GC_SPS_ICTRL_OFFSET 0x64 #define GC_SPS_ICTRL_DEFAULT 0x0 #define GC_SPS_EEPROM_CTRL_OFFSET 0x400 #define GC_SPS_EEPROM_CTRL_DEFAULT 0x480 #define GC_SPS_MAILBOX_RD_OPCODE_OFFSET 0x404 #define GC_SPS_MAILBOX_RD_OPCODE_DEFAULT 0x0 #define GC_SPS_FAST_DUAL_RD_OPCODE_OFFSET 0x408 #define GC_SPS_FAST_DUAL_RD_OPCODE_DEFAULT 0x3b #define GC_SPS_BUSY_OPCODE0_OFFSET 0x40c #define GC_SPS_BUSY_OPCODE0_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE1_OFFSET 0x410 #define GC_SPS_BUSY_OPCODE1_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE2_OFFSET 0x414 #define GC_SPS_BUSY_OPCODE2_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE3_OFFSET 0x418 #define GC_SPS_BUSY_OPCODE3_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE4_OFFSET 0x41c #define GC_SPS_BUSY_OPCODE4_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE5_OFFSET 0x420 #define GC_SPS_BUSY_OPCODE5_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE6_OFFSET 0x424 #define GC_SPS_BUSY_OPCODE6_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE7_OFFSET 0x428 #define GC_SPS_BUSY_OPCODE7_DEFAULT 0x0 #define GC_SPS_EEPROM_STATUS_OFFSET 0x42c #define GC_SPS_EEPROM_STATUS_DEFAULT 0x0 #define GC_SPS_EEPROM_BUSY_STATUS_OFFSET 0x430 #define GC_SPS_EEPROM_BUSY_STATUS_DEFAULT 0x0 #define GC_SPS_EEPROM_BUSY_BIT_VECTOR_OFFSET 0x434 #define GC_SPS_EEPROM_BUSY_BIT_VECTOR_DEFAULT 0x1 #define GC_SPS_EEPROM_WEL_STATUS_OFFSET 0x438 #define GC_SPS_EEPROM_WEL_STATUS_DEFAULT 0x0 #define GC_SPS_JEDEC_ID0_OFFSET 0x43c #define GC_SPS_JEDEC_ID0_DEFAULT 0x0 #define GC_SPS_JEDEC_ID1_OFFSET 0x440 #define GC_SPS_JEDEC_ID1_DEFAULT 0x0 #define GC_SPS_JEDEC_ID2_OFFSET 0x444 #define GC_SPS_JEDEC_ID2_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM0_OFFSET 0x448 #define GC_SPS_SELF_DISCV_PARAM0_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM1_OFFSET 0x44c #define GC_SPS_SELF_DISCV_PARAM1_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM2_OFFSET 0x450 #define GC_SPS_SELF_DISCV_PARAM2_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM3_OFFSET 0x454 #define GC_SPS_SELF_DISCV_PARAM3_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM4_OFFSET 0x458 #define GC_SPS_SELF_DISCV_PARAM4_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM5_OFFSET 0x45c #define GC_SPS_SELF_DISCV_PARAM5_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM6_OFFSET 0x460 #define GC_SPS_SELF_DISCV_PARAM6_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM7_OFFSET 0x464 #define GC_SPS_SELF_DISCV_PARAM7_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM8_OFFSET 0x468 #define GC_SPS_SELF_DISCV_PARAM8_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM9_OFFSET 0x46c #define GC_SPS_SELF_DISCV_PARAM9_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM10_OFFSET 0x470 #define GC_SPS_SELF_DISCV_PARAM10_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM11_OFFSET 0x474 #define GC_SPS_SELF_DISCV_PARAM11_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM12_OFFSET 0x478 #define GC_SPS_SELF_DISCV_PARAM12_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM13_OFFSET 0x47c #define GC_SPS_SELF_DISCV_PARAM13_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM14_OFFSET 0x480 #define GC_SPS_SELF_DISCV_PARAM14_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM15_OFFSET 0x484 #define GC_SPS_SELF_DISCV_PARAM15_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM16_OFFSET 0x488 #define GC_SPS_SELF_DISCV_PARAM16_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM17_OFFSET 0x48c #define GC_SPS_SELF_DISCV_PARAM17_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM18_OFFSET 0x490 #define GC_SPS_SELF_DISCV_PARAM18_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM19_OFFSET 0x494 #define GC_SPS_SELF_DISCV_PARAM19_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM20_OFFSET 0x498 #define GC_SPS_SELF_DISCV_PARAM20_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM21_OFFSET 0x49c #define GC_SPS_SELF_DISCV_PARAM21_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM22_OFFSET 0x4a0 #define GC_SPS_SELF_DISCV_PARAM22_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM23_OFFSET 0x4a4 #define GC_SPS_SELF_DISCV_PARAM23_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM24_OFFSET 0x4a8 #define GC_SPS_SELF_DISCV_PARAM24_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM25_OFFSET 0x4ac #define GC_SPS_SELF_DISCV_PARAM25_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM26_OFFSET 0x4b0 #define GC_SPS_SELF_DISCV_PARAM26_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM27_OFFSET 0x4b4 #define GC_SPS_SELF_DISCV_PARAM27_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM28_OFFSET 0x4b8 #define GC_SPS_SELF_DISCV_PARAM28_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM29_OFFSET 0x4bc #define GC_SPS_SELF_DISCV_PARAM29_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM30_OFFSET 0x4c0 #define GC_SPS_SELF_DISCV_PARAM30_DEFAULT 0x0 #define GC_SPS_SELF_DISCV_PARAM31_OFFSET 0x4c4 #define GC_SPS_SELF_DISCV_PARAM31_DEFAULT 0x0 #define GC_SPS_UNMAPPED_RETURN_VAL_OFFSET 0x4c8 #define GC_SPS_UNMAPPED_RETURN_VAL_DEFAULT 0x0 #define GC_SPS_RAM_VIRTUAL_PAGE0_OFFSET 0x4cc #define GC_SPS_RAM_VIRTUAL_PAGE0_DEFAULT 0x0 #define GC_SPS_RAM_VIRTUAL_PAGE1_OFFSET 0x4d0 #define GC_SPS_RAM_VIRTUAL_PAGE1_DEFAULT 0x0 #define GC_SPS_RAM_VIRTUAL_PAGE2_OFFSET 0x4d4 #define GC_SPS_RAM_VIRTUAL_PAGE2_DEFAULT 0x0 #define GC_SPS_RAM_VIRTUAL_PAGE3_OFFSET 0x4d8 #define GC_SPS_RAM_VIRTUAL_PAGE3_DEFAULT 0x0 #define GC_SPS_RAM_CTRL_PAGE0_OFFSET 0x4dc #define GC_SPS_RAM_CTRL_PAGE0_DEFAULT 0x0 #define GC_SPS_RAM_CTRL_PAGE1_OFFSET 0x4e0 #define GC_SPS_RAM_CTRL_PAGE1_DEFAULT 0x0 #define GC_SPS_RAM_CTRL_PAGE2_OFFSET 0x4e4 #define GC_SPS_RAM_CTRL_PAGE2_DEFAULT 0x0 #define GC_SPS_RAM_CTRL_PAGE3_OFFSET 0x4e8 #define GC_SPS_RAM_CTRL_PAGE3_DEFAULT 0x0 #define GC_SPS_INT_FLASH_BASE_PAGE_OFFSET 0x4ec #define GC_SPS_INT_FLASH_BASE_PAGE_DEFAULT 0x0 #define GC_SPS_INT_FLASH_LIMIT_PAGE_OFFSET 0x4f0 #define GC_SPS_INT_FLASH_LIMIT_PAGE_DEFAULT 0x0 #define GC_SPS_EXT_FLASH_BASE_PAGE_OFFSET 0x4f4 #define GC_SPS_EXT_FLASH_BASE_PAGE_DEFAULT 0x0 #define GC_SPS_EXT_FLASH_LIMIT_PAGE_OFFSET 0x4f8 #define GC_SPS_EXT_FLASH_LIMIT_PAGE_DEFAULT 0x0 #define GC_SPS_INT_FLASH_TRANS_BIT_VECTOR_OFFSET 0x4fc #define GC_SPS_INT_FLASH_TRANS_BIT_VECTOR_DEFAULT 0x0 #define GC_SPS_INT_FLASH_TRANS_ADDR_OFFSET 0x500 #define GC_SPS_INT_FLASH_TRANS_ADDR_DEFAULT 0x0 #define GC_SPS_EXT_FLASH_TRANS_BIT_VECTOR_OFFSET 0x504 #define GC_SPS_EXT_FLASH_TRANS_BIT_VECTOR_DEFAULT 0x0 #define GC_SPS_EXT_FLASH_TRANS_ADDR_OFFSET 0x508 #define GC_SPS_EXT_FLASH_TRANS_ADDR_DEFAULT 0x0 #define GC_SPS_CMD_MEM_RPTR_OFFSET 0x50c #define GC_SPS_CMD_MEM_RPTR_DEFAULT 0x0 #define GC_SPS_CMD_ADDR_FIFO_OFFSET 0x510 #define GC_SPS_CMD_ADDR_FIFO_DEFAULT 0x0 #define GC_SPS_CMD_ADDR_FIFO_EMPTY_OFFSET 0x514 #define GC_SPS_CMD_ADDR_FIFO_EMPTY_DEFAULT 0x0 #define GC_SPS_FDA_MSB_ROTATE_BASE_ADDR_OFFSET 0x518 #define GC_SPS_FDA_MSB_ROTATE_BASE_ADDR_DEFAULT 0x0 #define GC_SPS_FDA_MSB_LEVEL2_ROTATE_BASE_ADDR_OFFSET 0x51c #define GC_SPS_FDA_MSB_LEVEL2_ROTATE_BASE_ADDR_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE0_OFFSET 0x520 #define GC_SPS_PASSTHRU_FILTER_RULE0_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE1_OFFSET 0x524 #define GC_SPS_PASSTHRU_FILTER_RULE1_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE2_OFFSET 0x528 #define GC_SPS_PASSTHRU_FILTER_RULE2_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE3_OFFSET 0x52c #define GC_SPS_PASSTHRU_FILTER_RULE3_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE4_OFFSET 0x530 #define GC_SPS_PASSTHRU_FILTER_RULE4_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE5_OFFSET 0x534 #define GC_SPS_PASSTHRU_FILTER_RULE5_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE6_OFFSET 0x538 #define GC_SPS_PASSTHRU_FILTER_RULE6_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE7_OFFSET 0x53c #define GC_SPS_PASSTHRU_FILTER_RULE7_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE8_OFFSET 0x540 #define GC_SPS_PASSTHRU_FILTER_RULE8_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE9_OFFSET 0x544 #define GC_SPS_PASSTHRU_FILTER_RULE9_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE10_OFFSET 0x548 #define GC_SPS_PASSTHRU_FILTER_RULE10_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE11_OFFSET 0x54c #define GC_SPS_PASSTHRU_FILTER_RULE11_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE12_OFFSET 0x550 #define GC_SPS_PASSTHRU_FILTER_RULE12_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE13_OFFSET 0x554 #define GC_SPS_PASSTHRU_FILTER_RULE13_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE14_OFFSET 0x558 #define GC_SPS_PASSTHRU_FILTER_RULE14_DEFAULT 0x0 #define GC_SPS_PASSTHRU_FILTER_RULE15_OFFSET 0x55c #define GC_SPS_PASSTHRU_FILTER_RULE15_DEFAULT 0x0 #define GC_SPS_VIRTUAL_ADDR_FILTER_OFFSET 0x560 #define GC_SPS_VIRTUAL_ADDR_FILTER_DEFAULT 0xffffffff #define GC_SPS_DEBUG_CS_CNT_OFFSET 0x564 #define GC_SPS_DEBUG_CS_CNT_DEFAULT 0x0 #define GC_SPS_TESTBUS_SEL_OFFSET 0x568 #define GC_SPS_TESTBUS_SEL_DEFAULT 0x0 #define GC_SPS_DPU_TESTBUS_OFFSET 0x56c #define GC_SPS_DPU_TESTBUS_DEFAULT 0x0 #define GC_SPS_RD_CMD_TESTBUS_OFFSET 0x570 #define GC_SPS_RD_CMD_TESTBUS_DEFAULT 0x0 #define GC_SPS_CMD_PASSTHRU_TESTBUS_OFFSET 0x574 #define GC_SPS_CMD_PASSTHRU_TESTBUS_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_ENABLE_OFFSET 0x578 #define GC_SPS_EEPROM_INT_ENABLE_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_STATE_OFFSET 0x57c #define GC_SPS_EEPROM_INT_STATE_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_TEST_OFFSET 0x580 #define GC_SPS_EEPROM_INT_TEST_DEFAULT 0x0 #define GC_SPS_DATA_OFFSET 0x1000 #define GC_SPS_TX_DATA_OFFSET 0x1000 #define GC_SPS_RX_DATA_OFFSET 0x1400 #define GC_SPS_ROM_SP_OFFSET 0x1000 #define GC_SPS_ROM_CMD_OFFSET 0x2000 #define GC_SWDP_TRICKBOX_HALT_OFFSET 0x0 #define GC_SWDP_TRICKBOX_HALT_DEFAULT 0x0 #define GC_SWDP_TRICKBOX_UART_OFFSET 0x4 #define GC_SWDP_TRICKBOX_UART_DEFAULT 0x0 #define GC_SWDP_TRICKBOX_ERROR_OFFSET 0x8 #define GC_SWDP_TRICKBOX_ERROR_DEFAULT 0x0 #define GC_SWDP_TRICKBOX_FATAL_OFFSET 0xc #define GC_SWDP_TRICKBOX_FATAL_DEFAULT 0x0 #define GC_SWDP_SCRATCH_REG0_OFFSET 0x10 #define GC_SWDP_SCRATCH_REG0_DEFAULT 0x0 #define GC_SWDP_SCRATCH_REG1_OFFSET 0x14 #define GC_SWDP_SCRATCH_REG1_DEFAULT 0x0 #define GC_SWDP_SCRATCH_REG2_OFFSET 0x18 #define GC_SWDP_SCRATCH_REG2_DEFAULT 0x0 #define GC_SWDP_SCRATCH_REG3_OFFSET 0x1c #define GC_SWDP_SCRATCH_REG3_DEFAULT 0x0 #define GC_SWDP_APPSVTOR_OFFSET 0x20 #define GC_SWDP_APPSVTOR_DEFAULT 0xffffffff #define GC_SWDP_XML_MD5SUM_OFFSET 0x24 #define GC_SWDP_XML_MD5SUM_DEFAULT 0x0 #define GC_SWDP_HEADER_MD5SUM_OFFSET 0x28 #define GC_SWDP_HEADER_MD5SUM_DEFAULT 0x0 #define GC_SWDP_P4_LAST_SYNC_OFFSET 0x2c #define GC_SWDP_P4_LAST_SYNC_DEFAULT 0x0 #define GC_SWDP_BUILD_DATE_OFFSET 0x30 #define GC_SWDP_BUILD_DATE_DEFAULT 0x0 #define GC_SWDP_BUILD_TIME_OFFSET 0x34 #define GC_SWDP_BUILD_TIME_DEFAULT 0x0 #define GC_SWDP_TEST_PORT_DISABLE_OFFSET 0x38 #define GC_SWDP_TEST_PORT_DISABLE_DEFAULT 0x0 #define GC_TEMP_VERSION_OFFSET 0x0 #define GC_TEMP_VERSION_DEFAULT 0x1014125 #define GC_TEMP_ADC_INT_ENABLE_OFFSET 0x4 #define GC_TEMP_ADC_INT_ENABLE_DEFAULT 0x0 #define GC_TEMP_ADC_INT_STATE_OFFSET 0x8 #define GC_TEMP_ADC_INT_STATE_DEFAULT 0x0 #define GC_TEMP_ADC_INT_TEST_OFFSET 0xc #define GC_TEMP_ADC_INT_TEST_DEFAULT 0x0 #define GC_TEMP_SENSE_CAL_OFFSET_OFFSET 0x10 #define GC_TEMP_SENSE_CAL_OFFSET_DEFAULT 0x0 #define GC_TEMP_ADC_ANALOG_CTRL_OFFSET 0x14 #define GC_TEMP_ADC_ANALOG_CTRL_DEFAULT 0x35 #define GC_TEMP_ADC_FSM_CTRL_OFFSET 0x18 #define GC_TEMP_ADC_FSM_CTRL_DEFAULT 0x38864 #define GC_TEMP_ADC_CLKDIV2_ENABLE_OFFSET 0x1c #define GC_TEMP_ADC_CLKDIV2_ENABLE_DEFAULT 0x0 #define GC_TEMP_ADC_ONESHOT_ACQ_OFFSET 0x20 #define GC_TEMP_ADC_ONESHOT_ACQ_DEFAULT 0x0 #define GC_TEMP_ADC_POWER_DOWN_B_OFFSET 0x24 #define GC_TEMP_ADC_POWER_DOWN_B_DEFAULT 0x0 #define GC_TEMP_ADC_OPERATION_OFFSET 0x28 #define GC_TEMP_ADC_OPERATION_DEFAULT 0x0 #define GC_TEMP_ADC_IOUT_OFFSET 0x2c #define GC_TEMP_ADC_IOUT_DEFAULT 0x0 #define GC_TEMP_ADC_SUM2_OFFSET 0x30 #define GC_TEMP_ADC_SUM2_DEFAULT 0x0 #define GC_TEMP_ADC_SUM4_OFFSET 0x34 #define GC_TEMP_ADC_SUM4_DEFAULT 0x0 #define GC_TEMP_ADC_SUM8_OFFSET 0x38 #define GC_TEMP_ADC_SUM8_DEFAULT 0x0 #define GC_TEMP_ADC_REF_CHOP_OFFSET 0x3c #define GC_TEMP_ADC_REF_CHOP_DEFAULT 0x0 #define GC_TEMP_ADC_CONFIG_OFFSET 0x40 #define GC_TEMP_ADC_CONFIG_DEFAULT 0x0 #define GC_TEMP_ABS_LIMIT_OFFSET 0x44 #define GC_TEMP_ABS_LIMIT_DEFAULT 0x0 #define GC_TEMP_DIFF_PARAM_OFFSET 0x48 #define GC_TEMP_DIFF_PARAM_DEFAULT 0x0 #define GC_TEMP_METRIC_OFFSET 0x4c #define GC_TEMP_METRIC_DEFAULT 0x0 #define GC_TEMP_SAMPLE_CTR_STATE_OFFSET 0x50 #define GC_TEMP_SAMPLE_CTR_STATE_DEFAULT 0x0 #define GC_TEMP_ANTEST_EN_OFFSET 0x54 #define GC_TEMP_ANTEST_EN_DEFAULT 0x0 #define GC_TIMEHS_TIMER1LOAD_OFFSET 0x0 #define GC_TIMEHS_TIMER1LOAD_DEFAULT 0x0 #define GC_TIMEHS_TIMER1VALUE_OFFSET 0x4 #define GC_TIMEHS_TIMER1VALUE_DEFAULT 0x0 #define GC_TIMEHS_TIMER1CONTROL_OFFSET 0x8 #define GC_TIMEHS_TIMER1CONTROL_DEFAULT 0x20 #define GC_TIMEHS_TIMER1INTCLR_OFFSET 0xc #define GC_TIMEHS_TIMER1INTCLR_DEFAULT 0x0 #define GC_TIMEHS_TIMER1RIS_OFFSET 0x10 #define GC_TIMEHS_TIMER1RIS_DEFAULT 0x0 #define GC_TIMEHS_TIMER1MIS_OFFSET 0x14 #define GC_TIMEHS_TIMER1MIS_DEFAULT 0x0 #define GC_TIMEHS_TIMER1BGLOAD_OFFSET 0x18 #define GC_TIMEHS_TIMER1BGLOAD_DEFAULT 0x0 #define GC_TIMEHS_TIMER2LOAD_OFFSET 0x20 #define GC_TIMEHS_TIMER2LOAD_DEFAULT 0x0 #define GC_TIMEHS_TIMER2VALUE_OFFSET 0x24 #define GC_TIMEHS_TIMER2VALUE_DEFAULT 0x0 #define GC_TIMEHS_TIMER2CONTROL_OFFSET 0x28 #define GC_TIMEHS_TIMER2CONTROL_DEFAULT 0x20 #define GC_TIMEHS_TIMER2INTCLR_OFFSET 0x2c #define GC_TIMEHS_TIMER2INTCLR_DEFAULT 0x0 #define GC_TIMEHS_TIMER2RIS_OFFSET 0x30 #define GC_TIMEHS_TIMER2RIS_DEFAULT 0x0 #define GC_TIMEHS_TIMER2MIS_OFFSET 0x34 #define GC_TIMEHS_TIMER2MIS_DEFAULT 0x0 #define GC_TIMEHS_TIMER2BGLOAD_OFFSET 0x38 #define GC_TIMEHS_TIMER2BGLOAD_DEFAULT 0x0 #define GC_TIMEHS_TIMERITCR_OFFSET 0xf00 #define GC_TIMEHS_TIMERITCR_DEFAULT 0x0 #define GC_TIMEHS_TIMERITOP_OFFSET 0xf04 #define GC_TIMEHS_TIMERITOP_DEFAULT 0x0 #define GC_TIMEHS_TIMERPERIPHID4_OFFSET 0xfd0 #define GC_TIMEHS_TIMERPERIPHID4_DEFAULT 0x4 #define GC_TIMEHS_TIMERPERIPHID5_OFFSET 0xfd4 #define GC_TIMEHS_TIMERPERIPHID5_DEFAULT 0x0 #define GC_TIMEHS_TIMERPERIPHID6_OFFSET 0xfd8 #define GC_TIMEHS_TIMERPERIPHID6_DEFAULT 0x0 #define GC_TIMEHS_TIMERPERIPHID7_OFFSET 0xfdc #define GC_TIMEHS_TIMERPERIPHID7_DEFAULT 0x0 #define GC_TIMEHS_TIMERPERIPHID0_OFFSET 0xfe0 #define GC_TIMEHS_TIMERPERIPHID0_DEFAULT 0x23 #define GC_TIMEHS_TIMERPERIPHID1_OFFSET 0xfe4 #define GC_TIMEHS_TIMERPERIPHID1_DEFAULT 0xb8 #define GC_TIMEHS_TIMERPERIPHID2_OFFSET 0xfe8 #define GC_TIMEHS_TIMERPERIPHID2_DEFAULT 0xb #define GC_TIMEHS_TIMERPERIPHID3_OFFSET 0xfec #define GC_TIMEHS_TIMERPERIPHID3_DEFAULT 0x0 #define GC_TIMEHS_TIMERPCELLID0_OFFSET 0xff0 #define GC_TIMEHS_TIMERPCELLID0_DEFAULT 0xd #define GC_TIMEHS_TIMERPCELLID1_OFFSET 0xff4 #define GC_TIMEHS_TIMERPCELLID1_DEFAULT 0xf0 #define GC_TIMEHS_TIMERPCELLID2_OFFSET 0xff8 #define GC_TIMEHS_TIMERPCELLID2_DEFAULT 0x5 #define GC_TIMEHS_TIMERPCELLID3_OFFSET 0xffc #define GC_TIMEHS_TIMERPCELLID3_DEFAULT 0xb1 #define GC_TIMELS_TIMER0_CONTROL_OFFSET 0x0 #define GC_TIMELS_TIMER0_CONTROL_DEFAULT 0x0 #define GC_TIMELS_TIMER0_STATUS_OFFSET 0x4 #define GC_TIMELS_TIMER0_STATUS_DEFAULT 0x0 #define GC_TIMELS_TIMER0_LOAD_OFFSET 0x8 #define GC_TIMELS_TIMER0_LOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER0_RELOADVAL_OFFSET 0xc #define GC_TIMELS_TIMER0_RELOADVAL_DEFAULT 0xffffffff #define GC_TIMELS_TIMER0_VALUE_OFFSET 0x10 #define GC_TIMELS_TIMER0_VALUE_DEFAULT 0x0 #define GC_TIMELS_TIMER0_STEP_OFFSET 0x14 #define GC_TIMELS_TIMER0_STEP_DEFAULT 0x0 #define GC_TIMELS_TIMER0_IER_OFFSET 0x18 #define GC_TIMELS_TIMER0_IER_DEFAULT 0x0 #define GC_TIMELS_TIMER0_ISR_OFFSET 0x1c #define GC_TIMELS_TIMER0_ISR_DEFAULT 0x0 #define GC_TIMELS_TIMER0_IPR_OFFSET 0x20 #define GC_TIMELS_TIMER0_IPR_DEFAULT 0x0 #define GC_TIMELS_TIMER0_IAR_OFFSET 0x24 #define GC_TIMELS_TIMER0_IAR_DEFAULT 0x0 #define GC_TIMELS_TIMER0_WAKEUP_ACK_OFFSET 0x28 #define GC_TIMELS_TIMER0_WAKEUP_ACK_DEFAULT 0x0 #define GC_TIMELS_TIMER1_CONTROL_OFFSET 0x40 #define GC_TIMELS_TIMER1_CONTROL_DEFAULT 0x0 #define GC_TIMELS_TIMER1_STATUS_OFFSET 0x44 #define GC_TIMELS_TIMER1_STATUS_DEFAULT 0x0 #define GC_TIMELS_TIMER1_LOAD_OFFSET 0x48 #define GC_TIMELS_TIMER1_LOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER1_RELOADVAL_OFFSET 0x4c #define GC_TIMELS_TIMER1_RELOADVAL_DEFAULT 0xffffffff #define GC_TIMELS_TIMER1_VALUE_OFFSET 0x50 #define GC_TIMELS_TIMER1_VALUE_DEFAULT 0x0 #define GC_TIMELS_TIMER1_STEP_OFFSET 0x54 #define GC_TIMELS_TIMER1_STEP_DEFAULT 0x0 #define GC_TIMELS_TIMER1_IER_OFFSET 0x58 #define GC_TIMELS_TIMER1_IER_DEFAULT 0x0 #define GC_TIMELS_TIMER1_ISR_OFFSET 0x5c #define GC_TIMELS_TIMER1_ISR_DEFAULT 0x0 #define GC_TIMELS_TIMER1_IPR_OFFSET 0x60 #define GC_TIMELS_TIMER1_IPR_DEFAULT 0x0 #define GC_TIMELS_TIMER1_IAR_OFFSET 0x64 #define GC_TIMELS_TIMER1_IAR_DEFAULT 0x0 #define GC_TIMELS_TIMER1_WAKEUP_ACK_OFFSET 0x68 #define GC_TIMELS_TIMER1_WAKEUP_ACK_DEFAULT 0x0 #define GC_TIMELS_ITCR_OFFSET 0xf00 #define GC_TIMELS_ITCR_DEFAULT 0x0 #define GC_TIMELS_ITOP_OFFSET 0xf04 #define GC_TIMELS_ITOP_DEFAULT 0x0 #define GC_TIMEUS_VERSION_OFFSET 0x0 #define GC_TIMEUS_VERSION_DEFAULT 0x101424a #define GC_TIMEUS_INT_ENABLE_OFFSET 0x4 #define GC_TIMEUS_INT_ENABLE_DEFAULT 0x0 #define GC_TIMEUS_INT_STATE_OFFSET 0x8 #define GC_TIMEUS_INT_STATE_DEFAULT 0x0 #define GC_TIMEUS_INT_TEST_OFFSET 0xc #define GC_TIMEUS_INT_TEST_DEFAULT 0x0 #define GC_TIMEUS_ENABLE_CNTR0_OFFSET 0x100 #define GC_TIMEUS_ENABLE_CNTR0_DEFAULT 0x0 #define GC_TIMEUS_ONESHOT_MODE_CNTR0_OFFSET 0x104 #define GC_TIMEUS_ONESHOT_MODE_CNTR0_DEFAULT 0x0 #define GC_TIMEUS_MAXVAL_CNTR0_OFFSET 0x108 #define GC_TIMEUS_MAXVAL_CNTR0_DEFAULT 0x2710 #define GC_TIMEUS_PROGVAL_CNTR0_OFFSET 0x10c #define GC_TIMEUS_PROGVAL_CNTR0_DEFAULT 0x3e8 #define GC_TIMEUS_DIVIDER_CNTR0_OFFSET 0x110 #define GC_TIMEUS_DIVIDER_CNTR0_DEFAULT 0x1 #define GC_TIMEUS_CUR_MAJOR_CNTR0_OFFSET 0x114 #define GC_TIMEUS_CUR_MAJOR_CNTR0_DEFAULT 0x0 #define GC_TIMEUS_CUR_MINOR_CNTR0_OFFSET 0x118 #define GC_TIMEUS_CUR_MINOR_CNTR0_DEFAULT 0x0 #define GC_TIMEUS_ENABLE_CNTR1_OFFSET 0x200 #define GC_TIMEUS_ENABLE_CNTR1_DEFAULT 0x0 #define GC_TIMEUS_ONESHOT_MODE_CNTR1_OFFSET 0x204 #define GC_TIMEUS_ONESHOT_MODE_CNTR1_DEFAULT 0x0 #define GC_TIMEUS_MAXVAL_CNTR1_OFFSET 0x208 #define GC_TIMEUS_MAXVAL_CNTR1_DEFAULT 0x2710 #define GC_TIMEUS_PROGVAL_CNTR1_OFFSET 0x20c #define GC_TIMEUS_PROGVAL_CNTR1_DEFAULT 0x3e8 #define GC_TIMEUS_DIVIDER_CNTR1_OFFSET 0x210 #define GC_TIMEUS_DIVIDER_CNTR1_DEFAULT 0x1 #define GC_TIMEUS_CUR_MAJOR_CNTR1_OFFSET 0x214 #define GC_TIMEUS_CUR_MAJOR_CNTR1_DEFAULT 0x0 #define GC_TIMEUS_CUR_MINOR_CNTR1_OFFSET 0x218 #define GC_TIMEUS_CUR_MINOR_CNTR1_DEFAULT 0x0 #define GC_TIMEUS_ENABLE_CNTR2_OFFSET 0x300 #define GC_TIMEUS_ENABLE_CNTR2_DEFAULT 0x0 #define GC_TIMEUS_ONESHOT_MODE_CNTR2_OFFSET 0x304 #define GC_TIMEUS_ONESHOT_MODE_CNTR2_DEFAULT 0x0 #define GC_TIMEUS_MAXVAL_CNTR2_OFFSET 0x308 #define GC_TIMEUS_MAXVAL_CNTR2_DEFAULT 0x2710 #define GC_TIMEUS_PROGVAL_CNTR2_OFFSET 0x30c #define GC_TIMEUS_PROGVAL_CNTR2_DEFAULT 0x3e8 #define GC_TIMEUS_DIVIDER_CNTR2_OFFSET 0x310 #define GC_TIMEUS_DIVIDER_CNTR2_DEFAULT 0x1 #define GC_TIMEUS_CUR_MAJOR_CNTR2_OFFSET 0x314 #define GC_TIMEUS_CUR_MAJOR_CNTR2_DEFAULT 0x0 #define GC_TIMEUS_CUR_MINOR_CNTR2_OFFSET 0x318 #define GC_TIMEUS_CUR_MINOR_CNTR2_DEFAULT 0x0 #define GC_TIMEUS_ENABLE_CNTR3_OFFSET 0x400 #define GC_TIMEUS_ENABLE_CNTR3_DEFAULT 0x0 #define GC_TIMEUS_ONESHOT_MODE_CNTR3_OFFSET 0x404 #define GC_TIMEUS_ONESHOT_MODE_CNTR3_DEFAULT 0x0 #define GC_TIMEUS_MAXVAL_CNTR3_OFFSET 0x408 #define GC_TIMEUS_MAXVAL_CNTR3_DEFAULT 0x2710 #define GC_TIMEUS_PROGVAL_CNTR3_OFFSET 0x40c #define GC_TIMEUS_PROGVAL_CNTR3_DEFAULT 0x3e8 #define GC_TIMEUS_DIVIDER_CNTR3_OFFSET 0x410 #define GC_TIMEUS_DIVIDER_CNTR3_DEFAULT 0x1 #define GC_TIMEUS_CUR_MAJOR_CNTR3_OFFSET 0x414 #define GC_TIMEUS_CUR_MAJOR_CNTR3_DEFAULT 0x0 #define GC_TIMEUS_CUR_MINOR_CNTR3_OFFSET 0x418 #define GC_TIMEUS_CUR_MINOR_CNTR3_DEFAULT 0x0 #define GC_TRNG_VERSION_OFFSET 0x0 #define GC_TRNG_VERSION_DEFAULT 0x1014125 #define GC_TRNG_INT_ENABLE_OFFSET 0x4 #define GC_TRNG_INT_ENABLE_DEFAULT 0x0 #define GC_TRNG_INT_STATE_OFFSET 0x8 #define GC_TRNG_INT_STATE_DEFAULT 0x0 #define GC_TRNG_INT_TEST_OFFSET 0xc #define GC_TRNG_INT_TEST_DEFAULT 0x0 #define GC_TRNG_SECURE_POST_PROCESSING_CTRL_OFFSET 0x10 #define GC_TRNG_SECURE_POST_PROCESSING_CTRL_DEFAULT 0x1 #define GC_TRNG_POST_PROCESSING_CTRL_OFFSET 0x14 #define GC_TRNG_POST_PROCESSING_CTRL_DEFAULT 0xf #define GC_TRNG_GO_EVENT_OFFSET 0x18 #define GC_TRNG_GO_EVENT_DEFAULT 0x0 #define GC_TRNG_TIMEOUT_COUNTER_OFFSET 0x1c #define GC_TRNG_TIMEOUT_COUNTER_DEFAULT 0x7d0 #define GC_TRNG_TIMEOUT_MAX_TRY_NUM_OFFSET 0x20 #define GC_TRNG_TIMEOUT_MAX_TRY_NUM_DEFAULT 0x4 #define GC_TRNG_OUTPUT_TIME_COUNTER_OFFSET 0x24 #define GC_TRNG_OUTPUT_TIME_COUNTER_DEFAULT 0x10000 #define GC_TRNG_STOP_WORK_OFFSET 0x28 #define GC_TRNG_STOP_WORK_DEFAULT 0x0 #define GC_TRNG_FSM_STATE_OFFSET 0x2c #define GC_TRNG_FSM_STATE_DEFAULT 0x1 #define GC_TRNG_ALLOWED_VALUES_OFFSET 0x30 #define GC_TRNG_ALLOWED_VALUES_DEFAULT 0x21 #define GC_TRNG_TIMER_COUNTER_OFFSET 0x34 #define GC_TRNG_TIMER_COUNTER_DEFAULT 0x0 #define GC_TRNG_SLICE_MAX_UPPER_LIMIT_OFFSET 0x38 #define GC_TRNG_SLICE_MAX_UPPER_LIMIT_DEFAULT 0xf #define GC_TRNG_SLICE_MIN_LOWER_LIMIT_OFFSET 0x3c #define GC_TRNG_SLICE_MIN_LOWER_LIMIT_DEFAULT 0x0 #define GC_TRNG_MAX_VALUE_OFFSET 0x40 #define GC_TRNG_MAX_VALUE_DEFAULT 0x0 #define GC_TRNG_MIN_VALUE_OFFSET 0x44 #define GC_TRNG_MIN_VALUE_DEFAULT 0x0 #define GC_TRNG_LDO_CTRL_OFFSET 0x48 #define GC_TRNG_LDO_CTRL_DEFAULT 0x5 #define GC_TRNG_POWER_DOWN_B_OFFSET 0x4c #define GC_TRNG_POWER_DOWN_B_DEFAULT 0x0 #define GC_TRNG_PROC_LOCK_POWER_DOWN_B_OFFSET 0x50 #define GC_TRNG_PROC_LOCK_POWER_DOWN_B_DEFAULT 0x1 #define GC_TRNG_ANTEST_OFFSET 0x54 #define GC_TRNG_ANTEST_DEFAULT 0x0 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_OFFSET 0x58 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_DEFAULT 0xb #define GC_TRNG_ANALOG_SEN_LSR_OUTPUT_OFFSET 0x5c #define GC_TRNG_ANALOG_SEN_LSR_OUTPUT_DEFAULT 0x0 #define GC_TRNG_ANALOG_TEST_OFFSET 0x60 #define GC_TRNG_ANALOG_TEST_DEFAULT 0x0 #define GC_TRNG_ANALOG_CTRL_OFFSET 0x64 #define GC_TRNG_ANALOG_CTRL_DEFAULT 0x0 #define GC_TRNG_ONE_SHOT_MODE_OFFSET 0x68 #define GC_TRNG_ONE_SHOT_MODE_DEFAULT 0x0 #define GC_TRNG_ONE_SHOT_REG_OFFSET 0x6c #define GC_TRNG_ONE_SHOT_REG_DEFAULT 0x0 #define GC_TRNG_READ_DATA_OFFSET 0x70 #define GC_TRNG_READ_DATA_DEFAULT 0x0 #define GC_TRNG_FREQUENCY_CALLS_OFFSET 0x74 #define GC_TRNG_FREQUENCY_CALLS_DEFAULT 0x0 #define GC_TRNG_CUR_NUM_ONES_OFFSET 0x78 #define GC_TRNG_CUR_NUM_ONES_DEFAULT 0x0 #define GC_TRNG_EMPTY_OFFSET 0x7c #define GC_TRNG_EMPTY_DEFAULT 0x1 #define GC_UART_RDATA_OFFSET 0x0 #define GC_UART_RDATA_DEFAULT 0x0 #define GC_UART_WDATA_OFFSET 0x4 #define GC_UART_WDATA_DEFAULT 0x0 #define GC_UART_NCO_OFFSET 0x8 #define GC_UART_NCO_DEFAULT 0x0 #define GC_UART_CTRL_OFFSET 0xc #define GC_UART_CTRL_DEFAULT 0x0 #define GC_UART_ICTRL_OFFSET 0x10 #define GC_UART_ICTRL_DEFAULT 0x0 #define GC_UART_STATE_OFFSET 0x14 #define GC_UART_STATE_DEFAULT 0x90 #define GC_UART_STATECLR_OFFSET 0x18 #define GC_UART_STATECLR_DEFAULT 0x0 #define GC_UART_ISTATE_OFFSET 0x1c #define GC_UART_ISTATE_DEFAULT 0x0 #define GC_UART_ISTATECLR_OFFSET 0x20 #define GC_UART_ISTATECLR_DEFAULT 0x0 #define GC_UART_FIFO_OFFSET 0x24 #define GC_UART_FIFO_DEFAULT 0x0 #define GC_UART_RFIFO_OFFSET 0x28 #define GC_UART_RFIFO_DEFAULT 0x0 #define GC_UART_OVRD_OFFSET 0x2c #define GC_UART_OVRD_DEFAULT 0x0 #define GC_UART_VAL_OFFSET 0x30 #define GC_UART_VAL_DEFAULT 0x0 #define GC_UART_RXTO_OFFSET 0x34 #define GC_UART_RXTO_DEFAULT 0x0 #define GC_UART_ITCR_OFFSET 0xf00 #define GC_UART_ITCR_DEFAULT 0x0 #define GC_UART_ITOP_OFFSET 0xf04 #define GC_UART_ITOP_DEFAULT 0x0 #define GC_USB_GOTGCTL_OFFSET 0x0 #define GC_USB_GOTGCTL_DEFAULT 0x0 #define GC_USB_GOTGINT_OFFSET 0x4 #define GC_USB_GOTGINT_DEFAULT 0x0 #define GC_USB_GAHBCFG_OFFSET 0x8 #define GC_USB_GAHBCFG_DEFAULT 0x0 #define GC_USB_GUSBCFG_OFFSET 0xc #define GC_USB_GUSBCFG_DEFAULT 0x0 #define GC_USB_GRSTCTL_OFFSET 0x10 #define GC_USB_GRSTCTL_DEFAULT 0x0 #define GC_USB_GINTSTS_OFFSET 0x14 #define GC_USB_GINTSTS_DEFAULT 0x0 #define GC_USB_GINTMSK_OFFSET 0x18 #define GC_USB_GINTMSK_DEFAULT 0x0 #define GC_USB_GRXSTSR_OFFSET 0x1c #define GC_USB_GRXSTSR_DEFAULT 0x0 #define GC_USB_GRXSTSP_OFFSET 0x20 #define GC_USB_GRXSTSP_DEFAULT 0x0 #define GC_USB_GRXFSIZ_OFFSET 0x24 #define GC_USB_GRXFSIZ_DEFAULT 0x0 #define GC_USB_GNPTXFSIZ_OFFSET 0x28 #define GC_USB_GNPTXFSIZ_DEFAULT 0x0 #define GC_USB_GGPIO_OFFSET 0x38 #define GC_USB_GGPIO_DEFAULT 0x0 #define GC_USB_GUID_OFFSET 0x3c #define GC_USB_GUID_DEFAULT 0x0 #define GC_USB_GSNPSID_OFFSET 0x40 #define GC_USB_GSNPSID_DEFAULT 0x0 #define GC_USB_GHWCFG1_OFFSET 0x44 #define GC_USB_GHWCFG1_DEFAULT 0x0 #define GC_USB_GHWCFG2_OFFSET 0x48 #define GC_USB_GHWCFG2_DEFAULT 0x0 #define GC_USB_GHWCFG3_OFFSET 0x4c #define GC_USB_GHWCFG3_DEFAULT 0x0 #define GC_USB_GHWCFG4_OFFSET 0x50 #define GC_USB_GHWCFG4_DEFAULT 0x0 #define GC_USB_GDFIFOCFG_OFFSET 0x5c #define GC_USB_GDFIFOCFG_DEFAULT 0x0 #define GC_USB_DIEPTXF1_OFFSET 0x104 #define GC_USB_DIEPTXF1_DEFAULT 0x1000 #define GC_USB_DIEPTXF2_OFFSET 0x108 #define GC_USB_DIEPTXF2_DEFAULT 0x0 #define GC_USB_DIEPTXF3_OFFSET 0x10c #define GC_USB_DIEPTXF3_DEFAULT 0x0 #define GC_USB_DIEPTXF4_OFFSET 0x110 #define GC_USB_DIEPTXF4_DEFAULT 0x0 #define GC_USB_DIEPTXF5_OFFSET 0x114 #define GC_USB_DIEPTXF5_DEFAULT 0x0 #define GC_USB_DIEPTXF6_OFFSET 0x118 #define GC_USB_DIEPTXF6_DEFAULT 0x0 #define GC_USB_DIEPTXF7_OFFSET 0x11c #define GC_USB_DIEPTXF7_DEFAULT 0x0 #define GC_USB_DIEPTXF8_OFFSET 0x120 #define GC_USB_DIEPTXF8_DEFAULT 0x0 #define GC_USB_DIEPTXF9_OFFSET 0x124 #define GC_USB_DIEPTXF9_DEFAULT 0x0 #define GC_USB_DIEPTXF10_OFFSET 0x128 #define GC_USB_DIEPTXF10_DEFAULT 0x0 #define GC_USB_DIEPTXF11_OFFSET 0x12c #define GC_USB_DIEPTXF11_DEFAULT 0x0 #define GC_USB_DIEPTXF12_OFFSET 0x130 #define GC_USB_DIEPTXF12_DEFAULT 0x0 #define GC_USB_DIEPTXF13_OFFSET 0x134 #define GC_USB_DIEPTXF13_DEFAULT 0x0 #define GC_USB_DIEPTXF14_OFFSET 0x138 #define GC_USB_DIEPTXF14_DEFAULT 0x0 #define GC_USB_DIEPTXF15_OFFSET 0x13c #define GC_USB_DIEPTXF15_DEFAULT 0x0 #define GC_USB_DCFG_OFFSET 0x800 #define GC_USB_DCFG_DEFAULT 0x8000000 #define GC_USB_DCTL_OFFSET 0x804 #define GC_USB_DCTL_DEFAULT 0x0 #define GC_USB_DSTS_OFFSET 0x808 #define GC_USB_DSTS_DEFAULT 0x0 #define GC_USB_DIEPMSK_OFFSET 0x810 #define GC_USB_DIEPMSK_DEFAULT 0x80 #define GC_USB_DOEPMSK_OFFSET 0x814 #define GC_USB_DOEPMSK_DEFAULT 0x0 #define GC_USB_DAINT_OFFSET 0x818 #define GC_USB_DAINT_DEFAULT 0x0 #define GC_USB_DAINTMSK_OFFSET 0x81c #define GC_USB_DAINTMSK_DEFAULT 0x0 #define GC_USB_DVBUSDIS_OFFSET 0x828 #define GC_USB_DVBUSDIS_DEFAULT 0x0 #define GC_USB_DVBUSPULSE_OFFSET 0x82c #define GC_USB_DVBUSPULSE_DEFAULT 0x0 #define GC_USB_DTHRCTL_OFFSET 0x830 #define GC_USB_DTHRCTL_DEFAULT 0x0 #define GC_USB_DIEPEMPMSK_OFFSET 0x834 #define GC_USB_DIEPEMPMSK_DEFAULT 0x0 #define GC_USB_DIEPCTL0_OFFSET 0x900 #define GC_USB_DIEPCTL0_DEFAULT 0x0 #define GC_USB_DIEPINT0_OFFSET 0x908 #define GC_USB_DIEPINT0_DEFAULT 0x0 #define GC_USB_DIEPTSIZ0_OFFSET 0x910 #define GC_USB_DIEPTSIZ0_DEFAULT 0x0 #define GC_USB_DIEPDMA0_OFFSET 0x914 #define GC_USB_DIEPDMA0_DEFAULT 0x0 #define GC_USB_DTXFSTS0_OFFSET 0x918 #define GC_USB_DTXFSTS0_DEFAULT 0x0 #define GC_USB_DIEPDMAB0_OFFSET 0x91c #define GC_USB_DIEPDMAB0_DEFAULT 0x0 #define GC_USB_DIEPCTL1_OFFSET 0x920 #define GC_USB_DIEPCTL1_DEFAULT 0x0 #define GC_USB_DIEPINT1_OFFSET 0x928 #define GC_USB_DIEPINT1_DEFAULT 0x0 #define GC_USB_DIEPTSIZ1_OFFSET 0x930 #define GC_USB_DIEPTSIZ1_DEFAULT 0x0 #define GC_USB_DIEPDMA1_OFFSET 0x934 #define GC_USB_DIEPDMA1_DEFAULT 0x0 #define GC_USB_DTXFSTS1_OFFSET 0x938 #define GC_USB_DTXFSTS1_DEFAULT 0x0 #define GC_USB_DIEPDMAB1_OFFSET 0x93c #define GC_USB_DIEPDMAB1_DEFAULT 0x0 #define GC_USB_DIEPCTL2_OFFSET 0x940 #define GC_USB_DIEPCTL2_DEFAULT 0x0 #define GC_USB_DIEPINT2_OFFSET 0x948 #define GC_USB_DIEPINT2_DEFAULT 0x0 #define GC_USB_DIEPTSIZ2_OFFSET 0x950 #define GC_USB_DIEPTSIZ2_DEFAULT 0x0 #define GC_USB_DIEPDMA2_OFFSET 0x954 #define GC_USB_DIEPDMA2_DEFAULT 0x0 #define GC_USB_DTXFSTS2_OFFSET 0x958 #define GC_USB_DTXFSTS2_DEFAULT 0x0 #define GC_USB_DIEPDMAB2_OFFSET 0x95c #define GC_USB_DIEPDMAB2_DEFAULT 0x0 #define GC_USB_DIEPCTL3_OFFSET 0x960 #define GC_USB_DIEPCTL3_DEFAULT 0x0 #define GC_USB_DIEPINT3_OFFSET 0x968 #define GC_USB_DIEPINT3_DEFAULT 0x0 #define GC_USB_DIEPTSIZ3_OFFSET 0x970 #define GC_USB_DIEPTSIZ3_DEFAULT 0x0 #define GC_USB_DIEPDMA3_OFFSET 0x974 #define GC_USB_DIEPDMA3_DEFAULT 0x0 #define GC_USB_DTXFSTS3_OFFSET 0x978 #define GC_USB_DTXFSTS3_DEFAULT 0x0 #define GC_USB_DIEPDMAB3_OFFSET 0x97c #define GC_USB_DIEPDMAB3_DEFAULT 0x0 #define GC_USB_DIEPCTL4_OFFSET 0x980 #define GC_USB_DIEPCTL4_DEFAULT 0x0 #define GC_USB_DIEPINT4_OFFSET 0x988 #define GC_USB_DIEPINT4_DEFAULT 0x0 #define GC_USB_DIEPTSIZ4_OFFSET 0x990 #define GC_USB_DIEPTSIZ4_DEFAULT 0x0 #define GC_USB_DIEPDMA4_OFFSET 0x994 #define GC_USB_DIEPDMA4_DEFAULT 0x0 #define GC_USB_DTXFSTS4_OFFSET 0x998 #define GC_USB_DTXFSTS4_DEFAULT 0x0 #define GC_USB_DIEPDMAB4_OFFSET 0x99c #define GC_USB_DIEPDMAB4_DEFAULT 0x0 #define GC_USB_DIEPCTL5_OFFSET 0x9a0 #define GC_USB_DIEPCTL5_DEFAULT 0x0 #define GC_USB_DIEPINT5_OFFSET 0x9a8 #define GC_USB_DIEPINT5_DEFAULT 0x0 #define GC_USB_DIEPTSIZ5_OFFSET 0x9b0 #define GC_USB_DIEPTSIZ5_DEFAULT 0x0 #define GC_USB_DIEPDMA5_OFFSET 0x9b4 #define GC_USB_DIEPDMA5_DEFAULT 0x0 #define GC_USB_DTXFSTS5_OFFSET 0x9b8 #define GC_USB_DTXFSTS5_DEFAULT 0x0 #define GC_USB_DIEPDMAB5_OFFSET 0x9bc #define GC_USB_DIEPDMAB5_DEFAULT 0x0 #define GC_USB_DIEPCTL6_OFFSET 0x9c0 #define GC_USB_DIEPCTL6_DEFAULT 0x0 #define GC_USB_DIEPINT6_OFFSET 0x9c8 #define GC_USB_DIEPINT6_DEFAULT 0x0 #define GC_USB_DIEPTSIZ6_OFFSET 0x9d0 #define GC_USB_DIEPTSIZ6_DEFAULT 0x0 #define GC_USB_DIEPDMA6_OFFSET 0x9d4 #define GC_USB_DIEPDMA6_DEFAULT 0x0 #define GC_USB_DTXFSTS6_OFFSET 0x9d8 #define GC_USB_DTXFSTS6_DEFAULT 0x0 #define GC_USB_DIEPDMAB6_OFFSET 0x9dc #define GC_USB_DIEPDMAB6_DEFAULT 0x0 #define GC_USB_DIEPCTL7_OFFSET 0x9e0 #define GC_USB_DIEPCTL7_DEFAULT 0x0 #define GC_USB_DIEPINT7_OFFSET 0x9e8 #define GC_USB_DIEPINT7_DEFAULT 0x0 #define GC_USB_DIEPTSIZ7_OFFSET 0x9f0 #define GC_USB_DIEPTSIZ7_DEFAULT 0x0 #define GC_USB_DIEPDMA7_OFFSET 0x9f4 #define GC_USB_DIEPDMA7_DEFAULT 0x0 #define GC_USB_DTXFSTS7_OFFSET 0x9f8 #define GC_USB_DTXFSTS7_DEFAULT 0x0 #define GC_USB_DIEPDMAB7_OFFSET 0x9fc #define GC_USB_DIEPDMAB7_DEFAULT 0x0 #define GC_USB_DIEPCTL8_OFFSET 0xa00 #define GC_USB_DIEPCTL8_DEFAULT 0x0 #define GC_USB_DIEPINT8_OFFSET 0xa08 #define GC_USB_DIEPINT8_DEFAULT 0x0 #define GC_USB_DIEPTSIZ8_OFFSET 0xa10 #define GC_USB_DIEPTSIZ8_DEFAULT 0x0 #define GC_USB_DIEPDMA8_OFFSET 0xa14 #define GC_USB_DIEPDMA8_DEFAULT 0x0 #define GC_USB_DTXFSTS8_OFFSET 0xa18 #define GC_USB_DTXFSTS8_DEFAULT 0x0 #define GC_USB_DIEPDMAB8_OFFSET 0xa1c #define GC_USB_DIEPDMAB8_DEFAULT 0x0 #define GC_USB_DIEPCTL9_OFFSET 0xa20 #define GC_USB_DIEPCTL9_DEFAULT 0x0 #define GC_USB_DIEPINT9_OFFSET 0xa28 #define GC_USB_DIEPINT9_DEFAULT 0x0 #define GC_USB_DIEPTSIZ9_OFFSET 0xa30 #define GC_USB_DIEPTSIZ9_DEFAULT 0x0 #define GC_USB_DIEPDMA9_OFFSET 0xa34 #define GC_USB_DIEPDMA9_DEFAULT 0x0 #define GC_USB_DTXFSTS9_OFFSET 0xa38 #define GC_USB_DTXFSTS9_DEFAULT 0x0 #define GC_USB_DIEPDMAB9_OFFSET 0xa3c #define GC_USB_DIEPDMAB9_DEFAULT 0x0 #define GC_USB_DIEPCTL10_OFFSET 0xa40 #define GC_USB_DIEPCTL10_DEFAULT 0x0 #define GC_USB_DIEPINT10_OFFSET 0xa48 #define GC_USB_DIEPINT10_DEFAULT 0x0 #define GC_USB_DIEPTSIZ10_OFFSET 0xa50 #define GC_USB_DIEPTSIZ10_DEFAULT 0x0 #define GC_USB_DIEPDMA10_OFFSET 0xa54 #define GC_USB_DIEPDMA10_DEFAULT 0x0 #define GC_USB_DTXFSTS10_OFFSET 0xa58 #define GC_USB_DTXFSTS10_DEFAULT 0x0 #define GC_USB_DIEPDMAB10_OFFSET 0xa5c #define GC_USB_DIEPDMAB10_DEFAULT 0x0 #define GC_USB_DIEPCTL11_OFFSET 0xa60 #define GC_USB_DIEPCTL11_DEFAULT 0x0 #define GC_USB_DIEPINT11_OFFSET 0xa68 #define GC_USB_DIEPINT11_DEFAULT 0x0 #define GC_USB_DIEPTSIZ11_OFFSET 0xa70 #define GC_USB_DIEPTSIZ11_DEFAULT 0x0 #define GC_USB_DIEPDMA11_OFFSET 0xa74 #define GC_USB_DIEPDMA11_DEFAULT 0x0 #define GC_USB_DTXFSTS11_OFFSET 0xa78 #define GC_USB_DTXFSTS11_DEFAULT 0x0 #define GC_USB_DIEPDMAB11_OFFSET 0xa7c #define GC_USB_DIEPDMAB11_DEFAULT 0x0 #define GC_USB_DIEPCTL12_OFFSET 0xa80 #define GC_USB_DIEPCTL12_DEFAULT 0x0 #define GC_USB_DIEPINT12_OFFSET 0xa88 #define GC_USB_DIEPINT12_DEFAULT 0x0 #define GC_USB_DIEPTSIZ12_OFFSET 0xa90 #define GC_USB_DIEPTSIZ12_DEFAULT 0x0 #define GC_USB_DIEPDMA12_OFFSET 0xa94 #define GC_USB_DIEPDMA12_DEFAULT 0x0 #define GC_USB_DTXFSTS12_OFFSET 0xa98 #define GC_USB_DTXFSTS12_DEFAULT 0x0 #define GC_USB_DIEPDMAB12_OFFSET 0xa9c #define GC_USB_DIEPDMAB12_DEFAULT 0x0 #define GC_USB_DIEPCTL13_OFFSET 0xaa0 #define GC_USB_DIEPCTL13_DEFAULT 0x0 #define GC_USB_DIEPINT13_OFFSET 0xaa8 #define GC_USB_DIEPINT13_DEFAULT 0x0 #define GC_USB_DIEPTSIZ13_OFFSET 0xab0 #define GC_USB_DIEPTSIZ13_DEFAULT 0x0 #define GC_USB_DIEPDMA13_OFFSET 0xab4 #define GC_USB_DIEPDMA13_DEFAULT 0x0 #define GC_USB_DTXFSTS13_OFFSET 0xab8 #define GC_USB_DTXFSTS13_DEFAULT 0x0 #define GC_USB_DIEPDMAB13_OFFSET 0xabc #define GC_USB_DIEPDMAB13_DEFAULT 0x0 #define GC_USB_DIEPCTL14_OFFSET 0xac0 #define GC_USB_DIEPCTL14_DEFAULT 0x0 #define GC_USB_DIEPINT14_OFFSET 0xac8 #define GC_USB_DIEPINT14_DEFAULT 0x0 #define GC_USB_DIEPTSIZ14_OFFSET 0xad0 #define GC_USB_DIEPTSIZ14_DEFAULT 0x0 #define GC_USB_DIEPDMA14_OFFSET 0xad4 #define GC_USB_DIEPDMA14_DEFAULT 0x0 #define GC_USB_DTXFSTS14_OFFSET 0xad8 #define GC_USB_DTXFSTS14_DEFAULT 0x0 #define GC_USB_DIEPDMAB14_OFFSET 0xadc #define GC_USB_DIEPDMAB14_DEFAULT 0x0 #define GC_USB_DIEPCTL15_OFFSET 0xae0 #define GC_USB_DIEPCTL15_DEFAULT 0x0 #define GC_USB_DIEPINT15_OFFSET 0xae8 #define GC_USB_DIEPINT15_DEFAULT 0x0 #define GC_USB_DIEPTSIZ15_OFFSET 0xaf0 #define GC_USB_DIEPTSIZ15_DEFAULT 0x0 #define GC_USB_DIEPDMA15_OFFSET 0xaf4 #define GC_USB_DIEPDMA15_DEFAULT 0x0 #define GC_USB_DTXFSTS15_OFFSET 0xaf8 #define GC_USB_DTXFSTS15_DEFAULT 0x0 #define GC_USB_DIEPDMAB15_OFFSET 0xafc #define GC_USB_DIEPDMAB15_DEFAULT 0x0 #define GC_USB_DOEPCTL0_OFFSET 0xb00 #define GC_USB_DOEPCTL0_DEFAULT 0x0 #define GC_USB_DOEPINT0_OFFSET 0xb08 #define GC_USB_DOEPINT0_DEFAULT 0x0 #define GC_USB_DOEPTSIZ0_OFFSET 0xb10 #define GC_USB_DOEPTSIZ0_DEFAULT 0x0 #define GC_USB_DOEPDMA0_OFFSET 0xb14 #define GC_USB_DOEPDMA0_DEFAULT 0x0 #define GC_USB_DOEPDMAB0_OFFSET 0xb1c #define GC_USB_DOEPDMAB0_DEFAULT 0x0 #define GC_USB_DOEPCTL1_OFFSET 0xb20 #define GC_USB_DOEPCTL1_DEFAULT 0x0 #define GC_USB_DOEPINT1_OFFSET 0xb28 #define GC_USB_DOEPINT1_DEFAULT 0x0 #define GC_USB_DOEPTSIZ1_OFFSET 0xb30 #define GC_USB_DOEPTSIZ1_DEFAULT 0x0 #define GC_USB_DOEPDMA1_OFFSET 0xb34 #define GC_USB_DOEPDMA1_DEFAULT 0x0 #define GC_USB_DOEPDMAB1_OFFSET 0xb3c #define GC_USB_DOEPDMAB1_DEFAULT 0x0 #define GC_USB_DOEPCTL2_OFFSET 0xb40 #define GC_USB_DOEPCTL2_DEFAULT 0x0 #define GC_USB_DOEPINT2_OFFSET 0xb48 #define GC_USB_DOEPINT2_DEFAULT 0x0 #define GC_USB_DOEPTSIZ2_OFFSET 0xb50 #define GC_USB_DOEPTSIZ2_DEFAULT 0x0 #define GC_USB_DOEPDMA2_OFFSET 0xb54 #define GC_USB_DOEPDMA2_DEFAULT 0x0 #define GC_USB_DOEPDMAB2_OFFSET 0xb5c #define GC_USB_DOEPDMAB2_DEFAULT 0x0 #define GC_USB_DOEPCTL3_OFFSET 0xb60 #define GC_USB_DOEPCTL3_DEFAULT 0x0 #define GC_USB_DOEPINT3_OFFSET 0xb68 #define GC_USB_DOEPINT3_DEFAULT 0x0 #define GC_USB_DOEPTSIZ3_OFFSET 0xb70 #define GC_USB_DOEPTSIZ3_DEFAULT 0x0 #define GC_USB_DOEPDMA3_OFFSET 0xb74 #define GC_USB_DOEPDMA3_DEFAULT 0x0 #define GC_USB_DOEPDMAB3_OFFSET 0xb7c #define GC_USB_DOEPDMAB3_DEFAULT 0x0 #define GC_USB_DOEPCTL4_OFFSET 0xb80 #define GC_USB_DOEPCTL4_DEFAULT 0x0 #define GC_USB_DOEPINT4_OFFSET 0xb88 #define GC_USB_DOEPINT4_DEFAULT 0x0 #define GC_USB_DOEPTSIZ4_OFFSET 0xb90 #define GC_USB_DOEPTSIZ4_DEFAULT 0x0 #define GC_USB_DOEPDMA4_OFFSET 0xb94 #define GC_USB_DOEPDMA4_DEFAULT 0x0 #define GC_USB_DOEPDMAB4_OFFSET 0xb9c #define GC_USB_DOEPDMAB4_DEFAULT 0x0 #define GC_USB_DOEPCTL5_OFFSET 0xba0 #define GC_USB_DOEPCTL5_DEFAULT 0x0 #define GC_USB_DOEPINT5_OFFSET 0xba8 #define GC_USB_DOEPINT5_DEFAULT 0x0 #define GC_USB_DOEPTSIZ5_OFFSET 0xbb0 #define GC_USB_DOEPTSIZ5_DEFAULT 0x0 #define GC_USB_DOEPDMA5_OFFSET 0xbb4 #define GC_USB_DOEPDMA5_DEFAULT 0x0 #define GC_USB_DOEPDMAB5_OFFSET 0xbbc #define GC_USB_DOEPDMAB5_DEFAULT 0x0 #define GC_USB_DOEPCTL6_OFFSET 0xbc0 #define GC_USB_DOEPCTL6_DEFAULT 0x0 #define GC_USB_DOEPINT6_OFFSET 0xbc8 #define GC_USB_DOEPINT6_DEFAULT 0x0 #define GC_USB_DOEPTSIZ6_OFFSET 0xbd0 #define GC_USB_DOEPTSIZ6_DEFAULT 0x0 #define GC_USB_DOEPDMA6_OFFSET 0xbd4 #define GC_USB_DOEPDMA6_DEFAULT 0x0 #define GC_USB_DOEPDMAB6_OFFSET 0xbdc #define GC_USB_DOEPDMAB6_DEFAULT 0x0 #define GC_USB_DOEPCTL7_OFFSET 0xbe0 #define GC_USB_DOEPCTL7_DEFAULT 0x0 #define GC_USB_DOEPINT7_OFFSET 0xbe8 #define GC_USB_DOEPINT7_DEFAULT 0x0 #define GC_USB_DOEPTSIZ7_OFFSET 0xbf0 #define GC_USB_DOEPTSIZ7_DEFAULT 0x0 #define GC_USB_DOEPDMA7_OFFSET 0xbf4 #define GC_USB_DOEPDMA7_DEFAULT 0x0 #define GC_USB_DOEPDMAB7_OFFSET 0xbfc #define GC_USB_DOEPDMAB7_DEFAULT 0x0 #define GC_USB_DOEPCTL8_OFFSET 0xc00 #define GC_USB_DOEPCTL8_DEFAULT 0x0 #define GC_USB_DOEPINT8_OFFSET 0xc08 #define GC_USB_DOEPINT8_DEFAULT 0x0 #define GC_USB_DOEPTSIZ8_OFFSET 0xc10 #define GC_USB_DOEPTSIZ8_DEFAULT 0x0 #define GC_USB_DOEPDMA8_OFFSET 0xc14 #define GC_USB_DOEPDMA8_DEFAULT 0x0 #define GC_USB_DOEPDMAB8_OFFSET 0xc1c #define GC_USB_DOEPDMAB8_DEFAULT 0x0 #define GC_USB_DOEPCTL9_OFFSET 0xc20 #define GC_USB_DOEPCTL9_DEFAULT 0x0 #define GC_USB_DOEPINT9_OFFSET 0xc28 #define GC_USB_DOEPINT9_DEFAULT 0x0 #define GC_USB_DOEPTSIZ9_OFFSET 0xc30 #define GC_USB_DOEPTSIZ9_DEFAULT 0x0 #define GC_USB_DOEPDMA9_OFFSET 0xc34 #define GC_USB_DOEPDMA9_DEFAULT 0x0 #define GC_USB_DOEPDMAB9_OFFSET 0xc3c #define GC_USB_DOEPDMAB9_DEFAULT 0x0 #define GC_USB_DOEPCTL10_OFFSET 0xc40 #define GC_USB_DOEPCTL10_DEFAULT 0x0 #define GC_USB_DOEPINT10_OFFSET 0xc48 #define GC_USB_DOEPINT10_DEFAULT 0x0 #define GC_USB_DOEPTSIZ10_OFFSET 0xc50 #define GC_USB_DOEPTSIZ10_DEFAULT 0x0 #define GC_USB_DOEPDMA10_OFFSET 0xc54 #define GC_USB_DOEPDMA10_DEFAULT 0x0 #define GC_USB_DOEPDMAB10_OFFSET 0xc5c #define GC_USB_DOEPDMAB10_DEFAULT 0x0 #define GC_USB_DOEPCTL11_OFFSET 0xc60 #define GC_USB_DOEPCTL11_DEFAULT 0x0 #define GC_USB_DOEPINT11_OFFSET 0xc68 #define GC_USB_DOEPINT11_DEFAULT 0x0 #define GC_USB_DOEPTSIZ11_OFFSET 0xc70 #define GC_USB_DOEPTSIZ11_DEFAULT 0x0 #define GC_USB_DOEPDMA11_OFFSET 0xc74 #define GC_USB_DOEPDMA11_DEFAULT 0x0 #define GC_USB_DOEPDMAB11_OFFSET 0xc7c #define GC_USB_DOEPDMAB11_DEFAULT 0x0 #define GC_USB_DOEPCTL12_OFFSET 0xc80 #define GC_USB_DOEPCTL12_DEFAULT 0x0 #define GC_USB_DOEPINT12_OFFSET 0xc88 #define GC_USB_DOEPINT12_DEFAULT 0x0 #define GC_USB_DOEPTSIZ12_OFFSET 0xc90 #define GC_USB_DOEPTSIZ12_DEFAULT 0x0 #define GC_USB_DOEPDMA12_OFFSET 0xc94 #define GC_USB_DOEPDMA12_DEFAULT 0x0 #define GC_USB_DOEPDMAB12_OFFSET 0xc9c #define GC_USB_DOEPDMAB12_DEFAULT 0x0 #define GC_USB_DOEPCTL13_OFFSET 0xca0 #define GC_USB_DOEPCTL13_DEFAULT 0x0 #define GC_USB_DOEPINT13_OFFSET 0xca8 #define GC_USB_DOEPINT13_DEFAULT 0x0 #define GC_USB_DOEPTSIZ13_OFFSET 0xcb0 #define GC_USB_DOEPTSIZ13_DEFAULT 0x0 #define GC_USB_DOEPDMA13_OFFSET 0xcb4 #define GC_USB_DOEPDMA13_DEFAULT 0x0 #define GC_USB_DOEPDMAB13_OFFSET 0xcbc #define GC_USB_DOEPDMAB13_DEFAULT 0x0 #define GC_USB_DOEPCTL14_OFFSET 0xcc0 #define GC_USB_DOEPCTL14_DEFAULT 0x0 #define GC_USB_DOEPINT14_OFFSET 0xcc8 #define GC_USB_DOEPINT14_DEFAULT 0x0 #define GC_USB_DOEPTSIZ14_OFFSET 0xcd0 #define GC_USB_DOEPTSIZ14_DEFAULT 0x0 #define GC_USB_DOEPDMA14_OFFSET 0xcd4 #define GC_USB_DOEPDMA14_DEFAULT 0x0 #define GC_USB_DOEPDMAB14_OFFSET 0xcdc #define GC_USB_DOEPDMAB14_DEFAULT 0x0 #define GC_USB_DOEPCTL15_OFFSET 0xce0 #define GC_USB_DOEPCTL15_DEFAULT 0x0 #define GC_USB_DOEPINT15_OFFSET 0xce8 #define GC_USB_DOEPINT15_DEFAULT 0x0 #define GC_USB_DOEPTSIZ15_OFFSET 0xcf0 #define GC_USB_DOEPTSIZ15_DEFAULT 0x0 #define GC_USB_DOEPDMA15_OFFSET 0xcf4 #define GC_USB_DOEPDMA15_DEFAULT 0x0 #define GC_USB_DOEPDMAB15_OFFSET 0xcfc #define GC_USB_DOEPDMAB15_DEFAULT 0x0 #define GC_USB_PCGCCTL_OFFSET 0xe00 #define GC_USB_PCGCCTL_DEFAULT 0x0 #define GC_USB_DFIFO_OFFSET 0x20000 #define GC_VOLT_VERSION_OFFSET 0x0 #define GC_VOLT_VERSION_DEFAULT 0x1014125 #define GC_VOLT_ANALOG_POWER_DOWN_B_OFFSET 0x4 #define GC_VOLT_ANALOG_POWER_DOWN_B_DEFAULT 0x0 #define GC_VOLT_ANALOG_CONTROL_OFFSET 0x8 #define GC_VOLT_ANALOG_CONTROL_DEFAULT 0xb916 #define GC_VOLT_CONFIG_OFFSET 0xc #define GC_VOLT_CONFIG_DEFAULT 0x0 #define GC_VOLT_GLITCH_DET_CTR_STATE_OFFSET 0x10 #define GC_VOLT_GLITCH_DET_CTR_STATE_DEFAULT 0x0 #define GC_VOLT_ILLEGAL_VALS_CTR_STATE_OFFSET 0x14 #define GC_VOLT_ILLEGAL_VALS_CTR_STATE_DEFAULT 0x0 #define GC_WATCHDOG_WDOGLOAD_OFFSET 0x0 #define GC_WATCHDOG_WDOGLOAD_DEFAULT 0xffffffff #define GC_WATCHDOG_WDOGVALUE_OFFSET 0x4 #define GC_WATCHDOG_WDOGVALUE_DEFAULT 0xffffffff #define GC_WATCHDOG_WDOGCONTROL_OFFSET 0x8 #define GC_WATCHDOG_WDOGCONTROL_DEFAULT 0x0 #define GC_WATCHDOG_WDOGINTCLR_OFFSET 0xc #define GC_WATCHDOG_WDOGINTCLR_DEFAULT 0x0 #define GC_WATCHDOG_WDOGRIS_OFFSET 0x10 #define GC_WATCHDOG_WDOGRIS_DEFAULT 0x0 #define GC_WATCHDOG_WDOGMIS_OFFSET 0x14 #define GC_WATCHDOG_WDOGMIS_DEFAULT 0x0 #define GC_WATCHDOG_WDOGLOCK_OFFSET 0xc00 #define GC_WATCHDOG_WDOGLOCK_DEFAULT 0x0 #define GC_WATCHDOG_WDOGITCR_OFFSET 0xf00 #define GC_WATCHDOG_WDOGITCR_DEFAULT 0x0 #define GC_WATCHDOG_WDOGITOP_OFFSET 0xf04 #define GC_WATCHDOG_WDOGITOP_DEFAULT 0x0 #define GC_WATCHDOG_WDOGPERIPHID4_OFFSET 0xfd0 #define GC_WATCHDOG_WDOGPERIPHID4_DEFAULT 0x4 #define GC_WATCHDOG_WDOGPERIPHID5_OFFSET 0xfd4 #define GC_WATCHDOG_WDOGPERIPHID5_DEFAULT 0x0 #define GC_WATCHDOG_WDOGPERIPHID6_OFFSET 0xfd8 #define GC_WATCHDOG_WDOGPERIPHID6_DEFAULT 0x0 #define GC_WATCHDOG_WDOGPERIPHID7_OFFSET 0xfdc #define GC_WATCHDOG_WDOGPERIPHID7_DEFAULT 0x0 #define GC_WATCHDOG_WDOGPERIPHID0_OFFSET 0xfe0 #define GC_WATCHDOG_WDOGPERIPHID0_DEFAULT 0x24 #define GC_WATCHDOG_WDOGPERIPHID1_OFFSET 0xfe4 #define GC_WATCHDOG_WDOGPERIPHID1_DEFAULT 0xb8 #define GC_WATCHDOG_WDOGPERIPHID2_OFFSET 0xfe8 #define GC_WATCHDOG_WDOGPERIPHID2_DEFAULT 0xb #define GC_WATCHDOG_WDOGPERIPHID3_OFFSET 0xfec #define GC_WATCHDOG_WDOGPERIPHID3_DEFAULT 0x0 #define GC_WATCHDOG_WDOGPCELLID0_OFFSET 0xff0 #define GC_WATCHDOG_WDOGPCELLID0_DEFAULT 0xd #define GC_WATCHDOG_WDOGPCELLID1_OFFSET 0xff4 #define GC_WATCHDOG_WDOGPCELLID1_DEFAULT 0xf0 #define GC_WATCHDOG_WDOGPCELLID2_OFFSET 0xff8 #define GC_WATCHDOG_WDOGPCELLID2_DEFAULT 0x5 #define GC_WATCHDOG_WDOGPCELLID3_OFFSET 0xffc #define GC_WATCHDOG_WDOGPCELLID3_DEFAULT 0xb1 #define GC_XO_VERSION_OFFSET 0x0 #define GC_XO_VERSION_DEFAULT 0x101424a #define GC_XO_CFG_WR_EN_OFFSET 0x4 #define GC_XO_CFG_WR_EN_DEFAULT 0x1 #define GC_XO_JTR_CTRL_EN_OFFSET 0x8 #define GC_XO_JTR_CTRL_EN_DEFAULT 0x1 #define GC_XO_CLK_JTR_CTRL_OFFSET 0xc #define GC_XO_CLK_JTR_CTRL_DEFAULT 0x3 #define GC_XO_CLK_JTR_RC_COARSE_ATE_TRIM_OFFSET 0x10 #define GC_XO_CLK_JTR_RC_COARSE_ATE_TRIM_DEFAULT 0x0 #define GC_XO_CLK_JTR_RC_FINE_ATE_TRIM_OFFSET 0x14 #define GC_XO_CLK_JTR_RC_FINE_ATE_TRIM_DEFAULT 0x0 #define GC_XO_CLK_JTR_CURRENT_OFFSET 0x18 #define GC_XO_CLK_JTR_CURRENT_DEFAULT 0x0 #define GC_XO_CLK_JTR_SYNC_CONTENTS_OFFSET 0x1c #define GC_XO_CLK_JTR_SYNC_CONTENTS_DEFAULT 0x0 #define GC_XO_CLK_JTR_TRIM_CTRL_OFFSET 0x20 #define GC_XO_CLK_JTR_TRIM_CTRL_DEFAULT 0x1e #define GC_XO_CLK_JTR_JITTERY_TRIM_EN_OFFSET 0x24 #define GC_XO_CLK_JTR_JITTERY_TRIM_EN_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_DIS_SIGNATURE_OFFSET 0x28 #define GC_XO_CLK_JTR_JITTERY_TRIM_DIS_SIGNATURE_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_RELOAD_PERIOD_OFFSET 0x2c #define GC_XO_CLK_JTR_JITTERY_TRIM_RELOAD_PERIOD_DEFAULT 0xff #define GC_XO_CLK_JTR_JITTERY_TRIM_RANDOM_SEED_EN_OFFSET 0x30 #define GC_XO_CLK_JTR_JITTERY_TRIM_RANDOM_SEED_EN_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK0_OFFSET 0x34 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK0_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK1_OFFSET 0x38 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK1_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK2_OFFSET 0x3c #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK2_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK3_OFFSET 0x40 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK3_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK4_OFFSET 0x44 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK4_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK5_OFFSET 0x48 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK5_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK6_OFFSET 0x4c #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK6_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK7_OFFSET 0x50 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK7_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK8_OFFSET 0x54 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK8_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK9_OFFSET 0x58 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK9_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK10_OFFSET 0x5c #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK10_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK11_OFFSET 0x60 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK11_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK12_OFFSET 0x64 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK12_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK13_OFFSET 0x68 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK13_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK14_OFFSET 0x6c #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK14_DEFAULT 0x0 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK15_OFFSET 0x70 #define GC_XO_CLK_JTR_JITTERY_TRIM_BANK15_DEFAULT 0x0 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_OFFSET 0x74 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_DEFAULT 0x0 #define GC_XO_CLK_JTR_CALIB_NOP_SEEN_OFFSET 0x78 #define GC_XO_CLK_JTR_CALIB_NOP_SEEN_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_TRIM_CLK_CNT_OFFSET 0x7c #define GC_XO_CLK_JTR_SLOW_TRIM_CLK_CNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_TRIM_CLK_CNT_OFFSET 0x80 #define GC_XO_CLK_JTR_FAST_TRIM_CLK_CNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB0_OFFSET 0x84 #define GC_XO_CLK_JTR_FAST_CALIB0_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB1_OFFSET 0x88 #define GC_XO_CLK_JTR_FAST_CALIB1_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB2_OFFSET 0x8c #define GC_XO_CLK_JTR_FAST_CALIB2_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB3_OFFSET 0x90 #define GC_XO_CLK_JTR_FAST_CALIB3_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB4_OFFSET 0x94 #define GC_XO_CLK_JTR_FAST_CALIB4_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB5_OFFSET 0x98 #define GC_XO_CLK_JTR_FAST_CALIB5_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB6_OFFSET 0x9c #define GC_XO_CLK_JTR_FAST_CALIB6_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB7_OFFSET 0xa0 #define GC_XO_CLK_JTR_FAST_CALIB7_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL0_OFFSET 0xa4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL0_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL1_OFFSET 0xa8 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL1_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL2_OFFSET 0xac #define GC_XO_CLK_JTR_FAST_CALIB_CTRL2_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL3_OFFSET 0xb0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL3_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL4_OFFSET 0xb4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL4_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL5_OFFSET 0xb8 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL5_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL6_OFFSET 0xbc #define GC_XO_CLK_JTR_FAST_CALIB_CTRL6_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL7_OFFSET 0xc0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL7_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL8_OFFSET 0xc4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL8_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB0_OFFSET 0xc8 #define GC_XO_CLK_JTR_SLOW_CALIB0_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB1_OFFSET 0xcc #define GC_XO_CLK_JTR_SLOW_CALIB1_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB2_OFFSET 0xd0 #define GC_XO_CLK_JTR_SLOW_CALIB2_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB3_OFFSET 0xd4 #define GC_XO_CLK_JTR_SLOW_CALIB3_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB4_OFFSET 0xd8 #define GC_XO_CLK_JTR_SLOW_CALIB4_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB5_OFFSET 0xdc #define GC_XO_CLK_JTR_SLOW_CALIB5_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB6_OFFSET 0xe0 #define GC_XO_CLK_JTR_SLOW_CALIB6_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB7_OFFSET 0xe4 #define GC_XO_CLK_JTR_SLOW_CALIB7_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL0_OFFSET 0xe8 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL0_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL1_OFFSET 0xec #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL1_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL2_OFFSET 0xf0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL2_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL3_OFFSET 0xf4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL3_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL4_OFFSET 0xf8 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL4_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL5_OFFSET 0xfc #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL5_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL6_OFFSET 0x100 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL6_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL7_OFFSET 0x104 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL7_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL8_OFFSET 0x108 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL8_DEFAULT 0x0 #define GC_XO_CLK_JTR_ENABLE_SW_TRIM_OFFSET 0x10c #define GC_XO_CLK_JTR_ENABLE_SW_TRIM_DEFAULT 0x0 #define GC_XO_CLK_JTR_SW_TRIM_COUNTER_OFFSET 0x110 #define GC_XO_CLK_JTR_SW_TRIM_COUNTER_DEFAULT 0x0 #define GC_XO_CLK_TIMER_CTRL_OFFSET 0x114 #define GC_XO_CLK_TIMER_CTRL_DEFAULT 0x3 #define GC_XO_CLK_TIMER_RC_COARSE_ATE_TRIM_OFFSET 0x118 #define GC_XO_CLK_TIMER_RC_COARSE_ATE_TRIM_DEFAULT 0x0 #define GC_XO_CLK_TIMER_RC_FINE_ATE_TRIM_OFFSET 0x11c #define GC_XO_CLK_TIMER_RC_FINE_ATE_TRIM_DEFAULT 0x0 #define GC_XO_CLK_TIMER_CURRENT_OFFSET 0x120 #define GC_XO_CLK_TIMER_CURRENT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SYNC_CONTENTS_OFFSET 0x124 #define GC_XO_CLK_TIMER_SYNC_CONTENTS_DEFAULT 0x0 #define GC_XO_CLK_TIMER_TRIM_CTRL_OFFSET 0x128 #define GC_XO_CLK_TIMER_TRIM_CTRL_DEFAULT 0x1e #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_OFFSET 0x12c #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_DEFAULT 0x0 #define GC_XO_CLK_TIMER_CALIB_NOP_SEEN_OFFSET 0x130 #define GC_XO_CLK_TIMER_CALIB_NOP_SEEN_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_TRIM_CLK_CNT_OFFSET 0x134 #define GC_XO_CLK_TIMER_SLOW_TRIM_CLK_CNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_TRIM_CLK_CNT_OFFSET 0x138 #define GC_XO_CLK_TIMER_FAST_TRIM_CLK_CNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB0_OFFSET 0x13c #define GC_XO_CLK_TIMER_FAST_CALIB0_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB1_OFFSET 0x140 #define GC_XO_CLK_TIMER_FAST_CALIB1_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB2_OFFSET 0x144 #define GC_XO_CLK_TIMER_FAST_CALIB2_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB3_OFFSET 0x148 #define GC_XO_CLK_TIMER_FAST_CALIB3_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB4_OFFSET 0x14c #define GC_XO_CLK_TIMER_FAST_CALIB4_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB5_OFFSET 0x150 #define GC_XO_CLK_TIMER_FAST_CALIB5_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB6_OFFSET 0x154 #define GC_XO_CLK_TIMER_FAST_CALIB6_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB7_OFFSET 0x158 #define GC_XO_CLK_TIMER_FAST_CALIB7_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL0_OFFSET 0x15c #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL0_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL1_OFFSET 0x160 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL1_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL2_OFFSET 0x164 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL2_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL3_OFFSET 0x168 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL3_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL4_OFFSET 0x16c #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL4_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL5_OFFSET 0x170 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL5_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL6_OFFSET 0x174 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL6_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL7_OFFSET 0x178 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL7_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL8_OFFSET 0x17c #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL8_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB0_OFFSET 0x180 #define GC_XO_CLK_TIMER_SLOW_CALIB0_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB1_OFFSET 0x184 #define GC_XO_CLK_TIMER_SLOW_CALIB1_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB2_OFFSET 0x188 #define GC_XO_CLK_TIMER_SLOW_CALIB2_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB3_OFFSET 0x18c #define GC_XO_CLK_TIMER_SLOW_CALIB3_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB4_OFFSET 0x190 #define GC_XO_CLK_TIMER_SLOW_CALIB4_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB5_OFFSET 0x194 #define GC_XO_CLK_TIMER_SLOW_CALIB5_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB6_OFFSET 0x198 #define GC_XO_CLK_TIMER_SLOW_CALIB6_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB7_OFFSET 0x19c #define GC_XO_CLK_TIMER_SLOW_CALIB7_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL0_OFFSET 0x1a0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL0_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL1_OFFSET 0x1a4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL1_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL2_OFFSET 0x1a8 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL2_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL3_OFFSET 0x1ac #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL3_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL4_OFFSET 0x1b0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL4_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL5_OFFSET 0x1b4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL5_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL6_OFFSET 0x1b8 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL6_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL7_OFFSET 0x1bc #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL7_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL8_OFFSET 0x1c0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL8_DEFAULT 0x0 #define GC_XO_CLK_TIMER_ENABLE_SW_TRIM_OFFSET 0x1c4 #define GC_XO_CLK_TIMER_ENABLE_SW_TRIM_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SW_TRIM_COUNTER_OFFSET 0x1c8 #define GC_XO_CLK_TIMER_SW_TRIM_COUNTER_DEFAULT 0x0 #define GC_XO_OSC_XTL_FREQ2X_OFFSET 0x1cc #define GC_XO_OSC_XTL_FREQ2X_DEFAULT 0x7 #define GC_XO_OSC_XTL_FREQ2X_STAT_OFFSET 0x1d0 #define GC_XO_OSC_XTL_FREQ2X_STAT_DEFAULT 0x6 #define GC_XO_OSC_XTL_TRIMD_OFFSET 0x1d4 #define GC_XO_OSC_XTL_TRIMD_DEFAULT 0x7f #define GC_XO_OSC_XTL_TRIMG_OFFSET 0x1d8 #define GC_XO_OSC_XTL_TRIMG_DEFAULT 0x7f #define GC_XO_OSC_XTL_CTRL_OFFSET 0x1dc #define GC_XO_OSC_XTL_CTRL_DEFAULT 0x0 #define GC_XO_OSC_XTL_RC_FLTR_OFFSET 0x1e0 #define GC_XO_OSC_XTL_RC_FLTR_DEFAULT 0x15 #define GC_XO_OSC_XTL_OVRD_OFFSET 0x1e4 #define GC_XO_OSC_XTL_OVRD_DEFAULT 0x17 #define GC_XO_OSC_XTL_OVRD_HOLDB_OFFSET 0x1e8 #define GC_XO_OSC_XTL_OVRD_HOLDB_DEFAULT 0x1 #define GC_XO_OSC_XTL_TRIM_OFFSET 0x1ec #define GC_XO_OSC_XTL_TRIM_DEFAULT 0x0 #define GC_XO_OSC_XTL_TRIM_STAT_OFFSET 0x1f0 #define GC_XO_OSC_XTL_TRIM_STAT_DEFAULT 0x0 #define GC_XO_OSC_XTL_FSM_EN_OFFSET 0x1f4 #define GC_XO_OSC_XTL_FSM_EN_DEFAULT 0x0 #define GC_XO_OSC_XTL_FSM_EN_KEY 0x60221413 #define GC_XO_OSC_XTL_FSM_RESETB_OFFSET 0x1f8 #define GC_XO_OSC_XTL_FSM_RESETB_DEFAULT 0x0 #define GC_XO_OSC_XTL_FSM_OFFSET 0x1fc #define GC_XO_OSC_XTL_FSM_DEFAULT 0x0 #define GC_XO_OSC_XTL_FSM_CFG_OFFSET 0x200 #define GC_XO_OSC_XTL_FSM_CFG_DEFAULT 0xd7488 #define GC_XO_OSC_TEST_OFFSET 0x204 #define GC_XO_OSC_TEST_DEFAULT 0x0 #define GC_XO_TESTBUS_SEL_OFFSET 0x208 #define GC_XO_TESTBUS_SEL_DEFAULT 0x0 #define GC_XO_CLK_JTR_TESTBUS_RD_OFFSET 0x20c #define GC_XO_CLK_JTR_TESTBUS_RD_DEFAULT 0x0 #define GC_XO_CLK_TIMER_TESTBUS_RD_OFFSET 0x210 #define GC_XO_CLK_TIMER_TESTBUS_RD_DEFAULT 0x0 #define GC_XO_ANTEST_CTRL_OFFSET 0x214 #define GC_XO_ANTEST_CTRL_DEFAULT 0x0 #define GC_XO_DXO_INT_ENABLE_OFFSET 0x218 #define GC_XO_DXO_INT_ENABLE_DEFAULT 0x0 #define GC_XO_DXO_INT_STATE_OFFSET 0x21c #define GC_XO_DXO_INT_STATE_DEFAULT 0x0 #define GC_XO_DXO_INT_TEST_OFFSET 0x220 #define GC_XO_DXO_INT_TEST_DEFAULT 0x0 #define GC_M3_ITM_STIM0_OFFSET 0x0 #define GC_M3_ITM_STIM0_DEFAULT 0x0 #define GC_M3_ITM_STIM1_OFFSET 0x4 #define GC_M3_ITM_STIM1_DEFAULT 0x0 #define GC_M3_ITM_STIM2_OFFSET 0x8 #define GC_M3_ITM_STIM2_DEFAULT 0x0 #define GC_M3_ITM_STIM3_OFFSET 0xc #define GC_M3_ITM_STIM3_DEFAULT 0x0 #define GC_M3_ITM_STIM4_OFFSET 0x10 #define GC_M3_ITM_STIM4_DEFAULT 0x0 #define GC_M3_ITM_STIM5_OFFSET 0x14 #define GC_M3_ITM_STIM5_DEFAULT 0x0 #define GC_M3_ITM_STIM6_OFFSET 0x18 #define GC_M3_ITM_STIM6_DEFAULT 0x0 #define GC_M3_ITM_STIM7_OFFSET 0x1c #define GC_M3_ITM_STIM7_DEFAULT 0x0 #define GC_M3_ITM_STIM8_OFFSET 0x20 #define GC_M3_ITM_STIM8_DEFAULT 0x0 #define GC_M3_ITM_STIM9_OFFSET 0x24 #define GC_M3_ITM_STIM9_DEFAULT 0x0 #define GC_M3_ITM_STIM10_OFFSET 0x28 #define GC_M3_ITM_STIM10_DEFAULT 0x0 #define GC_M3_ITM_STIM11_OFFSET 0x2c #define GC_M3_ITM_STIM11_DEFAULT 0x0 #define GC_M3_ITM_STIM12_OFFSET 0x30 #define GC_M3_ITM_STIM12_DEFAULT 0x0 #define GC_M3_ITM_STIM13_OFFSET 0x34 #define GC_M3_ITM_STIM13_DEFAULT 0x0 #define GC_M3_ITM_STIM14_OFFSET 0x38 #define GC_M3_ITM_STIM14_DEFAULT 0x0 #define GC_M3_ITM_STIM15_OFFSET 0x3c #define GC_M3_ITM_STIM15_DEFAULT 0x0 #define GC_M3_ITM_STIM16_OFFSET 0x40 #define GC_M3_ITM_STIM16_DEFAULT 0x0 #define GC_M3_ITM_STIM17_OFFSET 0x44 #define GC_M3_ITM_STIM17_DEFAULT 0x0 #define GC_M3_ITM_STIM18_OFFSET 0x48 #define GC_M3_ITM_STIM18_DEFAULT 0x0 #define GC_M3_ITM_STIM19_OFFSET 0x4c #define GC_M3_ITM_STIM19_DEFAULT 0x0 #define GC_M3_ITM_STIM20_OFFSET 0x50 #define GC_M3_ITM_STIM20_DEFAULT 0x0 #define GC_M3_ITM_STIM21_OFFSET 0x54 #define GC_M3_ITM_STIM21_DEFAULT 0x0 #define GC_M3_ITM_STIM22_OFFSET 0x58 #define GC_M3_ITM_STIM22_DEFAULT 0x0 #define GC_M3_ITM_STIM23_OFFSET 0x5c #define GC_M3_ITM_STIM23_DEFAULT 0x0 #define GC_M3_ITM_STIM24_OFFSET 0x60 #define GC_M3_ITM_STIM24_DEFAULT 0x0 #define GC_M3_ITM_STIM25_OFFSET 0x64 #define GC_M3_ITM_STIM25_DEFAULT 0x0 #define GC_M3_ITM_STIM26_OFFSET 0x68 #define GC_M3_ITM_STIM26_DEFAULT 0x0 #define GC_M3_ITM_STIM27_OFFSET 0x6c #define GC_M3_ITM_STIM27_DEFAULT 0x0 #define GC_M3_ITM_STIM28_OFFSET 0x70 #define GC_M3_ITM_STIM28_DEFAULT 0x0 #define GC_M3_ITM_STIM29_OFFSET 0x74 #define GC_M3_ITM_STIM29_DEFAULT 0x0 #define GC_M3_ITM_STIM30_OFFSET 0x78 #define GC_M3_ITM_STIM30_DEFAULT 0x0 #define GC_M3_ITM_STIM31_OFFSET 0x7c #define GC_M3_ITM_STIM31_DEFAULT 0x0 #define GC_M3_ITM_TER_OFFSET 0xe00 #define GC_M3_ITM_TER_DEFAULT 0x0 #define GC_M3_ITM_TPR_OFFSET 0xe40 #define GC_M3_ITM_TPR_DEFAULT 0x0 #define GC_M3_ITM_TCR_OFFSET 0xe80 #define GC_M3_ITM_TCR_DEFAULT 0x0 #define GC_M3_ITM_INTWREG_OFFSET 0xef8 #define GC_M3_ITM_INTWREG_DEFAULT 0x0 #define GC_M3_ITM_INTRREG_OFFSET 0xefc #define GC_M3_ITM_INTRREG_DEFAULT 0x0 #define GC_M3_ITM_INTMREG_OFFSET 0xf00 #define GC_M3_ITM_INTMREG_DEFAULT 0x0 #define GC_M3_ITM_LOCKCREG_OFFSET 0xfb0 #define GC_M3_ITM_LOCKCREG_DEFAULT 0x0 #define GC_M3_ITM_LOCKSREG_OFFSET 0xfb4 #define GC_M3_ITM_LOCKSREG_DEFAULT 0x0 #define GC_M3_ITM_PID4_OFFSET 0xfd0 #define GC_M3_ITM_PID4_DEFAULT 0x4 #define GC_M3_ITM_PID5_OFFSET 0xfd4 #define GC_M3_ITM_PID5_DEFAULT 0x0 #define GC_M3_ITM_PID6_OFFSET 0xfd8 #define GC_M3_ITM_PID6_DEFAULT 0x0 #define GC_M3_ITM_PID7_OFFSET 0xfdc #define GC_M3_ITM_PID7_DEFAULT 0x0 #define GC_M3_ITM_PID0_OFFSET 0xfe0 #define GC_M3_ITM_PID0_DEFAULT 0x1 #define GC_M3_ITM_PID1_OFFSET 0xfe4 #define GC_M3_ITM_PID1_DEFAULT 0xb0 #define GC_M3_ITM_PID2_OFFSET 0xfe8 #define GC_M3_ITM_PID2_DEFAULT 0x1b #define GC_M3_ITM_PID3_OFFSET 0xfec #define GC_M3_ITM_PID3_DEFAULT 0x0 #define GC_M3_ITM_CID0_OFFSET 0xff0 #define GC_M3_ITM_CID0_DEFAULT 0xd #define GC_M3_ITM_CID1_OFFSET 0xff4 #define GC_M3_ITM_CID1_DEFAULT 0xe0 #define GC_M3_ITM_CID2_OFFSET 0xff8 #define GC_M3_ITM_CID2_DEFAULT 0x5 #define GC_M3_ITM_CID3_OFFSET 0xffc #define GC_M3_ITM_CID3_DEFAULT 0xb1 #define GC_M3_DWT_CTRL_OFFSET 0x1000 #define GC_M3_DWT_CTRL_DEFAULT 0x40000000 #define GC_M3_DWT_CYCCNT_OFFSET 0x1004 #define GC_M3_DWT_CYCCNT_DEFAULT 0x0 #define GC_M3_DWT_CPICNT_OFFSET 0x1008 #define GC_M3_DWT_CPICNT_DEFAULT 0x0 #define GC_M3_DWT_EXCCNT_OFFSET 0x100c #define GC_M3_DWT_EXCCNT_DEFAULT 0x0 #define GC_M3_DWT_SLEEPCNT_OFFSET 0x1010 #define GC_M3_DWT_SLEEPCNT_DEFAULT 0x0 #define GC_M3_DWT_LSUCNT_OFFSET 0x1014 #define GC_M3_DWT_LSUCNT_DEFAULT 0x0 #define GC_M3_DWT_FOLDCNT_OFFSET 0x1018 #define GC_M3_DWT_FOLDCNT_DEFAULT 0x0 #define GC_M3_DWT_PCSR_OFFSET 0x101c #define GC_M3_DWT_PCSR_DEFAULT 0x0 #define GC_M3_DWT_COMP0_OFFSET 0x1020 #define GC_M3_DWT_COMP0_DEFAULT 0x0 #define GC_M3_DWT_MASK0_OFFSET 0x1024 #define GC_M3_DWT_MASK0_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION0_OFFSET 0x1028 #define GC_M3_DWT_FUNCTION0_DEFAULT 0x0 #define GC_M3_DWT_COMP1_OFFSET 0x1030 #define GC_M3_DWT_COMP1_DEFAULT 0x0 #define GC_M3_DWT_MASK1_OFFSET 0x1034 #define GC_M3_DWT_MASK1_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION1_OFFSET 0x1038 #define GC_M3_DWT_FUNCTION1_DEFAULT 0x0 #define GC_M3_DWT_COMP2_OFFSET 0x1040 #define GC_M3_DWT_COMP2_DEFAULT 0x0 #define GC_M3_DWT_MASK2_OFFSET 0x1044 #define GC_M3_DWT_MASK2_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION2_OFFSET 0x1048 #define GC_M3_DWT_FUNCTION2_DEFAULT 0x0 #define GC_M3_DWT_COMP3_OFFSET 0x1050 #define GC_M3_DWT_COMP3_DEFAULT 0x0 #define GC_M3_DWT_MASK3_OFFSET 0x1054 #define GC_M3_DWT_MASK3_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION3_OFFSET 0x1058 #define GC_M3_DWT_FUNCTION3_DEFAULT 0x0 #define GC_M3_DWT_PID4_OFFSET 0x1fd0 #define GC_M3_DWT_PID4_DEFAULT 0x4 #define GC_M3_DWT_PID5_OFFSET 0x1fd4 #define GC_M3_DWT_PID5_DEFAULT 0x0 #define GC_M3_DWT_PID6_OFFSET 0x1fd8 #define GC_M3_DWT_PID6_DEFAULT 0x0 #define GC_M3_DWT_PID7_OFFSET 0x1fdc #define GC_M3_DWT_PID7_DEFAULT 0x0 #define GC_M3_DWT_PID0_OFFSET 0x1fe0 #define GC_M3_DWT_PID0_DEFAULT 0x2 #define GC_M3_DWT_PID1_OFFSET 0x1fe4 #define GC_M3_DWT_PID1_DEFAULT 0xb0 #define GC_M3_DWT_PID2_OFFSET 0x1fe8 #define GC_M3_DWT_PID2_DEFAULT 0x1b #define GC_M3_DWT_PID3_OFFSET 0x1fec #define GC_M3_DWT_PID3_DEFAULT 0x0 #define GC_M3_DWT_CID0_OFFSET 0x1ff0 #define GC_M3_DWT_CID0_DEFAULT 0xd #define GC_M3_DWT_CID1_OFFSET 0x1ff4 #define GC_M3_DWT_CID1_DEFAULT 0xe0 #define GC_M3_DWT_CID2_OFFSET 0x1ff8 #define GC_M3_DWT_CID2_DEFAULT 0x5 #define GC_M3_DWT_CID3_OFFSET 0x1ffc #define GC_M3_DWT_CID3_DEFAULT 0xb1 #define GC_M3_FP_CTRL_OFFSET 0x2000 #define GC_M3_FP_CTRL_DEFAULT 0x260 #define GC_M3_FP_REMAP_OFFSET 0x2004 #define GC_M3_FP_REMAP_DEFAULT 0x0 #define GC_M3_FP_COMP0_OFFSET 0x2008 #define GC_M3_FP_COMP0_DEFAULT 0x0 #define GC_M3_FP_COMP1_OFFSET 0x200c #define GC_M3_FP_COMP1_DEFAULT 0x0 #define GC_M3_FP_COMP2_OFFSET 0x2010 #define GC_M3_FP_COMP2_DEFAULT 0x0 #define GC_M3_FP_COMP3_OFFSET 0x2014 #define GC_M3_FP_COMP3_DEFAULT 0x0 #define GC_M3_FP_COMP4_OFFSET 0x2018 #define GC_M3_FP_COMP4_DEFAULT 0x0 #define GC_M3_FP_COMP5_OFFSET 0x201c #define GC_M3_FP_COMP5_DEFAULT 0x0 #define GC_M3_FP_COMP6_OFFSET 0x2020 #define GC_M3_FP_COMP6_DEFAULT 0x0 #define GC_M3_FP_COMP7_OFFSET 0x2024 #define GC_M3_FP_COMP7_DEFAULT 0x0 #define GC_M3_FP_PID4_OFFSET 0x2fd0 #define GC_M3_FP_PID4_DEFAULT 0x4 #define GC_M3_FP_PID5_OFFSET 0x2fd4 #define GC_M3_FP_PID5_DEFAULT 0x0 #define GC_M3_FP_PID6_OFFSET 0x2fd8 #define GC_M3_FP_PID6_DEFAULT 0x0 #define GC_M3_FP_PID7_OFFSET 0x2fdc #define GC_M3_FP_PID7_DEFAULT 0x0 #define GC_M3_FP_PID0_OFFSET 0x2fe0 #define GC_M3_FP_PID0_DEFAULT 0x3 #define GC_M3_FP_PID1_OFFSET 0x2fe4 #define GC_M3_FP_PID1_DEFAULT 0xb0 #define GC_M3_FP_PID2_OFFSET 0x2fe8 #define GC_M3_FP_PID2_DEFAULT 0xb #define GC_M3_FP_PID3_OFFSET 0x2fec #define GC_M3_FP_PID3_DEFAULT 0x0 #define GC_M3_FP_CID0_OFFSET 0x2ff0 #define GC_M3_FP_CID0_DEFAULT 0xd #define GC_M3_FP_CID1_OFFSET 0x2ff4 #define GC_M3_FP_CID1_DEFAULT 0xe0 #define GC_M3_FP_CID2_OFFSET 0x2ff8 #define GC_M3_FP_CID2_DEFAULT 0x5 #define GC_M3_FP_CID3_OFFSET 0x2ffc #define GC_M3_FP_CID3_DEFAULT 0xb1 #define GC_M3_ICTR_OFFSET 0xe004 #define GC_M3_ICTR_DEFAULT 0x7 #define GC_M3_SYST_CSR_OFFSET 0xe010 #define GC_M3_SYST_CSR_DEFAULT 0x4 #define GC_M3_SYST_RVR_OFFSET 0xe014 #define GC_M3_SYST_RVR_DEFAULT 0x0 #define GC_M3_SYST_CVR_OFFSET 0xe018 #define GC_M3_SYST_CVR_DEFAULT 0x0 #define GC_M3_SYST_CALIB_OFFSET 0xe01c #define GC_M3_SYST_CALIB_DEFAULT 0x3f79f #define GC_M3_NVIC_ISER0_OFFSET 0xe100 #define GC_M3_NVIC_ISER0_DEFAULT 0x0 #define GC_M3_NVIC_ISER1_OFFSET 0xe104 #define GC_M3_NVIC_ISER1_DEFAULT 0x0 #define GC_M3_NVIC_ISER2_OFFSET 0xe108 #define GC_M3_NVIC_ISER2_DEFAULT 0x0 #define GC_M3_NVIC_ISER3_OFFSET 0xe10c #define GC_M3_NVIC_ISER3_DEFAULT 0x0 #define GC_M3_NVIC_ISER4_OFFSET 0xe110 #define GC_M3_NVIC_ISER4_DEFAULT 0x0 #define GC_M3_NVIC_ISER5_OFFSET 0xe114 #define GC_M3_NVIC_ISER5_DEFAULT 0x0 #define GC_M3_NVIC_ISER6_OFFSET 0xe118 #define GC_M3_NVIC_ISER6_DEFAULT 0x0 #define GC_M3_NVIC_ISER7_OFFSET 0xe11c #define GC_M3_NVIC_ISER7_DEFAULT 0x0 #define GC_M3_NVIC_ICER0_OFFSET 0xe180 #define GC_M3_NVIC_ICER0_DEFAULT 0x0 #define GC_M3_NVIC_ICER1_OFFSET 0xe184 #define GC_M3_NVIC_ICER1_DEFAULT 0x0 #define GC_M3_NVIC_ICER2_OFFSET 0xe188 #define GC_M3_NVIC_ICER2_DEFAULT 0x0 #define GC_M3_NVIC_ICER3_OFFSET 0xe18c #define GC_M3_NVIC_ICER3_DEFAULT 0x0 #define GC_M3_NVIC_ICER4_OFFSET 0xe190 #define GC_M3_NVIC_ICER4_DEFAULT 0x0 #define GC_M3_NVIC_ICER5_OFFSET 0xe194 #define GC_M3_NVIC_ICER5_DEFAULT 0x0 #define GC_M3_NVIC_ICER6_OFFSET 0xe198 #define GC_M3_NVIC_ICER6_DEFAULT 0x0 #define GC_M3_NVIC_ICER7_OFFSET 0xe19c #define GC_M3_NVIC_ICER7_DEFAULT 0x0 #define GC_M3_NVIC_ISPR0_OFFSET 0xe200 #define GC_M3_NVIC_ISPR0_DEFAULT 0x0 #define GC_M3_NVIC_ISPR1_OFFSET 0xe204 #define GC_M3_NVIC_ISPR1_DEFAULT 0x0 #define GC_M3_NVIC_ISPR2_OFFSET 0xe208 #define GC_M3_NVIC_ISPR2_DEFAULT 0x0 #define GC_M3_NVIC_ISPR3_OFFSET 0xe20c #define GC_M3_NVIC_ISPR3_DEFAULT 0x0 #define GC_M3_NVIC_ISPR4_OFFSET 0xe210 #define GC_M3_NVIC_ISPR4_DEFAULT 0x0 #define GC_M3_NVIC_ISPR5_OFFSET 0xe214 #define GC_M3_NVIC_ISPR5_DEFAULT 0x0 #define GC_M3_NVIC_ISPR6_OFFSET 0xe218 #define GC_M3_NVIC_ISPR6_DEFAULT 0x0 #define GC_M3_NVIC_ISPR7_OFFSET 0xe21c #define GC_M3_NVIC_ISPR7_DEFAULT 0x0 #define GC_M3_NVIC_ICPR0_OFFSET 0xe280 #define GC_M3_NVIC_ICPR0_DEFAULT 0x0 #define GC_M3_NVIC_ICPR1_OFFSET 0xe284 #define GC_M3_NVIC_ICPR1_DEFAULT 0x0 #define GC_M3_NVIC_ICPR2_OFFSET 0xe288 #define GC_M3_NVIC_ICPR2_DEFAULT 0x0 #define GC_M3_NVIC_ICPR3_OFFSET 0xe28c #define GC_M3_NVIC_ICPR3_DEFAULT 0x0 #define GC_M3_NVIC_ICPR4_OFFSET 0xe290 #define GC_M3_NVIC_ICPR4_DEFAULT 0x0 #define GC_M3_NVIC_ICPR5_OFFSET 0xe294 #define GC_M3_NVIC_ICPR5_DEFAULT 0x0 #define GC_M3_NVIC_ICPR6_OFFSET 0xe298 #define GC_M3_NVIC_ICPR6_DEFAULT 0x0 #define GC_M3_NVIC_ICPR7_OFFSET 0xe29c #define GC_M3_NVIC_ICPR7_DEFAULT 0x0 #define GC_M3_NVIC_IABR0_OFFSET 0xe300 #define GC_M3_NVIC_IABR0_DEFAULT 0x0 #define GC_M3_NVIC_IABR1_OFFSET 0xe304 #define GC_M3_NVIC_IABR1_DEFAULT 0x0 #define GC_M3_NVIC_IABR2_OFFSET 0xe308 #define GC_M3_NVIC_IABR2_DEFAULT 0x0 #define GC_M3_NVIC_IABR3_OFFSET 0xe30c #define GC_M3_NVIC_IABR3_DEFAULT 0x0 #define GC_M3_NVIC_IABR4_OFFSET 0xe310 #define GC_M3_NVIC_IABR4_DEFAULT 0x0 #define GC_M3_NVIC_IABR5_OFFSET 0xe314 #define GC_M3_NVIC_IABR5_DEFAULT 0x0 #define GC_M3_NVIC_IABR6_OFFSET 0xe318 #define GC_M3_NVIC_IABR6_DEFAULT 0x0 #define GC_M3_NVIC_IABR7_OFFSET 0xe31c #define GC_M3_NVIC_IABR7_DEFAULT 0x0 #define GC_M3_NVIC_IPR0_OFFSET 0xe400 #define GC_M3_NVIC_IPR0_DEFAULT 0x0 #define GC_M3_NVIC_IPR1_OFFSET 0xe404 #define GC_M3_NVIC_IPR1_DEFAULT 0x0 #define GC_M3_NVIC_IPR2_OFFSET 0xe408 #define GC_M3_NVIC_IPR2_DEFAULT 0x0 #define GC_M3_NVIC_IPR3_OFFSET 0xe40c #define GC_M3_NVIC_IPR3_DEFAULT 0x0 #define GC_M3_NVIC_IPR4_OFFSET 0xe410 #define GC_M3_NVIC_IPR4_DEFAULT 0x0 #define GC_M3_NVIC_IPR5_OFFSET 0xe414 #define GC_M3_NVIC_IPR5_DEFAULT 0x0 #define GC_M3_NVIC_IPR6_OFFSET 0xe418 #define GC_M3_NVIC_IPR6_DEFAULT 0x0 #define GC_M3_NVIC_IPR7_OFFSET 0xe41c #define GC_M3_NVIC_IPR7_DEFAULT 0x0 #define GC_M3_CPUID_OFFSET 0xed00 #define GC_M3_CPUID_DEFAULT 0x412fc231 #define GC_M3_ICSR_OFFSET 0xed04 #define GC_M3_ICSR_DEFAULT 0x0 #define GC_M3_VTOR_OFFSET 0xed08 #define GC_M3_VTOR_DEFAULT 0x0 #define GC_M3_AIRCR_OFFSET 0xed0c #define GC_M3_AIRCR_DEFAULT 0x0 #define GC_M3_SCR_OFFSET 0xed10 #define GC_M3_SCR_DEFAULT 0x0 #define GC_M3_CCR_OFFSET 0xed14 #define GC_M3_CCR_DEFAULT 0x0 #define GC_M3_SHPR1_OFFSET 0xed18 #define GC_M3_SHPR1_DEFAULT 0x0 #define GC_M3_SHPR2_OFFSET 0xed1c #define GC_M3_SHPR2_DEFAULT 0x0 #define GC_M3_SHPR3_OFFSET 0xed20 #define GC_M3_SHPR3_DEFAULT 0x0 #define GC_M3_SHCSR_OFFSET 0xed24 #define GC_M3_SHCSR_DEFAULT 0x0 #define GC_M3_CFSR_OFFSET 0xed28 #define GC_M3_CFSR_DEFAULT 0x0 #define GC_M3_HFSR_OFFSET 0xed2c #define GC_M3_HFSR_DEFAULT 0x0 #define GC_M3_DFSR_OFFSET 0xed30 #define GC_M3_DFSR_DEFAULT 0x0 #define GC_M3_MMFAR_OFFSET 0xed34 #define GC_M3_MMFAR_DEFAULT 0x0 #define GC_M3_BFAR_OFFSET 0xed38 #define GC_M3_BFAR_DEFAULT 0x0 #define GC_M3_AFSR_OFFSET 0xed3c #define GC_M3_AFSR_DEFAULT 0x0 #define GC_M3_MPU_TYPE_OFFSET 0xed90 #define GC_M3_MPU_TYPE_DEFAULT 0x800 #define GC_M3_MPU_CTRL_OFFSET 0xed94 #define GC_M3_MPU_CTRL_DEFAULT 0x0 #define GC_M3_MPU_RNR_OFFSET 0xed98 #define GC_M3_MPU_RNR_DEFAULT 0x0 #define GC_M3_MPU_RBAR_OFFSET 0xed9c #define GC_M3_MPU_RBAR_DEFAULT 0x0 #define GC_M3_MPU_RASR_OFFSET 0xeda0 #define GC_M3_MPU_RASR_DEFAULT 0x0 #define GC_M3_MPU_RBAR_A1_OFFSET 0xeda4 #define GC_M3_MPU_RBAR_A1_DEFAULT 0x0 #define GC_M3_MPU_RASR_A1_OFFSET 0xeda8 #define GC_M3_MPU_RASR_A1_DEFAULT 0x0 #define GC_M3_MPU_RBAR_A2_OFFSET 0xedac #define GC_M3_MPU_RBAR_A2_DEFAULT 0x0 #define GC_M3_MPU_RASR_A2_OFFSET 0xedb0 #define GC_M3_MPU_RASR_A2_DEFAULT 0x0 #define GC_M3_MPU_RBAR_A3_OFFSET 0xedb4 #define GC_M3_MPU_RBAR_A3_DEFAULT 0x0 #define GC_M3_MPU_RASR_A3_OFFSET 0xedb8 #define GC_M3_MPU_RASR_A3_DEFAULT 0x0 #define GC_M3_DHCSR_OFFSET 0xedf0 #define GC_M3_DHCSR_DEFAULT 0x0 #define GC_M3_DCRSR_OFFSET 0xedf4 #define GC_M3_DCRSR_DEFAULT 0x0 #define GC_M3_DCRDR_OFFSET 0xedf8 #define GC_M3_DCRDR_DEFAULT 0x0 #define GC_M3_DEMCR_OFFSET 0xedfc #define GC_M3_DEMCR_DEFAULT 0x0 #define GC_M3_TPIU_SSPSR_OFFSET 0x40000 #define GC_M3_TPIU_SSPSR_DEFAULT 0x0 #define GC_M3_TPIU_CSPSR_OFFSET 0x40004 #define GC_M3_TPIU_CSPSR_DEFAULT 0x1 #define GC_M3_TPIU_ACPR_OFFSET 0x40010 #define GC_M3_TPIU_ACPR_DEFAULT 0x0 #define GC_M3_TPIU_SPPR_OFFSET 0x400f0 #define GC_M3_TPIU_SPPR_DEFAULT 0x1 #define GC_M3_TPIU_FFSR_OFFSET 0x40300 #define GC_M3_TPIU_FFSR_DEFAULT 0x8 #define GC_M3_TPIU_FFCR_OFFSET 0x40304 #define GC_M3_TPIU_FFCR_DEFAULT 0x0 #define GC_M3_TPIU_FSCR_OFFSET 0x40308 #define GC_M3_TPIU_FSCR_DEFAULT 0x0 #define GC_M3_TRIGGER_OFFSET 0x41ee8 #define GC_M3_TRIGGER_DEFAULT 0x0 #define GC_M3_ITATBCTR2_OFFSET 0x41ef0 #define GC_M3_ITATBCTR2_DEFAULT 0x0 #define GC_M3_ITATBCTR0_OFFSET 0x41ef8 #define GC_M3_ITATBCTR0_DEFAULT 0x0 #define GC_M3_ITCTRL_OFFSET 0x41f00 #define GC_M3_ITCTRL_DEFAULT 0x0 #define GC_M3_CLAIMSET_OFFSET 0x41fa0 #define GC_M3_CLAIMSET_DEFAULT 0x0 #define GC_M3_CLAIMCLR_OFFSET 0x41fa4 #define GC_M3_CLAIMCLR_DEFAULT 0x0 #define GC_M3_DEVID_OFFSET 0x41fc8 #define GC_M3_DEVID_DEFAULT 0xca0 #define GC_M3_DEVTYPE_OFFSET 0x41fcc #define GC_M3_DEVTYPE_DEFAULT 0x11 #define GC_M3_HASHER_LOAD_OFFSET 0xaa008 #define GC_M3_HASHER_LOAD_DEFAULT 0x0 #define GC_M3_HASHER_START_OFFSET 0xaa010 #define GC_M3_HASHER_START_DEFAULT 0x0 #define GC_M3_HASHER_STOP_OFFSET 0xaa018 #define GC_M3_HASHER_STOP_DEFAULT 0x0 #define GC_M3_HASHER_CHECK_OFFSET 0xaa020 #define GC_M3_HASHER_CHECK_DEFAULT 0x0 #define GC_M3_HASHER_VALUE_OFFSET 0xaa028 #define GC_M3_HASHER_VALUE_DEFAULT 0x0 #define GC_M3_ITM_STIM0_ADDR 0xe0000000 #define GC_M3_ITM_STIM1_ADDR 0xe0000004 #define GC_M3_ITM_STIM2_ADDR 0xe0000008 #define GC_M3_ITM_STIM3_ADDR 0xe000000c #define GC_M3_ITM_STIM4_ADDR 0xe0000010 #define GC_M3_ITM_STIM5_ADDR 0xe0000014 #define GC_M3_ITM_STIM6_ADDR 0xe0000018 #define GC_M3_ITM_STIM7_ADDR 0xe000001c #define GC_M3_ITM_STIM8_ADDR 0xe0000020 #define GC_M3_ITM_STIM9_ADDR 0xe0000024 #define GC_M3_ITM_STIM10_ADDR 0xe0000028 #define GC_M3_ITM_STIM11_ADDR 0xe000002c #define GC_M3_ITM_STIM12_ADDR 0xe0000030 #define GC_M3_ITM_STIM13_ADDR 0xe0000034 #define GC_M3_ITM_STIM14_ADDR 0xe0000038 #define GC_M3_ITM_STIM15_ADDR 0xe000003c #define GC_M3_ITM_STIM16_ADDR 0xe0000040 #define GC_M3_ITM_STIM17_ADDR 0xe0000044 #define GC_M3_ITM_STIM18_ADDR 0xe0000048 #define GC_M3_ITM_STIM19_ADDR 0xe000004c #define GC_M3_ITM_STIM20_ADDR 0xe0000050 #define GC_M3_ITM_STIM21_ADDR 0xe0000054 #define GC_M3_ITM_STIM22_ADDR 0xe0000058 #define GC_M3_ITM_STIM23_ADDR 0xe000005c #define GC_M3_ITM_STIM24_ADDR 0xe0000060 #define GC_M3_ITM_STIM25_ADDR 0xe0000064 #define GC_M3_ITM_STIM26_ADDR 0xe0000068 #define GC_M3_ITM_STIM27_ADDR 0xe000006c #define GC_M3_ITM_STIM28_ADDR 0xe0000070 #define GC_M3_ITM_STIM29_ADDR 0xe0000074 #define GC_M3_ITM_STIM30_ADDR 0xe0000078 #define GC_M3_ITM_STIM31_ADDR 0xe000007c #define GC_M3_ITM_TER_ADDR 0xe0000e00 #define GC_M3_ITM_TPR_ADDR 0xe0000e40 #define GC_M3_ITM_TCR_ADDR 0xe0000e80 #define GC_M3_ITM_INTWREG_ADDR 0xe0000ef8 #define GC_M3_ITM_INTRREG_ADDR 0xe0000efc #define GC_M3_ITM_INTMREG_ADDR 0xe0000f00 #define GC_M3_ITM_LOCKCREG_ADDR 0xe0000fb0 #define GC_M3_ITM_LOCKSREG_ADDR 0xe0000fb4 #define GC_M3_ITM_PID4_ADDR 0xe0000fd0 #define GC_M3_ITM_PID5_ADDR 0xe0000fd4 #define GC_M3_ITM_PID6_ADDR 0xe0000fd8 #define GC_M3_ITM_PID7_ADDR 0xe0000fdc #define GC_M3_ITM_PID0_ADDR 0xe0000fe0 #define GC_M3_ITM_PID1_ADDR 0xe0000fe4 #define GC_M3_ITM_PID2_ADDR 0xe0000fe8 #define GC_M3_ITM_PID3_ADDR 0xe0000fec #define GC_M3_ITM_CID0_ADDR 0xe0000ff0 #define GC_M3_ITM_CID1_ADDR 0xe0000ff4 #define GC_M3_ITM_CID2_ADDR 0xe0000ff8 #define GC_M3_ITM_CID3_ADDR 0xe0000ffc #define GC_M3_DWT_CTRL_ADDR 0xe0001000 #define GC_M3_DWT_CYCCNT_ADDR 0xe0001004 #define GC_M3_DWT_CPICNT_ADDR 0xe0001008 #define GC_M3_DWT_EXCCNT_ADDR 0xe000100c #define GC_M3_DWT_SLEEPCNT_ADDR 0xe0001010 #define GC_M3_DWT_LSUCNT_ADDR 0xe0001014 #define GC_M3_DWT_FOLDCNT_ADDR 0xe0001018 #define GC_M3_DWT_PCSR_ADDR 0xe000101c #define GC_M3_DWT_COMP0_ADDR 0xe0001020 #define GC_M3_DWT_MASK0_ADDR 0xe0001024 #define GC_M3_DWT_FUNCTION0_ADDR 0xe0001028 #define GC_M3_DWT_COMP1_ADDR 0xe0001030 #define GC_M3_DWT_MASK1_ADDR 0xe0001034 #define GC_M3_DWT_FUNCTION1_ADDR 0xe0001038 #define GC_M3_DWT_COMP2_ADDR 0xe0001040 #define GC_M3_DWT_MASK2_ADDR 0xe0001044 #define GC_M3_DWT_FUNCTION2_ADDR 0xe0001048 #define GC_M3_DWT_COMP3_ADDR 0xe0001050 #define GC_M3_DWT_MASK3_ADDR 0xe0001054 #define GC_M3_DWT_FUNCTION3_ADDR 0xe0001058 #define GC_M3_DWT_PID4_ADDR 0xe0001fd0 #define GC_M3_DWT_PID5_ADDR 0xe0001fd4 #define GC_M3_DWT_PID6_ADDR 0xe0001fd8 #define GC_M3_DWT_PID7_ADDR 0xe0001fdc #define GC_M3_DWT_PID0_ADDR 0xe0001fe0 #define GC_M3_DWT_PID1_ADDR 0xe0001fe4 #define GC_M3_DWT_PID2_ADDR 0xe0001fe8 #define GC_M3_DWT_PID3_ADDR 0xe0001fec #define GC_M3_DWT_CID0_ADDR 0xe0001ff0 #define GC_M3_DWT_CID1_ADDR 0xe0001ff4 #define GC_M3_DWT_CID2_ADDR 0xe0001ff8 #define GC_M3_DWT_CID3_ADDR 0xe0001ffc #define GC_M3_FP_CTRL_ADDR 0xe0002000 #define GC_M3_FP_REMAP_ADDR 0xe0002004 #define GC_M3_FP_COMP0_ADDR 0xe0002008 #define GC_M3_FP_COMP1_ADDR 0xe000200c #define GC_M3_FP_COMP2_ADDR 0xe0002010 #define GC_M3_FP_COMP3_ADDR 0xe0002014 #define GC_M3_FP_COMP4_ADDR 0xe0002018 #define GC_M3_FP_COMP5_ADDR 0xe000201c #define GC_M3_FP_COMP6_ADDR 0xe0002020 #define GC_M3_FP_COMP7_ADDR 0xe0002024 #define GC_M3_FP_PID4_ADDR 0xe0002fd0 #define GC_M3_FP_PID5_ADDR 0xe0002fd4 #define GC_M3_FP_PID6_ADDR 0xe0002fd8 #define GC_M3_FP_PID7_ADDR 0xe0002fdc #define GC_M3_FP_PID0_ADDR 0xe0002fe0 #define GC_M3_FP_PID1_ADDR 0xe0002fe4 #define GC_M3_FP_PID2_ADDR 0xe0002fe8 #define GC_M3_FP_PID3_ADDR 0xe0002fec #define GC_M3_FP_CID0_ADDR 0xe0002ff0 #define GC_M3_FP_CID1_ADDR 0xe0002ff4 #define GC_M3_FP_CID2_ADDR 0xe0002ff8 #define GC_M3_FP_CID3_ADDR 0xe0002ffc #define GC_M3_ICTR_ADDR 0xe000e004 #define GC_M3_SYST_CSR_ADDR 0xe000e010 #define GC_M3_SYST_RVR_ADDR 0xe000e014 #define GC_M3_SYST_CVR_ADDR 0xe000e018 #define GC_M3_SYST_CALIB_ADDR 0xe000e01c #define GC_M3_NVIC_ISER0_ADDR 0xe000e100 #define GC_M3_NVIC_ISER1_ADDR 0xe000e104 #define GC_M3_NVIC_ISER2_ADDR 0xe000e108 #define GC_M3_NVIC_ISER3_ADDR 0xe000e10c #define GC_M3_NVIC_ISER4_ADDR 0xe000e110 #define GC_M3_NVIC_ISER5_ADDR 0xe000e114 #define GC_M3_NVIC_ISER6_ADDR 0xe000e118 #define GC_M3_NVIC_ISER7_ADDR 0xe000e11c #define GC_M3_NVIC_ICER0_ADDR 0xe000e180 #define GC_M3_NVIC_ICER1_ADDR 0xe000e184 #define GC_M3_NVIC_ICER2_ADDR 0xe000e188 #define GC_M3_NVIC_ICER3_ADDR 0xe000e18c #define GC_M3_NVIC_ICER4_ADDR 0xe000e190 #define GC_M3_NVIC_ICER5_ADDR 0xe000e194 #define GC_M3_NVIC_ICER6_ADDR 0xe000e198 #define GC_M3_NVIC_ICER7_ADDR 0xe000e19c #define GC_M3_NVIC_ISPR0_ADDR 0xe000e200 #define GC_M3_NVIC_ISPR1_ADDR 0xe000e204 #define GC_M3_NVIC_ISPR2_ADDR 0xe000e208 #define GC_M3_NVIC_ISPR3_ADDR 0xe000e20c #define GC_M3_NVIC_ISPR4_ADDR 0xe000e210 #define GC_M3_NVIC_ISPR5_ADDR 0xe000e214 #define GC_M3_NVIC_ISPR6_ADDR 0xe000e218 #define GC_M3_NVIC_ISPR7_ADDR 0xe000e21c #define GC_M3_NVIC_ICPR0_ADDR 0xe000e280 #define GC_M3_NVIC_ICPR1_ADDR 0xe000e284 #define GC_M3_NVIC_ICPR2_ADDR 0xe000e288 #define GC_M3_NVIC_ICPR3_ADDR 0xe000e28c #define GC_M3_NVIC_ICPR4_ADDR 0xe000e290 #define GC_M3_NVIC_ICPR5_ADDR 0xe000e294 #define GC_M3_NVIC_ICPR6_ADDR 0xe000e298 #define GC_M3_NVIC_ICPR7_ADDR 0xe000e29c #define GC_M3_NVIC_IABR0_ADDR 0xe000e300 #define GC_M3_NVIC_IABR1_ADDR 0xe000e304 #define GC_M3_NVIC_IABR2_ADDR 0xe000e308 #define GC_M3_NVIC_IABR3_ADDR 0xe000e30c #define GC_M3_NVIC_IABR4_ADDR 0xe000e310 #define GC_M3_NVIC_IABR5_ADDR 0xe000e314 #define GC_M3_NVIC_IABR6_ADDR 0xe000e318 #define GC_M3_NVIC_IABR7_ADDR 0xe000e31c #define GC_M3_NVIC_IPR0_ADDR 0xe000e400 #define GC_M3_NVIC_IPR1_ADDR 0xe000e404 #define GC_M3_NVIC_IPR2_ADDR 0xe000e408 #define GC_M3_NVIC_IPR3_ADDR 0xe000e40c #define GC_M3_NVIC_IPR4_ADDR 0xe000e410 #define GC_M3_NVIC_IPR5_ADDR 0xe000e414 #define GC_M3_NVIC_IPR6_ADDR 0xe000e418 #define GC_M3_NVIC_IPR7_ADDR 0xe000e41c #define GC_M3_CPUID_ADDR 0xe000ed00 #define GC_M3_ICSR_ADDR 0xe000ed04 #define GC_M3_VTOR_ADDR 0xe000ed08 #define GC_M3_AIRCR_ADDR 0xe000ed0c #define GC_M3_SCR_ADDR 0xe000ed10 #define GC_M3_CCR_ADDR 0xe000ed14 #define GC_M3_SHPR1_ADDR 0xe000ed18 #define GC_M3_SHPR2_ADDR 0xe000ed1c #define GC_M3_SHPR3_ADDR 0xe000ed20 #define GC_M3_SHCSR_ADDR 0xe000ed24 #define GC_M3_CFSR_ADDR 0xe000ed28 #define GC_M3_HFSR_ADDR 0xe000ed2c #define GC_M3_DFSR_ADDR 0xe000ed30 #define GC_M3_MMFAR_ADDR 0xe000ed34 #define GC_M3_BFAR_ADDR 0xe000ed38 #define GC_M3_AFSR_ADDR 0xe000ed3c #define GC_M3_MPU_TYPE_ADDR 0xe000ed90 #define GC_M3_MPU_CTRL_ADDR 0xe000ed94 #define GC_M3_MPU_RNR_ADDR 0xe000ed98 #define GC_M3_MPU_RBAR_ADDR 0xe000ed9c #define GC_M3_MPU_RASR_ADDR 0xe000eda0 #define GC_M3_MPU_RBAR_A1_ADDR 0xe000eda4 #define GC_M3_MPU_RASR_A1_ADDR 0xe000eda8 #define GC_M3_MPU_RBAR_A2_ADDR 0xe000edac #define GC_M3_MPU_RASR_A2_ADDR 0xe000edb0 #define GC_M3_MPU_RBAR_A3_ADDR 0xe000edb4 #define GC_M3_MPU_RASR_A3_ADDR 0xe000edb8 #define GC_M3_DHCSR_ADDR 0xe000edf0 #define GC_M3_DCRSR_ADDR 0xe000edf4 #define GC_M3_DCRDR_ADDR 0xe000edf8 #define GC_M3_DEMCR_ADDR 0xe000edfc #define GC_M3_TPIU_SSPSR_ADDR 0xe0040000 #define GC_M3_TPIU_CSPSR_ADDR 0xe0040004 #define GC_M3_TPIU_ACPR_ADDR 0xe0040010 #define GC_M3_TPIU_SPPR_ADDR 0xe00400f0 #define GC_M3_TPIU_FFSR_ADDR 0xe0040300 #define GC_M3_TPIU_FFCR_ADDR 0xe0040304 #define GC_M3_TPIU_FSCR_ADDR 0xe0040308 #define GC_M3_TRIGGER_ADDR 0xe0041ee8 #define GC_M3_ITATBCTR2_ADDR 0xe0041ef0 #define GC_M3_ITATBCTR0_ADDR 0xe0041ef8 #define GC_M3_ITCTRL_ADDR 0xe0041f00 #define GC_M3_CLAIMSET_ADDR 0xe0041fa0 #define GC_M3_CLAIMCLR_ADDR 0xe0041fa4 #define GC_M3_DEVID_ADDR 0xe0041fc8 #define GC_M3_DEVTYPE_ADDR 0xe0041fcc #define GC_M3_HASHER_LOAD_ADDR 0xe00aa008 #define GC_M3_HASHER_START_ADDR 0xe00aa010 #define GC_M3_HASHER_STOP_ADDR 0xe00aa018 #define GC_M3_HASHER_CHECK_ADDR 0xe00aa020 #define GC_M3_HASHER_VALUE_ADDR 0xe00aa028 #define GC_CAMO_VERSION_CHANGE_LSB 0x0 #define GC_CAMO_VERSION_CHANGE_MASK 0xffffff #define GC_CAMO_VERSION_CHANGE_SIZE 0x18 #define GC_CAMO_VERSION_CHANGE_DEFAULT 0x14125 #define GC_CAMO_VERSION_CHANGE_OFFSET 0x8 #define GC_CAMO_VERSION_REVISION_LSB 0x18 #define GC_CAMO_VERSION_REVISION_MASK 0xff000000 #define GC_CAMO_VERSION_REVISION_SIZE 0x8 #define GC_CAMO_VERSION_REVISION_DEFAULT 0x1 #define GC_CAMO_VERSION_REVISION_OFFSET 0x8 #define GC_CRYPTO_VERSION_CHANGE_LSB 0x0 #define GC_CRYPTO_VERSION_CHANGE_MASK 0xffffff #define GC_CRYPTO_VERSION_CHANGE_SIZE 0x18 #define GC_CRYPTO_VERSION_CHANGE_DEFAULT 0x1424a #define GC_CRYPTO_VERSION_CHANGE_OFFSET 0x0 #define GC_CRYPTO_VERSION_REVISION_LSB 0x18 #define GC_CRYPTO_VERSION_REVISION_MASK 0xff000000 #define GC_CRYPTO_VERSION_REVISION_SIZE 0x8 #define GC_CRYPTO_VERSION_REVISION_DEFAULT 0x1 #define GC_CRYPTO_VERSION_REVISION_OFFSET 0x0 #define GC_CRYPTO_CONTROL_RESET_LSB 0x0 #define GC_CRYPTO_CONTROL_RESET_MASK 0x1 #define GC_CRYPTO_CONTROL_RESET_SIZE 0x1 #define GC_CRYPTO_CONTROL_RESET_DEFAULT 0x0 #define GC_CRYPTO_CONTROL_RESET_OFFSET 0x4 #define GC_CRYPTO_CONTROL_BREAK_LSB 0x1 #define GC_CRYPTO_CONTROL_BREAK_MASK 0x2 #define GC_CRYPTO_CONTROL_BREAK_SIZE 0x1 #define GC_CRYPTO_CONTROL_BREAK_DEFAULT 0x0 #define GC_CRYPTO_CONTROL_BREAK_OFFSET 0x4 #define GC_CRYPTO_CONTROL_RESUME_LSB 0x2 #define GC_CRYPTO_CONTROL_RESUME_MASK 0x4 #define GC_CRYPTO_CONTROL_RESUME_SIZE 0x1 #define GC_CRYPTO_CONTROL_RESUME_DEFAULT 0x0 #define GC_CRYPTO_CONTROL_RESUME_OFFSET 0x4 #define GC_CRYPTO_PARITY_CFG_IMEM_SCRUB_EN_LSB 0x0 #define GC_CRYPTO_PARITY_CFG_IMEM_SCRUB_EN_MASK 0x1 #define GC_CRYPTO_PARITY_CFG_IMEM_SCRUB_EN_SIZE 0x1 #define GC_CRYPTO_PARITY_CFG_IMEM_SCRUB_EN_DEFAULT 0x0 #define GC_CRYPTO_PARITY_CFG_IMEM_SCRUB_EN_OFFSET 0x8 #define GC_CRYPTO_PARITY_CFG_DMEM_SCRUB_EN_LSB 0x1 #define GC_CRYPTO_PARITY_CFG_DMEM_SCRUB_EN_MASK 0x2 #define GC_CRYPTO_PARITY_CFG_DMEM_SCRUB_EN_SIZE 0x1 #define GC_CRYPTO_PARITY_CFG_DMEM_SCRUB_EN_DEFAULT 0x0 #define GC_CRYPTO_PARITY_CFG_DMEM_SCRUB_EN_OFFSET 0x8 #define GC_CRYPTO_PARITY_CFG_IMEM_INV_LSB 0x2 #define GC_CRYPTO_PARITY_CFG_IMEM_INV_MASK 0x4 #define GC_CRYPTO_PARITY_CFG_IMEM_INV_SIZE 0x1 #define GC_CRYPTO_PARITY_CFG_IMEM_INV_DEFAULT 0x0 #define GC_CRYPTO_PARITY_CFG_IMEM_INV_OFFSET 0x8 #define GC_CRYPTO_PARITY_CFG_DMEM_INV_LSB 0x3 #define GC_CRYPTO_PARITY_CFG_DMEM_INV_MASK 0x8 #define GC_CRYPTO_PARITY_CFG_DMEM_INV_SIZE 0x1 #define GC_CRYPTO_PARITY_CFG_DMEM_INV_DEFAULT 0x0 #define GC_CRYPTO_PARITY_CFG_DMEM_INV_OFFSET 0x8 #define GC_CRYPTO_PARITY_CFG_SCRUB_FREQ_LSB 0x4 #define GC_CRYPTO_PARITY_CFG_SCRUB_FREQ_MASK 0x30 #define GC_CRYPTO_PARITY_CFG_SCRUB_FREQ_SIZE 0x2 #define GC_CRYPTO_PARITY_CFG_SCRUB_FREQ_DEFAULT 0x1 #define GC_CRYPTO_PARITY_CFG_SCRUB_FREQ_OFFSET 0x8 #define GC_CRYPTO_PARITY_CFG_DMEM_EN_LSB 0x6 #define GC_CRYPTO_PARITY_CFG_DMEM_EN_MASK 0x40 #define GC_CRYPTO_PARITY_CFG_DMEM_EN_SIZE 0x1 #define GC_CRYPTO_PARITY_CFG_DMEM_EN_DEFAULT 0x0 #define GC_CRYPTO_PARITY_CFG_DMEM_EN_OFFSET 0x8 #define GC_CRYPTO_PARITY_CFG_IMEM_EN_LSB 0x7 #define GC_CRYPTO_PARITY_CFG_IMEM_EN_MASK 0x80 #define GC_CRYPTO_PARITY_CFG_IMEM_EN_SIZE 0x1 #define GC_CRYPTO_PARITY_CFG_IMEM_EN_DEFAULT 0x0 #define GC_CRYPTO_PARITY_CFG_IMEM_EN_OFFSET 0x8 #define GC_CRYPTO_PARITY_CFG_DRF_EN_LSB 0x8 #define GC_CRYPTO_PARITY_CFG_DRF_EN_MASK 0x100 #define GC_CRYPTO_PARITY_CFG_DRF_EN_SIZE 0x1 #define GC_CRYPTO_PARITY_CFG_DRF_EN_DEFAULT 0x0 #define GC_CRYPTO_PARITY_CFG_DRF_EN_OFFSET 0x8 #define GC_CRYPTO_IMEM_SCRUB_RANGE_HIGH_ADDR_LSB 0x0 #define GC_CRYPTO_IMEM_SCRUB_RANGE_HIGH_ADDR_MASK 0x3ff #define GC_CRYPTO_IMEM_SCRUB_RANGE_HIGH_ADDR_SIZE 0xa #define GC_CRYPTO_IMEM_SCRUB_RANGE_HIGH_ADDR_DEFAULT 0x3ff #define GC_CRYPTO_IMEM_SCRUB_RANGE_HIGH_ADDR_OFFSET 0xc #define GC_CRYPTO_IMEM_SCRUB_RANGE_LOW_ADDR_LSB 0xa #define GC_CRYPTO_IMEM_SCRUB_RANGE_LOW_ADDR_MASK 0xffc00 #define GC_CRYPTO_IMEM_SCRUB_RANGE_LOW_ADDR_SIZE 0xa #define GC_CRYPTO_IMEM_SCRUB_RANGE_LOW_ADDR_DEFAULT 0x0 #define GC_CRYPTO_IMEM_SCRUB_RANGE_LOW_ADDR_OFFSET 0xc #define GC_CRYPTO_DMEM_SCRUB_RANGE_HIGH_ADDR_LSB 0x0 #define GC_CRYPTO_DMEM_SCRUB_RANGE_HIGH_ADDR_MASK 0x7f #define GC_CRYPTO_DMEM_SCRUB_RANGE_HIGH_ADDR_SIZE 0x7 #define GC_CRYPTO_DMEM_SCRUB_RANGE_HIGH_ADDR_DEFAULT 0x7f #define GC_CRYPTO_DMEM_SCRUB_RANGE_HIGH_ADDR_OFFSET 0x10 #define GC_CRYPTO_DMEM_SCRUB_RANGE_LOW_ADDR_LSB 0x7 #define GC_CRYPTO_DMEM_SCRUB_RANGE_LOW_ADDR_MASK 0x3f80 #define GC_CRYPTO_DMEM_SCRUB_RANGE_LOW_ADDR_SIZE 0x7 #define GC_CRYPTO_DMEM_SCRUB_RANGE_LOW_ADDR_DEFAULT 0x0 #define GC_CRYPTO_DMEM_SCRUB_RANGE_LOW_ADDR_OFFSET 0x10 #define GC_CRYPTO_INT_ENABLE_HOST_CMD_RECV_LSB 0x0 #define GC_CRYPTO_INT_ENABLE_HOST_CMD_RECV_MASK 0x1 #define GC_CRYPTO_INT_ENABLE_HOST_CMD_RECV_SIZE 0x1 #define GC_CRYPTO_INT_ENABLE_HOST_CMD_RECV_DEFAULT 0x0 #define GC_CRYPTO_INT_ENABLE_HOST_CMD_RECV_OFFSET 0x14 #define GC_CRYPTO_INT_ENABLE_HOST_CMD_DONE_LSB 0x1 #define GC_CRYPTO_INT_ENABLE_HOST_CMD_DONE_MASK 0x2 #define GC_CRYPTO_INT_ENABLE_HOST_CMD_DONE_SIZE 0x1 #define GC_CRYPTO_INT_ENABLE_HOST_CMD_DONE_DEFAULT 0x0 #define GC_CRYPTO_INT_ENABLE_HOST_CMD_DONE_OFFSET 0x14 #define GC_CRYPTO_INT_ENABLE_PC_STACK_OVERFLOW_LSB 0x2 #define GC_CRYPTO_INT_ENABLE_PC_STACK_OVERFLOW_MASK 0x4 #define GC_CRYPTO_INT_ENABLE_PC_STACK_OVERFLOW_SIZE 0x1 #define GC_CRYPTO_INT_ENABLE_PC_STACK_OVERFLOW_DEFAULT 0x0 #define GC_CRYPTO_INT_ENABLE_PC_STACK_OVERFLOW_OFFSET 0x14 #define GC_CRYPTO_INT_ENABLE_LOOP_STACK_OVERFLOW_LSB 0x3 #define GC_CRYPTO_INT_ENABLE_LOOP_STACK_OVERFLOW_MASK 0x8 #define GC_CRYPTO_INT_ENABLE_LOOP_STACK_OVERFLOW_SIZE 0x1 #define GC_CRYPTO_INT_ENABLE_LOOP_STACK_OVERFLOW_DEFAULT 0x0 #define GC_CRYPTO_INT_ENABLE_LOOP_STACK_OVERFLOW_OFFSET 0x14 #define GC_CRYPTO_INT_ENABLE_LOOP_STACK_UNDERFLOW_LSB 0x4 #define GC_CRYPTO_INT_ENABLE_LOOP_STACK_UNDERFLOW_MASK 0x10 #define GC_CRYPTO_INT_ENABLE_LOOP_STACK_UNDERFLOW_SIZE 0x1 #define GC_CRYPTO_INT_ENABLE_LOOP_STACK_UNDERFLOW_DEFAULT 0x0 #define GC_CRYPTO_INT_ENABLE_LOOP_STACK_UNDERFLOW_OFFSET 0x14 #define GC_CRYPTO_INT_ENABLE_DMEM_PTRS_OVERFLOW_LSB 0x5 #define GC_CRYPTO_INT_ENABLE_DMEM_PTRS_OVERFLOW_MASK 0x20 #define GC_CRYPTO_INT_ENABLE_DMEM_PTRS_OVERFLOW_SIZE 0x1 #define GC_CRYPTO_INT_ENABLE_DMEM_PTRS_OVERFLOW_DEFAULT 0x0 #define GC_CRYPTO_INT_ENABLE_DMEM_PTRS_OVERFLOW_OFFSET 0x14 #define GC_CRYPTO_INT_ENABLE_DRF_PTRS_OVERFLOW_LSB 0x6 #define GC_CRYPTO_INT_ENABLE_DRF_PTRS_OVERFLOW_MASK 0x40 #define GC_CRYPTO_INT_ENABLE_DRF_PTRS_OVERFLOW_SIZE 0x1 #define GC_CRYPTO_INT_ENABLE_DRF_PTRS_OVERFLOW_DEFAULT 0x0 #define GC_CRYPTO_INT_ENABLE_DRF_PTRS_OVERFLOW_OFFSET 0x14 #define GC_CRYPTO_INT_ENABLE_BREAK_LSB 0x7 #define GC_CRYPTO_INT_ENABLE_BREAK_MASK 0x80 #define GC_CRYPTO_INT_ENABLE_BREAK_SIZE 0x1 #define GC_CRYPTO_INT_ENABLE_BREAK_DEFAULT 0x0 #define GC_CRYPTO_INT_ENABLE_BREAK_OFFSET 0x14 #define GC_CRYPTO_INT_ENABLE_TRAP_LSB 0x8 #define GC_CRYPTO_INT_ENABLE_TRAP_MASK 0x100 #define GC_CRYPTO_INT_ENABLE_TRAP_SIZE 0x1 #define GC_CRYPTO_INT_ENABLE_TRAP_DEFAULT 0x0 #define GC_CRYPTO_INT_ENABLE_TRAP_OFFSET 0x14 #define GC_CRYPTO_INT_ENABLE_DONE_WIPE_SECRETS_LSB 0x9 #define GC_CRYPTO_INT_ENABLE_DONE_WIPE_SECRETS_MASK 0x200 #define GC_CRYPTO_INT_ENABLE_DONE_WIPE_SECRETS_SIZE 0x1 #define GC_CRYPTO_INT_ENABLE_DONE_WIPE_SECRETS_DEFAULT 0x0 #define GC_CRYPTO_INT_ENABLE_DONE_WIPE_SECRETS_OFFSET 0x14 #define GC_CRYPTO_INT_ENABLE_PGM_FAULT_LSB 0xa #define GC_CRYPTO_INT_ENABLE_PGM_FAULT_MASK 0x400 #define GC_CRYPTO_INT_ENABLE_PGM_FAULT_SIZE 0x1 #define GC_CRYPTO_INT_ENABLE_PGM_FAULT_DEFAULT 0x0 #define GC_CRYPTO_INT_ENABLE_PGM_FAULT_OFFSET 0x14 #define GC_CRYPTO_INT_ENABLE_MOD_OPERAND_OUT_OF_RANGE_LSB 0xb #define GC_CRYPTO_INT_ENABLE_MOD_OPERAND_OUT_OF_RANGE_MASK 0x800 #define GC_CRYPTO_INT_ENABLE_MOD_OPERAND_OUT_OF_RANGE_SIZE 0x1 #define GC_CRYPTO_INT_ENABLE_MOD_OPERAND_OUT_OF_RANGE_DEFAULT 0x0 #define GC_CRYPTO_INT_ENABLE_MOD_OPERAND_OUT_OF_RANGE_OFFSET 0x14 #define GC_CRYPTO_INT_STATE_HOST_CMD_RECV_LSB 0x0 #define GC_CRYPTO_INT_STATE_HOST_CMD_RECV_MASK 0x1 #define GC_CRYPTO_INT_STATE_HOST_CMD_RECV_SIZE 0x1 #define GC_CRYPTO_INT_STATE_HOST_CMD_RECV_DEFAULT 0x0 #define GC_CRYPTO_INT_STATE_HOST_CMD_RECV_OFFSET 0x18 #define GC_CRYPTO_INT_STATE_HOST_CMD_DONE_LSB 0x1 #define GC_CRYPTO_INT_STATE_HOST_CMD_DONE_MASK 0x2 #define GC_CRYPTO_INT_STATE_HOST_CMD_DONE_SIZE 0x1 #define GC_CRYPTO_INT_STATE_HOST_CMD_DONE_DEFAULT 0x0 #define GC_CRYPTO_INT_STATE_HOST_CMD_DONE_OFFSET 0x18 #define GC_CRYPTO_INT_STATE_PC_STACK_OVERFLOW_LSB 0x2 #define GC_CRYPTO_INT_STATE_PC_STACK_OVERFLOW_MASK 0x4 #define GC_CRYPTO_INT_STATE_PC_STACK_OVERFLOW_SIZE 0x1 #define GC_CRYPTO_INT_STATE_PC_STACK_OVERFLOW_DEFAULT 0x0 #define GC_CRYPTO_INT_STATE_PC_STACK_OVERFLOW_OFFSET 0x18 #define GC_CRYPTO_INT_STATE_LOOP_STACK_OVERFLOW_LSB 0x3 #define GC_CRYPTO_INT_STATE_LOOP_STACK_OVERFLOW_MASK 0x8 #define GC_CRYPTO_INT_STATE_LOOP_STACK_OVERFLOW_SIZE 0x1 #define GC_CRYPTO_INT_STATE_LOOP_STACK_OVERFLOW_DEFAULT 0x0 #define GC_CRYPTO_INT_STATE_LOOP_STACK_OVERFLOW_OFFSET 0x18 #define GC_CRYPTO_INT_STATE_LOOP_STACK_UNDERFLOW_LSB 0x4 #define GC_CRYPTO_INT_STATE_LOOP_STACK_UNDERFLOW_MASK 0x10 #define GC_CRYPTO_INT_STATE_LOOP_STACK_UNDERFLOW_SIZE 0x1 #define GC_CRYPTO_INT_STATE_LOOP_STACK_UNDERFLOW_DEFAULT 0x0 #define GC_CRYPTO_INT_STATE_LOOP_STACK_UNDERFLOW_OFFSET 0x18 #define GC_CRYPTO_INT_STATE_DMEM_PTRS_OVERFLOW_LSB 0x5 #define GC_CRYPTO_INT_STATE_DMEM_PTRS_OVERFLOW_MASK 0x20 #define GC_CRYPTO_INT_STATE_DMEM_PTRS_OVERFLOW_SIZE 0x1 #define GC_CRYPTO_INT_STATE_DMEM_PTRS_OVERFLOW_DEFAULT 0x0 #define GC_CRYPTO_INT_STATE_DMEM_PTRS_OVERFLOW_OFFSET 0x18 #define GC_CRYPTO_INT_STATE_DRF_PTRS_OVERFLOW_LSB 0x6 #define GC_CRYPTO_INT_STATE_DRF_PTRS_OVERFLOW_MASK 0x40 #define GC_CRYPTO_INT_STATE_DRF_PTRS_OVERFLOW_SIZE 0x1 #define GC_CRYPTO_INT_STATE_DRF_PTRS_OVERFLOW_DEFAULT 0x0 #define GC_CRYPTO_INT_STATE_DRF_PTRS_OVERFLOW_OFFSET 0x18 #define GC_CRYPTO_INT_STATE_BREAK_LSB 0x7 #define GC_CRYPTO_INT_STATE_BREAK_MASK 0x80 #define GC_CRYPTO_INT_STATE_BREAK_SIZE 0x1 #define GC_CRYPTO_INT_STATE_BREAK_DEFAULT 0x0 #define GC_CRYPTO_INT_STATE_BREAK_OFFSET 0x18 #define GC_CRYPTO_INT_STATE_TRAP_LSB 0x8 #define GC_CRYPTO_INT_STATE_TRAP_MASK 0x100 #define GC_CRYPTO_INT_STATE_TRAP_SIZE 0x1 #define GC_CRYPTO_INT_STATE_TRAP_DEFAULT 0x0 #define GC_CRYPTO_INT_STATE_TRAP_OFFSET 0x18 #define GC_CRYPTO_INT_STATE_DONE_WIPE_SECRETS_LSB 0x9 #define GC_CRYPTO_INT_STATE_DONE_WIPE_SECRETS_MASK 0x200 #define GC_CRYPTO_INT_STATE_DONE_WIPE_SECRETS_SIZE 0x1 #define GC_CRYPTO_INT_STATE_DONE_WIPE_SECRETS_DEFAULT 0x0 #define GC_CRYPTO_INT_STATE_DONE_WIPE_SECRETS_OFFSET 0x18 #define GC_CRYPTO_INT_STATE_PGM_FAULT_LSB 0xa #define GC_CRYPTO_INT_STATE_PGM_FAULT_MASK 0x400 #define GC_CRYPTO_INT_STATE_PGM_FAULT_SIZE 0x1 #define GC_CRYPTO_INT_STATE_PGM_FAULT_DEFAULT 0x0 #define GC_CRYPTO_INT_STATE_PGM_FAULT_OFFSET 0x18 #define GC_CRYPTO_INT_STATE_MOD_OPERAND_OUT_OF_RANGE_LSB 0xb #define GC_CRYPTO_INT_STATE_MOD_OPERAND_OUT_OF_RANGE_MASK 0x800 #define GC_CRYPTO_INT_STATE_MOD_OPERAND_OUT_OF_RANGE_SIZE 0x1 #define GC_CRYPTO_INT_STATE_MOD_OPERAND_OUT_OF_RANGE_DEFAULT 0x0 #define GC_CRYPTO_INT_STATE_MOD_OPERAND_OUT_OF_RANGE_OFFSET 0x18 #define GC_CRYPTO_INT_TEST_HOST_CMD_RECV_LSB 0x0 #define GC_CRYPTO_INT_TEST_HOST_CMD_RECV_MASK 0x1 #define GC_CRYPTO_INT_TEST_HOST_CMD_RECV_SIZE 0x1 #define GC_CRYPTO_INT_TEST_HOST_CMD_RECV_DEFAULT 0x0 #define GC_CRYPTO_INT_TEST_HOST_CMD_RECV_OFFSET 0x1c #define GC_CRYPTO_INT_TEST_HOST_CMD_DONE_LSB 0x1 #define GC_CRYPTO_INT_TEST_HOST_CMD_DONE_MASK 0x2 #define GC_CRYPTO_INT_TEST_HOST_CMD_DONE_SIZE 0x1 #define GC_CRYPTO_INT_TEST_HOST_CMD_DONE_DEFAULT 0x0 #define GC_CRYPTO_INT_TEST_HOST_CMD_DONE_OFFSET 0x1c #define GC_CRYPTO_INT_TEST_PC_STACK_OVERFLOW_LSB 0x2 #define GC_CRYPTO_INT_TEST_PC_STACK_OVERFLOW_MASK 0x4 #define GC_CRYPTO_INT_TEST_PC_STACK_OVERFLOW_SIZE 0x1 #define GC_CRYPTO_INT_TEST_PC_STACK_OVERFLOW_DEFAULT 0x0 #define GC_CRYPTO_INT_TEST_PC_STACK_OVERFLOW_OFFSET 0x1c #define GC_CRYPTO_INT_TEST_LOOP_STACK_OVERFLOW_LSB 0x3 #define GC_CRYPTO_INT_TEST_LOOP_STACK_OVERFLOW_MASK 0x8 #define GC_CRYPTO_INT_TEST_LOOP_STACK_OVERFLOW_SIZE 0x1 #define GC_CRYPTO_INT_TEST_LOOP_STACK_OVERFLOW_DEFAULT 0x0 #define GC_CRYPTO_INT_TEST_LOOP_STACK_OVERFLOW_OFFSET 0x1c #define GC_CRYPTO_INT_TEST_LOOP_STACK_UNDERFLOW_LSB 0x4 #define GC_CRYPTO_INT_TEST_LOOP_STACK_UNDERFLOW_MASK 0x10 #define GC_CRYPTO_INT_TEST_LOOP_STACK_UNDERFLOW_SIZE 0x1 #define GC_CRYPTO_INT_TEST_LOOP_STACK_UNDERFLOW_DEFAULT 0x0 #define GC_CRYPTO_INT_TEST_LOOP_STACK_UNDERFLOW_OFFSET 0x1c #define GC_CRYPTO_INT_TEST_DMEM_PTRS_OVERFLOW_LSB 0x5 #define GC_CRYPTO_INT_TEST_DMEM_PTRS_OVERFLOW_MASK 0x20 #define GC_CRYPTO_INT_TEST_DMEM_PTRS_OVERFLOW_SIZE 0x1 #define GC_CRYPTO_INT_TEST_DMEM_PTRS_OVERFLOW_DEFAULT 0x0 #define GC_CRYPTO_INT_TEST_DMEM_PTRS_OVERFLOW_OFFSET 0x1c #define GC_CRYPTO_INT_TEST_DRF_PTRS_OVERFLOW_LSB 0x6 #define GC_CRYPTO_INT_TEST_DRF_PTRS_OVERFLOW_MASK 0x40 #define GC_CRYPTO_INT_TEST_DRF_PTRS_OVERFLOW_SIZE 0x1 #define GC_CRYPTO_INT_TEST_DRF_PTRS_OVERFLOW_DEFAULT 0x0 #define GC_CRYPTO_INT_TEST_DRF_PTRS_OVERFLOW_OFFSET 0x1c #define GC_CRYPTO_INT_TEST_BREAK_LSB 0x7 #define GC_CRYPTO_INT_TEST_BREAK_MASK 0x80 #define GC_CRYPTO_INT_TEST_BREAK_SIZE 0x1 #define GC_CRYPTO_INT_TEST_BREAK_DEFAULT 0x0 #define GC_CRYPTO_INT_TEST_BREAK_OFFSET 0x1c #define GC_CRYPTO_INT_TEST_TRAP_LSB 0x8 #define GC_CRYPTO_INT_TEST_TRAP_MASK 0x100 #define GC_CRYPTO_INT_TEST_TRAP_SIZE 0x1 #define GC_CRYPTO_INT_TEST_TRAP_DEFAULT 0x0 #define GC_CRYPTO_INT_TEST_TRAP_OFFSET 0x1c #define GC_CRYPTO_INT_TEST_DONE_WIPE_SECRETS_LSB 0x9 #define GC_CRYPTO_INT_TEST_DONE_WIPE_SECRETS_MASK 0x200 #define GC_CRYPTO_INT_TEST_DONE_WIPE_SECRETS_SIZE 0x1 #define GC_CRYPTO_INT_TEST_DONE_WIPE_SECRETS_DEFAULT 0x0 #define GC_CRYPTO_INT_TEST_DONE_WIPE_SECRETS_OFFSET 0x1c #define GC_CRYPTO_INT_TEST_PGM_FAULT_LSB 0xa #define GC_CRYPTO_INT_TEST_PGM_FAULT_MASK 0x400 #define GC_CRYPTO_INT_TEST_PGM_FAULT_SIZE 0x1 #define GC_CRYPTO_INT_TEST_PGM_FAULT_DEFAULT 0x0 #define GC_CRYPTO_INT_TEST_PGM_FAULT_OFFSET 0x1c #define GC_CRYPTO_INT_TEST_MOD_OPERAND_OUT_OF_RANGE_LSB 0xb #define GC_CRYPTO_INT_TEST_MOD_OPERAND_OUT_OF_RANGE_MASK 0x800 #define GC_CRYPTO_INT_TEST_MOD_OPERAND_OUT_OF_RANGE_SIZE 0x1 #define GC_CRYPTO_INT_TEST_MOD_OPERAND_OUT_OF_RANGE_DEFAULT 0x0 #define GC_CRYPTO_INT_TEST_MOD_OPERAND_OUT_OF_RANGE_OFFSET 0x1c #define GC_CRYPTO_HOST_CMD_INSTR_LSB 0x0 #define GC_CRYPTO_HOST_CMD_INSTR_MASK 0xffffffff #define GC_CRYPTO_HOST_CMD_INSTR_SIZE 0x20 #define GC_CRYPTO_HOST_CMD_INSTR_DEFAULT 0xffffffff #define GC_CRYPTO_HOST_CMD_INSTR_OFFSET 0x20 #define GC_CRYPTO_INSTR_PC_LSB 0x0 #define GC_CRYPTO_INSTR_PC_MASK 0x3ff #define GC_CRYPTO_INSTR_PC_SIZE 0xa #define GC_CRYPTO_INSTR_PC_DEFAULT 0x0 #define GC_CRYPTO_INSTR_PC_OFFSET 0x24 #define GC_CRYPTO_STATUS_STATE_LSB 0x0 #define GC_CRYPTO_STATUS_STATE_MASK 0x3 #define GC_CRYPTO_STATUS_STATE_SIZE 0x2 #define GC_CRYPTO_STATUS_STATE_DEFAULT 0x0 #define GC_CRYPTO_STATUS_STATE_OFFSET 0x28 #define GC_CRYPTO_STATUS_L_LSB 0x2 #define GC_CRYPTO_STATUS_L_MASK 0x4 #define GC_CRYPTO_STATUS_L_SIZE 0x1 #define GC_CRYPTO_STATUS_L_DEFAULT 0x0 #define GC_CRYPTO_STATUS_L_OFFSET 0x28 #define GC_CRYPTO_STATUS_M_LSB 0x3 #define GC_CRYPTO_STATUS_M_MASK 0x8 #define GC_CRYPTO_STATUS_M_SIZE 0x1 #define GC_CRYPTO_STATUS_M_DEFAULT 0x0 #define GC_CRYPTO_STATUS_M_OFFSET 0x28 #define GC_CRYPTO_STATUS_Z_LSB 0x4 #define GC_CRYPTO_STATUS_Z_MASK 0x10 #define GC_CRYPTO_STATUS_Z_SIZE 0x1 #define GC_CRYPTO_STATUS_Z_DEFAULT 0x0 #define GC_CRYPTO_STATUS_Z_OFFSET 0x28 #define GC_CRYPTO_STATUS_C_LSB 0x5 #define GC_CRYPTO_STATUS_C_MASK 0x20 #define GC_CRYPTO_STATUS_C_SIZE 0x1 #define GC_CRYPTO_STATUS_C_DEFAULT 0x0 #define GC_CRYPTO_STATUS_C_OFFSET 0x28 #define GC_CRYPTO_AUX_CC_L_LSB 0x0 #define GC_CRYPTO_AUX_CC_L_MASK 0x1 #define GC_CRYPTO_AUX_CC_L_SIZE 0x1 #define GC_CRYPTO_AUX_CC_L_DEFAULT 0x0 #define GC_CRYPTO_AUX_CC_L_OFFSET 0x2c #define GC_CRYPTO_AUX_CC_M_LSB 0x1 #define GC_CRYPTO_AUX_CC_M_MASK 0x2 #define GC_CRYPTO_AUX_CC_M_SIZE 0x1 #define GC_CRYPTO_AUX_CC_M_DEFAULT 0x0 #define GC_CRYPTO_AUX_CC_M_OFFSET 0x2c #define GC_CRYPTO_AUX_CC_Z_LSB 0x2 #define GC_CRYPTO_AUX_CC_Z_MASK 0x4 #define GC_CRYPTO_AUX_CC_Z_SIZE 0x1 #define GC_CRYPTO_AUX_CC_Z_DEFAULT 0x0 #define GC_CRYPTO_AUX_CC_Z_OFFSET 0x2c #define GC_CRYPTO_AUX_CC_C_LSB 0x3 #define GC_CRYPTO_AUX_CC_C_MASK 0x8 #define GC_CRYPTO_AUX_CC_C_SIZE 0x1 #define GC_CRYPTO_AUX_CC_C_DEFAULT 0x0 #define GC_CRYPTO_AUX_CC_C_OFFSET 0x2c #define GC_CRYPTO_RAND_STALL_CTL_STALL_EN_LSB 0x0 #define GC_CRYPTO_RAND_STALL_CTL_STALL_EN_MASK 0x1 #define GC_CRYPTO_RAND_STALL_CTL_STALL_EN_SIZE 0x1 #define GC_CRYPTO_RAND_STALL_CTL_STALL_EN_DEFAULT 0x1 #define GC_CRYPTO_RAND_STALL_CTL_STALL_EN_OFFSET 0x30 #define GC_CRYPTO_RAND_STALL_CTL_FREQ_LSB 0x1 #define GC_CRYPTO_RAND_STALL_CTL_FREQ_MASK 0x6 #define GC_CRYPTO_RAND_STALL_CTL_FREQ_SIZE 0x2 #define GC_CRYPTO_RAND_STALL_CTL_FREQ_DEFAULT 0x2 #define GC_CRYPTO_RAND_STALL_CTL_FREQ_OFFSET 0x30 #define GC_CRYPTO_RAND256_SHIFT_EN_LSB 0x0 #define GC_CRYPTO_RAND256_SHIFT_EN_MASK 0x1 #define GC_CRYPTO_RAND256_SHIFT_EN_SIZE 0x1 #define GC_CRYPTO_RAND256_SHIFT_EN_DEFAULT 0x1 #define GC_CRYPTO_RAND256_SHIFT_EN_OFFSET 0x34 #define GC_CRYPTO_PGM_LFSR_SIG_LSB 0x0 #define GC_CRYPTO_PGM_LFSR_SIG_MASK 0xffffff #define GC_CRYPTO_PGM_LFSR_SIG_SIZE 0x18 #define GC_CRYPTO_PGM_LFSR_SIG_DEFAULT 0x0 #define GC_CRYPTO_PGM_LFSR_SIG_OFFSET 0x44 #define GC_CRYPTO_DEBUG_BRKPT0_PC_LSB 0x0 #define GC_CRYPTO_DEBUG_BRKPT0_PC_MASK 0x3ff #define GC_CRYPTO_DEBUG_BRKPT0_PC_SIZE 0xa #define GC_CRYPTO_DEBUG_BRKPT0_PC_DEFAULT 0x0 #define GC_CRYPTO_DEBUG_BRKPT0_PC_OFFSET 0x48 #define GC_CRYPTO_DEBUG_BRKPT0_EN_LSB 0x1f #define GC_CRYPTO_DEBUG_BRKPT0_EN_MASK 0x80000000 #define GC_CRYPTO_DEBUG_BRKPT0_EN_SIZE 0x1 #define GC_CRYPTO_DEBUG_BRKPT0_EN_DEFAULT 0x0 #define GC_CRYPTO_DEBUG_BRKPT0_EN_OFFSET 0x48 #define GC_CRYPTO_DEBUG_BRKPT1_PC_LSB 0x0 #define GC_CRYPTO_DEBUG_BRKPT1_PC_MASK 0x3ff #define GC_CRYPTO_DEBUG_BRKPT1_PC_SIZE 0xa #define GC_CRYPTO_DEBUG_BRKPT1_PC_DEFAULT 0x0 #define GC_CRYPTO_DEBUG_BRKPT1_PC_OFFSET 0x4c #define GC_CRYPTO_DEBUG_BRKPT1_EN_LSB 0x1f #define GC_CRYPTO_DEBUG_BRKPT1_EN_MASK 0x80000000 #define GC_CRYPTO_DEBUG_BRKPT1_EN_SIZE 0x1 #define GC_CRYPTO_DEBUG_BRKPT1_EN_DEFAULT 0x0 #define GC_CRYPTO_DEBUG_BRKPT1_EN_OFFSET 0x4c #define GC_DMA_VERSION_CHANGE_LSB 0x0 #define GC_DMA_VERSION_CHANGE_MASK 0xffffff #define GC_DMA_VERSION_CHANGE_SIZE 0x18 #define GC_DMA_VERSION_CHANGE_DEFAULT 0x1424a #define GC_DMA_VERSION_CHANGE_OFFSET 0x0 #define GC_DMA_VERSION_REVISION_LSB 0x18 #define GC_DMA_VERSION_REVISION_MASK 0xff000000 #define GC_DMA_VERSION_REVISION_SIZE 0x8 #define GC_DMA_VERSION_REVISION_DEFAULT 0x1 #define GC_DMA_VERSION_REVISION_OFFSET 0x0 #define GC_DMA_INT_ENABLE_INTR_COMPLETE_CHAN_LSB 0x0 #define GC_DMA_INT_ENABLE_INTR_COMPLETE_CHAN_MASK 0xff #define GC_DMA_INT_ENABLE_INTR_COMPLETE_CHAN_SIZE 0x8 #define GC_DMA_INT_ENABLE_INTR_COMPLETE_CHAN_DEFAULT 0x0 #define GC_DMA_INT_ENABLE_INTR_COMPLETE_CHAN_OFFSET 0x4 #define GC_DMA_INT_ENABLE_INTR_PROG_CHAN_LSB 0x8 #define GC_DMA_INT_ENABLE_INTR_PROG_CHAN_MASK 0xff00 #define GC_DMA_INT_ENABLE_INTR_PROG_CHAN_SIZE 0x8 #define GC_DMA_INT_ENABLE_INTR_PROG_CHAN_DEFAULT 0x0 #define GC_DMA_INT_ENABLE_INTR_PROG_CHAN_OFFSET 0x4 #define GC_DMA_INT_ENABLE_INTR_TIMEOUT_CHAN_LSB 0x10 #define GC_DMA_INT_ENABLE_INTR_TIMEOUT_CHAN_MASK 0xff0000 #define GC_DMA_INT_ENABLE_INTR_TIMEOUT_CHAN_SIZE 0x8 #define GC_DMA_INT_ENABLE_INTR_TIMEOUT_CHAN_DEFAULT 0x0 #define GC_DMA_INT_ENABLE_INTR_TIMEOUT_CHAN_OFFSET 0x4 #define GC_DMA_INT_ENABLE_INTR_ERROR_CHAN_LSB 0x18 #define GC_DMA_INT_ENABLE_INTR_ERROR_CHAN_MASK 0xff000000 #define GC_DMA_INT_ENABLE_INTR_ERROR_CHAN_SIZE 0x8 #define GC_DMA_INT_ENABLE_INTR_ERROR_CHAN_DEFAULT 0x0 #define GC_DMA_INT_ENABLE_INTR_ERROR_CHAN_OFFSET 0x4 #define GC_DMA_INT_STATE_INTR_COMPLETE_CHAN_LSB 0x0 #define GC_DMA_INT_STATE_INTR_COMPLETE_CHAN_MASK 0xff #define GC_DMA_INT_STATE_INTR_COMPLETE_CHAN_SIZE 0x8 #define GC_DMA_INT_STATE_INTR_COMPLETE_CHAN_DEFAULT 0x0 #define GC_DMA_INT_STATE_INTR_COMPLETE_CHAN_OFFSET 0x8 #define GC_DMA_INT_STATE_INTR_PROG_CHAN_LSB 0x8 #define GC_DMA_INT_STATE_INTR_PROG_CHAN_MASK 0xff00 #define GC_DMA_INT_STATE_INTR_PROG_CHAN_SIZE 0x8 #define GC_DMA_INT_STATE_INTR_PROG_CHAN_DEFAULT 0x0 #define GC_DMA_INT_STATE_INTR_PROG_CHAN_OFFSET 0x8 #define GC_DMA_INT_STATE_INTR_TIMEOUT_CHAN_LSB 0x10 #define GC_DMA_INT_STATE_INTR_TIMEOUT_CHAN_MASK 0xff0000 #define GC_DMA_INT_STATE_INTR_TIMEOUT_CHAN_SIZE 0x8 #define GC_DMA_INT_STATE_INTR_TIMEOUT_CHAN_DEFAULT 0x0 #define GC_DMA_INT_STATE_INTR_TIMEOUT_CHAN_OFFSET 0x8 #define GC_DMA_INT_STATE_INTR_ERROR_CHAN_LSB 0x18 #define GC_DMA_INT_STATE_INTR_ERROR_CHAN_MASK 0xff000000 #define GC_DMA_INT_STATE_INTR_ERROR_CHAN_SIZE 0x8 #define GC_DMA_INT_STATE_INTR_ERROR_CHAN_DEFAULT 0x0 #define GC_DMA_INT_STATE_INTR_ERROR_CHAN_OFFSET 0x8 #define GC_DMA_INT_TEST_INTR_COMPLETE_CHAN_LSB 0x0 #define GC_DMA_INT_TEST_INTR_COMPLETE_CHAN_MASK 0xff #define GC_DMA_INT_TEST_INTR_COMPLETE_CHAN_SIZE 0x8 #define GC_DMA_INT_TEST_INTR_COMPLETE_CHAN_DEFAULT 0x0 #define GC_DMA_INT_TEST_INTR_COMPLETE_CHAN_OFFSET 0xc #define GC_DMA_INT_TEST_INTR_PROG_CHAN_LSB 0x8 #define GC_DMA_INT_TEST_INTR_PROG_CHAN_MASK 0xff00 #define GC_DMA_INT_TEST_INTR_PROG_CHAN_SIZE 0x8 #define GC_DMA_INT_TEST_INTR_PROG_CHAN_DEFAULT 0x0 #define GC_DMA_INT_TEST_INTR_PROG_CHAN_OFFSET 0xc #define GC_DMA_INT_TEST_INTR_TIMEOUT_CHAN_LSB 0x10 #define GC_DMA_INT_TEST_INTR_TIMEOUT_CHAN_MASK 0xff0000 #define GC_DMA_INT_TEST_INTR_TIMEOUT_CHAN_SIZE 0x8 #define GC_DMA_INT_TEST_INTR_TIMEOUT_CHAN_DEFAULT 0x0 #define GC_DMA_INT_TEST_INTR_TIMEOUT_CHAN_OFFSET 0xc #define GC_DMA_INT_TEST_INTR_ERROR_CHAN_LSB 0x18 #define GC_DMA_INT_TEST_INTR_ERROR_CHAN_MASK 0xff000000 #define GC_DMA_INT_TEST_INTR_ERROR_CHAN_SIZE 0x8 #define GC_DMA_INT_TEST_INTR_ERROR_CHAN_DEFAULT 0x0 #define GC_DMA_INT_TEST_INTR_ERROR_CHAN_OFFSET 0xc #define GC_DMA_CTRL_CHAN0_CLR_ERROR_LSB 0x0 #define GC_DMA_CTRL_CHAN0_CLR_ERROR_MASK 0x1 #define GC_DMA_CTRL_CHAN0_CLR_ERROR_SIZE 0x1 #define GC_DMA_CTRL_CHAN0_CLR_ERROR_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN0_CLR_ERROR_OFFSET 0x108 #define GC_DMA_CTRL_CHAN0_BYTE_NONWORD_MODE_LSB 0x1 #define GC_DMA_CTRL_CHAN0_BYTE_NONWORD_MODE_MASK 0x2 #define GC_DMA_CTRL_CHAN0_BYTE_NONWORD_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN0_BYTE_NONWORD_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN0_BYTE_NONWORD_MODE_OFFSET 0x108 #define GC_DMA_CTRL_CHAN0_WRAP_MODE_LSB 0x2 #define GC_DMA_CTRL_CHAN0_WRAP_MODE_MASK 0x4 #define GC_DMA_CTRL_CHAN0_WRAP_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN0_WRAP_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN0_WRAP_MODE_OFFSET 0x108 #define GC_DMA_CTRL_CHAN0_SRC_FIFO_MODE_LSB 0x3 #define GC_DMA_CTRL_CHAN0_SRC_FIFO_MODE_MASK 0x8 #define GC_DMA_CTRL_CHAN0_SRC_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN0_SRC_FIFO_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN0_SRC_FIFO_MODE_OFFSET 0x108 #define GC_DMA_CTRL_CHAN0_DST_FIFO_MODE_LSB 0x4 #define GC_DMA_CTRL_CHAN0_DST_FIFO_MODE_MASK 0x10 #define GC_DMA_CTRL_CHAN0_DST_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN0_DST_FIFO_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN0_DST_FIFO_MODE_OFFSET 0x108 #define GC_DMA_CTRL_CHAN0_NCHK_EMPTY_LSB 0x5 #define GC_DMA_CTRL_CHAN0_NCHK_EMPTY_MASK 0x20 #define GC_DMA_CTRL_CHAN0_NCHK_EMPTY_SIZE 0x1 #define GC_DMA_CTRL_CHAN0_NCHK_EMPTY_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN0_NCHK_EMPTY_OFFSET 0x108 #define GC_DMA_CTRL_CHAN0_NCHK_FULL_LSB 0x6 #define GC_DMA_CTRL_CHAN0_NCHK_FULL_MASK 0x40 #define GC_DMA_CTRL_CHAN0_NCHK_FULL_SIZE 0x1 #define GC_DMA_CTRL_CHAN0_NCHK_FULL_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN0_NCHK_FULL_OFFSET 0x108 #define GC_DMA_CTRL_CHAN0_SRC_EMPTY_VECTOR_BIT_LSB 0x7 #define GC_DMA_CTRL_CHAN0_SRC_EMPTY_VECTOR_BIT_MASK 0x380 #define GC_DMA_CTRL_CHAN0_SRC_EMPTY_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN0_SRC_EMPTY_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN0_SRC_EMPTY_VECTOR_BIT_OFFSET 0x108 #define GC_DMA_CTRL_CHAN0_DST_FULL_VECTOR_BIT_LSB 0xa #define GC_DMA_CTRL_CHAN0_DST_FULL_VECTOR_BIT_MASK 0x1c00 #define GC_DMA_CTRL_CHAN0_DST_FULL_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN0_DST_FULL_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN0_DST_FULL_VECTOR_BIT_OFFSET 0x108 #define GC_DMA_FSM_STATE_CHAN0_IDLE_LSB 0x0 #define GC_DMA_FSM_STATE_CHAN0_IDLE_MASK 0x1 #define GC_DMA_FSM_STATE_CHAN0_IDLE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN0_IDLE_DEFAULT 0x1 #define GC_DMA_FSM_STATE_CHAN0_IDLE_OFFSET 0x128 #define GC_DMA_FSM_STATE_CHAN0_BID_READ_LSB 0x1 #define GC_DMA_FSM_STATE_CHAN0_BID_READ_MASK 0x2 #define GC_DMA_FSM_STATE_CHAN0_BID_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN0_BID_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN0_BID_READ_OFFSET 0x128 #define GC_DMA_FSM_STATE_CHAN0_BID_WRITE_LSB 0x2 #define GC_DMA_FSM_STATE_CHAN0_BID_WRITE_MASK 0x4 #define GC_DMA_FSM_STATE_CHAN0_BID_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN0_BID_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN0_BID_WRITE_OFFSET 0x128 #define GC_DMA_FSM_STATE_CHAN0_CHECK_EMPTY_LSB 0x3 #define GC_DMA_FSM_STATE_CHAN0_CHECK_EMPTY_MASK 0x8 #define GC_DMA_FSM_STATE_CHAN0_CHECK_EMPTY_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN0_CHECK_EMPTY_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN0_CHECK_EMPTY_OFFSET 0x128 #define GC_DMA_FSM_STATE_CHAN0_CHECK_FULL_LSB 0x4 #define GC_DMA_FSM_STATE_CHAN0_CHECK_FULL_MASK 0x10 #define GC_DMA_FSM_STATE_CHAN0_CHECK_FULL_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN0_CHECK_FULL_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN0_CHECK_FULL_OFFSET 0x128 #define GC_DMA_FSM_STATE_CHAN0_READ_LSB 0x5 #define GC_DMA_FSM_STATE_CHAN0_READ_MASK 0x20 #define GC_DMA_FSM_STATE_CHAN0_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN0_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN0_READ_OFFSET 0x128 #define GC_DMA_FSM_STATE_CHAN0_WRITE_LSB 0x6 #define GC_DMA_FSM_STATE_CHAN0_WRITE_MASK 0x40 #define GC_DMA_FSM_STATE_CHAN0_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN0_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN0_WRITE_OFFSET 0x128 #define GC_DMA_FSM_STATE_CHAN0_ERROR_LSB 0x7 #define GC_DMA_FSM_STATE_CHAN0_ERROR_MASK 0x80 #define GC_DMA_FSM_STATE_CHAN0_ERROR_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN0_ERROR_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN0_ERROR_OFFSET 0x128 #define GC_DMA_FSM_STATE_CHAN0_PAUSE_LSB 0x8 #define GC_DMA_FSM_STATE_CHAN0_PAUSE_MASK 0x100 #define GC_DMA_FSM_STATE_CHAN0_PAUSE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN0_PAUSE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN0_PAUSE_OFFSET 0x128 #define GC_DMA_CTRL_CHAN1_CLR_ERROR_LSB 0x0 #define GC_DMA_CTRL_CHAN1_CLR_ERROR_MASK 0x1 #define GC_DMA_CTRL_CHAN1_CLR_ERROR_SIZE 0x1 #define GC_DMA_CTRL_CHAN1_CLR_ERROR_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN1_CLR_ERROR_OFFSET 0x208 #define GC_DMA_CTRL_CHAN1_BYTE_NONWORD_MODE_LSB 0x1 #define GC_DMA_CTRL_CHAN1_BYTE_NONWORD_MODE_MASK 0x2 #define GC_DMA_CTRL_CHAN1_BYTE_NONWORD_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN1_BYTE_NONWORD_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN1_BYTE_NONWORD_MODE_OFFSET 0x208 #define GC_DMA_CTRL_CHAN1_WRAP_MODE_LSB 0x2 #define GC_DMA_CTRL_CHAN1_WRAP_MODE_MASK 0x4 #define GC_DMA_CTRL_CHAN1_WRAP_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN1_WRAP_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN1_WRAP_MODE_OFFSET 0x208 #define GC_DMA_CTRL_CHAN1_SRC_FIFO_MODE_LSB 0x3 #define GC_DMA_CTRL_CHAN1_SRC_FIFO_MODE_MASK 0x8 #define GC_DMA_CTRL_CHAN1_SRC_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN1_SRC_FIFO_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN1_SRC_FIFO_MODE_OFFSET 0x208 #define GC_DMA_CTRL_CHAN1_DST_FIFO_MODE_LSB 0x4 #define GC_DMA_CTRL_CHAN1_DST_FIFO_MODE_MASK 0x10 #define GC_DMA_CTRL_CHAN1_DST_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN1_DST_FIFO_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN1_DST_FIFO_MODE_OFFSET 0x208 #define GC_DMA_CTRL_CHAN1_NCHK_EMPTY_LSB 0x5 #define GC_DMA_CTRL_CHAN1_NCHK_EMPTY_MASK 0x20 #define GC_DMA_CTRL_CHAN1_NCHK_EMPTY_SIZE 0x1 #define GC_DMA_CTRL_CHAN1_NCHK_EMPTY_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN1_NCHK_EMPTY_OFFSET 0x208 #define GC_DMA_CTRL_CHAN1_NCHK_FULL_LSB 0x6 #define GC_DMA_CTRL_CHAN1_NCHK_FULL_MASK 0x40 #define GC_DMA_CTRL_CHAN1_NCHK_FULL_SIZE 0x1 #define GC_DMA_CTRL_CHAN1_NCHK_FULL_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN1_NCHK_FULL_OFFSET 0x208 #define GC_DMA_CTRL_CHAN1_SRC_EMPTY_VECTOR_BIT_LSB 0x7 #define GC_DMA_CTRL_CHAN1_SRC_EMPTY_VECTOR_BIT_MASK 0x380 #define GC_DMA_CTRL_CHAN1_SRC_EMPTY_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN1_SRC_EMPTY_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN1_SRC_EMPTY_VECTOR_BIT_OFFSET 0x208 #define GC_DMA_CTRL_CHAN1_DST_FULL_VECTOR_BIT_LSB 0xa #define GC_DMA_CTRL_CHAN1_DST_FULL_VECTOR_BIT_MASK 0x1c00 #define GC_DMA_CTRL_CHAN1_DST_FULL_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN1_DST_FULL_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN1_DST_FULL_VECTOR_BIT_OFFSET 0x208 #define GC_DMA_FSM_STATE_CHAN1_IDLE_LSB 0x0 #define GC_DMA_FSM_STATE_CHAN1_IDLE_MASK 0x1 #define GC_DMA_FSM_STATE_CHAN1_IDLE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN1_IDLE_DEFAULT 0x1 #define GC_DMA_FSM_STATE_CHAN1_IDLE_OFFSET 0x228 #define GC_DMA_FSM_STATE_CHAN1_BID_READ_LSB 0x1 #define GC_DMA_FSM_STATE_CHAN1_BID_READ_MASK 0x2 #define GC_DMA_FSM_STATE_CHAN1_BID_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN1_BID_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN1_BID_READ_OFFSET 0x228 #define GC_DMA_FSM_STATE_CHAN1_BID_WRITE_LSB 0x2 #define GC_DMA_FSM_STATE_CHAN1_BID_WRITE_MASK 0x4 #define GC_DMA_FSM_STATE_CHAN1_BID_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN1_BID_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN1_BID_WRITE_OFFSET 0x228 #define GC_DMA_FSM_STATE_CHAN1_CHECK_EMPTY_LSB 0x3 #define GC_DMA_FSM_STATE_CHAN1_CHECK_EMPTY_MASK 0x8 #define GC_DMA_FSM_STATE_CHAN1_CHECK_EMPTY_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN1_CHECK_EMPTY_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN1_CHECK_EMPTY_OFFSET 0x228 #define GC_DMA_FSM_STATE_CHAN1_CHECK_FULL_LSB 0x4 #define GC_DMA_FSM_STATE_CHAN1_CHECK_FULL_MASK 0x10 #define GC_DMA_FSM_STATE_CHAN1_CHECK_FULL_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN1_CHECK_FULL_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN1_CHECK_FULL_OFFSET 0x228 #define GC_DMA_FSM_STATE_CHAN1_READ_LSB 0x5 #define GC_DMA_FSM_STATE_CHAN1_READ_MASK 0x20 #define GC_DMA_FSM_STATE_CHAN1_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN1_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN1_READ_OFFSET 0x228 #define GC_DMA_FSM_STATE_CHAN1_WRITE_LSB 0x6 #define GC_DMA_FSM_STATE_CHAN1_WRITE_MASK 0x40 #define GC_DMA_FSM_STATE_CHAN1_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN1_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN1_WRITE_OFFSET 0x228 #define GC_DMA_FSM_STATE_CHAN1_ERROR_LSB 0x7 #define GC_DMA_FSM_STATE_CHAN1_ERROR_MASK 0x80 #define GC_DMA_FSM_STATE_CHAN1_ERROR_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN1_ERROR_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN1_ERROR_OFFSET 0x228 #define GC_DMA_FSM_STATE_CHAN1_PAUSE_LSB 0x8 #define GC_DMA_FSM_STATE_CHAN1_PAUSE_MASK 0x100 #define GC_DMA_FSM_STATE_CHAN1_PAUSE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN1_PAUSE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN1_PAUSE_OFFSET 0x228 #define GC_DMA_CTRL_CHAN2_CLR_ERROR_LSB 0x0 #define GC_DMA_CTRL_CHAN2_CLR_ERROR_MASK 0x1 #define GC_DMA_CTRL_CHAN2_CLR_ERROR_SIZE 0x1 #define GC_DMA_CTRL_CHAN2_CLR_ERROR_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN2_CLR_ERROR_OFFSET 0x308 #define GC_DMA_CTRL_CHAN2_BYTE_NONWORD_MODE_LSB 0x1 #define GC_DMA_CTRL_CHAN2_BYTE_NONWORD_MODE_MASK 0x2 #define GC_DMA_CTRL_CHAN2_BYTE_NONWORD_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN2_BYTE_NONWORD_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN2_BYTE_NONWORD_MODE_OFFSET 0x308 #define GC_DMA_CTRL_CHAN2_WRAP_MODE_LSB 0x2 #define GC_DMA_CTRL_CHAN2_WRAP_MODE_MASK 0x4 #define GC_DMA_CTRL_CHAN2_WRAP_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN2_WRAP_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN2_WRAP_MODE_OFFSET 0x308 #define GC_DMA_CTRL_CHAN2_SRC_FIFO_MODE_LSB 0x3 #define GC_DMA_CTRL_CHAN2_SRC_FIFO_MODE_MASK 0x8 #define GC_DMA_CTRL_CHAN2_SRC_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN2_SRC_FIFO_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN2_SRC_FIFO_MODE_OFFSET 0x308 #define GC_DMA_CTRL_CHAN2_DST_FIFO_MODE_LSB 0x4 #define GC_DMA_CTRL_CHAN2_DST_FIFO_MODE_MASK 0x10 #define GC_DMA_CTRL_CHAN2_DST_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN2_DST_FIFO_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN2_DST_FIFO_MODE_OFFSET 0x308 #define GC_DMA_CTRL_CHAN2_NCHK_EMPTY_LSB 0x5 #define GC_DMA_CTRL_CHAN2_NCHK_EMPTY_MASK 0x20 #define GC_DMA_CTRL_CHAN2_NCHK_EMPTY_SIZE 0x1 #define GC_DMA_CTRL_CHAN2_NCHK_EMPTY_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN2_NCHK_EMPTY_OFFSET 0x308 #define GC_DMA_CTRL_CHAN2_NCHK_FULL_LSB 0x6 #define GC_DMA_CTRL_CHAN2_NCHK_FULL_MASK 0x40 #define GC_DMA_CTRL_CHAN2_NCHK_FULL_SIZE 0x1 #define GC_DMA_CTRL_CHAN2_NCHK_FULL_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN2_NCHK_FULL_OFFSET 0x308 #define GC_DMA_CTRL_CHAN2_SRC_EMPTY_VECTOR_BIT_LSB 0x7 #define GC_DMA_CTRL_CHAN2_SRC_EMPTY_VECTOR_BIT_MASK 0x380 #define GC_DMA_CTRL_CHAN2_SRC_EMPTY_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN2_SRC_EMPTY_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN2_SRC_EMPTY_VECTOR_BIT_OFFSET 0x308 #define GC_DMA_CTRL_CHAN2_DST_FULL_VECTOR_BIT_LSB 0xa #define GC_DMA_CTRL_CHAN2_DST_FULL_VECTOR_BIT_MASK 0x1c00 #define GC_DMA_CTRL_CHAN2_DST_FULL_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN2_DST_FULL_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN2_DST_FULL_VECTOR_BIT_OFFSET 0x308 #define GC_DMA_FSM_STATE_CHAN2_IDLE_LSB 0x0 #define GC_DMA_FSM_STATE_CHAN2_IDLE_MASK 0x1 #define GC_DMA_FSM_STATE_CHAN2_IDLE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN2_IDLE_DEFAULT 0x1 #define GC_DMA_FSM_STATE_CHAN2_IDLE_OFFSET 0x328 #define GC_DMA_FSM_STATE_CHAN2_BID_READ_LSB 0x1 #define GC_DMA_FSM_STATE_CHAN2_BID_READ_MASK 0x2 #define GC_DMA_FSM_STATE_CHAN2_BID_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN2_BID_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN2_BID_READ_OFFSET 0x328 #define GC_DMA_FSM_STATE_CHAN2_BID_WRITE_LSB 0x2 #define GC_DMA_FSM_STATE_CHAN2_BID_WRITE_MASK 0x4 #define GC_DMA_FSM_STATE_CHAN2_BID_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN2_BID_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN2_BID_WRITE_OFFSET 0x328 #define GC_DMA_FSM_STATE_CHAN2_CHECK_EMPTY_LSB 0x3 #define GC_DMA_FSM_STATE_CHAN2_CHECK_EMPTY_MASK 0x8 #define GC_DMA_FSM_STATE_CHAN2_CHECK_EMPTY_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN2_CHECK_EMPTY_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN2_CHECK_EMPTY_OFFSET 0x328 #define GC_DMA_FSM_STATE_CHAN2_CHECK_FULL_LSB 0x4 #define GC_DMA_FSM_STATE_CHAN2_CHECK_FULL_MASK 0x10 #define GC_DMA_FSM_STATE_CHAN2_CHECK_FULL_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN2_CHECK_FULL_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN2_CHECK_FULL_OFFSET 0x328 #define GC_DMA_FSM_STATE_CHAN2_READ_LSB 0x5 #define GC_DMA_FSM_STATE_CHAN2_READ_MASK 0x20 #define GC_DMA_FSM_STATE_CHAN2_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN2_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN2_READ_OFFSET 0x328 #define GC_DMA_FSM_STATE_CHAN2_WRITE_LSB 0x6 #define GC_DMA_FSM_STATE_CHAN2_WRITE_MASK 0x40 #define GC_DMA_FSM_STATE_CHAN2_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN2_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN2_WRITE_OFFSET 0x328 #define GC_DMA_FSM_STATE_CHAN2_ERROR_LSB 0x7 #define GC_DMA_FSM_STATE_CHAN2_ERROR_MASK 0x80 #define GC_DMA_FSM_STATE_CHAN2_ERROR_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN2_ERROR_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN2_ERROR_OFFSET 0x328 #define GC_DMA_FSM_STATE_CHAN2_PAUSE_LSB 0x8 #define GC_DMA_FSM_STATE_CHAN2_PAUSE_MASK 0x100 #define GC_DMA_FSM_STATE_CHAN2_PAUSE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN2_PAUSE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN2_PAUSE_OFFSET 0x328 #define GC_DMA_CTRL_CHAN3_CLR_ERROR_LSB 0x0 #define GC_DMA_CTRL_CHAN3_CLR_ERROR_MASK 0x1 #define GC_DMA_CTRL_CHAN3_CLR_ERROR_SIZE 0x1 #define GC_DMA_CTRL_CHAN3_CLR_ERROR_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN3_CLR_ERROR_OFFSET 0x408 #define GC_DMA_CTRL_CHAN3_BYTE_NONWORD_MODE_LSB 0x1 #define GC_DMA_CTRL_CHAN3_BYTE_NONWORD_MODE_MASK 0x2 #define GC_DMA_CTRL_CHAN3_BYTE_NONWORD_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN3_BYTE_NONWORD_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN3_BYTE_NONWORD_MODE_OFFSET 0x408 #define GC_DMA_CTRL_CHAN3_WRAP_MODE_LSB 0x2 #define GC_DMA_CTRL_CHAN3_WRAP_MODE_MASK 0x4 #define GC_DMA_CTRL_CHAN3_WRAP_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN3_WRAP_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN3_WRAP_MODE_OFFSET 0x408 #define GC_DMA_CTRL_CHAN3_SRC_FIFO_MODE_LSB 0x3 #define GC_DMA_CTRL_CHAN3_SRC_FIFO_MODE_MASK 0x8 #define GC_DMA_CTRL_CHAN3_SRC_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN3_SRC_FIFO_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN3_SRC_FIFO_MODE_OFFSET 0x408 #define GC_DMA_CTRL_CHAN3_DST_FIFO_MODE_LSB 0x4 #define GC_DMA_CTRL_CHAN3_DST_FIFO_MODE_MASK 0x10 #define GC_DMA_CTRL_CHAN3_DST_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN3_DST_FIFO_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN3_DST_FIFO_MODE_OFFSET 0x408 #define GC_DMA_CTRL_CHAN3_NCHK_EMPTY_LSB 0x5 #define GC_DMA_CTRL_CHAN3_NCHK_EMPTY_MASK 0x20 #define GC_DMA_CTRL_CHAN3_NCHK_EMPTY_SIZE 0x1 #define GC_DMA_CTRL_CHAN3_NCHK_EMPTY_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN3_NCHK_EMPTY_OFFSET 0x408 #define GC_DMA_CTRL_CHAN3_NCHK_FULL_LSB 0x6 #define GC_DMA_CTRL_CHAN3_NCHK_FULL_MASK 0x40 #define GC_DMA_CTRL_CHAN3_NCHK_FULL_SIZE 0x1 #define GC_DMA_CTRL_CHAN3_NCHK_FULL_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN3_NCHK_FULL_OFFSET 0x408 #define GC_DMA_CTRL_CHAN3_SRC_EMPTY_VECTOR_BIT_LSB 0x7 #define GC_DMA_CTRL_CHAN3_SRC_EMPTY_VECTOR_BIT_MASK 0x380 #define GC_DMA_CTRL_CHAN3_SRC_EMPTY_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN3_SRC_EMPTY_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN3_SRC_EMPTY_VECTOR_BIT_OFFSET 0x408 #define GC_DMA_CTRL_CHAN3_DST_FULL_VECTOR_BIT_LSB 0xa #define GC_DMA_CTRL_CHAN3_DST_FULL_VECTOR_BIT_MASK 0x1c00 #define GC_DMA_CTRL_CHAN3_DST_FULL_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN3_DST_FULL_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN3_DST_FULL_VECTOR_BIT_OFFSET 0x408 #define GC_DMA_FSM_STATE_CHAN3_IDLE_LSB 0x0 #define GC_DMA_FSM_STATE_CHAN3_IDLE_MASK 0x1 #define GC_DMA_FSM_STATE_CHAN3_IDLE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN3_IDLE_DEFAULT 0x1 #define GC_DMA_FSM_STATE_CHAN3_IDLE_OFFSET 0x428 #define GC_DMA_FSM_STATE_CHAN3_BID_READ_LSB 0x1 #define GC_DMA_FSM_STATE_CHAN3_BID_READ_MASK 0x2 #define GC_DMA_FSM_STATE_CHAN3_BID_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN3_BID_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN3_BID_READ_OFFSET 0x428 #define GC_DMA_FSM_STATE_CHAN3_BID_WRITE_LSB 0x2 #define GC_DMA_FSM_STATE_CHAN3_BID_WRITE_MASK 0x4 #define GC_DMA_FSM_STATE_CHAN3_BID_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN3_BID_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN3_BID_WRITE_OFFSET 0x428 #define GC_DMA_FSM_STATE_CHAN3_CHECK_EMPTY_LSB 0x3 #define GC_DMA_FSM_STATE_CHAN3_CHECK_EMPTY_MASK 0x8 #define GC_DMA_FSM_STATE_CHAN3_CHECK_EMPTY_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN3_CHECK_EMPTY_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN3_CHECK_EMPTY_OFFSET 0x428 #define GC_DMA_FSM_STATE_CHAN3_CHECK_FULL_LSB 0x4 #define GC_DMA_FSM_STATE_CHAN3_CHECK_FULL_MASK 0x10 #define GC_DMA_FSM_STATE_CHAN3_CHECK_FULL_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN3_CHECK_FULL_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN3_CHECK_FULL_OFFSET 0x428 #define GC_DMA_FSM_STATE_CHAN3_READ_LSB 0x5 #define GC_DMA_FSM_STATE_CHAN3_READ_MASK 0x20 #define GC_DMA_FSM_STATE_CHAN3_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN3_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN3_READ_OFFSET 0x428 #define GC_DMA_FSM_STATE_CHAN3_WRITE_LSB 0x6 #define GC_DMA_FSM_STATE_CHAN3_WRITE_MASK 0x40 #define GC_DMA_FSM_STATE_CHAN3_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN3_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN3_WRITE_OFFSET 0x428 #define GC_DMA_FSM_STATE_CHAN3_ERROR_LSB 0x7 #define GC_DMA_FSM_STATE_CHAN3_ERROR_MASK 0x80 #define GC_DMA_FSM_STATE_CHAN3_ERROR_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN3_ERROR_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN3_ERROR_OFFSET 0x428 #define GC_DMA_FSM_STATE_CHAN3_PAUSE_LSB 0x8 #define GC_DMA_FSM_STATE_CHAN3_PAUSE_MASK 0x100 #define GC_DMA_FSM_STATE_CHAN3_PAUSE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN3_PAUSE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN3_PAUSE_OFFSET 0x428 #define GC_DMA_CTRL_CHAN4_CLR_ERROR_LSB 0x0 #define GC_DMA_CTRL_CHAN4_CLR_ERROR_MASK 0x1 #define GC_DMA_CTRL_CHAN4_CLR_ERROR_SIZE 0x1 #define GC_DMA_CTRL_CHAN4_CLR_ERROR_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN4_CLR_ERROR_OFFSET 0x508 #define GC_DMA_CTRL_CHAN4_BYTE_NONWORD_MODE_LSB 0x1 #define GC_DMA_CTRL_CHAN4_BYTE_NONWORD_MODE_MASK 0x2 #define GC_DMA_CTRL_CHAN4_BYTE_NONWORD_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN4_BYTE_NONWORD_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN4_BYTE_NONWORD_MODE_OFFSET 0x508 #define GC_DMA_CTRL_CHAN4_WRAP_MODE_LSB 0x2 #define GC_DMA_CTRL_CHAN4_WRAP_MODE_MASK 0x4 #define GC_DMA_CTRL_CHAN4_WRAP_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN4_WRAP_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN4_WRAP_MODE_OFFSET 0x508 #define GC_DMA_CTRL_CHAN4_SRC_FIFO_MODE_LSB 0x3 #define GC_DMA_CTRL_CHAN4_SRC_FIFO_MODE_MASK 0x8 #define GC_DMA_CTRL_CHAN4_SRC_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN4_SRC_FIFO_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN4_SRC_FIFO_MODE_OFFSET 0x508 #define GC_DMA_CTRL_CHAN4_DST_FIFO_MODE_LSB 0x4 #define GC_DMA_CTRL_CHAN4_DST_FIFO_MODE_MASK 0x10 #define GC_DMA_CTRL_CHAN4_DST_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN4_DST_FIFO_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN4_DST_FIFO_MODE_OFFSET 0x508 #define GC_DMA_CTRL_CHAN4_NCHK_EMPTY_LSB 0x5 #define GC_DMA_CTRL_CHAN4_NCHK_EMPTY_MASK 0x20 #define GC_DMA_CTRL_CHAN4_NCHK_EMPTY_SIZE 0x1 #define GC_DMA_CTRL_CHAN4_NCHK_EMPTY_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN4_NCHK_EMPTY_OFFSET 0x508 #define GC_DMA_CTRL_CHAN4_NCHK_FULL_LSB 0x6 #define GC_DMA_CTRL_CHAN4_NCHK_FULL_MASK 0x40 #define GC_DMA_CTRL_CHAN4_NCHK_FULL_SIZE 0x1 #define GC_DMA_CTRL_CHAN4_NCHK_FULL_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN4_NCHK_FULL_OFFSET 0x508 #define GC_DMA_CTRL_CHAN4_SRC_EMPTY_VECTOR_BIT_LSB 0x7 #define GC_DMA_CTRL_CHAN4_SRC_EMPTY_VECTOR_BIT_MASK 0x380 #define GC_DMA_CTRL_CHAN4_SRC_EMPTY_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN4_SRC_EMPTY_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN4_SRC_EMPTY_VECTOR_BIT_OFFSET 0x508 #define GC_DMA_CTRL_CHAN4_DST_FULL_VECTOR_BIT_LSB 0xa #define GC_DMA_CTRL_CHAN4_DST_FULL_VECTOR_BIT_MASK 0x1c00 #define GC_DMA_CTRL_CHAN4_DST_FULL_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN4_DST_FULL_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN4_DST_FULL_VECTOR_BIT_OFFSET 0x508 #define GC_DMA_FSM_STATE_CHAN4_IDLE_LSB 0x0 #define GC_DMA_FSM_STATE_CHAN4_IDLE_MASK 0x1 #define GC_DMA_FSM_STATE_CHAN4_IDLE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN4_IDLE_DEFAULT 0x1 #define GC_DMA_FSM_STATE_CHAN4_IDLE_OFFSET 0x528 #define GC_DMA_FSM_STATE_CHAN4_BID_READ_LSB 0x1 #define GC_DMA_FSM_STATE_CHAN4_BID_READ_MASK 0x2 #define GC_DMA_FSM_STATE_CHAN4_BID_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN4_BID_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN4_BID_READ_OFFSET 0x528 #define GC_DMA_FSM_STATE_CHAN4_BID_WRITE_LSB 0x2 #define GC_DMA_FSM_STATE_CHAN4_BID_WRITE_MASK 0x4 #define GC_DMA_FSM_STATE_CHAN4_BID_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN4_BID_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN4_BID_WRITE_OFFSET 0x528 #define GC_DMA_FSM_STATE_CHAN4_CHECK_EMPTY_LSB 0x3 #define GC_DMA_FSM_STATE_CHAN4_CHECK_EMPTY_MASK 0x8 #define GC_DMA_FSM_STATE_CHAN4_CHECK_EMPTY_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN4_CHECK_EMPTY_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN4_CHECK_EMPTY_OFFSET 0x528 #define GC_DMA_FSM_STATE_CHAN4_CHECK_FULL_LSB 0x4 #define GC_DMA_FSM_STATE_CHAN4_CHECK_FULL_MASK 0x10 #define GC_DMA_FSM_STATE_CHAN4_CHECK_FULL_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN4_CHECK_FULL_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN4_CHECK_FULL_OFFSET 0x528 #define GC_DMA_FSM_STATE_CHAN4_READ_LSB 0x5 #define GC_DMA_FSM_STATE_CHAN4_READ_MASK 0x20 #define GC_DMA_FSM_STATE_CHAN4_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN4_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN4_READ_OFFSET 0x528 #define GC_DMA_FSM_STATE_CHAN4_WRITE_LSB 0x6 #define GC_DMA_FSM_STATE_CHAN4_WRITE_MASK 0x40 #define GC_DMA_FSM_STATE_CHAN4_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN4_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN4_WRITE_OFFSET 0x528 #define GC_DMA_FSM_STATE_CHAN4_ERROR_LSB 0x7 #define GC_DMA_FSM_STATE_CHAN4_ERROR_MASK 0x80 #define GC_DMA_FSM_STATE_CHAN4_ERROR_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN4_ERROR_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN4_ERROR_OFFSET 0x528 #define GC_DMA_FSM_STATE_CHAN4_PAUSE_LSB 0x8 #define GC_DMA_FSM_STATE_CHAN4_PAUSE_MASK 0x100 #define GC_DMA_FSM_STATE_CHAN4_PAUSE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN4_PAUSE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN4_PAUSE_OFFSET 0x528 #define GC_DMA_CTRL_CHAN5_CLR_ERROR_LSB 0x0 #define GC_DMA_CTRL_CHAN5_CLR_ERROR_MASK 0x1 #define GC_DMA_CTRL_CHAN5_CLR_ERROR_SIZE 0x1 #define GC_DMA_CTRL_CHAN5_CLR_ERROR_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN5_CLR_ERROR_OFFSET 0x608 #define GC_DMA_CTRL_CHAN5_BYTE_NONWORD_MODE_LSB 0x1 #define GC_DMA_CTRL_CHAN5_BYTE_NONWORD_MODE_MASK 0x2 #define GC_DMA_CTRL_CHAN5_BYTE_NONWORD_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN5_BYTE_NONWORD_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN5_BYTE_NONWORD_MODE_OFFSET 0x608 #define GC_DMA_CTRL_CHAN5_WRAP_MODE_LSB 0x2 #define GC_DMA_CTRL_CHAN5_WRAP_MODE_MASK 0x4 #define GC_DMA_CTRL_CHAN5_WRAP_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN5_WRAP_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN5_WRAP_MODE_OFFSET 0x608 #define GC_DMA_CTRL_CHAN5_SRC_FIFO_MODE_LSB 0x3 #define GC_DMA_CTRL_CHAN5_SRC_FIFO_MODE_MASK 0x8 #define GC_DMA_CTRL_CHAN5_SRC_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN5_SRC_FIFO_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN5_SRC_FIFO_MODE_OFFSET 0x608 #define GC_DMA_CTRL_CHAN5_DST_FIFO_MODE_LSB 0x4 #define GC_DMA_CTRL_CHAN5_DST_FIFO_MODE_MASK 0x10 #define GC_DMA_CTRL_CHAN5_DST_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN5_DST_FIFO_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN5_DST_FIFO_MODE_OFFSET 0x608 #define GC_DMA_CTRL_CHAN5_NCHK_EMPTY_LSB 0x5 #define GC_DMA_CTRL_CHAN5_NCHK_EMPTY_MASK 0x20 #define GC_DMA_CTRL_CHAN5_NCHK_EMPTY_SIZE 0x1 #define GC_DMA_CTRL_CHAN5_NCHK_EMPTY_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN5_NCHK_EMPTY_OFFSET 0x608 #define GC_DMA_CTRL_CHAN5_NCHK_FULL_LSB 0x6 #define GC_DMA_CTRL_CHAN5_NCHK_FULL_MASK 0x40 #define GC_DMA_CTRL_CHAN5_NCHK_FULL_SIZE 0x1 #define GC_DMA_CTRL_CHAN5_NCHK_FULL_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN5_NCHK_FULL_OFFSET 0x608 #define GC_DMA_CTRL_CHAN5_SRC_EMPTY_VECTOR_BIT_LSB 0x7 #define GC_DMA_CTRL_CHAN5_SRC_EMPTY_VECTOR_BIT_MASK 0x380 #define GC_DMA_CTRL_CHAN5_SRC_EMPTY_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN5_SRC_EMPTY_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN5_SRC_EMPTY_VECTOR_BIT_OFFSET 0x608 #define GC_DMA_CTRL_CHAN5_DST_FULL_VECTOR_BIT_LSB 0xa #define GC_DMA_CTRL_CHAN5_DST_FULL_VECTOR_BIT_MASK 0x1c00 #define GC_DMA_CTRL_CHAN5_DST_FULL_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN5_DST_FULL_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN5_DST_FULL_VECTOR_BIT_OFFSET 0x608 #define GC_DMA_FSM_STATE_CHAN5_IDLE_LSB 0x0 #define GC_DMA_FSM_STATE_CHAN5_IDLE_MASK 0x1 #define GC_DMA_FSM_STATE_CHAN5_IDLE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN5_IDLE_DEFAULT 0x1 #define GC_DMA_FSM_STATE_CHAN5_IDLE_OFFSET 0x628 #define GC_DMA_FSM_STATE_CHAN5_BID_READ_LSB 0x1 #define GC_DMA_FSM_STATE_CHAN5_BID_READ_MASK 0x2 #define GC_DMA_FSM_STATE_CHAN5_BID_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN5_BID_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN5_BID_READ_OFFSET 0x628 #define GC_DMA_FSM_STATE_CHAN5_BID_WRITE_LSB 0x2 #define GC_DMA_FSM_STATE_CHAN5_BID_WRITE_MASK 0x4 #define GC_DMA_FSM_STATE_CHAN5_BID_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN5_BID_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN5_BID_WRITE_OFFSET 0x628 #define GC_DMA_FSM_STATE_CHAN5_CHECK_EMPTY_LSB 0x3 #define GC_DMA_FSM_STATE_CHAN5_CHECK_EMPTY_MASK 0x8 #define GC_DMA_FSM_STATE_CHAN5_CHECK_EMPTY_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN5_CHECK_EMPTY_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN5_CHECK_EMPTY_OFFSET 0x628 #define GC_DMA_FSM_STATE_CHAN5_CHECK_FULL_LSB 0x4 #define GC_DMA_FSM_STATE_CHAN5_CHECK_FULL_MASK 0x10 #define GC_DMA_FSM_STATE_CHAN5_CHECK_FULL_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN5_CHECK_FULL_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN5_CHECK_FULL_OFFSET 0x628 #define GC_DMA_FSM_STATE_CHAN5_READ_LSB 0x5 #define GC_DMA_FSM_STATE_CHAN5_READ_MASK 0x20 #define GC_DMA_FSM_STATE_CHAN5_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN5_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN5_READ_OFFSET 0x628 #define GC_DMA_FSM_STATE_CHAN5_WRITE_LSB 0x6 #define GC_DMA_FSM_STATE_CHAN5_WRITE_MASK 0x40 #define GC_DMA_FSM_STATE_CHAN5_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN5_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN5_WRITE_OFFSET 0x628 #define GC_DMA_FSM_STATE_CHAN5_ERROR_LSB 0x7 #define GC_DMA_FSM_STATE_CHAN5_ERROR_MASK 0x80 #define GC_DMA_FSM_STATE_CHAN5_ERROR_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN5_ERROR_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN5_ERROR_OFFSET 0x628 #define GC_DMA_FSM_STATE_CHAN5_PAUSE_LSB 0x8 #define GC_DMA_FSM_STATE_CHAN5_PAUSE_MASK 0x100 #define GC_DMA_FSM_STATE_CHAN5_PAUSE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN5_PAUSE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN5_PAUSE_OFFSET 0x628 #define GC_DMA_CTRL_CHAN6_CLR_ERROR_LSB 0x0 #define GC_DMA_CTRL_CHAN6_CLR_ERROR_MASK 0x1 #define GC_DMA_CTRL_CHAN6_CLR_ERROR_SIZE 0x1 #define GC_DMA_CTRL_CHAN6_CLR_ERROR_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN6_CLR_ERROR_OFFSET 0x708 #define GC_DMA_CTRL_CHAN6_BYTE_NONWORD_MODE_LSB 0x1 #define GC_DMA_CTRL_CHAN6_BYTE_NONWORD_MODE_MASK 0x2 #define GC_DMA_CTRL_CHAN6_BYTE_NONWORD_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN6_BYTE_NONWORD_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN6_BYTE_NONWORD_MODE_OFFSET 0x708 #define GC_DMA_CTRL_CHAN6_WRAP_MODE_LSB 0x2 #define GC_DMA_CTRL_CHAN6_WRAP_MODE_MASK 0x4 #define GC_DMA_CTRL_CHAN6_WRAP_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN6_WRAP_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN6_WRAP_MODE_OFFSET 0x708 #define GC_DMA_CTRL_CHAN6_SRC_FIFO_MODE_LSB 0x3 #define GC_DMA_CTRL_CHAN6_SRC_FIFO_MODE_MASK 0x8 #define GC_DMA_CTRL_CHAN6_SRC_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN6_SRC_FIFO_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN6_SRC_FIFO_MODE_OFFSET 0x708 #define GC_DMA_CTRL_CHAN6_DST_FIFO_MODE_LSB 0x4 #define GC_DMA_CTRL_CHAN6_DST_FIFO_MODE_MASK 0x10 #define GC_DMA_CTRL_CHAN6_DST_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN6_DST_FIFO_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN6_DST_FIFO_MODE_OFFSET 0x708 #define GC_DMA_CTRL_CHAN6_NCHK_EMPTY_LSB 0x5 #define GC_DMA_CTRL_CHAN6_NCHK_EMPTY_MASK 0x20 #define GC_DMA_CTRL_CHAN6_NCHK_EMPTY_SIZE 0x1 #define GC_DMA_CTRL_CHAN6_NCHK_EMPTY_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN6_NCHK_EMPTY_OFFSET 0x708 #define GC_DMA_CTRL_CHAN6_NCHK_FULL_LSB 0x6 #define GC_DMA_CTRL_CHAN6_NCHK_FULL_MASK 0x40 #define GC_DMA_CTRL_CHAN6_NCHK_FULL_SIZE 0x1 #define GC_DMA_CTRL_CHAN6_NCHK_FULL_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN6_NCHK_FULL_OFFSET 0x708 #define GC_DMA_CTRL_CHAN6_SRC_EMPTY_VECTOR_BIT_LSB 0x7 #define GC_DMA_CTRL_CHAN6_SRC_EMPTY_VECTOR_BIT_MASK 0x380 #define GC_DMA_CTRL_CHAN6_SRC_EMPTY_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN6_SRC_EMPTY_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN6_SRC_EMPTY_VECTOR_BIT_OFFSET 0x708 #define GC_DMA_CTRL_CHAN6_DST_FULL_VECTOR_BIT_LSB 0xa #define GC_DMA_CTRL_CHAN6_DST_FULL_VECTOR_BIT_MASK 0x1c00 #define GC_DMA_CTRL_CHAN6_DST_FULL_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN6_DST_FULL_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN6_DST_FULL_VECTOR_BIT_OFFSET 0x708 #define GC_DMA_FSM_STATE_CHAN6_IDLE_LSB 0x0 #define GC_DMA_FSM_STATE_CHAN6_IDLE_MASK 0x1 #define GC_DMA_FSM_STATE_CHAN6_IDLE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN6_IDLE_DEFAULT 0x1 #define GC_DMA_FSM_STATE_CHAN6_IDLE_OFFSET 0x728 #define GC_DMA_FSM_STATE_CHAN6_BID_READ_LSB 0x1 #define GC_DMA_FSM_STATE_CHAN6_BID_READ_MASK 0x2 #define GC_DMA_FSM_STATE_CHAN6_BID_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN6_BID_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN6_BID_READ_OFFSET 0x728 #define GC_DMA_FSM_STATE_CHAN6_BID_WRITE_LSB 0x2 #define GC_DMA_FSM_STATE_CHAN6_BID_WRITE_MASK 0x4 #define GC_DMA_FSM_STATE_CHAN6_BID_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN6_BID_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN6_BID_WRITE_OFFSET 0x728 #define GC_DMA_FSM_STATE_CHAN6_CHECK_EMPTY_LSB 0x3 #define GC_DMA_FSM_STATE_CHAN6_CHECK_EMPTY_MASK 0x8 #define GC_DMA_FSM_STATE_CHAN6_CHECK_EMPTY_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN6_CHECK_EMPTY_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN6_CHECK_EMPTY_OFFSET 0x728 #define GC_DMA_FSM_STATE_CHAN6_CHECK_FULL_LSB 0x4 #define GC_DMA_FSM_STATE_CHAN6_CHECK_FULL_MASK 0x10 #define GC_DMA_FSM_STATE_CHAN6_CHECK_FULL_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN6_CHECK_FULL_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN6_CHECK_FULL_OFFSET 0x728 #define GC_DMA_FSM_STATE_CHAN6_READ_LSB 0x5 #define GC_DMA_FSM_STATE_CHAN6_READ_MASK 0x20 #define GC_DMA_FSM_STATE_CHAN6_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN6_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN6_READ_OFFSET 0x728 #define GC_DMA_FSM_STATE_CHAN6_WRITE_LSB 0x6 #define GC_DMA_FSM_STATE_CHAN6_WRITE_MASK 0x40 #define GC_DMA_FSM_STATE_CHAN6_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN6_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN6_WRITE_OFFSET 0x728 #define GC_DMA_FSM_STATE_CHAN6_ERROR_LSB 0x7 #define GC_DMA_FSM_STATE_CHAN6_ERROR_MASK 0x80 #define GC_DMA_FSM_STATE_CHAN6_ERROR_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN6_ERROR_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN6_ERROR_OFFSET 0x728 #define GC_DMA_FSM_STATE_CHAN6_PAUSE_LSB 0x8 #define GC_DMA_FSM_STATE_CHAN6_PAUSE_MASK 0x100 #define GC_DMA_FSM_STATE_CHAN6_PAUSE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN6_PAUSE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN6_PAUSE_OFFSET 0x728 #define GC_DMA_CTRL_CHAN7_CLR_ERROR_LSB 0x0 #define GC_DMA_CTRL_CHAN7_CLR_ERROR_MASK 0x1 #define GC_DMA_CTRL_CHAN7_CLR_ERROR_SIZE 0x1 #define GC_DMA_CTRL_CHAN7_CLR_ERROR_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN7_CLR_ERROR_OFFSET 0x808 #define GC_DMA_CTRL_CHAN7_BYTE_NONWORD_MODE_LSB 0x1 #define GC_DMA_CTRL_CHAN7_BYTE_NONWORD_MODE_MASK 0x2 #define GC_DMA_CTRL_CHAN7_BYTE_NONWORD_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN7_BYTE_NONWORD_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN7_BYTE_NONWORD_MODE_OFFSET 0x808 #define GC_DMA_CTRL_CHAN7_WRAP_MODE_LSB 0x2 #define GC_DMA_CTRL_CHAN7_WRAP_MODE_MASK 0x4 #define GC_DMA_CTRL_CHAN7_WRAP_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN7_WRAP_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN7_WRAP_MODE_OFFSET 0x808 #define GC_DMA_CTRL_CHAN7_SRC_FIFO_MODE_LSB 0x3 #define GC_DMA_CTRL_CHAN7_SRC_FIFO_MODE_MASK 0x8 #define GC_DMA_CTRL_CHAN7_SRC_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN7_SRC_FIFO_MODE_DEFAULT 0x1 #define GC_DMA_CTRL_CHAN7_SRC_FIFO_MODE_OFFSET 0x808 #define GC_DMA_CTRL_CHAN7_DST_FIFO_MODE_LSB 0x4 #define GC_DMA_CTRL_CHAN7_DST_FIFO_MODE_MASK 0x10 #define GC_DMA_CTRL_CHAN7_DST_FIFO_MODE_SIZE 0x1 #define GC_DMA_CTRL_CHAN7_DST_FIFO_MODE_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN7_DST_FIFO_MODE_OFFSET 0x808 #define GC_DMA_CTRL_CHAN7_NCHK_EMPTY_LSB 0x5 #define GC_DMA_CTRL_CHAN7_NCHK_EMPTY_MASK 0x20 #define GC_DMA_CTRL_CHAN7_NCHK_EMPTY_SIZE 0x1 #define GC_DMA_CTRL_CHAN7_NCHK_EMPTY_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN7_NCHK_EMPTY_OFFSET 0x808 #define GC_DMA_CTRL_CHAN7_NCHK_FULL_LSB 0x6 #define GC_DMA_CTRL_CHAN7_NCHK_FULL_MASK 0x40 #define GC_DMA_CTRL_CHAN7_NCHK_FULL_SIZE 0x1 #define GC_DMA_CTRL_CHAN7_NCHK_FULL_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN7_NCHK_FULL_OFFSET 0x808 #define GC_DMA_CTRL_CHAN7_SRC_EMPTY_VECTOR_BIT_LSB 0x7 #define GC_DMA_CTRL_CHAN7_SRC_EMPTY_VECTOR_BIT_MASK 0x380 #define GC_DMA_CTRL_CHAN7_SRC_EMPTY_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN7_SRC_EMPTY_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN7_SRC_EMPTY_VECTOR_BIT_OFFSET 0x808 #define GC_DMA_CTRL_CHAN7_DST_FULL_VECTOR_BIT_LSB 0xa #define GC_DMA_CTRL_CHAN7_DST_FULL_VECTOR_BIT_MASK 0x1c00 #define GC_DMA_CTRL_CHAN7_DST_FULL_VECTOR_BIT_SIZE 0x3 #define GC_DMA_CTRL_CHAN7_DST_FULL_VECTOR_BIT_DEFAULT 0x0 #define GC_DMA_CTRL_CHAN7_DST_FULL_VECTOR_BIT_OFFSET 0x808 #define GC_DMA_FSM_STATE_CHAN7_IDLE_LSB 0x0 #define GC_DMA_FSM_STATE_CHAN7_IDLE_MASK 0x1 #define GC_DMA_FSM_STATE_CHAN7_IDLE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN7_IDLE_DEFAULT 0x1 #define GC_DMA_FSM_STATE_CHAN7_IDLE_OFFSET 0x828 #define GC_DMA_FSM_STATE_CHAN7_BID_READ_LSB 0x1 #define GC_DMA_FSM_STATE_CHAN7_BID_READ_MASK 0x2 #define GC_DMA_FSM_STATE_CHAN7_BID_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN7_BID_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN7_BID_READ_OFFSET 0x828 #define GC_DMA_FSM_STATE_CHAN7_BID_WRITE_LSB 0x2 #define GC_DMA_FSM_STATE_CHAN7_BID_WRITE_MASK 0x4 #define GC_DMA_FSM_STATE_CHAN7_BID_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN7_BID_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN7_BID_WRITE_OFFSET 0x828 #define GC_DMA_FSM_STATE_CHAN7_CHECK_EMPTY_LSB 0x3 #define GC_DMA_FSM_STATE_CHAN7_CHECK_EMPTY_MASK 0x8 #define GC_DMA_FSM_STATE_CHAN7_CHECK_EMPTY_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN7_CHECK_EMPTY_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN7_CHECK_EMPTY_OFFSET 0x828 #define GC_DMA_FSM_STATE_CHAN7_CHECK_FULL_LSB 0x4 #define GC_DMA_FSM_STATE_CHAN7_CHECK_FULL_MASK 0x10 #define GC_DMA_FSM_STATE_CHAN7_CHECK_FULL_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN7_CHECK_FULL_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN7_CHECK_FULL_OFFSET 0x828 #define GC_DMA_FSM_STATE_CHAN7_READ_LSB 0x5 #define GC_DMA_FSM_STATE_CHAN7_READ_MASK 0x20 #define GC_DMA_FSM_STATE_CHAN7_READ_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN7_READ_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN7_READ_OFFSET 0x828 #define GC_DMA_FSM_STATE_CHAN7_WRITE_LSB 0x6 #define GC_DMA_FSM_STATE_CHAN7_WRITE_MASK 0x40 #define GC_DMA_FSM_STATE_CHAN7_WRITE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN7_WRITE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN7_WRITE_OFFSET 0x828 #define GC_DMA_FSM_STATE_CHAN7_ERROR_LSB 0x7 #define GC_DMA_FSM_STATE_CHAN7_ERROR_MASK 0x80 #define GC_DMA_FSM_STATE_CHAN7_ERROR_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN7_ERROR_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN7_ERROR_OFFSET 0x828 #define GC_DMA_FSM_STATE_CHAN7_PAUSE_LSB 0x8 #define GC_DMA_FSM_STATE_CHAN7_PAUSE_MASK 0x100 #define GC_DMA_FSM_STATE_CHAN7_PAUSE_SIZE 0x1 #define GC_DMA_FSM_STATE_CHAN7_PAUSE_DEFAULT 0x0 #define GC_DMA_FSM_STATE_CHAN7_PAUSE_OFFSET 0x828 #define GC_FLASH_FSH_TRANS_OFFSET_LSB 0x0 #define GC_FLASH_FSH_TRANS_OFFSET_MASK 0xffff #define GC_FLASH_FSH_TRANS_OFFSET_SIZE 0x10 #define GC_FLASH_FSH_TRANS_OFFSET_DEFAULT 0x0 #define GC_FLASH_FSH_TRANS_OFFSET_OFFSET 0x8 #define GC_FLASH_FSH_TRANS_MAINB_LSB 0x10 #define GC_FLASH_FSH_TRANS_MAINB_MASK 0x10000 #define GC_FLASH_FSH_TRANS_MAINB_SIZE 0x1 #define GC_FLASH_FSH_TRANS_MAINB_DEFAULT 0x0 #define GC_FLASH_FSH_TRANS_MAINB_OFFSET 0x8 #define GC_FLASH_FSH_TRANS_SIZE_LSB 0x11 #define GC_FLASH_FSH_TRANS_SIZE_MASK 0x3e0000 #define GC_FLASH_FSH_TRANS_SIZE_SIZE 0x5 #define GC_FLASH_FSH_TRANS_SIZE_DEFAULT 0x0 #define GC_FLASH_FSH_TRANS_SIZE_OFFSET 0x8 #define GC_FLASH_FSH_PROTECT_INFO1_ERASE_LSB 0x0 #define GC_FLASH_FSH_PROTECT_INFO1_ERASE_MASK 0x1 #define GC_FLASH_FSH_PROTECT_INFO1_ERASE_SIZE 0x1 #define GC_FLASH_FSH_PROTECT_INFO1_ERASE_DEFAULT 0x0 #define GC_FLASH_FSH_PROTECT_INFO1_ERASE_OFFSET 0xc #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION0_LSB 0x1 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION0_MASK 0x2 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION0_SIZE 0x1 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION0_DEFAULT 0x0 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION0_OFFSET 0xc #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION1_LSB 0x2 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION1_MASK 0x4 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION1_SIZE 0x1 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION1_DEFAULT 0x0 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION1_OFFSET 0xc #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION2_LSB 0x3 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION2_MASK 0x8 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION2_SIZE 0x1 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION2_DEFAULT 0x0 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION2_OFFSET 0xc #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION3_LSB 0x4 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION3_MASK 0x10 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION3_SIZE 0x1 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION3_DEFAULT 0x0 #define GC_FLASH_FSH_PROTECT_INFO1_PROG_REGION3_OFFSET 0xc #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION0_LSB 0x5 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION0_MASK 0x20 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION0_SIZE 0x1 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION0_DEFAULT 0x0 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION0_OFFSET 0xc #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION1_LSB 0x6 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION1_MASK 0x40 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION1_SIZE 0x1 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION1_DEFAULT 0x0 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION1_OFFSET 0xc #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION2_LSB 0x7 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION2_MASK 0x80 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION2_SIZE 0x1 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION2_DEFAULT 0x0 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION2_OFFSET 0xc #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION3_LSB 0x8 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION3_MASK 0x100 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION3_SIZE 0x1 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION3_DEFAULT 0x0 #define GC_FLASH_FSH_PROTECT_INFO1_READ_REGION3_OFFSET 0xc #define GC_FLASH_FSH_ICTRL_EDONE_LSB 0x0 #define GC_FLASH_FSH_ICTRL_EDONE_MASK 0x1 #define GC_FLASH_FSH_ICTRL_EDONE_SIZE 0x1 #define GC_FLASH_FSH_ICTRL_EDONE_DEFAULT 0x0 #define GC_FLASH_FSH_ICTRL_EDONE_OFFSET 0x14 #define GC_FLASH_FSH_ICTRL_PDONE_LSB 0x1 #define GC_FLASH_FSH_ICTRL_PDONE_MASK 0x2 #define GC_FLASH_FSH_ICTRL_PDONE_SIZE 0x1 #define GC_FLASH_FSH_ICTRL_PDONE_DEFAULT 0x0 #define GC_FLASH_FSH_ICTRL_PDONE_OFFSET 0x14 #define GC_FLASH_FSH_ISTATE_EDONE_LSB 0x0 #define GC_FLASH_FSH_ISTATE_EDONE_MASK 0x1 #define GC_FLASH_FSH_ISTATE_EDONE_SIZE 0x1 #define GC_FLASH_FSH_ISTATE_EDONE_DEFAULT 0x0 #define GC_FLASH_FSH_ISTATE_EDONE_OFFSET 0x18 #define GC_FLASH_FSH_ISTATE_PDONE_LSB 0x1 #define GC_FLASH_FSH_ISTATE_PDONE_MASK 0x2 #define GC_FLASH_FSH_ISTATE_PDONE_SIZE 0x1 #define GC_FLASH_FSH_ISTATE_PDONE_DEFAULT 0x0 #define GC_FLASH_FSH_ISTATE_PDONE_OFFSET 0x18 #define GC_FLASH_FSH_OVRD_SIGVAL_IFREN_LSB 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_IFREN_MASK 0x1 #define GC_FLASH_FSH_OVRD_SIGVAL_IFREN_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGVAL_IFREN_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_IFREN_OFFSET 0x2c #define GC_FLASH_FSH_OVRD_SIGVAL_IFREN1_LSB 0x1 #define GC_FLASH_FSH_OVRD_SIGVAL_IFREN1_MASK 0x2 #define GC_FLASH_FSH_OVRD_SIGVAL_IFREN1_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGVAL_IFREN1_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_IFREN1_OFFSET 0x2c #define GC_FLASH_FSH_OVRD_SIGVAL_REDEN_LSB 0x2 #define GC_FLASH_FSH_OVRD_SIGVAL_REDEN_MASK 0x4 #define GC_FLASH_FSH_OVRD_SIGVAL_REDEN_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGVAL_REDEN_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_REDEN_OFFSET 0x2c #define GC_FLASH_FSH_OVRD_SIGVAL_TMR_LSB 0x3 #define GC_FLASH_FSH_OVRD_SIGVAL_TMR_MASK 0x8 #define GC_FLASH_FSH_OVRD_SIGVAL_TMR_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGVAL_TMR_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_TMR_OFFSET 0x2c #define GC_FLASH_FSH_OVRD_SIGVAL_XE_LSB 0x4 #define GC_FLASH_FSH_OVRD_SIGVAL_XE_MASK 0x10 #define GC_FLASH_FSH_OVRD_SIGVAL_XE_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGVAL_XE_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_XE_OFFSET 0x2c #define GC_FLASH_FSH_OVRD_SIGVAL_YE_LSB 0x5 #define GC_FLASH_FSH_OVRD_SIGVAL_YE_MASK 0x20 #define GC_FLASH_FSH_OVRD_SIGVAL_YE_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGVAL_YE_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_YE_OFFSET 0x2c #define GC_FLASH_FSH_OVRD_SIGVAL_SE_LSB 0x6 #define GC_FLASH_FSH_OVRD_SIGVAL_SE_MASK 0x40 #define GC_FLASH_FSH_OVRD_SIGVAL_SE_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGVAL_SE_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_SE_OFFSET 0x2c #define GC_FLASH_FSH_OVRD_SIGVAL_ERASE_LSB 0x7 #define GC_FLASH_FSH_OVRD_SIGVAL_ERASE_MASK 0x80 #define GC_FLASH_FSH_OVRD_SIGVAL_ERASE_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGVAL_ERASE_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_ERASE_OFFSET 0x2c #define GC_FLASH_FSH_OVRD_SIGVAL_PROG_LSB 0x8 #define GC_FLASH_FSH_OVRD_SIGVAL_PROG_MASK 0x100 #define GC_FLASH_FSH_OVRD_SIGVAL_PROG_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGVAL_PROG_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_PROG_OFFSET 0x2c #define GC_FLASH_FSH_OVRD_SIGVAL_MAS1_LSB 0x9 #define GC_FLASH_FSH_OVRD_SIGVAL_MAS1_MASK 0x200 #define GC_FLASH_FSH_OVRD_SIGVAL_MAS1_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGVAL_MAS1_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_MAS1_OFFSET 0x2c #define GC_FLASH_FSH_OVRD_SIGVAL_NVSTR_LSB 0xa #define GC_FLASH_FSH_OVRD_SIGVAL_NVSTR_MASK 0x400 #define GC_FLASH_FSH_OVRD_SIGVAL_NVSTR_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGVAL_NVSTR_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_NVSTR_OFFSET 0x2c #define GC_FLASH_FSH_OVRD_SIGVAL_PV_LSB 0xb #define GC_FLASH_FSH_OVRD_SIGVAL_PV_MASK 0x800 #define GC_FLASH_FSH_OVRD_SIGVAL_PV_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGVAL_PV_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_PV_OFFSET 0x2c #define GC_FLASH_FSH_OVRD_SIGVAL_EV_LSB 0xc #define GC_FLASH_FSH_OVRD_SIGVAL_EV_MASK 0x1000 #define GC_FLASH_FSH_OVRD_SIGVAL_EV_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGVAL_EV_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGVAL_EV_OFFSET 0x2c #define GC_FLASH_FSH_OVRD_SIGEN_IFREN_LSB 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_IFREN_MASK 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_IFREN_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_IFREN_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_IFREN_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_IFREN1_LSB 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_IFREN1_MASK 0x2 #define GC_FLASH_FSH_OVRD_SIGEN_IFREN1_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_IFREN1_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_IFREN1_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_REDEN_LSB 0x2 #define GC_FLASH_FSH_OVRD_SIGEN_REDEN_MASK 0x4 #define GC_FLASH_FSH_OVRD_SIGEN_REDEN_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_REDEN_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_REDEN_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_TMR_LSB 0x3 #define GC_FLASH_FSH_OVRD_SIGEN_TMR_MASK 0x8 #define GC_FLASH_FSH_OVRD_SIGEN_TMR_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_TMR_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_TMR_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_XE_LSB 0x4 #define GC_FLASH_FSH_OVRD_SIGEN_XE_MASK 0x10 #define GC_FLASH_FSH_OVRD_SIGEN_XE_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_XE_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_XE_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_YE_LSB 0x5 #define GC_FLASH_FSH_OVRD_SIGEN_YE_MASK 0x20 #define GC_FLASH_FSH_OVRD_SIGEN_YE_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_YE_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_YE_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_SE_LSB 0x6 #define GC_FLASH_FSH_OVRD_SIGEN_SE_MASK 0x40 #define GC_FLASH_FSH_OVRD_SIGEN_SE_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_SE_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_SE_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_ERASE_LSB 0x7 #define GC_FLASH_FSH_OVRD_SIGEN_ERASE_MASK 0x80 #define GC_FLASH_FSH_OVRD_SIGEN_ERASE_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_ERASE_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_ERASE_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_PROG_LSB 0x8 #define GC_FLASH_FSH_OVRD_SIGEN_PROG_MASK 0x100 #define GC_FLASH_FSH_OVRD_SIGEN_PROG_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_PROG_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_PROG_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_MAS1_LSB 0x9 #define GC_FLASH_FSH_OVRD_SIGEN_MAS1_MASK 0x200 #define GC_FLASH_FSH_OVRD_SIGEN_MAS1_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_MAS1_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_MAS1_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_NVSTR_LSB 0xa #define GC_FLASH_FSH_OVRD_SIGEN_NVSTR_MASK 0x400 #define GC_FLASH_FSH_OVRD_SIGEN_NVSTR_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_NVSTR_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_NVSTR_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_PV_LSB 0xb #define GC_FLASH_FSH_OVRD_SIGEN_PV_MASK 0x800 #define GC_FLASH_FSH_OVRD_SIGEN_PV_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_PV_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_PV_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_EV_LSB 0xc #define GC_FLASH_FSH_OVRD_SIGEN_EV_MASK 0x1000 #define GC_FLASH_FSH_OVRD_SIGEN_EV_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_EV_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_EV_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_DIN_LSB 0xd #define GC_FLASH_FSH_OVRD_SIGEN_DIN_MASK 0x2000 #define GC_FLASH_FSH_OVRD_SIGEN_DIN_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_DIN_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_DIN_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_OFFSET_LSB 0xe #define GC_FLASH_FSH_OVRD_SIGEN_OFFSET_MASK 0x4000 #define GC_FLASH_FSH_OVRD_SIGEN_OFFSET_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_OFFSET_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_OFFSET_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_DOUT_LSB 0xf #define GC_FLASH_FSH_OVRD_SIGEN_DOUT_MASK 0x8000 #define GC_FLASH_FSH_OVRD_SIGEN_DOUT_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_DOUT_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_DOUT_OFFSET 0x30 #define GC_FLASH_FSH_OVRD_SIGEN_TC_LSB 0x10 #define GC_FLASH_FSH_OVRD_SIGEN_TC_MASK 0x10000 #define GC_FLASH_FSH_OVRD_SIGEN_TC_SIZE 0x1 #define GC_FLASH_FSH_OVRD_SIGEN_TC_DEFAULT 0x0 #define GC_FLASH_FSH_OVRD_SIGEN_TC_OFFSET 0x30 #define GC_FLASH_FSH_REDUN0_EN_LSB 0x0 #define GC_FLASH_FSH_REDUN0_EN_MASK 0x1 #define GC_FLASH_FSH_REDUN0_EN_SIZE 0x1 #define GC_FLASH_FSH_REDUN0_EN_DEFAULT 0x0 #define GC_FLASH_FSH_REDUN0_EN_OFFSET 0xcc #define GC_FLASH_FSH_REDUN0_REMAP_LSB 0x1 #define GC_FLASH_FSH_REDUN0_REMAP_MASK 0xfe #define GC_FLASH_FSH_REDUN0_REMAP_SIZE 0x7 #define GC_FLASH_FSH_REDUN0_REMAP_DEFAULT 0x0 #define GC_FLASH_FSH_REDUN0_REMAP_OFFSET 0xcc #define GC_FLASH_FSH_REDUN1_EN_LSB 0x0 #define GC_FLASH_FSH_REDUN1_EN_MASK 0x1 #define GC_FLASH_FSH_REDUN1_EN_SIZE 0x1 #define GC_FLASH_FSH_REDUN1_EN_DEFAULT 0x0 #define GC_FLASH_FSH_REDUN1_EN_OFFSET 0xd0 #define GC_FLASH_FSH_REDUN1_REMAP_LSB 0x1 #define GC_FLASH_FSH_REDUN1_REMAP_MASK 0xfe #define GC_FLASH_FSH_REDUN1_REMAP_SIZE 0x7 #define GC_FLASH_FSH_REDUN1_REMAP_DEFAULT 0x0 #define GC_FLASH_FSH_REDUN1_REMAP_OFFSET 0xd0 #define GC_FLASH_FSH_DBG_STATE_LSB 0x0 #define GC_FLASH_FSH_DBG_STATE_MASK 0xf #define GC_FLASH_FSH_DBG_STATE_SIZE 0x4 #define GC_FLASH_FSH_DBG_STATE_DEFAULT 0x0 #define GC_FLASH_FSH_DBG_STATE_OFFSET 0x17c #define GC_FLASH_FSH_ITOP_PDONEINT_LSB 0x0 #define GC_FLASH_FSH_ITOP_PDONEINT_MASK 0x1 #define GC_FLASH_FSH_ITOP_PDONEINT_SIZE 0x1 #define GC_FLASH_FSH_ITOP_PDONEINT_DEFAULT 0x0 #define GC_FLASH_FSH_ITOP_PDONEINT_OFFSET 0xf04 #define GC_FLASH_FSH_ITOP_EDONEINT_LSB 0x1 #define GC_FLASH_FSH_ITOP_EDONEINT_MASK 0x2 #define GC_FLASH_FSH_ITOP_EDONEINT_SIZE 0x1 #define GC_FLASH_FSH_ITOP_EDONEINT_DEFAULT 0x0 #define GC_FLASH_FSH_ITOP_EDONEINT_OFFSET 0xf04 #define GC_FUSE_STATUS_VALID_LSB 0x0 #define GC_FUSE_STATUS_VALID_MASK 0x1 #define GC_FUSE_STATUS_VALID_SIZE 0x1 #define GC_FUSE_STATUS_VALID_DEFAULT 0x0 #define GC_FUSE_STATUS_VALID_OFFSET 0x0 #define GC_FUSE_STATUS_DEFAULTS_VALID_LSB 0x1 #define GC_FUSE_STATUS_DEFAULTS_VALID_MASK 0x2 #define GC_FUSE_STATUS_DEFAULTS_VALID_SIZE 0x1 #define GC_FUSE_STATUS_DEFAULTS_VALID_DEFAULT 0x0 #define GC_FUSE_STATUS_DEFAULTS_VALID_OFFSET 0x0 #define GC_FUSE_STATUS_READ_DONE_LSB 0x2 #define GC_FUSE_STATUS_READ_DONE_MASK 0x4 #define GC_FUSE_STATUS_READ_DONE_SIZE 0x1 #define GC_FUSE_STATUS_READ_DONE_DEFAULT 0x0 #define GC_FUSE_STATUS_READ_DONE_OFFSET 0x0 #define GC_FUSE_STATUS_READ_DONE_ERR_LSB 0x3 #define GC_FUSE_STATUS_READ_DONE_ERR_MASK 0x8 #define GC_FUSE_STATUS_READ_DONE_ERR_SIZE 0x1 #define GC_FUSE_STATUS_READ_DONE_ERR_DEFAULT 0x0 #define GC_FUSE_STATUS_READ_DONE_ERR_OFFSET 0x0 #define GC_FUSE_STATUS_PROG_VERIFY_DONE_LSB 0x4 #define GC_FUSE_STATUS_PROG_VERIFY_DONE_MASK 0x10 #define GC_FUSE_STATUS_PROG_VERIFY_DONE_SIZE 0x1 #define GC_FUSE_STATUS_PROG_VERIFY_DONE_DEFAULT 0x0 #define GC_FUSE_STATUS_PROG_VERIFY_DONE_OFFSET 0x0 #define GC_FUSE_STATUS_PROG_VERIFY_DONE_ERR_LSB 0x5 #define GC_FUSE_STATUS_PROG_VERIFY_DONE_ERR_MASK 0x20 #define GC_FUSE_STATUS_PROG_VERIFY_DONE_ERR_SIZE 0x1 #define GC_FUSE_STATUS_PROG_VERIFY_DONE_ERR_DEFAULT 0x0 #define GC_FUSE_STATUS_PROG_VERIFY_DONE_ERR_OFFSET 0x0 #define GC_FUSE_STATUS_OVERRIDE_DONE_LSB 0x6 #define GC_FUSE_STATUS_OVERRIDE_DONE_MASK 0x40 #define GC_FUSE_STATUS_OVERRIDE_DONE_SIZE 0x1 #define GC_FUSE_STATUS_OVERRIDE_DONE_DEFAULT 0x0 #define GC_FUSE_STATUS_OVERRIDE_DONE_OFFSET 0x0 #define GC_FUSE_STATUS_BUSY_LSB 0x7 #define GC_FUSE_STATUS_BUSY_MASK 0x80 #define GC_FUSE_STATUS_BUSY_SIZE 0x1 #define GC_FUSE_STATUS_BUSY_DEFAULT 0x0 #define GC_FUSE_STATUS_BUSY_OFFSET 0x0 #define GC_FUSE_FPGA_MODEL_CTRL_ERASE_LSB 0x0 #define GC_FUSE_FPGA_MODEL_CTRL_ERASE_MASK 0x1 #define GC_FUSE_FPGA_MODEL_CTRL_ERASE_SIZE 0x1 #define GC_FUSE_FPGA_MODEL_CTRL_ERASE_DEFAULT 0x0 #define GC_FUSE_FPGA_MODEL_CTRL_ERASE_OFFSET 0x10 #define GC_FUSE_ANTEST_EN_SW0_LSB 0x0 #define GC_FUSE_ANTEST_EN_SW0_MASK 0x1 #define GC_FUSE_ANTEST_EN_SW0_SIZE 0x1 #define GC_FUSE_ANTEST_EN_SW0_DEFAULT 0x0 #define GC_FUSE_ANTEST_EN_SW0_OFFSET 0x28 #define GC_FUSE_ANTEST_EN_SW1_LSB 0x1 #define GC_FUSE_ANTEST_EN_SW1_MASK 0x2 #define GC_FUSE_ANTEST_EN_SW1_SIZE 0x1 #define GC_FUSE_ANTEST_EN_SW1_DEFAULT 0x0 #define GC_FUSE_ANTEST_EN_SW1_OFFSET 0x28 #define GC_FUSE_ANTEST_EN_SW2_LSB 0x2 #define GC_FUSE_ANTEST_EN_SW2_MASK 0x4 #define GC_FUSE_ANTEST_EN_SW2_SIZE 0x1 #define GC_FUSE_ANTEST_EN_SW2_DEFAULT 0x0 #define GC_FUSE_ANTEST_EN_SW2_OFFSET 0x28 #define GC_FUSE_ANTEST_EN_SW3_LSB 0x3 #define GC_FUSE_ANTEST_EN_SW3_MASK 0x8 #define GC_FUSE_ANTEST_EN_SW3_SIZE 0x1 #define GC_FUSE_ANTEST_EN_SW3_DEFAULT 0x0 #define GC_FUSE_ANTEST_EN_SW3_OFFSET 0x28 #define GC_FUSE_VERSION_CHANGE_LSB 0x0 #define GC_FUSE_VERSION_CHANGE_MASK 0xffffff #define GC_FUSE_VERSION_CHANGE_SIZE 0x18 #define GC_FUSE_VERSION_CHANGE_DEFAULT 0x14125 #define GC_FUSE_VERSION_CHANGE_OFFSET 0x2c #define GC_FUSE_VERSION_REVISION_LSB 0x18 #define GC_FUSE_VERSION_REVISION_MASK 0xff000000 #define GC_FUSE_VERSION_REVISION_SIZE 0x8 #define GC_FUSE_VERSION_REVISION_DEFAULT 0x1 #define GC_FUSE_VERSION_REVISION_OFFSET 0x2c #define GC_FUSE_BNK0_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_BNK0_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_BNK0_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_BNK0_INTG_CHKSUM_VAL_DEFAULT 0x0 #define GC_FUSE_BNK0_INTG_CHKSUM_VAL_OFFSET 0x30 #define GC_FUSE_BNK0_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_BNK0_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_BNK0_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_BNK0_INTG_LOCK_VAL_DEFAULT 0x0 #define GC_FUSE_BNK0_INTG_LOCK_VAL_OFFSET 0x34 #define GC_FUSE_DS_GRP0_VAL_LSB 0x0 #define GC_FUSE_DS_GRP0_VAL_MASK 0x1ff #define GC_FUSE_DS_GRP0_VAL_SIZE 0x9 #define GC_FUSE_DS_GRP0_VAL_DEFAULT 0x0 #define GC_FUSE_DS_GRP0_VAL_OFFSET 0x38 #define GC_FUSE_DS_GRP1_VAL_LSB 0x0 #define GC_FUSE_DS_GRP1_VAL_MASK 0x1ff #define GC_FUSE_DS_GRP1_VAL_SIZE 0x9 #define GC_FUSE_DS_GRP1_VAL_DEFAULT 0x0 #define GC_FUSE_DS_GRP1_VAL_OFFSET 0x3c #define GC_FUSE_DS_GRP2_VAL_LSB 0x0 #define GC_FUSE_DS_GRP2_VAL_MASK 0x1ff #define GC_FUSE_DS_GRP2_VAL_SIZE 0x9 #define GC_FUSE_DS_GRP2_VAL_DEFAULT 0x0 #define GC_FUSE_DS_GRP2_VAL_OFFSET 0x40 #define GC_FUSE_DEV_ID0_VAL_LSB 0x0 #define GC_FUSE_DEV_ID0_VAL_MASK 0xffffffff #define GC_FUSE_DEV_ID0_VAL_SIZE 0x20 #define GC_FUSE_DEV_ID0_VAL_DEFAULT 0x0 #define GC_FUSE_DEV_ID0_VAL_OFFSET 0x44 #define GC_FUSE_DEV_ID1_VAL_LSB 0x0 #define GC_FUSE_DEV_ID1_VAL_MASK 0xffffffff #define GC_FUSE_DEV_ID1_VAL_SIZE 0x20 #define GC_FUSE_DEV_ID1_VAL_DEFAULT 0x0 #define GC_FUSE_DEV_ID1_VAL_OFFSET 0x48 #define GC_FUSE_BNK1_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_BNK1_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_BNK1_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_BNK1_INTG_CHKSUM_VAL_DEFAULT 0x0 #define GC_FUSE_BNK1_INTG_CHKSUM_VAL_OFFSET 0x4c #define GC_FUSE_BNK1_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_BNK1_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_BNK1_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_BNK1_INTG_LOCK_VAL_DEFAULT 0x0 #define GC_FUSE_BNK1_INTG_LOCK_VAL_OFFSET 0x50 #define GC_FUSE_LB0_POST_OVRD_VAL_LSB 0x0 #define GC_FUSE_LB0_POST_OVRD_VAL_MASK 0x7 #define GC_FUSE_LB0_POST_OVRD_VAL_SIZE 0x3 #define GC_FUSE_LB0_POST_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_LB0_POST_OVRD_VAL_OFFSET 0x54 #define GC_FUSE_LB0_POST_PATCNT_VAL_LSB 0x0 #define GC_FUSE_LB0_POST_PATCNT_VAL_MASK 0x3 #define GC_FUSE_LB0_POST_PATCNT_VAL_SIZE 0x2 #define GC_FUSE_LB0_POST_PATCNT_VAL_DEFAULT 0x0 #define GC_FUSE_LB0_POST_PATCNT_VAL_OFFSET 0x58 #define GC_FUSE_LB0_POST_WARMUP_OVRD_VAL_LSB 0x0 #define GC_FUSE_LB0_POST_WARMUP_OVRD_VAL_MASK 0x7 #define GC_FUSE_LB0_POST_WARMUP_OVRD_VAL_SIZE 0x3 #define GC_FUSE_LB0_POST_WARMUP_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_LB0_POST_WARMUP_OVRD_VAL_OFFSET 0x5c #define GC_FUSE_LB0_POST_WARMUP_CNT_VAL_LSB 0x0 #define GC_FUSE_LB0_POST_WARMUP_CNT_VAL_MASK 0x3 #define GC_FUSE_LB0_POST_WARMUP_CNT_VAL_SIZE 0x2 #define GC_FUSE_LB0_POST_WARMUP_CNT_VAL_DEFAULT 0x0 #define GC_FUSE_LB0_POST_WARMUP_CNT_VAL_OFFSET 0x60 #define GC_FUSE_LB1_POST_OVRD_VAL_LSB 0x0 #define GC_FUSE_LB1_POST_OVRD_VAL_MASK 0x7 #define GC_FUSE_LB1_POST_OVRD_VAL_SIZE 0x3 #define GC_FUSE_LB1_POST_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_LB1_POST_OVRD_VAL_OFFSET 0x64 #define GC_FUSE_LB1_POST_PATCNT_VAL_LSB 0x0 #define GC_FUSE_LB1_POST_PATCNT_VAL_MASK 0x3 #define GC_FUSE_LB1_POST_PATCNT_VAL_SIZE 0x2 #define GC_FUSE_LB1_POST_PATCNT_VAL_DEFAULT 0x0 #define GC_FUSE_LB1_POST_PATCNT_VAL_OFFSET 0x68 #define GC_FUSE_LB1_POST_WARMUP_OVRD_VAL_LSB 0x0 #define GC_FUSE_LB1_POST_WARMUP_OVRD_VAL_MASK 0x7 #define GC_FUSE_LB1_POST_WARMUP_OVRD_VAL_SIZE 0x3 #define GC_FUSE_LB1_POST_WARMUP_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_LB1_POST_WARMUP_OVRD_VAL_OFFSET 0x6c #define GC_FUSE_LB1_POST_WARMUP_CNT_VAL_LSB 0x0 #define GC_FUSE_LB1_POST_WARMUP_CNT_VAL_MASK 0x3 #define GC_FUSE_LB1_POST_WARMUP_CNT_VAL_SIZE 0x2 #define GC_FUSE_LB1_POST_WARMUP_CNT_VAL_DEFAULT 0x0 #define GC_FUSE_LB1_POST_WARMUP_CNT_VAL_OFFSET 0x70 #define GC_FUSE_LB2_POST_OVRD_VAL_LSB 0x0 #define GC_FUSE_LB2_POST_OVRD_VAL_MASK 0x7 #define GC_FUSE_LB2_POST_OVRD_VAL_SIZE 0x3 #define GC_FUSE_LB2_POST_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_LB2_POST_OVRD_VAL_OFFSET 0x74 #define GC_FUSE_LB2_POST_PATCNT_VAL_LSB 0x0 #define GC_FUSE_LB2_POST_PATCNT_VAL_MASK 0x3 #define GC_FUSE_LB2_POST_PATCNT_VAL_SIZE 0x2 #define GC_FUSE_LB2_POST_PATCNT_VAL_DEFAULT 0x0 #define GC_FUSE_LB2_POST_PATCNT_VAL_OFFSET 0x78 #define GC_FUSE_LB2_POST_WARMUP_OVRD_VAL_LSB 0x0 #define GC_FUSE_LB2_POST_WARMUP_OVRD_VAL_MASK 0x7 #define GC_FUSE_LB2_POST_WARMUP_OVRD_VAL_SIZE 0x3 #define GC_FUSE_LB2_POST_WARMUP_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_LB2_POST_WARMUP_OVRD_VAL_OFFSET 0x7c #define GC_FUSE_LB2_POST_WARMUP_CNT_VAL_LSB 0x0 #define GC_FUSE_LB2_POST_WARMUP_CNT_VAL_MASK 0x3 #define GC_FUSE_LB2_POST_WARMUP_CNT_VAL_SIZE 0x2 #define GC_FUSE_LB2_POST_WARMUP_CNT_VAL_DEFAULT 0x0 #define GC_FUSE_LB2_POST_WARMUP_CNT_VAL_OFFSET 0x80 #define GC_FUSE_LB3_POST_OVRD_VAL_LSB 0x0 #define GC_FUSE_LB3_POST_OVRD_VAL_MASK 0x7 #define GC_FUSE_LB3_POST_OVRD_VAL_SIZE 0x3 #define GC_FUSE_LB3_POST_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_LB3_POST_OVRD_VAL_OFFSET 0x84 #define GC_FUSE_LB3_POST_PATCNT_VAL_LSB 0x0 #define GC_FUSE_LB3_POST_PATCNT_VAL_MASK 0x3 #define GC_FUSE_LB3_POST_PATCNT_VAL_SIZE 0x2 #define GC_FUSE_LB3_POST_PATCNT_VAL_DEFAULT 0x0 #define GC_FUSE_LB3_POST_PATCNT_VAL_OFFSET 0x88 #define GC_FUSE_LB3_POST_WARMUP_OVRD_VAL_LSB 0x0 #define GC_FUSE_LB3_POST_WARMUP_OVRD_VAL_MASK 0x7 #define GC_FUSE_LB3_POST_WARMUP_OVRD_VAL_SIZE 0x3 #define GC_FUSE_LB3_POST_WARMUP_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_LB3_POST_WARMUP_OVRD_VAL_OFFSET 0x8c #define GC_FUSE_LB3_POST_WARMUP_CNT_VAL_LSB 0x0 #define GC_FUSE_LB3_POST_WARMUP_CNT_VAL_MASK 0x3 #define GC_FUSE_LB3_POST_WARMUP_CNT_VAL_SIZE 0x2 #define GC_FUSE_LB3_POST_WARMUP_CNT_VAL_DEFAULT 0x0 #define GC_FUSE_LB3_POST_WARMUP_CNT_VAL_OFFSET 0x90 #define GC_FUSE_LB4_POST_OVRD_VAL_LSB 0x0 #define GC_FUSE_LB4_POST_OVRD_VAL_MASK 0x7 #define GC_FUSE_LB4_POST_OVRD_VAL_SIZE 0x3 #define GC_FUSE_LB4_POST_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_LB4_POST_OVRD_VAL_OFFSET 0x94 #define GC_FUSE_LB4_POST_PATCNT_VAL_LSB 0x0 #define GC_FUSE_LB4_POST_PATCNT_VAL_MASK 0x3 #define GC_FUSE_LB4_POST_PATCNT_VAL_SIZE 0x2 #define GC_FUSE_LB4_POST_PATCNT_VAL_DEFAULT 0x0 #define GC_FUSE_LB4_POST_PATCNT_VAL_OFFSET 0x98 #define GC_FUSE_LB4_POST_WARMUP_OVRD_VAL_LSB 0x0 #define GC_FUSE_LB4_POST_WARMUP_OVRD_VAL_MASK 0x7 #define GC_FUSE_LB4_POST_WARMUP_OVRD_VAL_SIZE 0x3 #define GC_FUSE_LB4_POST_WARMUP_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_LB4_POST_WARMUP_OVRD_VAL_OFFSET 0x9c #define GC_FUSE_LB4_POST_WARMUP_CNT_VAL_LSB 0x0 #define GC_FUSE_LB4_POST_WARMUP_CNT_VAL_MASK 0x3 #define GC_FUSE_LB4_POST_WARMUP_CNT_VAL_SIZE 0x2 #define GC_FUSE_LB4_POST_WARMUP_CNT_VAL_DEFAULT 0x0 #define GC_FUSE_LB4_POST_WARMUP_CNT_VAL_OFFSET 0xa0 #define GC_FUSE_MBIST_POST_SEQ_VAL_LSB 0x0 #define GC_FUSE_MBIST_POST_SEQ_VAL_MASK 0x1ffffff #define GC_FUSE_MBIST_POST_SEQ_VAL_SIZE 0x19 #define GC_FUSE_MBIST_POST_SEQ_VAL_DEFAULT 0x0 #define GC_FUSE_MBIST_POST_SEQ_VAL_OFFSET 0xa4 #define GC_FUSE_LBIST_POST_SEQ_VAL_LSB 0x0 #define GC_FUSE_LBIST_POST_SEQ_VAL_MASK 0x1ffffff #define GC_FUSE_LBIST_POST_SEQ_VAL_SIZE 0x19 #define GC_FUSE_LBIST_POST_SEQ_VAL_DEFAULT 0x0 #define GC_FUSE_LBIST_POST_SEQ_VAL_OFFSET 0xa8 #define GC_FUSE_LBIST_VIA_TAP_DIS_VAL_LSB 0x0 #define GC_FUSE_LBIST_VIA_TAP_DIS_VAL_MASK 0x7 #define GC_FUSE_LBIST_VIA_TAP_DIS_VAL_SIZE 0x3 #define GC_FUSE_LBIST_VIA_TAP_DIS_VAL_DEFAULT 0x0 #define GC_FUSE_LBIST_VIA_TAP_DIS_VAL_OFFSET 0xac #define GC_FUSE_MBIST_VIA_TAP_DIS_VAL_LSB 0x0 #define GC_FUSE_MBIST_VIA_TAP_DIS_VAL_MASK 0x7 #define GC_FUSE_MBIST_VIA_TAP_DIS_VAL_SIZE 0x3 #define GC_FUSE_MBIST_VIA_TAP_DIS_VAL_DEFAULT 0x0 #define GC_FUSE_MBIST_VIA_TAP_DIS_VAL_OFFSET 0xb0 #define GC_FUSE_TAP_DISABLE_VAL_LSB 0x0 #define GC_FUSE_TAP_DISABLE_VAL_MASK 0x7 #define GC_FUSE_TAP_DISABLE_VAL_SIZE 0x3 #define GC_FUSE_TAP_DISABLE_VAL_DEFAULT 0x0 #define GC_FUSE_TAP_DISABLE_VAL_OFFSET 0xb4 #define GC_FUSE_RNGBIST_AR_EN_VAL_LSB 0x0 #define GC_FUSE_RNGBIST_AR_EN_VAL_MASK 0x7 #define GC_FUSE_RNGBIST_AR_EN_VAL_SIZE 0x3 #define GC_FUSE_RNGBIST_AR_EN_VAL_DEFAULT 0x0 #define GC_FUSE_RNGBIST_AR_EN_VAL_OFFSET 0xb8 #define GC_FUSE_TESTMODE_KEYS_EN_VAL_LSB 0x0 #define GC_FUSE_TESTMODE_KEYS_EN_VAL_MASK 0x7 #define GC_FUSE_TESTMODE_KEYS_EN_VAL_SIZE 0x3 #define GC_FUSE_TESTMODE_KEYS_EN_VAL_DEFAULT 0x0 #define GC_FUSE_TESTMODE_KEYS_EN_VAL_OFFSET 0xbc #define GC_FUSE_PKG_ID_VAL_LSB 0x0 #define GC_FUSE_PKG_ID_VAL_MASK 0x7 #define GC_FUSE_PKG_ID_VAL_SIZE 0x3 #define GC_FUSE_PKG_ID_VAL_DEFAULT 0x0 #define GC_FUSE_PKG_ID_VAL_OFFSET 0xc0 #define GC_FUSE_BIN_ID_VAL_LSB 0x0 #define GC_FUSE_BIN_ID_VAL_MASK 0x7 #define GC_FUSE_BIN_ID_VAL_SIZE 0x3 #define GC_FUSE_BIN_ID_VAL_DEFAULT 0x0 #define GC_FUSE_BIN_ID_VAL_OFFSET 0xc4 #define GC_FUSE_RC_JTR_OSC48_CC_TRIM_VAL_LSB 0x0 #define GC_FUSE_RC_JTR_OSC48_CC_TRIM_VAL_MASK 0xff #define GC_FUSE_RC_JTR_OSC48_CC_TRIM_VAL_SIZE 0x8 #define GC_FUSE_RC_JTR_OSC48_CC_TRIM_VAL_DEFAULT 0x0 #define GC_FUSE_RC_JTR_OSC48_CC_TRIM_VAL_OFFSET 0xc8 #define GC_FUSE_RC_JTR_OSC48_CC_EN_VAL_LSB 0x0 #define GC_FUSE_RC_JTR_OSC48_CC_EN_VAL_MASK 0x7 #define GC_FUSE_RC_JTR_OSC48_CC_EN_VAL_SIZE 0x3 #define GC_FUSE_RC_JTR_OSC48_CC_EN_VAL_DEFAULT 0x0 #define GC_FUSE_RC_JTR_OSC48_CC_EN_VAL_OFFSET 0xcc #define GC_FUSE_RC_JTR_OSC60_CC_TRIM_VAL_LSB 0x0 #define GC_FUSE_RC_JTR_OSC60_CC_TRIM_VAL_MASK 0xff #define GC_FUSE_RC_JTR_OSC60_CC_TRIM_VAL_SIZE 0x8 #define GC_FUSE_RC_JTR_OSC60_CC_TRIM_VAL_DEFAULT 0x0 #define GC_FUSE_RC_JTR_OSC60_CC_TRIM_VAL_OFFSET 0xd0 #define GC_FUSE_RC_JTR_OSC60_CC_EN_VAL_LSB 0x0 #define GC_FUSE_RC_JTR_OSC60_CC_EN_VAL_MASK 0x7 #define GC_FUSE_RC_JTR_OSC60_CC_EN_VAL_SIZE 0x3 #define GC_FUSE_RC_JTR_OSC60_CC_EN_VAL_DEFAULT 0x0 #define GC_FUSE_RC_JTR_OSC60_CC_EN_VAL_OFFSET 0xd4 #define GC_FUSE_RC_TIMER_OSC48_CC_TRIM_VAL_LSB 0x0 #define GC_FUSE_RC_TIMER_OSC48_CC_TRIM_VAL_MASK 0xff #define GC_FUSE_RC_TIMER_OSC48_CC_TRIM_VAL_SIZE 0x8 #define GC_FUSE_RC_TIMER_OSC48_CC_TRIM_VAL_DEFAULT 0x0 #define GC_FUSE_RC_TIMER_OSC48_CC_TRIM_VAL_OFFSET 0xd8 #define GC_FUSE_RC_TIMER_OSC48_CC_EN_VAL_LSB 0x0 #define GC_FUSE_RC_TIMER_OSC48_CC_EN_VAL_MASK 0x7 #define GC_FUSE_RC_TIMER_OSC48_CC_EN_VAL_SIZE 0x3 #define GC_FUSE_RC_TIMER_OSC48_CC_EN_VAL_DEFAULT 0x0 #define GC_FUSE_RC_TIMER_OSC48_CC_EN_VAL_OFFSET 0xdc #define GC_FUSE_RC_TIMER_OSC48_FC_TRIM_VAL_LSB 0x0 #define GC_FUSE_RC_TIMER_OSC48_FC_TRIM_VAL_MASK 0x1f #define GC_FUSE_RC_TIMER_OSC48_FC_TRIM_VAL_SIZE 0x5 #define GC_FUSE_RC_TIMER_OSC48_FC_TRIM_VAL_DEFAULT 0x0 #define GC_FUSE_RC_TIMER_OSC48_FC_TRIM_VAL_OFFSET 0xe0 #define GC_FUSE_RC_TIMER_OSC48_FC_EN_VAL_LSB 0x0 #define GC_FUSE_RC_TIMER_OSC48_FC_EN_VAL_MASK 0x7 #define GC_FUSE_RC_TIMER_OSC48_FC_EN_VAL_SIZE 0x3 #define GC_FUSE_RC_TIMER_OSC48_FC_EN_VAL_DEFAULT 0x0 #define GC_FUSE_RC_TIMER_OSC48_FC_EN_VAL_OFFSET 0xe4 #define GC_FUSE_RC_RTC_OSC256K_CC_TRIM_VAL_LSB 0x0 #define GC_FUSE_RC_RTC_OSC256K_CC_TRIM_VAL_MASK 0xff #define GC_FUSE_RC_RTC_OSC256K_CC_TRIM_VAL_SIZE 0x8 #define GC_FUSE_RC_RTC_OSC256K_CC_TRIM_VAL_DEFAULT 0x0 #define GC_FUSE_RC_RTC_OSC256K_CC_TRIM_VAL_OFFSET 0xe8 #define GC_FUSE_RC_RTC_OSC256K_CC_EN_VAL_LSB 0x0 #define GC_FUSE_RC_RTC_OSC256K_CC_EN_VAL_MASK 0x7 #define GC_FUSE_RC_RTC_OSC256K_CC_EN_VAL_SIZE 0x3 #define GC_FUSE_RC_RTC_OSC256K_CC_EN_VAL_DEFAULT 0x0 #define GC_FUSE_RC_RTC_OSC256K_CC_EN_VAL_OFFSET 0xec #define GC_FUSE_SEL_VREG_REG_EN_VAL_LSB 0x0 #define GC_FUSE_SEL_VREG_REG_EN_VAL_MASK 0x7 #define GC_FUSE_SEL_VREG_REG_EN_VAL_SIZE 0x3 #define GC_FUSE_SEL_VREG_REG_EN_VAL_DEFAULT 0x0 #define GC_FUSE_SEL_VREG_REG_EN_VAL_OFFSET 0xf0 #define GC_FUSE_SEL_VREF_REG_VAL_LSB 0x0 #define GC_FUSE_SEL_VREF_REG_VAL_MASK 0xf #define GC_FUSE_SEL_VREF_REG_VAL_SIZE 0x4 #define GC_FUSE_SEL_VREF_REG_VAL_DEFAULT 0x0 #define GC_FUSE_SEL_VREF_REG_VAL_OFFSET 0xf4 #define GC_FUSE_SEL_VREF_BATMON_EN_VAL_LSB 0x0 #define GC_FUSE_SEL_VREF_BATMON_EN_VAL_MASK 0x7 #define GC_FUSE_SEL_VREF_BATMON_EN_VAL_SIZE 0x3 #define GC_FUSE_SEL_VREF_BATMON_EN_VAL_DEFAULT 0x0 #define GC_FUSE_SEL_VREF_BATMON_EN_VAL_OFFSET 0xf8 #define GC_FUSE_SEL_VREF_BATMON_VAL_LSB 0x0 #define GC_FUSE_SEL_VREF_BATMON_VAL_MASK 0x7 #define GC_FUSE_SEL_VREF_BATMON_VAL_SIZE 0x3 #define GC_FUSE_SEL_VREF_BATMON_VAL_DEFAULT 0x0 #define GC_FUSE_SEL_VREF_BATMON_VAL_OFFSET 0xfc #define GC_FUSE_X_OSC_LDO_CTRL_EN_VAL_LSB 0x0 #define GC_FUSE_X_OSC_LDO_CTRL_EN_VAL_MASK 0x7 #define GC_FUSE_X_OSC_LDO_CTRL_EN_VAL_SIZE 0x3 #define GC_FUSE_X_OSC_LDO_CTRL_EN_VAL_DEFAULT 0x0 #define GC_FUSE_X_OSC_LDO_CTRL_EN_VAL_OFFSET 0x100 #define GC_FUSE_X_OSC_LDO_CTRL_VAL_LSB 0x0 #define GC_FUSE_X_OSC_LDO_CTRL_VAL_MASK 0xf #define GC_FUSE_X_OSC_LDO_CTRL_VAL_SIZE 0x4 #define GC_FUSE_X_OSC_LDO_CTRL_VAL_DEFAULT 0x0 #define GC_FUSE_X_OSC_LDO_CTRL_VAL_OFFSET 0x104 #define GC_FUSE_TEMP_OFFSET_CAL_VAL_LSB 0x0 #define GC_FUSE_TEMP_OFFSET_CAL_VAL_MASK 0xfff #define GC_FUSE_TEMP_OFFSET_CAL_VAL_SIZE 0xc #define GC_FUSE_TEMP_OFFSET_CAL_VAL_DEFAULT 0x0 #define GC_FUSE_TEMP_OFFSET_CAL_VAL_OFFSET 0x108 #define GC_FUSE_TRNG_LDO_CTRL_EN_VAL_LSB 0x0 #define GC_FUSE_TRNG_LDO_CTRL_EN_VAL_MASK 0x7 #define GC_FUSE_TRNG_LDO_CTRL_EN_VAL_SIZE 0x3 #define GC_FUSE_TRNG_LDO_CTRL_EN_VAL_DEFAULT 0x0 #define GC_FUSE_TRNG_LDO_CTRL_EN_VAL_OFFSET 0x10c #define GC_FUSE_TRNG_LDO_CTRL_VAL_LSB 0x0 #define GC_FUSE_TRNG_LDO_CTRL_VAL_MASK 0x1f #define GC_FUSE_TRNG_LDO_CTRL_VAL_SIZE 0x5 #define GC_FUSE_TRNG_LDO_CTRL_VAL_DEFAULT 0x0 #define GC_FUSE_TRNG_LDO_CTRL_VAL_OFFSET 0x110 #define GC_FUSE_TRNG_ANALOG_CTRL_EN_VAL_LSB 0x0 #define GC_FUSE_TRNG_ANALOG_CTRL_EN_VAL_MASK 0x7 #define GC_FUSE_TRNG_ANALOG_CTRL_EN_VAL_SIZE 0x3 #define GC_FUSE_TRNG_ANALOG_CTRL_EN_VAL_DEFAULT 0x0 #define GC_FUSE_TRNG_ANALOG_CTRL_EN_VAL_OFFSET 0x114 #define GC_FUSE_TRNG_ANALOG_CTRL_VAL_LSB 0x0 #define GC_FUSE_TRNG_ANALOG_CTRL_VAL_MASK 0xf #define GC_FUSE_TRNG_ANALOG_CTRL_VAL_SIZE 0x4 #define GC_FUSE_TRNG_ANALOG_CTRL_VAL_DEFAULT 0x0 #define GC_FUSE_TRNG_ANALOG_CTRL_VAL_OFFSET 0x118 #define GC_FUSE_EXT_XTAL_PDB_VAL_LSB 0x0 #define GC_FUSE_EXT_XTAL_PDB_VAL_MASK 0x3 #define GC_FUSE_EXT_XTAL_PDB_VAL_SIZE 0x2 #define GC_FUSE_EXT_XTAL_PDB_VAL_DEFAULT 0x0 #define GC_FUSE_EXT_XTAL_PDB_VAL_OFFSET 0x11c #define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_VAL_LSB 0x0 #define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_VAL_MASK 0x7 #define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_VAL_SIZE 0x3 #define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_VAL_DEFAULT 0x0 #define GC_FUSE_DIS_EXT_XTAL_CLK_TREE_VAL_OFFSET 0x120 #define GC_FUSE_OBFUSCATION_EN_VAL_LSB 0x0 #define GC_FUSE_OBFUSCATION_EN_VAL_MASK 0x7 #define GC_FUSE_OBFUSCATION_EN_VAL_SIZE 0x3 #define GC_FUSE_OBFUSCATION_EN_VAL_DEFAULT 0x0 #define GC_FUSE_OBFUSCATION_EN_VAL_OFFSET 0x124 #define GC_FUSE_HIK_CREATE_LOCK_VAL_LSB 0x0 #define GC_FUSE_HIK_CREATE_LOCK_VAL_MASK 0x7 #define GC_FUSE_HIK_CREATE_LOCK_VAL_SIZE 0x3 #define GC_FUSE_HIK_CREATE_LOCK_VAL_DEFAULT 0x0 #define GC_FUSE_HIK_CREATE_LOCK_VAL_OFFSET 0x128 #define GC_FUSE_BNK2_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_BNK2_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_BNK2_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_BNK2_INTG_CHKSUM_VAL_DEFAULT 0x0 #define GC_FUSE_BNK2_INTG_CHKSUM_VAL_OFFSET 0x12c #define GC_FUSE_BNK2_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_BNK2_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_BNK2_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_BNK2_INTG_LOCK_VAL_DEFAULT 0x0 #define GC_FUSE_BNK2_INTG_LOCK_VAL_OFFSET 0x130 #define GC_FUSE_TESTMODE_OTPW_DIS_VAL_LSB 0x0 #define GC_FUSE_TESTMODE_OTPW_DIS_VAL_MASK 0x7 #define GC_FUSE_TESTMODE_OTPW_DIS_VAL_SIZE 0x3 #define GC_FUSE_TESTMODE_OTPW_DIS_VAL_DEFAULT 0x0 #define GC_FUSE_TESTMODE_OTPW_DIS_VAL_OFFSET 0x134 #define GC_FUSE_HKEY_WDOG_TIMER_EN_VAL_LSB 0x0 #define GC_FUSE_HKEY_WDOG_TIMER_EN_VAL_MASK 0x7 #define GC_FUSE_HKEY_WDOG_TIMER_EN_VAL_SIZE 0x3 #define GC_FUSE_HKEY_WDOG_TIMER_EN_VAL_DEFAULT 0x0 #define GC_FUSE_HKEY_WDOG_TIMER_EN_VAL_OFFSET 0x138 #define GC_FUSE_FLASH_PERSO_PAGE_LOCK_VAL_LSB 0x0 #define GC_FUSE_FLASH_PERSO_PAGE_LOCK_VAL_MASK 0x7 #define GC_FUSE_FLASH_PERSO_PAGE_LOCK_VAL_SIZE 0x3 #define GC_FUSE_FLASH_PERSO_PAGE_LOCK_VAL_DEFAULT 0x0 #define GC_FUSE_FLASH_PERSO_PAGE_LOCK_VAL_OFFSET 0x13c #define GC_FUSE_ALERT_RSP_CFG_VAL_LSB 0x0 #define GC_FUSE_ALERT_RSP_CFG_VAL_MASK 0xff #define GC_FUSE_ALERT_RSP_CFG_VAL_SIZE 0x8 #define GC_FUSE_ALERT_RSP_CFG_VAL_DEFAULT 0x0 #define GC_FUSE_ALERT_RSP_CFG_VAL_OFFSET 0x140 #define GC_FUSE_BNK3_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_BNK3_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_BNK3_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_BNK3_INTG_CHKSUM_VAL_DEFAULT 0x0 #define GC_FUSE_BNK3_INTG_CHKSUM_VAL_OFFSET 0x144 #define GC_FUSE_BNK3_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_BNK3_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_BNK3_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_BNK3_INTG_LOCK_VAL_DEFAULT 0x0 #define GC_FUSE_BNK3_INTG_LOCK_VAL_OFFSET 0x148 #define GC_FUSE_FW_DEFINED_DATA_BLK0_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_BLK0_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_BLK0_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_BLK0_VAL_DEFAULT 0x0 #define GC_FUSE_FW_DEFINED_DATA_BLK0_VAL_OFFSET 0x14c #define GC_FUSE_FW_DEFINED_BROM_ERR_RESPONSE_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_BROM_ERR_RESPONSE_VAL_MASK 0xffff #define GC_FUSE_FW_DEFINED_BROM_ERR_RESPONSE_VAL_SIZE 0x10 #define GC_FUSE_FW_DEFINED_BROM_ERR_RESPONSE_VAL_DEFAULT 0x0 #define GC_FUSE_FW_DEFINED_BROM_ERR_RESPONSE_VAL_OFFSET 0x150 #define GC_FUSE_FW_DEFINED_BROM_APPLYSEC_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_BROM_APPLYSEC_VAL_MASK 0xfff #define GC_FUSE_FW_DEFINED_BROM_APPLYSEC_VAL_SIZE 0xc #define GC_FUSE_FW_DEFINED_BROM_APPLYSEC_VAL_DEFAULT 0x0 #define GC_FUSE_FW_DEFINED_BROM_APPLYSEC_VAL_OFFSET 0x154 #define GC_FUSE_FW_DEFINED_BROM_CONFIG0_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_BROM_CONFIG0_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_BROM_CONFIG0_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_BROM_CONFIG0_VAL_DEFAULT 0x0 #define GC_FUSE_FW_DEFINED_BROM_CONFIG0_VAL_OFFSET 0x158 #define GC_FUSE_FW_DEFINED_BROM_CONFIG1_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_BROM_CONFIG1_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_BROM_CONFIG1_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_BROM_CONFIG1_VAL_DEFAULT 0x0 #define GC_FUSE_FW_DEFINED_BROM_CONFIG1_VAL_OFFSET 0x15c #define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_VAL_LSB 0x0 #define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_VAL_MASK 0x1 #define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_VAL_SIZE 0x1 #define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_MODE_DBG_OVRD_DIS_VAL_OFFSET 0x160 #define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_LSB 0x0 #define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_MASK 0x7f #define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_SIZE 0x7 #define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_OFFSET 0x164 #define GC_FUSE_RBOX_CLK10HZ_COUNT_VAL_LSB 0x0 #define GC_FUSE_RBOX_CLK10HZ_COUNT_VAL_MASK 0xffff #define GC_FUSE_RBOX_CLK10HZ_COUNT_VAL_SIZE 0x10 #define GC_FUSE_RBOX_CLK10HZ_COUNT_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_CLK10HZ_COUNT_VAL_OFFSET 0x168 #define GC_FUSE_RBOX_SHORT_DELAY_COUNT_VAL_LSB 0x0 #define GC_FUSE_RBOX_SHORT_DELAY_COUNT_VAL_MASK 0xffff #define GC_FUSE_RBOX_SHORT_DELAY_COUNT_VAL_SIZE 0x10 #define GC_FUSE_RBOX_SHORT_DELAY_COUNT_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_SHORT_DELAY_COUNT_VAL_OFFSET 0x16c #define GC_FUSE_RBOX_LONG_DELAY_COUNT_VAL_LSB 0x0 #define GC_FUSE_RBOX_LONG_DELAY_COUNT_VAL_MASK 0xff #define GC_FUSE_RBOX_LONG_DELAY_COUNT_VAL_SIZE 0x8 #define GC_FUSE_RBOX_LONG_DELAY_COUNT_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_LONG_DELAY_COUNT_VAL_OFFSET 0x170 #define GC_FUSE_RBOX_DEBOUNCE_PERIOD_VAL_LSB 0x0 #define GC_FUSE_RBOX_DEBOUNCE_PERIOD_VAL_MASK 0xffff #define GC_FUSE_RBOX_DEBOUNCE_PERIOD_VAL_SIZE 0x10 #define GC_FUSE_RBOX_DEBOUNCE_PERIOD_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_DEBOUNCE_PERIOD_VAL_OFFSET 0x174 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_LSB 0x0 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_MASK 0x1 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_SIZE 0x1 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_OFFSET 0x178 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_LSB 0x0 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_MASK 0x1 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_SIZE 0x1 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_OFFSET 0x17c #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_LSB 0x0 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_MASK 0x1 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_SIZE 0x1 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_OFFSET 0x180 #define GC_FUSE_RBOX_KEY_COMBO0_VAL_VAL_LSB 0x0 #define GC_FUSE_RBOX_KEY_COMBO0_VAL_VAL_MASK 0xff #define GC_FUSE_RBOX_KEY_COMBO0_VAL_VAL_SIZE 0x8 #define GC_FUSE_RBOX_KEY_COMBO0_VAL_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_KEY_COMBO0_VAL_VAL_OFFSET 0x184 #define GC_FUSE_RBOX_KEY_COMBO1_VAL_VAL_LSB 0x0 #define GC_FUSE_RBOX_KEY_COMBO1_VAL_VAL_MASK 0xff #define GC_FUSE_RBOX_KEY_COMBO1_VAL_VAL_SIZE 0x8 #define GC_FUSE_RBOX_KEY_COMBO1_VAL_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_KEY_COMBO1_VAL_VAL_OFFSET 0x188 #define GC_FUSE_RBOX_KEY_COMBO2_VAL_VAL_LSB 0x0 #define GC_FUSE_RBOX_KEY_COMBO2_VAL_VAL_MASK 0xff #define GC_FUSE_RBOX_KEY_COMBO2_VAL_VAL_SIZE 0x8 #define GC_FUSE_RBOX_KEY_COMBO2_VAL_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_KEY_COMBO2_VAL_VAL_OFFSET 0x18c #define GC_FUSE_RBOX_KEY_COMBO0_HOLD_VAL_LSB 0x0 #define GC_FUSE_RBOX_KEY_COMBO0_HOLD_VAL_MASK 0xff #define GC_FUSE_RBOX_KEY_COMBO0_HOLD_VAL_SIZE 0x8 #define GC_FUSE_RBOX_KEY_COMBO0_HOLD_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_KEY_COMBO0_HOLD_VAL_OFFSET 0x190 #define GC_FUSE_RBOX_KEY_COMBO1_HOLD_VAL_LSB 0x0 #define GC_FUSE_RBOX_KEY_COMBO1_HOLD_VAL_MASK 0xff #define GC_FUSE_RBOX_KEY_COMBO1_HOLD_VAL_SIZE 0x8 #define GC_FUSE_RBOX_KEY_COMBO1_HOLD_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_KEY_COMBO1_HOLD_VAL_OFFSET 0x194 #define GC_FUSE_RBOX_KEY_COMBO2_HOLD_VAL_LSB 0x0 #define GC_FUSE_RBOX_KEY_COMBO2_HOLD_VAL_MASK 0xff #define GC_FUSE_RBOX_KEY_COMBO2_HOLD_VAL_SIZE 0x8 #define GC_FUSE_RBOX_KEY_COMBO2_HOLD_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_KEY_COMBO2_HOLD_VAL_OFFSET 0x198 #define GC_FUSE_RBOX_BLOCK_KEY0_SEL_VAL_LSB 0x0 #define GC_FUSE_RBOX_BLOCK_KEY0_SEL_VAL_MASK 0x1 #define GC_FUSE_RBOX_BLOCK_KEY0_SEL_VAL_SIZE 0x1 #define GC_FUSE_RBOX_BLOCK_KEY0_SEL_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_BLOCK_KEY0_SEL_VAL_OFFSET 0x19c #define GC_FUSE_RBOX_BLOCK_KEY1_SEL_VAL_LSB 0x0 #define GC_FUSE_RBOX_BLOCK_KEY1_SEL_VAL_MASK 0x1 #define GC_FUSE_RBOX_BLOCK_KEY1_SEL_VAL_SIZE 0x1 #define GC_FUSE_RBOX_BLOCK_KEY1_SEL_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_BLOCK_KEY1_SEL_VAL_OFFSET 0x1a0 #define GC_FUSE_RBOX_BLOCK_KEY0_VAL_VAL_LSB 0x0 #define GC_FUSE_RBOX_BLOCK_KEY0_VAL_VAL_MASK 0x1 #define GC_FUSE_RBOX_BLOCK_KEY0_VAL_VAL_SIZE 0x1 #define GC_FUSE_RBOX_BLOCK_KEY0_VAL_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_BLOCK_KEY0_VAL_VAL_OFFSET 0x1a4 #define GC_FUSE_RBOX_BLOCK_KEY1_VAL_VAL_LSB 0x0 #define GC_FUSE_RBOX_BLOCK_KEY1_VAL_VAL_MASK 0x1 #define GC_FUSE_RBOX_BLOCK_KEY1_VAL_VAL_SIZE 0x1 #define GC_FUSE_RBOX_BLOCK_KEY1_VAL_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_BLOCK_KEY1_VAL_VAL_OFFSET 0x1a8 #define GC_FUSE_RBOX_POL_AC_PRESENT_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_AC_PRESENT_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_AC_PRESENT_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_AC_PRESENT_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_POL_AC_PRESENT_VAL_OFFSET 0x1ac #define GC_FUSE_RBOX_POL_PWRB_IN_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_PWRB_IN_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_PWRB_IN_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_PWRB_IN_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_POL_PWRB_IN_VAL_OFFSET 0x1b0 #define GC_FUSE_RBOX_POL_PWRB_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_PWRB_OUT_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_PWRB_OUT_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_PWRB_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_POL_PWRB_OUT_VAL_OFFSET 0x1b4 #define GC_FUSE_RBOX_POL_KEY0_IN_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_KEY0_IN_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_KEY0_IN_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_KEY0_IN_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_POL_KEY0_IN_VAL_OFFSET 0x1b8 #define GC_FUSE_RBOX_POL_KEY0_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_KEY0_OUT_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_KEY0_OUT_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_KEY0_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_POL_KEY0_OUT_VAL_OFFSET 0x1bc #define GC_FUSE_RBOX_POL_KEY1_IN_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_KEY1_IN_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_KEY1_IN_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_KEY1_IN_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_POL_KEY1_IN_VAL_OFFSET 0x1c0 #define GC_FUSE_RBOX_POL_KEY1_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_KEY1_OUT_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_KEY1_OUT_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_KEY1_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_POL_KEY1_OUT_VAL_OFFSET 0x1c4 #define GC_FUSE_RBOX_POL_EC_RST_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_EC_RST_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_EC_RST_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_EC_RST_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_POL_EC_RST_VAL_OFFSET 0x1c8 #define GC_FUSE_RBOX_POL_BATT_DISABLE_VAL_LSB 0x0 #define GC_FUSE_RBOX_POL_BATT_DISABLE_VAL_MASK 0x1 #define GC_FUSE_RBOX_POL_BATT_DISABLE_VAL_SIZE 0x1 #define GC_FUSE_RBOX_POL_BATT_DISABLE_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_POL_BATT_DISABLE_VAL_OFFSET 0x1cc #define GC_FUSE_RBOX_TERM_AC_PRESENT_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_AC_PRESENT_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_AC_PRESENT_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_AC_PRESENT_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_TERM_AC_PRESENT_VAL_OFFSET 0x1d0 #define GC_FUSE_RBOX_TERM_ENTERING_RW_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_ENTERING_RW_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_ENTERING_RW_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_ENTERING_RW_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_TERM_ENTERING_RW_VAL_OFFSET 0x1d4 #define GC_FUSE_RBOX_TERM_PWRB_IN_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_PWRB_IN_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_PWRB_IN_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_PWRB_IN_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_TERM_PWRB_IN_VAL_OFFSET 0x1d8 #define GC_FUSE_RBOX_TERM_PWRB_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_PWRB_OUT_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_PWRB_OUT_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_PWRB_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_TERM_PWRB_OUT_VAL_OFFSET 0x1dc #define GC_FUSE_RBOX_TERM_KEY0_IN_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_KEY0_IN_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_KEY0_IN_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_KEY0_IN_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_TERM_KEY0_IN_VAL_OFFSET 0x1e0 #define GC_FUSE_RBOX_TERM_KEY0_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_KEY0_OUT_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_KEY0_OUT_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_KEY0_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_TERM_KEY0_OUT_VAL_OFFSET 0x1e4 #define GC_FUSE_RBOX_TERM_KEY1_IN_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_KEY1_IN_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_KEY1_IN_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_KEY1_IN_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_TERM_KEY1_IN_VAL_OFFSET 0x1e8 #define GC_FUSE_RBOX_TERM_KEY1_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_TERM_KEY1_OUT_VAL_MASK 0x3 #define GC_FUSE_RBOX_TERM_KEY1_OUT_VAL_SIZE 0x2 #define GC_FUSE_RBOX_TERM_KEY1_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_TERM_KEY1_OUT_VAL_OFFSET 0x1ec #define GC_FUSE_RBOX_DRIVE_PWRB_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_DRIVE_PWRB_OUT_VAL_MASK 0x3 #define GC_FUSE_RBOX_DRIVE_PWRB_OUT_VAL_SIZE 0x2 #define GC_FUSE_RBOX_DRIVE_PWRB_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_DRIVE_PWRB_OUT_VAL_OFFSET 0x1f0 #define GC_FUSE_RBOX_DRIVE_KEY0_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_DRIVE_KEY0_OUT_VAL_MASK 0x3 #define GC_FUSE_RBOX_DRIVE_KEY0_OUT_VAL_SIZE 0x2 #define GC_FUSE_RBOX_DRIVE_KEY0_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_DRIVE_KEY0_OUT_VAL_OFFSET 0x1f4 #define GC_FUSE_RBOX_DRIVE_KEY1_OUT_VAL_LSB 0x0 #define GC_FUSE_RBOX_DRIVE_KEY1_OUT_VAL_MASK 0x3 #define GC_FUSE_RBOX_DRIVE_KEY1_OUT_VAL_SIZE 0x2 #define GC_FUSE_RBOX_DRIVE_KEY1_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_DRIVE_KEY1_OUT_VAL_OFFSET 0x1f8 #define GC_FUSE_RBOX_DRIVE_EC_RST_VAL_LSB 0x0 #define GC_FUSE_RBOX_DRIVE_EC_RST_VAL_MASK 0x3 #define GC_FUSE_RBOX_DRIVE_EC_RST_VAL_SIZE 0x2 #define GC_FUSE_RBOX_DRIVE_EC_RST_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_DRIVE_EC_RST_VAL_OFFSET 0x1fc #define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_VAL_LSB 0x0 #define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_VAL_MASK 0x3 #define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_VAL_SIZE 0x2 #define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_VAL_DEFAULT 0x0 #define GC_FUSE_RBOX_DRIVE_BATT_DISABLE_VAL_OFFSET 0x200 #define GC_FUSE_BNK4_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_BNK4_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_BNK4_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_BNK4_INTG_CHKSUM_VAL_DEFAULT 0x0 #define GC_FUSE_BNK4_INTG_CHKSUM_VAL_OFFSET 0x204 #define GC_FUSE_BNK4_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_BNK4_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_BNK4_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_BNK4_INTG_LOCK_VAL_DEFAULT 0x0 #define GC_FUSE_BNK4_INTG_LOCK_VAL_OFFSET 0x208 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_VAL_DEFAULT 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK0_VAL_OFFSET 0x20c #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_VAL_DEFAULT 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK1_VAL_OFFSET 0x210 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_VAL_DEFAULT 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK2_VAL_OFFSET 0x214 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_VAL_DEFAULT 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK3_VAL_OFFSET 0x218 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_VAL_DEFAULT 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK4_VAL_OFFSET 0x21c #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_VAL_MASK 0xff #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_VAL_SIZE 0x8 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_VAL_DEFAULT 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK5_VAL_OFFSET 0x220 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_VAL_LSB 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_VAL_MASK 0x1f #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_VAL_SIZE 0x5 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_VAL_DEFAULT 0x0 #define GC_FUSE_FW_DEFINED_DATA_EXTRA_BLK6_VAL_OFFSET 0x224 #define GC_FUSE_PROG_BNK0_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK0_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_PROG_BNK0_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_PROG_BNK0_INTG_CHKSUM_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_BNK0_INTG_CHKSUM_VAL_OFFSET 0x228 #define GC_FUSE_PROG_BNK0_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK0_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_PROG_BNK0_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_PROG_BNK0_INTG_LOCK_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_BNK0_INTG_LOCK_VAL_OFFSET 0x22c #define GC_FUSE_PROG_DS_GRP0_VAL_LSB 0x0 #define GC_FUSE_PROG_DS_GRP0_VAL_MASK 0x1ff #define GC_FUSE_PROG_DS_GRP0_VAL_SIZE 0x9 #define GC_FUSE_PROG_DS_GRP0_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_DS_GRP0_VAL_OFFSET 0x230 #define GC_FUSE_PROG_DS_GRP1_VAL_LSB 0x0 #define GC_FUSE_PROG_DS_GRP1_VAL_MASK 0x1ff #define GC_FUSE_PROG_DS_GRP1_VAL_SIZE 0x9 #define GC_FUSE_PROG_DS_GRP1_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_DS_GRP1_VAL_OFFSET 0x234 #define GC_FUSE_PROG_DS_GRP2_VAL_LSB 0x0 #define GC_FUSE_PROG_DS_GRP2_VAL_MASK 0x1ff #define GC_FUSE_PROG_DS_GRP2_VAL_SIZE 0x9 #define GC_FUSE_PROG_DS_GRP2_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_DS_GRP2_VAL_OFFSET 0x238 #define GC_FUSE_PROG_DEV_ID0_VAL_LSB 0x0 #define GC_FUSE_PROG_DEV_ID0_VAL_MASK 0xffffffff #define GC_FUSE_PROG_DEV_ID0_VAL_SIZE 0x20 #define GC_FUSE_PROG_DEV_ID0_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_DEV_ID0_VAL_OFFSET 0x23c #define GC_FUSE_PROG_DEV_ID1_VAL_LSB 0x0 #define GC_FUSE_PROG_DEV_ID1_VAL_MASK 0xffffffff #define GC_FUSE_PROG_DEV_ID1_VAL_SIZE 0x20 #define GC_FUSE_PROG_DEV_ID1_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_DEV_ID1_VAL_OFFSET 0x240 #define GC_FUSE_PROG_BNK1_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK1_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_PROG_BNK1_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_PROG_BNK1_INTG_CHKSUM_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_BNK1_INTG_CHKSUM_VAL_OFFSET 0x244 #define GC_FUSE_PROG_BNK1_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK1_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_PROG_BNK1_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_PROG_BNK1_INTG_LOCK_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_BNK1_INTG_LOCK_VAL_OFFSET 0x248 #define GC_FUSE_PROG_LB0_POST_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB0_POST_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB0_POST_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB0_POST_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB0_POST_OVRD_VAL_OFFSET 0x24c #define GC_FUSE_PROG_LB0_POST_PATCNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB0_POST_PATCNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB0_POST_PATCNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB0_POST_PATCNT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB0_POST_PATCNT_VAL_OFFSET 0x250 #define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB0_POST_WARMUP_OVRD_VAL_OFFSET 0x254 #define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB0_POST_WARMUP_CNT_VAL_OFFSET 0x258 #define GC_FUSE_PROG_LB1_POST_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB1_POST_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB1_POST_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB1_POST_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB1_POST_OVRD_VAL_OFFSET 0x25c #define GC_FUSE_PROG_LB1_POST_PATCNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB1_POST_PATCNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB1_POST_PATCNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB1_POST_PATCNT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB1_POST_PATCNT_VAL_OFFSET 0x260 #define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB1_POST_WARMUP_OVRD_VAL_OFFSET 0x264 #define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB1_POST_WARMUP_CNT_VAL_OFFSET 0x268 #define GC_FUSE_PROG_LB2_POST_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB2_POST_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB2_POST_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB2_POST_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB2_POST_OVRD_VAL_OFFSET 0x26c #define GC_FUSE_PROG_LB2_POST_PATCNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB2_POST_PATCNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB2_POST_PATCNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB2_POST_PATCNT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB2_POST_PATCNT_VAL_OFFSET 0x270 #define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB2_POST_WARMUP_OVRD_VAL_OFFSET 0x274 #define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB2_POST_WARMUP_CNT_VAL_OFFSET 0x278 #define GC_FUSE_PROG_LB3_POST_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB3_POST_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB3_POST_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB3_POST_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB3_POST_OVRD_VAL_OFFSET 0x27c #define GC_FUSE_PROG_LB3_POST_PATCNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB3_POST_PATCNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB3_POST_PATCNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB3_POST_PATCNT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB3_POST_PATCNT_VAL_OFFSET 0x280 #define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB3_POST_WARMUP_OVRD_VAL_OFFSET 0x284 #define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB3_POST_WARMUP_CNT_VAL_OFFSET 0x288 #define GC_FUSE_PROG_LB4_POST_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB4_POST_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB4_POST_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB4_POST_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB4_POST_OVRD_VAL_OFFSET 0x28c #define GC_FUSE_PROG_LB4_POST_PATCNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB4_POST_PATCNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB4_POST_PATCNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB4_POST_PATCNT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB4_POST_PATCNT_VAL_OFFSET 0x290 #define GC_FUSE_PROG_LB4_POST_WARMUP_OVRD_VAL_LSB 0x0 #define GC_FUSE_PROG_LB4_POST_WARMUP_OVRD_VAL_MASK 0x7 #define GC_FUSE_PROG_LB4_POST_WARMUP_OVRD_VAL_SIZE 0x3 #define GC_FUSE_PROG_LB4_POST_WARMUP_OVRD_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB4_POST_WARMUP_OVRD_VAL_OFFSET 0x294 #define GC_FUSE_PROG_LB4_POST_WARMUP_CNT_VAL_LSB 0x0 #define GC_FUSE_PROG_LB4_POST_WARMUP_CNT_VAL_MASK 0x3 #define GC_FUSE_PROG_LB4_POST_WARMUP_CNT_VAL_SIZE 0x2 #define GC_FUSE_PROG_LB4_POST_WARMUP_CNT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LB4_POST_WARMUP_CNT_VAL_OFFSET 0x298 #define GC_FUSE_PROG_MBIST_POST_SEQ_VAL_LSB 0x0 #define GC_FUSE_PROG_MBIST_POST_SEQ_VAL_MASK 0x1ffffff #define GC_FUSE_PROG_MBIST_POST_SEQ_VAL_SIZE 0x19 #define GC_FUSE_PROG_MBIST_POST_SEQ_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_MBIST_POST_SEQ_VAL_OFFSET 0x29c #define GC_FUSE_PROG_LBIST_POST_SEQ_VAL_LSB 0x0 #define GC_FUSE_PROG_LBIST_POST_SEQ_VAL_MASK 0x1ffffff #define GC_FUSE_PROG_LBIST_POST_SEQ_VAL_SIZE 0x19 #define GC_FUSE_PROG_LBIST_POST_SEQ_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LBIST_POST_SEQ_VAL_OFFSET 0x2a0 #define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_VAL_LSB 0x0 #define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_VAL_MASK 0x7 #define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_VAL_SIZE 0x3 #define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_LBIST_VIA_TAP_DIS_VAL_OFFSET 0x2a4 #define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_VAL_LSB 0x0 #define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_VAL_MASK 0x7 #define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_VAL_SIZE 0x3 #define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_MBIST_VIA_TAP_DIS_VAL_OFFSET 0x2a8 #define GC_FUSE_PROG_MBIST_BOOTROM_MISR_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_MBIST_BOOTROM_MISR_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_MBIST_BOOTROM_MISR_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_MBIST_BOOTROM_MISR_EN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_MBIST_BOOTROM_MISR_EN_VAL_OFFSET 0x2ac #define GC_FUSE_PROG_MBIST_BOOTROM_MISR_VAL_LSB 0x0 #define GC_FUSE_PROG_MBIST_BOOTROM_MISR_VAL_MASK 0xffffffff #define GC_FUSE_PROG_MBIST_BOOTROM_MISR_VAL_SIZE 0x20 #define GC_FUSE_PROG_MBIST_BOOTROM_MISR_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_MBIST_BOOTROM_MISR_VAL_OFFSET 0x2b0 #define GC_FUSE_PROG_TAP_DISABLE_VAL_LSB 0x0 #define GC_FUSE_PROG_TAP_DISABLE_VAL_MASK 0x7 #define GC_FUSE_PROG_TAP_DISABLE_VAL_SIZE 0x3 #define GC_FUSE_PROG_TAP_DISABLE_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_TAP_DISABLE_VAL_OFFSET 0x2b4 #define GC_FUSE_PROG_RNGBIST_AR_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_RNGBIST_AR_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_RNGBIST_AR_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_RNGBIST_AR_EN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RNGBIST_AR_EN_VAL_OFFSET 0x2b8 #define GC_FUSE_PROG_TESTMODE_KEYS_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_TESTMODE_KEYS_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_TESTMODE_KEYS_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_TESTMODE_KEYS_EN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_TESTMODE_KEYS_EN_VAL_OFFSET 0x2bc #define GC_FUSE_PROG_PKG_ID_VAL_LSB 0x0 #define GC_FUSE_PROG_PKG_ID_VAL_MASK 0x7 #define GC_FUSE_PROG_PKG_ID_VAL_SIZE 0x3 #define GC_FUSE_PROG_PKG_ID_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_PKG_ID_VAL_OFFSET 0x2c0 #define GC_FUSE_PROG_BIN_ID_VAL_LSB 0x0 #define GC_FUSE_PROG_BIN_ID_VAL_MASK 0x7 #define GC_FUSE_PROG_BIN_ID_VAL_SIZE 0x3 #define GC_FUSE_PROG_BIN_ID_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_BIN_ID_VAL_OFFSET 0x2c4 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_VAL_MASK 0xff #define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_VAL_SIZE 0x8 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_TRIM_VAL_OFFSET 0x2c8 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RC_JTR_OSC48_CC_EN_VAL_OFFSET 0x2cc #define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_VAL_MASK 0xff #define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_VAL_SIZE 0x8 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_TRIM_VAL_OFFSET 0x2d0 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RC_JTR_OSC60_CC_EN_VAL_OFFSET 0x2d4 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_VAL_MASK 0xff #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_VAL_SIZE 0x8 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_TRIM_VAL_OFFSET 0x2d8 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_CC_EN_VAL_OFFSET 0x2dc #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_VAL_MASK 0x1f #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_VAL_SIZE 0x5 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_TRIM_VAL_OFFSET 0x2e0 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RC_TIMER_OSC48_FC_EN_VAL_OFFSET 0x2e4 #define GC_FUSE_PROG_RC_RTC_OSC256K_CC_TRIM_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_RTC_OSC256K_CC_TRIM_VAL_MASK 0xff #define GC_FUSE_PROG_RC_RTC_OSC256K_CC_TRIM_VAL_SIZE 0x8 #define GC_FUSE_PROG_RC_RTC_OSC256K_CC_TRIM_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RC_RTC_OSC256K_CC_TRIM_VAL_OFFSET 0x2e8 #define GC_FUSE_PROG_RC_RTC_OSC256K_CC_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_RC_RTC_OSC256K_CC_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_RC_RTC_OSC256K_CC_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_RC_RTC_OSC256K_CC_EN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RC_RTC_OSC256K_CC_EN_VAL_OFFSET 0x2ec #define GC_FUSE_PROG_SEL_VREG_REG_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_SEL_VREG_REG_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_SEL_VREG_REG_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_SEL_VREG_REG_EN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_SEL_VREG_REG_EN_VAL_OFFSET 0x2f0 #define GC_FUSE_PROG_SEL_VREF_REG_VAL_LSB 0x0 #define GC_FUSE_PROG_SEL_VREF_REG_VAL_MASK 0xf #define GC_FUSE_PROG_SEL_VREF_REG_VAL_SIZE 0x4 #define GC_FUSE_PROG_SEL_VREF_REG_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_SEL_VREF_REG_VAL_OFFSET 0x2f4 #define GC_FUSE_PROG_SEL_VREF_BATMON_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_SEL_VREF_BATMON_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_SEL_VREF_BATMON_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_SEL_VREF_BATMON_EN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_SEL_VREF_BATMON_EN_VAL_OFFSET 0x2f8 #define GC_FUSE_PROG_SEL_VREF_BATMON_VAL_LSB 0x0 #define GC_FUSE_PROG_SEL_VREF_BATMON_VAL_MASK 0x7 #define GC_FUSE_PROG_SEL_VREF_BATMON_VAL_SIZE 0x3 #define GC_FUSE_PROG_SEL_VREF_BATMON_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_SEL_VREF_BATMON_VAL_OFFSET 0x2fc #define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_EN_VAL_OFFSET 0x300 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_VAL_LSB 0x0 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_VAL_MASK 0xf #define GC_FUSE_PROG_X_OSC_LDO_CTRL_VAL_SIZE 0x4 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_X_OSC_LDO_CTRL_VAL_OFFSET 0x304 #define GC_FUSE_PROG_TEMP_OFFSET_CAL_VAL_LSB 0x0 #define GC_FUSE_PROG_TEMP_OFFSET_CAL_VAL_MASK 0xfff #define GC_FUSE_PROG_TEMP_OFFSET_CAL_VAL_SIZE 0xc #define GC_FUSE_PROG_TEMP_OFFSET_CAL_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_TEMP_OFFSET_CAL_VAL_OFFSET 0x308 #define GC_FUSE_PROG_TRNG_LDO_CTRL_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_TRNG_LDO_CTRL_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_TRNG_LDO_CTRL_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_TRNG_LDO_CTRL_EN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_TRNG_LDO_CTRL_EN_VAL_OFFSET 0x30c #define GC_FUSE_PROG_TRNG_LDO_CTRL_VAL_LSB 0x0 #define GC_FUSE_PROG_TRNG_LDO_CTRL_VAL_MASK 0x1f #define GC_FUSE_PROG_TRNG_LDO_CTRL_VAL_SIZE 0x5 #define GC_FUSE_PROG_TRNG_LDO_CTRL_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_TRNG_LDO_CTRL_VAL_OFFSET 0x310 #define GC_FUSE_PROG_TRNG_ANALOG_CTRL_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_TRNG_ANALOG_CTRL_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_TRNG_ANALOG_CTRL_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_TRNG_ANALOG_CTRL_EN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_TRNG_ANALOG_CTRL_EN_VAL_OFFSET 0x314 #define GC_FUSE_PROG_TRNG_ANALOG_CTRL_VAL_LSB 0x0 #define GC_FUSE_PROG_TRNG_ANALOG_CTRL_VAL_MASK 0xf #define GC_FUSE_PROG_TRNG_ANALOG_CTRL_VAL_SIZE 0x4 #define GC_FUSE_PROG_TRNG_ANALOG_CTRL_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_TRNG_ANALOG_CTRL_VAL_OFFSET 0x318 #define GC_FUSE_PROG_EXT_XTAL_PDB_VAL_LSB 0x0 #define GC_FUSE_PROG_EXT_XTAL_PDB_VAL_MASK 0x3 #define GC_FUSE_PROG_EXT_XTAL_PDB_VAL_SIZE 0x2 #define GC_FUSE_PROG_EXT_XTAL_PDB_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_EXT_XTAL_PDB_VAL_OFFSET 0x31c #define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_VAL_LSB 0x0 #define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_VAL_MASK 0x7 #define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_VAL_SIZE 0x3 #define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_DIS_EXT_XTAL_CLK_TREE_VAL_OFFSET 0x320 #define GC_FUSE_PROG_OBFUSCATION_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_OBFUSCATION_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_OBFUSCATION_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_OBFUSCATION_EN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_OBFUSCATION_EN_VAL_OFFSET 0x324 #define GC_FUSE_PROG_OBS0_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS0_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS0_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS0_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_OBS0_VAL_OFFSET 0x328 #define GC_FUSE_PROG_OBS1_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS1_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS1_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS1_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_OBS1_VAL_OFFSET 0x32c #define GC_FUSE_PROG_OBS2_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS2_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS2_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS2_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_OBS2_VAL_OFFSET 0x330 #define GC_FUSE_PROG_OBS3_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS3_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS3_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS3_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_OBS3_VAL_OFFSET 0x334 #define GC_FUSE_PROG_OBS4_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS4_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS4_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS4_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_OBS4_VAL_OFFSET 0x338 #define GC_FUSE_PROG_OBS5_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS5_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS5_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS5_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_OBS5_VAL_OFFSET 0x33c #define GC_FUSE_PROG_OBS6_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS6_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS6_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS6_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_OBS6_VAL_OFFSET 0x340 #define GC_FUSE_PROG_OBS7_VAL_LSB 0x0 #define GC_FUSE_PROG_OBS7_VAL_MASK 0xffffffff #define GC_FUSE_PROG_OBS7_VAL_SIZE 0x20 #define GC_FUSE_PROG_OBS7_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_OBS7_VAL_OFFSET 0x344 #define GC_FUSE_PROG_HIK_CREATE_LOCK_VAL_LSB 0x0 #define GC_FUSE_PROG_HIK_CREATE_LOCK_VAL_MASK 0x7 #define GC_FUSE_PROG_HIK_CREATE_LOCK_VAL_SIZE 0x3 #define GC_FUSE_PROG_HIK_CREATE_LOCK_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_HIK_CREATE_LOCK_VAL_OFFSET 0x348 #define GC_FUSE_PROG_BNK2_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK2_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_PROG_BNK2_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_PROG_BNK2_INTG_CHKSUM_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_BNK2_INTG_CHKSUM_VAL_OFFSET 0x34c #define GC_FUSE_PROG_BNK2_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK2_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_PROG_BNK2_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_PROG_BNK2_INTG_LOCK_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_BNK2_INTG_LOCK_VAL_OFFSET 0x350 #define GC_FUSE_PROG_TESTMODE_OTPW_DIS_VAL_LSB 0x0 #define GC_FUSE_PROG_TESTMODE_OTPW_DIS_VAL_MASK 0x7 #define GC_FUSE_PROG_TESTMODE_OTPW_DIS_VAL_SIZE 0x3 #define GC_FUSE_PROG_TESTMODE_OTPW_DIS_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_TESTMODE_OTPW_DIS_VAL_OFFSET 0x354 #define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_VAL_LSB 0x0 #define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_VAL_MASK 0x7 #define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_VAL_SIZE 0x3 #define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_HKEY_WDOG_TIMER_EN_VAL_OFFSET 0x358 #define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_VAL_LSB 0x0 #define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_VAL_MASK 0x7 #define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_VAL_SIZE 0x3 #define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_FLASH_PERSO_PAGE_LOCK_VAL_OFFSET 0x35c #define GC_FUSE_PROG_ALERT_RSP_CFG_VAL_LSB 0x0 #define GC_FUSE_PROG_ALERT_RSP_CFG_VAL_MASK 0xff #define GC_FUSE_PROG_ALERT_RSP_CFG_VAL_SIZE 0x8 #define GC_FUSE_PROG_ALERT_RSP_CFG_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_ALERT_RSP_CFG_VAL_OFFSET 0x360 #define GC_FUSE_PROG_BNK3_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK3_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_PROG_BNK3_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_PROG_BNK3_INTG_CHKSUM_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_BNK3_INTG_CHKSUM_VAL_OFFSET 0x364 #define GC_FUSE_PROG_BNK3_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK3_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_PROG_BNK3_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_PROG_BNK3_INTG_LOCK_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_BNK3_INTG_LOCK_VAL_OFFSET 0x368 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_BLK0_VAL_OFFSET 0x36c #define GC_FUSE_PROG_FW_DEFINED_BROM_ERR_RESPONSE_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_BROM_ERR_RESPONSE_VAL_MASK 0xffff #define GC_FUSE_PROG_FW_DEFINED_BROM_ERR_RESPONSE_VAL_SIZE 0x10 #define GC_FUSE_PROG_FW_DEFINED_BROM_ERR_RESPONSE_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_BROM_ERR_RESPONSE_VAL_OFFSET 0x370 #define GC_FUSE_PROG_FW_DEFINED_BROM_APPLYSEC_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_BROM_APPLYSEC_VAL_MASK 0xfff #define GC_FUSE_PROG_FW_DEFINED_BROM_APPLYSEC_VAL_SIZE 0xc #define GC_FUSE_PROG_FW_DEFINED_BROM_APPLYSEC_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_BROM_APPLYSEC_VAL_OFFSET 0x374 #define GC_FUSE_PROG_FW_DEFINED_BROM_CONFIG0_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_BROM_CONFIG0_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_BROM_CONFIG0_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_BROM_CONFIG0_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_BROM_CONFIG0_VAL_OFFSET 0x378 #define GC_FUSE_PROG_FW_DEFINED_BROM_CONFIG1_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_BROM_CONFIG1_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_BROM_CONFIG1_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_BROM_CONFIG1_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_BROM_CONFIG1_VAL_OFFSET 0x37c #define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_MODE_DBG_OVRD_DIS_VAL_OFFSET 0x380 #define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_MASK 0x7f #define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_SIZE 0x7 #define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_MODE_OUTPUT_OVRD_DIS_VAL_OFFSET 0x384 #define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_VAL_MASK 0xffff #define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_VAL_SIZE 0x10 #define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_CLK10HZ_COUNT_VAL_OFFSET 0x388 #define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_VAL_MASK 0xffff #define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_VAL_SIZE 0x10 #define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_SHORT_DELAY_COUNT_VAL_OFFSET 0x38c #define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_VAL_MASK 0xff #define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_VAL_SIZE 0x8 #define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_LONG_DELAY_COUNT_VAL_OFFSET 0x390 #define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_VAL_MASK 0xffff #define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_VAL_SIZE 0x10 #define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_PERIOD_VAL_OFFSET 0x394 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_PWRB_VAL_OFFSET 0x398 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY0_VAL_OFFSET 0x39c #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DEBOUNCE_BYPASS_KEY1_VAL_OFFSET 0x3a0 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_VAL_MASK 0xff #define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_VAL_SIZE 0x8 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_VAL_VAL_OFFSET 0x3a4 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_VAL_MASK 0xff #define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_VAL_SIZE 0x8 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_VAL_VAL_OFFSET 0x3a8 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_VAL_MASK 0xff #define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_VAL_SIZE 0x8 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_VAL_VAL_OFFSET 0x3ac #define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_VAL_MASK 0xff #define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_VAL_SIZE 0x8 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO0_HOLD_VAL_OFFSET 0x3b0 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_VAL_MASK 0xff #define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_VAL_SIZE 0x8 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO1_HOLD_VAL_OFFSET 0x3b4 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_VAL_MASK 0xff #define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_VAL_SIZE 0x8 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_KEY_COMBO2_HOLD_VAL_OFFSET 0x3b8 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_SEL_VAL_OFFSET 0x3bc #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_SEL_VAL_OFFSET 0x3c0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY0_VAL_VAL_OFFSET 0x3c4 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_BLOCK_KEY1_VAL_VAL_OFFSET 0x3c8 #define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_AC_PRESENT_VAL_OFFSET 0x3cc #define GC_FUSE_PROG_RBOX_POL_PWRB_IN_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_PWRB_IN_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_PWRB_IN_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_PWRB_IN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_PWRB_IN_VAL_OFFSET 0x3d0 #define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_PWRB_OUT_VAL_OFFSET 0x3d4 #define GC_FUSE_PROG_RBOX_POL_KEY0_IN_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY0_IN_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY0_IN_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY0_IN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY0_IN_VAL_OFFSET 0x3d8 #define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY0_OUT_VAL_OFFSET 0x3dc #define GC_FUSE_PROG_RBOX_POL_KEY1_IN_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY1_IN_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY1_IN_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY1_IN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY1_IN_VAL_OFFSET 0x3e0 #define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_KEY1_OUT_VAL_OFFSET 0x3e4 #define GC_FUSE_PROG_RBOX_POL_EC_RST_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_EC_RST_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_EC_RST_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_EC_RST_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_EC_RST_VAL_OFFSET 0x3e8 #define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_VAL_MASK 0x1 #define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_VAL_SIZE 0x1 #define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_POL_BATT_DISABLE_VAL_OFFSET 0x3ec #define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_AC_PRESENT_VAL_OFFSET 0x3f0 #define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_ENTERING_RW_VAL_OFFSET 0x3f4 #define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_PWRB_IN_VAL_OFFSET 0x3f8 #define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_PWRB_OUT_VAL_OFFSET 0x3fc #define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY0_IN_VAL_OFFSET 0x400 #define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY0_OUT_VAL_OFFSET 0x404 #define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY1_IN_VAL_OFFSET 0x408 #define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_TERM_KEY1_OUT_VAL_OFFSET 0x40c #define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_PWRB_OUT_VAL_OFFSET 0x410 #define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_KEY0_OUT_VAL_OFFSET 0x414 #define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_KEY1_OUT_VAL_OFFSET 0x418 #define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_EC_RST_VAL_OFFSET 0x41c #define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_VAL_LSB 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_VAL_MASK 0x3 #define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_VAL_SIZE 0x2 #define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_RBOX_DRIVE_BATT_DISABLE_VAL_OFFSET 0x420 #define GC_FUSE_PROG_BNK4_INTG_CHKSUM_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK4_INTG_CHKSUM_VAL_MASK 0xffffff #define GC_FUSE_PROG_BNK4_INTG_CHKSUM_VAL_SIZE 0x18 #define GC_FUSE_PROG_BNK4_INTG_CHKSUM_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_BNK4_INTG_CHKSUM_VAL_OFFSET 0x424 #define GC_FUSE_PROG_BNK4_INTG_LOCK_VAL_LSB 0x0 #define GC_FUSE_PROG_BNK4_INTG_LOCK_VAL_MASK 0x7 #define GC_FUSE_PROG_BNK4_INTG_LOCK_VAL_SIZE 0x3 #define GC_FUSE_PROG_BNK4_INTG_LOCK_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_BNK4_INTG_LOCK_VAL_OFFSET 0x428 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK0_VAL_OFFSET 0x42c #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK1_VAL_OFFSET 0x430 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK2_VAL_OFFSET 0x434 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK3_VAL_OFFSET 0x438 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK4_VAL_OFFSET 0x43c #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_VAL_MASK 0xff #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_VAL_SIZE 0x8 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK5_VAL_OFFSET 0x440 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_VAL_LSB 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_VAL_MASK 0x1f #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_VAL_SIZE 0x5 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_VAL_DEFAULT 0x0 #define GC_FUSE_PROG_FW_DEFINED_DATA_EXTRA_BLK6_VAL_OFFSET 0x444 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_EN_OFFSET 0x0 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_RD_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_RD_EN_OFFSET 0x0 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_WR_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION0_CTRL_WR_EN_OFFSET 0x0 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_EN_OFFSET 0x4 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_RD_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_RD_EN_OFFSET 0x4 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_WR_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION1_CTRL_WR_EN_OFFSET 0x4 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_EN_OFFSET 0x8 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_RD_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_RD_EN_OFFSET 0x8 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_WR_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION2_CTRL_WR_EN_OFFSET 0x8 #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_EN_OFFSET 0xc #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_RD_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_RD_EN_OFFSET 0xc #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_WR_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION3_CTRL_WR_EN_OFFSET 0xc #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_EN_OFFSET 0x10 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_RD_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_RD_EN_OFFSET 0x10 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_WR_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION4_CTRL_WR_EN_OFFSET 0x10 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_EN_OFFSET 0x14 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_RD_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_RD_EN_OFFSET 0x14 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_WR_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION5_CTRL_WR_EN_OFFSET 0x14 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_EN_OFFSET 0x18 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_RD_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_RD_EN_OFFSET 0x18 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_WR_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION6_CTRL_WR_EN_OFFSET 0x18 #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_EN_OFFSET 0x1c #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_RD_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_RD_EN_OFFSET 0x1c #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_WR_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_REGION7_CTRL_WR_EN_OFFSET 0x1c #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_EN_OFFSET 0x40 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_RD_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_RD_EN_OFFSET 0x40 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_WR_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION0_CTRL_WR_EN_OFFSET 0x40 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_EN_OFFSET 0x44 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_RD_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_RD_EN_OFFSET 0x44 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_WR_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION1_CTRL_WR_EN_OFFSET 0x44 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_EN_OFFSET 0x48 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_RD_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_RD_EN_OFFSET 0x48 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_WR_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION2_CTRL_WR_EN_OFFSET 0x48 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_EN_OFFSET 0x4c #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_RD_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_RD_EN_OFFSET 0x4c #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_WR_EN_DEFAULT 0x1 #define GC_GLOBALSEC_CPU0_D_DAP_REGION3_CTRL_WR_EN_OFFSET 0x4c #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_EN_OFFSET 0x60 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_RD_EN_OFFSET 0x60 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION0_CTRL_WR_EN_OFFSET 0x60 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_EN_OFFSET 0x64 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_RD_EN_OFFSET 0x64 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION1_CTRL_WR_EN_OFFSET 0x64 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_EN_OFFSET 0x68 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_RD_EN_OFFSET 0x68 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION2_CTRL_WR_EN_OFFSET 0x68 #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_EN_OFFSET 0x6c #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_RD_EN_OFFSET 0x6c #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION3_CTRL_WR_EN_OFFSET 0x6c #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_EN_OFFSET 0x70 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_RD_EN_OFFSET 0x70 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION4_CTRL_WR_EN_OFFSET 0x70 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_EN_OFFSET 0x74 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_RD_EN_OFFSET 0x74 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION5_CTRL_WR_EN_OFFSET 0x74 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_EN_OFFSET 0x78 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_RD_EN_OFFSET 0x78 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION6_CTRL_WR_EN_OFFSET 0x78 #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_EN_OFFSET 0x7c #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_RD_EN_OFFSET 0x7c #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_REGION7_CTRL_WR_EN_OFFSET 0x7c #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_EN_OFFSET 0x80 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_RD_EN_OFFSET 0x80 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION0_CTRL_WR_EN_OFFSET 0x80 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_EN_OFFSET 0x84 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_RD_EN_OFFSET 0x84 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION1_CTRL_WR_EN_OFFSET 0x84 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_EN_OFFSET 0x88 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_RD_EN_OFFSET 0x88 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION2_CTRL_WR_EN_OFFSET 0x88 #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_EN_OFFSET 0x8c #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_RD_EN_OFFSET 0x8c #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DDMA0_REGION3_CTRL_WR_EN_OFFSET 0x8c #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_EN_OFFSET 0xa0 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_RD_EN_OFFSET 0xa0 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION0_CTRL_WR_EN_OFFSET 0xa0 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_EN_OFFSET 0xa4 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_RD_EN_OFFSET 0xa4 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION1_CTRL_WR_EN_OFFSET 0xa4 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_EN_OFFSET 0xa8 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_RD_EN_OFFSET 0xa8 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION2_CTRL_WR_EN_OFFSET 0xa8 #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_EN_OFFSET 0xac #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_RD_EN_OFFSET 0xac #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DSPS0_REGION3_CTRL_WR_EN_OFFSET 0xac #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_EN_OFFSET 0xc0 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_RD_EN_OFFSET 0xc0 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION0_CTRL_WR_EN_OFFSET 0xc0 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_EN_OFFSET 0xc4 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_RD_EN_OFFSET 0xc4 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION1_CTRL_WR_EN_OFFSET 0xc4 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_EN_OFFSET 0xc8 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_RD_EN_OFFSET 0xc8 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION2_CTRL_WR_EN_OFFSET 0xc8 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_EN_OFFSET 0xcc #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_RD_EN_OFFSET 0xcc #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_DUSB0_REGION3_CTRL_WR_EN_OFFSET 0xcc #define GC_GLOBALSEC_FLASH_REGION0_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_EN_OFFSET 0xe0 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_RD_EN_OFFSET 0xe0 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION0_CTRL_WR_EN_OFFSET 0xe0 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_EN_OFFSET 0xe4 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_RD_EN_OFFSET 0xe4 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION1_CTRL_WR_EN_OFFSET 0xe4 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_EN_OFFSET 0xe8 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_RD_EN_OFFSET 0xe8 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION2_CTRL_WR_EN_OFFSET 0xe8 #define GC_GLOBALSEC_FLASH_REGION3_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_FLASH_REGION3_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_FLASH_REGION3_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION3_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION3_CTRL_EN_OFFSET 0xec #define GC_GLOBALSEC_FLASH_REGION3_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_FLASH_REGION3_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_FLASH_REGION3_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION3_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION3_CTRL_RD_EN_OFFSET 0xec #define GC_GLOBALSEC_FLASH_REGION3_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_FLASH_REGION3_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_FLASH_REGION3_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION3_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION3_CTRL_WR_EN_OFFSET 0xec #define GC_GLOBALSEC_FLASH_REGION4_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_EN_OFFSET 0xf0 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_RD_EN_OFFSET 0xf0 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION4_CTRL_WR_EN_OFFSET 0xf0 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_EN_OFFSET 0xf4 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_RD_EN_OFFSET 0xf4 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION5_CTRL_WR_EN_OFFSET 0xf4 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_EN_OFFSET 0xf8 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_RD_EN_OFFSET 0xf8 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION6_CTRL_WR_EN_OFFSET 0xf8 #define GC_GLOBALSEC_FLASH_REGION7_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_FLASH_REGION7_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_FLASH_REGION7_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION7_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION7_CTRL_EN_OFFSET 0xfc #define GC_GLOBALSEC_FLASH_REGION7_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_FLASH_REGION7_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_FLASH_REGION7_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION7_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION7_CTRL_RD_EN_OFFSET 0xfc #define GC_GLOBALSEC_FLASH_REGION7_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_FLASH_REGION7_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_FLASH_REGION7_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_FLASH_REGION7_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_FLASH_REGION7_CTRL_WR_EN_OFFSET 0xfc #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_EN_OFFSET 0x270 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_RD_EN_OFFSET 0x270 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION0_CTRL_WR_EN_OFFSET 0x270 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_EN_OFFSET 0x27c #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_RD_EN_OFFSET 0x27c #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION1_CTRL_WR_EN_OFFSET 0x27c #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_EN_OFFSET 0x288 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_RD_EN_OFFSET 0x288 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION2_CTRL_WR_EN_OFFSET 0x288 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_EN_OFFSET 0x294 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_RD_EN_OFFSET 0x294 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION3_CTRL_WR_EN_OFFSET 0x294 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_EN_OFFSET 0x2a0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_RD_EN_OFFSET 0x2a0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION4_CTRL_WR_EN_OFFSET 0x2a0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_EN_OFFSET 0x2ac #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_RD_EN_OFFSET 0x2ac #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION5_CTRL_WR_EN_OFFSET 0x2ac #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_EN_OFFSET 0x2b8 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_RD_EN_OFFSET 0x2b8 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION6_CTRL_WR_EN_OFFSET 0x2b8 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_EN_LSB 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_EN_MASK 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_EN_OFFSET 0x2c4 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_RD_EN_LSB 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_RD_EN_MASK 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_RD_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_RD_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_RD_EN_OFFSET 0x2c4 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_WR_EN_LSB 0x2 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_WR_EN_MASK 0x4 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_WR_EN_SIZE 0x1 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_WR_EN_DEFAULT 0x0 #define GC_GLOBALSEC_CPU0_I_STAGING_REGION7_CTRL_WR_EN_OFFSET 0x2c4 #define GC_GLOBALSEC_SB_COMP_STATUS_SB_BL_SIG_MATCH_LSB 0x0 #define GC_GLOBALSEC_SB_COMP_STATUS_SB_BL_SIG_MATCH_MASK 0x1 #define GC_GLOBALSEC_SB_COMP_STATUS_SB_BL_SIG_MATCH_SIZE 0x1 #define GC_GLOBALSEC_SB_COMP_STATUS_SB_BL_SIG_MATCH_DEFAULT 0x0 #define GC_GLOBALSEC_SB_COMP_STATUS_SB_BL_SIG_MATCH_OFFSET 0x1000 #define GC_GLOBALSEC_INT_ERR_FLAGS_DEV_ST_DEC_ERR_LSB 0x18 #define GC_GLOBALSEC_INT_ERR_FLAGS_DEV_ST_DEC_ERR_MASK 0x1000000 #define GC_GLOBALSEC_INT_ERR_FLAGS_DEV_ST_DEC_ERR_SIZE 0x1 #define GC_GLOBALSEC_INT_ERR_FLAGS_DEV_ST_DEC_ERR_DEFAULT 0x0 #define GC_GLOBALSEC_INT_ERR_FLAGS_DEV_ST_DEC_ERR_OFFSET 0x1028 #define GC_GLOBALSEC_ALERT_INTR_STS0_CAMO0_BREACH_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_CAMO0_BREACH_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_CAMO0_BREACH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_CAMO0_BREACH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_CAMO0_BREACH_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_DMEM_PARITY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_DMEM_PARITY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_DMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_DMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_DMEM_PARITY_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_DRF_PARITY_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_DRF_PARITY_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_DRF_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_DRF_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_DRF_PARITY_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_IMEM_PARITY_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_IMEM_PARITY_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_IMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_IMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_IMEM_PARITY_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_PGM_FAULT_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_PGM_FAULT_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_PGM_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_PGM_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_CRYPTO0_PGM_FAULT_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xc #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x1000 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_LSB 0xd #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_MASK 0x2000 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xe #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x4000 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_LSB 0xf #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_MASK 0x8000 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_LSB 0x10 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x10000 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_FUSE0_FUSE_DEFAULTS_ALERT_LSB 0x11 #define GC_GLOBALSEC_ALERT_INTR_STS0_FUSE0_FUSE_DEFAULTS_ALERT_MASK 0x20000 #define GC_GLOBALSEC_ALERT_INTR_STS0_FUSE0_FUSE_DEFAULTS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_FUSE0_FUSE_DEFAULTS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_FUSE0_FUSE_DEFAULTS_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_DIFF_FAIL_ALERT_LSB 0x12 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_DIFF_FAIL_ALERT_MASK 0x40000 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_DIFF_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_DIFF_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_DIFF_FAIL_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW0_ALERT_LSB 0x13 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW0_ALERT_MASK 0x80000 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW0_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW0_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW0_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW1_ALERT_LSB 0x14 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW1_ALERT_MASK 0x100000 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW1_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW1_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW1_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW2_ALERT_LSB 0x15 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW2_ALERT_MASK 0x200000 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW2_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW2_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW2_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW3_ALERT_LSB 0x16 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW3_ALERT_MASK 0x400000 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW3_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW3_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_FW3_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_LSB 0x17 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_MASK 0x800000 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_LSB 0x18 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_MASK 0x1000000 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_LSB 0x19 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_MASK 0x2000000 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_LSB 0x1a #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_MASK 0x4000000 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_AES_HKEY_ALERT_LSB 0x1b #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_AES_HKEY_ALERT_MASK 0x8000000 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_AES_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_AES_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_AES_HKEY_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_CERT_LOOKUP_ALERT_LSB 0x1c #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_CERT_LOOKUP_ALERT_MASK 0x10000000 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_CERT_LOOKUP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_CERT_LOOKUP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_CERT_LOOKUP_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_FLASH_ENTRY_ALERT_LSB 0x1d #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_FLASH_ENTRY_ALERT_MASK 0x20000000 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_FLASH_ENTRY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_FLASH_ENTRY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_FLASH_ENTRY_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_PW_ALERT_LSB 0x1e #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_PW_ALERT_MASK 0x40000000 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_PW_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_PW_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_PW_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_LSB 0x1f #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_MASK 0x80000000 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_OFFSET 0x4004 #define GC_GLOBALSEC_ALERT_INTR_STS1_KEYMGR0_SHA_FAULT_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS1_KEYMGR0_SHA_FAULT_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS1_KEYMGR0_SHA_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS1_KEYMGR0_SHA_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS1_KEYMGR0_SHA_FAULT_ALERT_OFFSET 0x4008 #define GC_GLOBALSEC_ALERT_INTR_STS1_KEYMGR0_SHA_HKEY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS1_KEYMGR0_SHA_HKEY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_INTR_STS1_KEYMGR0_SHA_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS1_KEYMGR0_SHA_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS1_KEYMGR0_SHA_HKEY_ALERT_OFFSET 0x4008 #define GC_GLOBALSEC_ALERT_INTR_STS1_PMU_BATTERY_MON_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_INTR_STS1_PMU_BATTERY_MON_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_INTR_STS1_PMU_BATTERY_MON_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS1_PMU_BATTERY_MON_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS1_PMU_BATTERY_MON_ALERT_OFFSET 0x4008 #define GC_GLOBALSEC_ALERT_INTR_STS1_PMU_PMU_WDOG_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_INTR_STS1_PMU_PMU_WDOG_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_INTR_STS1_PMU_PMU_WDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS1_PMU_PMU_WDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS1_PMU_PMU_WDOG_ALERT_OFFSET 0x4008 #define GC_GLOBALSEC_ALERT_INTR_STS1_RTC0_RTC_DEAD_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_INTR_STS1_RTC0_RTC_DEAD_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_INTR_STS1_RTC0_RTC_DEAD_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS1_RTC0_RTC_DEAD_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS1_RTC0_RTC_DEAD_ALERT_OFFSET 0x4008 #define GC_GLOBALSEC_ALERT_INTR_STS1_TEMP0_MAX_TEMP_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_INTR_STS1_TEMP0_MAX_TEMP_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_INTR_STS1_TEMP0_MAX_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS1_TEMP0_MAX_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS1_TEMP0_MAX_TEMP_ALERT_OFFSET 0x4008 #define GC_GLOBALSEC_ALERT_INTR_STS1_TEMP0_MAX_TEMP_DIFF_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_INTR_STS1_TEMP0_MAX_TEMP_DIFF_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_INTR_STS1_TEMP0_MAX_TEMP_DIFF_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS1_TEMP0_MAX_TEMP_DIFF_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS1_TEMP0_MAX_TEMP_DIFF_ALERT_OFFSET 0x4008 #define GC_GLOBALSEC_ALERT_INTR_STS1_TEMP0_MIN_TEMP_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_INTR_STS1_TEMP0_MIN_TEMP_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_INTR_STS1_TEMP0_MIN_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS1_TEMP0_MIN_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS1_TEMP0_MIN_TEMP_ALERT_OFFSET 0x4008 #define GC_GLOBALSEC_ALERT_INTR_STS1_TRNG0_OUT_OF_SPEC_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_INTR_STS1_TRNG0_OUT_OF_SPEC_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_INTR_STS1_TRNG0_OUT_OF_SPEC_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS1_TRNG0_OUT_OF_SPEC_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS1_TRNG0_OUT_OF_SPEC_ALERT_OFFSET 0x4008 #define GC_GLOBALSEC_ALERT_INTR_STS1_TRNG0_TIMEOUT_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_INTR_STS1_TRNG0_TIMEOUT_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_INTR_STS1_TRNG0_TIMEOUT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS1_TRNG0_TIMEOUT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS1_TRNG0_TIMEOUT_ALERT_OFFSET 0x4008 #define GC_GLOBALSEC_ALERT_INTR_STS1_VOLT0_VOLT_ERR_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_INTR_STS1_VOLT0_VOLT_ERR_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_INTR_STS1_VOLT0_VOLT_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS1_VOLT0_VOLT_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS1_VOLT0_VOLT_ERR_ALERT_OFFSET 0x4008 #define GC_GLOBALSEC_ALERT_INTR_STS1_XO0_JITTERY_TRIM_DIS_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_INTR_STS1_XO0_JITTERY_TRIM_DIS_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_INTR_STS1_XO0_JITTERY_TRIM_DIS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_INTR_STS1_XO0_JITTERY_TRIM_DIS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_INTR_STS1_XO0_JITTERY_TRIM_DIS_ALERT_OFFSET 0x4008 #define GC_GLOBALSEC_ALERT_NMI_EN0_CAMO0_BREACH_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_CAMO0_BREACH_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_CAMO0_BREACH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_CAMO0_BREACH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_CAMO0_BREACH_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_DMEM_PARITY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_DMEM_PARITY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_DMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_DMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_DMEM_PARITY_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_DRF_PARITY_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_DRF_PARITY_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_DRF_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_DRF_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_DRF_PARITY_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_IMEM_PARITY_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_IMEM_PARITY_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_IMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_IMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_IMEM_PARITY_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_PGM_FAULT_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_PGM_FAULT_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_PGM_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_PGM_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_CRYPTO0_PGM_FAULT_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xc #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x1000 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_LSB 0xd #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_MASK 0x2000 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xe #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x4000 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_LSB 0xf #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_MASK 0x8000 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_LSB 0x10 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x10000 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_FUSE0_FUSE_DEFAULTS_ALERT_LSB 0x11 #define GC_GLOBALSEC_ALERT_NMI_EN0_FUSE0_FUSE_DEFAULTS_ALERT_MASK 0x20000 #define GC_GLOBALSEC_ALERT_NMI_EN0_FUSE0_FUSE_DEFAULTS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_FUSE0_FUSE_DEFAULTS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_FUSE0_FUSE_DEFAULTS_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_DIFF_FAIL_ALERT_LSB 0x12 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_DIFF_FAIL_ALERT_MASK 0x40000 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_DIFF_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_DIFF_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_DIFF_FAIL_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW0_ALERT_LSB 0x13 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW0_ALERT_MASK 0x80000 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW0_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW0_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW0_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW1_ALERT_LSB 0x14 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW1_ALERT_MASK 0x100000 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW1_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW1_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW1_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW2_ALERT_LSB 0x15 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW2_ALERT_MASK 0x200000 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW2_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW2_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW2_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW3_ALERT_LSB 0x16 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW3_ALERT_MASK 0x400000 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW3_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW3_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_FW3_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_LSB 0x17 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_MASK 0x800000 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_LSB 0x18 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_MASK 0x1000000 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_LSB 0x19 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_MASK 0x2000000 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_LSB 0x1a #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_MASK 0x4000000 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_AES_HKEY_ALERT_LSB 0x1b #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_AES_HKEY_ALERT_MASK 0x8000000 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_AES_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_AES_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_AES_HKEY_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_CERT_LOOKUP_ALERT_LSB 0x1c #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_CERT_LOOKUP_ALERT_MASK 0x10000000 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_CERT_LOOKUP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_CERT_LOOKUP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_CERT_LOOKUP_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_FLASH_ENTRY_ALERT_LSB 0x1d #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_FLASH_ENTRY_ALERT_MASK 0x20000000 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_FLASH_ENTRY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_FLASH_ENTRY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_FLASH_ENTRY_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_PW_ALERT_LSB 0x1e #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_PW_ALERT_MASK 0x40000000 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_PW_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_PW_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_PW_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_LSB 0x1f #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_MASK 0x80000000 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_OFFSET 0x400c #define GC_GLOBALSEC_ALERT_NMI_EN1_KEYMGR0_SHA_FAULT_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN1_KEYMGR0_SHA_FAULT_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN1_KEYMGR0_SHA_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN1_KEYMGR0_SHA_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN1_KEYMGR0_SHA_FAULT_ALERT_OFFSET 0x4010 #define GC_GLOBALSEC_ALERT_NMI_EN1_KEYMGR0_SHA_HKEY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN1_KEYMGR0_SHA_HKEY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_NMI_EN1_KEYMGR0_SHA_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN1_KEYMGR0_SHA_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN1_KEYMGR0_SHA_HKEY_ALERT_OFFSET 0x4010 #define GC_GLOBALSEC_ALERT_NMI_EN1_PMU_BATTERY_MON_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_NMI_EN1_PMU_BATTERY_MON_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_NMI_EN1_PMU_BATTERY_MON_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN1_PMU_BATTERY_MON_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN1_PMU_BATTERY_MON_ALERT_OFFSET 0x4010 #define GC_GLOBALSEC_ALERT_NMI_EN1_PMU_PMU_WDOG_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_NMI_EN1_PMU_PMU_WDOG_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_NMI_EN1_PMU_PMU_WDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN1_PMU_PMU_WDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN1_PMU_PMU_WDOG_ALERT_OFFSET 0x4010 #define GC_GLOBALSEC_ALERT_NMI_EN1_RTC0_RTC_DEAD_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_NMI_EN1_RTC0_RTC_DEAD_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_NMI_EN1_RTC0_RTC_DEAD_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN1_RTC0_RTC_DEAD_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN1_RTC0_RTC_DEAD_ALERT_OFFSET 0x4010 #define GC_GLOBALSEC_ALERT_NMI_EN1_TEMP0_MAX_TEMP_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_NMI_EN1_TEMP0_MAX_TEMP_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_NMI_EN1_TEMP0_MAX_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN1_TEMP0_MAX_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN1_TEMP0_MAX_TEMP_ALERT_OFFSET 0x4010 #define GC_GLOBALSEC_ALERT_NMI_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_NMI_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_NMI_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_OFFSET 0x4010 #define GC_GLOBALSEC_ALERT_NMI_EN1_TEMP0_MIN_TEMP_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_NMI_EN1_TEMP0_MIN_TEMP_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_NMI_EN1_TEMP0_MIN_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN1_TEMP0_MIN_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN1_TEMP0_MIN_TEMP_ALERT_OFFSET 0x4010 #define GC_GLOBALSEC_ALERT_NMI_EN1_TRNG0_OUT_OF_SPEC_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_NMI_EN1_TRNG0_OUT_OF_SPEC_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_NMI_EN1_TRNG0_OUT_OF_SPEC_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN1_TRNG0_OUT_OF_SPEC_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN1_TRNG0_OUT_OF_SPEC_ALERT_OFFSET 0x4010 #define GC_GLOBALSEC_ALERT_NMI_EN1_TRNG0_TIMEOUT_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_NMI_EN1_TRNG0_TIMEOUT_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_NMI_EN1_TRNG0_TIMEOUT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN1_TRNG0_TIMEOUT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN1_TRNG0_TIMEOUT_ALERT_OFFSET 0x4010 #define GC_GLOBALSEC_ALERT_NMI_EN1_VOLT0_VOLT_ERR_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_NMI_EN1_VOLT0_VOLT_ERR_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_NMI_EN1_VOLT0_VOLT_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN1_VOLT0_VOLT_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN1_VOLT0_VOLT_ERR_ALERT_OFFSET 0x4010 #define GC_GLOBALSEC_ALERT_NMI_EN1_XO0_JITTERY_TRIM_DIS_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_NMI_EN1_XO0_JITTERY_TRIM_DIS_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_NMI_EN1_XO0_JITTERY_TRIM_DIS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_NMI_EN1_XO0_JITTERY_TRIM_DIS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_NMI_EN1_XO0_JITTERY_TRIM_DIS_ALERT_OFFSET 0x4010 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CAMO0_BREACH_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CAMO0_BREACH_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CAMO0_BREACH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CAMO0_BREACH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CAMO0_BREACH_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_DMEM_PARITY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_DMEM_PARITY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_DMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_DMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_DMEM_PARITY_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_DRF_PARITY_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_DRF_PARITY_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_DRF_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_DRF_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_DRF_PARITY_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_IMEM_PARITY_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_IMEM_PARITY_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_IMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_IMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_IMEM_PARITY_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_PGM_FAULT_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_PGM_FAULT_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_PGM_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_PGM_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_CRYPTO0_PGM_FAULT_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xc #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x1000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_LSB 0xd #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_MASK 0x2000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xe #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x4000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_LSB 0xf #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_MASK 0x8000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_LSB 0x10 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x10000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_FUSE0_FUSE_DEFAULTS_ALERT_LSB 0x11 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_FUSE0_FUSE_DEFAULTS_ALERT_MASK 0x20000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_FUSE0_FUSE_DEFAULTS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_FUSE0_FUSE_DEFAULTS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_FUSE0_FUSE_DEFAULTS_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_DIFF_FAIL_ALERT_LSB 0x12 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_DIFF_FAIL_ALERT_MASK 0x40000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_DIFF_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_DIFF_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_DIFF_FAIL_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW0_ALERT_LSB 0x13 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW0_ALERT_MASK 0x80000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW0_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW0_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW0_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW1_ALERT_LSB 0x14 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW1_ALERT_MASK 0x100000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW1_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW1_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW1_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW2_ALERT_LSB 0x15 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW2_ALERT_MASK 0x200000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW2_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW2_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW2_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW3_ALERT_LSB 0x16 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW3_ALERT_MASK 0x400000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW3_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW3_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_FW3_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_LSB 0x17 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_MASK 0x800000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_LSB 0x18 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_MASK 0x1000000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_LSB 0x19 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_MASK 0x2000000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_LSB 0x1a #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_MASK 0x4000000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_AES_HKEY_ALERT_LSB 0x1b #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_AES_HKEY_ALERT_MASK 0x8000000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_AES_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_AES_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_AES_HKEY_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_CERT_LOOKUP_ALERT_LSB 0x1c #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_CERT_LOOKUP_ALERT_MASK 0x10000000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_CERT_LOOKUP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_CERT_LOOKUP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_CERT_LOOKUP_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_FLASH_ENTRY_ALERT_LSB 0x1d #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_FLASH_ENTRY_ALERT_MASK 0x20000000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_FLASH_ENTRY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_FLASH_ENTRY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_FLASH_ENTRY_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_PW_ALERT_LSB 0x1e #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_PW_ALERT_MASK 0x40000000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_PW_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_PW_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_PW_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_LSB 0x1f #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_MASK 0x80000000 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_OFFSET 0x4014 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_KEYMGR0_SHA_FAULT_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_KEYMGR0_SHA_FAULT_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_KEYMGR0_SHA_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_KEYMGR0_SHA_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_KEYMGR0_SHA_FAULT_ALERT_OFFSET 0x4018 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_KEYMGR0_SHA_HKEY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_KEYMGR0_SHA_HKEY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_KEYMGR0_SHA_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_KEYMGR0_SHA_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_KEYMGR0_SHA_HKEY_ALERT_OFFSET 0x4018 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_PMU_BATTERY_MON_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_PMU_BATTERY_MON_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_PMU_BATTERY_MON_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_PMU_BATTERY_MON_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_PMU_BATTERY_MON_ALERT_OFFSET 0x4018 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_PMU_PMU_WDOG_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_PMU_PMU_WDOG_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_PMU_PMU_WDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_PMU_PMU_WDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_PMU_PMU_WDOG_ALERT_OFFSET 0x4018 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_RTC0_RTC_DEAD_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_RTC0_RTC_DEAD_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_RTC0_RTC_DEAD_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_RTC0_RTC_DEAD_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_RTC0_RTC_DEAD_ALERT_OFFSET 0x4018 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TEMP0_MAX_TEMP_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TEMP0_MAX_TEMP_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TEMP0_MAX_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TEMP0_MAX_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TEMP0_MAX_TEMP_ALERT_OFFSET 0x4018 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_OFFSET 0x4018 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TEMP0_MIN_TEMP_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TEMP0_MIN_TEMP_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TEMP0_MIN_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TEMP0_MIN_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TEMP0_MIN_TEMP_ALERT_OFFSET 0x4018 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TRNG0_OUT_OF_SPEC_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TRNG0_OUT_OF_SPEC_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TRNG0_OUT_OF_SPEC_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TRNG0_OUT_OF_SPEC_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TRNG0_OUT_OF_SPEC_ALERT_OFFSET 0x4018 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TRNG0_TIMEOUT_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TRNG0_TIMEOUT_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TRNG0_TIMEOUT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TRNG0_TIMEOUT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_TRNG0_TIMEOUT_ALERT_OFFSET 0x4018 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_VOLT0_VOLT_ERR_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_GROUPA_EN1_VOLT0_VOLT_ERR_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_VOLT0_VOLT_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_VOLT0_VOLT_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_VOLT0_VOLT_ERR_ALERT_OFFSET 0x4018 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_XO0_JITTERY_TRIM_DIS_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_GROUPA_EN1_XO0_JITTERY_TRIM_DIS_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_XO0_JITTERY_TRIM_DIS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_XO0_JITTERY_TRIM_DIS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPA_EN1_XO0_JITTERY_TRIM_DIS_ALERT_OFFSET 0x4018 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CAMO0_BREACH_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CAMO0_BREACH_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CAMO0_BREACH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CAMO0_BREACH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CAMO0_BREACH_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_DMEM_PARITY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_DMEM_PARITY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_DMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_DMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_DMEM_PARITY_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_DRF_PARITY_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_DRF_PARITY_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_DRF_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_DRF_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_DRF_PARITY_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_IMEM_PARITY_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_IMEM_PARITY_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_IMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_IMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_IMEM_PARITY_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_PGM_FAULT_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_PGM_FAULT_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_PGM_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_PGM_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_CRYPTO0_PGM_FAULT_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xc #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x1000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_LSB 0xd #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_MASK 0x2000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xe #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x4000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_LSB 0xf #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_MASK 0x8000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_LSB 0x10 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x10000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_FUSE0_FUSE_DEFAULTS_ALERT_LSB 0x11 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_FUSE0_FUSE_DEFAULTS_ALERT_MASK 0x20000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_FUSE0_FUSE_DEFAULTS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_FUSE0_FUSE_DEFAULTS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_FUSE0_FUSE_DEFAULTS_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_DIFF_FAIL_ALERT_LSB 0x12 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_DIFF_FAIL_ALERT_MASK 0x40000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_DIFF_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_DIFF_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_DIFF_FAIL_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW0_ALERT_LSB 0x13 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW0_ALERT_MASK 0x80000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW0_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW0_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW0_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW1_ALERT_LSB 0x14 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW1_ALERT_MASK 0x100000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW1_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW1_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW1_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW2_ALERT_LSB 0x15 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW2_ALERT_MASK 0x200000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW2_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW2_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW2_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW3_ALERT_LSB 0x16 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW3_ALERT_MASK 0x400000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW3_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW3_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_FW3_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_LSB 0x17 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_MASK 0x800000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_LSB 0x18 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_MASK 0x1000000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_LSB 0x19 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_MASK 0x2000000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_LSB 0x1a #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_MASK 0x4000000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_AES_HKEY_ALERT_LSB 0x1b #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_AES_HKEY_ALERT_MASK 0x8000000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_AES_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_AES_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_AES_HKEY_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_CERT_LOOKUP_ALERT_LSB 0x1c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_CERT_LOOKUP_ALERT_MASK 0x10000000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_CERT_LOOKUP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_CERT_LOOKUP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_CERT_LOOKUP_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_FLASH_ENTRY_ALERT_LSB 0x1d #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_FLASH_ENTRY_ALERT_MASK 0x20000000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_FLASH_ENTRY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_FLASH_ENTRY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_FLASH_ENTRY_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_PW_ALERT_LSB 0x1e #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_PW_ALERT_MASK 0x40000000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_PW_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_PW_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_PW_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_LSB 0x1f #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_MASK 0x80000000 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_OFFSET 0x401c #define GC_GLOBALSEC_ALERT_GROUPB_EN1_KEYMGR0_SHA_FAULT_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_KEYMGR0_SHA_FAULT_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_KEYMGR0_SHA_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_KEYMGR0_SHA_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_KEYMGR0_SHA_FAULT_ALERT_OFFSET 0x4020 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_KEYMGR0_SHA_HKEY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_KEYMGR0_SHA_HKEY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_KEYMGR0_SHA_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_KEYMGR0_SHA_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_KEYMGR0_SHA_HKEY_ALERT_OFFSET 0x4020 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_PMU_BATTERY_MON_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_PMU_BATTERY_MON_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_PMU_BATTERY_MON_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_PMU_BATTERY_MON_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_PMU_BATTERY_MON_ALERT_OFFSET 0x4020 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_PMU_PMU_WDOG_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_PMU_PMU_WDOG_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_PMU_PMU_WDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_PMU_PMU_WDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_PMU_PMU_WDOG_ALERT_OFFSET 0x4020 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_RTC0_RTC_DEAD_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_RTC0_RTC_DEAD_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_RTC0_RTC_DEAD_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_RTC0_RTC_DEAD_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_RTC0_RTC_DEAD_ALERT_OFFSET 0x4020 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TEMP0_MAX_TEMP_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TEMP0_MAX_TEMP_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TEMP0_MAX_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TEMP0_MAX_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TEMP0_MAX_TEMP_ALERT_OFFSET 0x4020 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_OFFSET 0x4020 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TEMP0_MIN_TEMP_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TEMP0_MIN_TEMP_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TEMP0_MIN_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TEMP0_MIN_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TEMP0_MIN_TEMP_ALERT_OFFSET 0x4020 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TRNG0_OUT_OF_SPEC_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TRNG0_OUT_OF_SPEC_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TRNG0_OUT_OF_SPEC_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TRNG0_OUT_OF_SPEC_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TRNG0_OUT_OF_SPEC_ALERT_OFFSET 0x4020 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TRNG0_TIMEOUT_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TRNG0_TIMEOUT_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TRNG0_TIMEOUT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TRNG0_TIMEOUT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_TRNG0_TIMEOUT_ALERT_OFFSET 0x4020 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_VOLT0_VOLT_ERR_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_GROUPB_EN1_VOLT0_VOLT_ERR_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_VOLT0_VOLT_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_VOLT0_VOLT_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_VOLT0_VOLT_ERR_ALERT_OFFSET 0x4020 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_XO0_JITTERY_TRIM_DIS_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_GROUPB_EN1_XO0_JITTERY_TRIM_DIS_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_XO0_JITTERY_TRIM_DIS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_XO0_JITTERY_TRIM_DIS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPB_EN1_XO0_JITTERY_TRIM_DIS_ALERT_OFFSET 0x4020 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CAMO0_BREACH_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CAMO0_BREACH_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CAMO0_BREACH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CAMO0_BREACH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CAMO0_BREACH_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_DMEM_PARITY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_DMEM_PARITY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_DMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_DMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_DMEM_PARITY_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_DRF_PARITY_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_DRF_PARITY_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_DRF_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_DRF_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_DRF_PARITY_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_IMEM_PARITY_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_IMEM_PARITY_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_IMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_IMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_IMEM_PARITY_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_PGM_FAULT_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_PGM_FAULT_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_PGM_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_PGM_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_CRYPTO0_PGM_FAULT_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xc #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x1000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_LSB 0xd #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_MASK 0x2000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xe #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x4000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_LSB 0xf #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_MASK 0x8000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_LSB 0x10 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x10000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_FUSE0_FUSE_DEFAULTS_ALERT_LSB 0x11 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_FUSE0_FUSE_DEFAULTS_ALERT_MASK 0x20000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_FUSE0_FUSE_DEFAULTS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_FUSE0_FUSE_DEFAULTS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_FUSE0_FUSE_DEFAULTS_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_DIFF_FAIL_ALERT_LSB 0x12 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_DIFF_FAIL_ALERT_MASK 0x40000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_DIFF_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_DIFF_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_DIFF_FAIL_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW0_ALERT_LSB 0x13 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW0_ALERT_MASK 0x80000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW0_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW0_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW0_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW1_ALERT_LSB 0x14 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW1_ALERT_MASK 0x100000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW1_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW1_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW1_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW2_ALERT_LSB 0x15 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW2_ALERT_MASK 0x200000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW2_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW2_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW2_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW3_ALERT_LSB 0x16 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW3_ALERT_MASK 0x400000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW3_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW3_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_FW3_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_LSB 0x17 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_MASK 0x800000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_LSB 0x18 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_MASK 0x1000000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_LSB 0x19 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_MASK 0x2000000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_LSB 0x1a #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_MASK 0x4000000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_AES_HKEY_ALERT_LSB 0x1b #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_AES_HKEY_ALERT_MASK 0x8000000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_AES_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_AES_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_AES_HKEY_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_CERT_LOOKUP_ALERT_LSB 0x1c #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_CERT_LOOKUP_ALERT_MASK 0x10000000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_CERT_LOOKUP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_CERT_LOOKUP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_CERT_LOOKUP_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_FLASH_ENTRY_ALERT_LSB 0x1d #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_FLASH_ENTRY_ALERT_MASK 0x20000000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_FLASH_ENTRY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_FLASH_ENTRY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_FLASH_ENTRY_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_PW_ALERT_LSB 0x1e #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_PW_ALERT_MASK 0x40000000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_PW_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_PW_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_PW_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_LSB 0x1f #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_MASK 0x80000000 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_OFFSET 0x4024 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_KEYMGR0_SHA_FAULT_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_KEYMGR0_SHA_FAULT_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_KEYMGR0_SHA_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_KEYMGR0_SHA_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_KEYMGR0_SHA_FAULT_ALERT_OFFSET 0x4028 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_KEYMGR0_SHA_HKEY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_KEYMGR0_SHA_HKEY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_KEYMGR0_SHA_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_KEYMGR0_SHA_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_KEYMGR0_SHA_HKEY_ALERT_OFFSET 0x4028 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_PMU_BATTERY_MON_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_PMU_BATTERY_MON_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_PMU_BATTERY_MON_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_PMU_BATTERY_MON_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_PMU_BATTERY_MON_ALERT_OFFSET 0x4028 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_PMU_PMU_WDOG_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_PMU_PMU_WDOG_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_PMU_PMU_WDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_PMU_PMU_WDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_PMU_PMU_WDOG_ALERT_OFFSET 0x4028 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_RTC0_RTC_DEAD_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_RTC0_RTC_DEAD_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_RTC0_RTC_DEAD_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_RTC0_RTC_DEAD_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_RTC0_RTC_DEAD_ALERT_OFFSET 0x4028 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TEMP0_MAX_TEMP_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TEMP0_MAX_TEMP_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TEMP0_MAX_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TEMP0_MAX_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TEMP0_MAX_TEMP_ALERT_OFFSET 0x4028 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_OFFSET 0x4028 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TEMP0_MIN_TEMP_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TEMP0_MIN_TEMP_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TEMP0_MIN_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TEMP0_MIN_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TEMP0_MIN_TEMP_ALERT_OFFSET 0x4028 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TRNG0_OUT_OF_SPEC_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TRNG0_OUT_OF_SPEC_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TRNG0_OUT_OF_SPEC_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TRNG0_OUT_OF_SPEC_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TRNG0_OUT_OF_SPEC_ALERT_OFFSET 0x4028 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TRNG0_TIMEOUT_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TRNG0_TIMEOUT_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TRNG0_TIMEOUT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TRNG0_TIMEOUT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_TRNG0_TIMEOUT_ALERT_OFFSET 0x4028 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_VOLT0_VOLT_ERR_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_GROUPC_EN1_VOLT0_VOLT_ERR_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_VOLT0_VOLT_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_VOLT0_VOLT_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_VOLT0_VOLT_ERR_ALERT_OFFSET 0x4028 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_XO0_JITTERY_TRIM_DIS_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_GROUPC_EN1_XO0_JITTERY_TRIM_DIS_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_XO0_JITTERY_TRIM_DIS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_XO0_JITTERY_TRIM_DIS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_GROUPC_EN1_XO0_JITTERY_TRIM_DIS_ALERT_OFFSET 0x4028 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CAMO0_BREACH_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CAMO0_BREACH_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CAMO0_BREACH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CAMO0_BREACH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CAMO0_BREACH_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_DMEM_PARITY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_DMEM_PARITY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_DMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_DMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_DMEM_PARITY_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_DRF_PARITY_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_DRF_PARITY_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_DRF_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_DRF_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_DRF_PARITY_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_IMEM_PARITY_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_IMEM_PARITY_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_IMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_IMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_IMEM_PARITY_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_PGM_FAULT_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_PGM_FAULT_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_PGM_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_PGM_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_CRYPTO0_PGM_FAULT_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xc #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x1000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_LSB 0xd #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_MASK 0x2000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xe #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x4000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_LSB 0xf #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_MASK 0x8000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_LSB 0x10 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x10000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_FUSE0_FUSE_DEFAULTS_ALERT_LSB 0x11 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_FUSE0_FUSE_DEFAULTS_ALERT_MASK 0x20000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_FUSE0_FUSE_DEFAULTS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_FUSE0_FUSE_DEFAULTS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_FUSE0_FUSE_DEFAULTS_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_DIFF_FAIL_ALERT_LSB 0x12 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_DIFF_FAIL_ALERT_MASK 0x40000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_DIFF_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_DIFF_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_DIFF_FAIL_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW0_ALERT_LSB 0x13 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW0_ALERT_MASK 0x80000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW0_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW0_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW0_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW1_ALERT_LSB 0x14 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW1_ALERT_MASK 0x100000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW1_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW1_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW1_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW2_ALERT_LSB 0x15 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW2_ALERT_MASK 0x200000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW2_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW2_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW2_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW3_ALERT_LSB 0x16 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW3_ALERT_MASK 0x400000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW3_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW3_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_FW3_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_LSB 0x17 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_MASK 0x800000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_LSB 0x18 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_MASK 0x1000000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_LSB 0x19 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_MASK 0x2000000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_LSB 0x1a #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_MASK 0x4000000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_AES_HKEY_ALERT_LSB 0x1b #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_AES_HKEY_ALERT_MASK 0x8000000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_AES_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_AES_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_AES_HKEY_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_CERT_LOOKUP_ALERT_LSB 0x1c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_CERT_LOOKUP_ALERT_MASK 0x10000000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_CERT_LOOKUP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_CERT_LOOKUP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_CERT_LOOKUP_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_FLASH_ENTRY_ALERT_LSB 0x1d #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_FLASH_ENTRY_ALERT_MASK 0x20000000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_FLASH_ENTRY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_FLASH_ENTRY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_FLASH_ENTRY_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_PW_ALERT_LSB 0x1e #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_PW_ALERT_MASK 0x40000000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_PW_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_PW_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_PW_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_LSB 0x1f #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_MASK 0x80000000 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_OFFSET 0x402c #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_KEYMGR0_SHA_FAULT_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_KEYMGR0_SHA_FAULT_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_KEYMGR0_SHA_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_KEYMGR0_SHA_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_KEYMGR0_SHA_FAULT_ALERT_OFFSET 0x4030 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_KEYMGR0_SHA_HKEY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_KEYMGR0_SHA_HKEY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_KEYMGR0_SHA_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_KEYMGR0_SHA_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_KEYMGR0_SHA_HKEY_ALERT_OFFSET 0x4030 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_PMU_BATTERY_MON_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_PMU_BATTERY_MON_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_PMU_BATTERY_MON_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_PMU_BATTERY_MON_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_PMU_BATTERY_MON_ALERT_OFFSET 0x4030 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_PMU_PMU_WDOG_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_PMU_PMU_WDOG_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_PMU_PMU_WDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_PMU_PMU_WDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_PMU_PMU_WDOG_ALERT_OFFSET 0x4030 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_RTC0_RTC_DEAD_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_RTC0_RTC_DEAD_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_RTC0_RTC_DEAD_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_RTC0_RTC_DEAD_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_RTC0_RTC_DEAD_ALERT_OFFSET 0x4030 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TEMP0_MAX_TEMP_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TEMP0_MAX_TEMP_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TEMP0_MAX_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TEMP0_MAX_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TEMP0_MAX_TEMP_ALERT_OFFSET 0x4030 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_OFFSET 0x4030 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TEMP0_MIN_TEMP_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TEMP0_MIN_TEMP_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TEMP0_MIN_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TEMP0_MIN_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TEMP0_MIN_TEMP_ALERT_OFFSET 0x4030 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TRNG0_OUT_OF_SPEC_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TRNG0_OUT_OF_SPEC_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TRNG0_OUT_OF_SPEC_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TRNG0_OUT_OF_SPEC_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TRNG0_OUT_OF_SPEC_ALERT_OFFSET 0x4030 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TRNG0_TIMEOUT_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TRNG0_TIMEOUT_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TRNG0_TIMEOUT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TRNG0_TIMEOUT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_TRNG0_TIMEOUT_ALERT_OFFSET 0x4030 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_VOLT0_VOLT_ERR_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_VOLT0_VOLT_ERR_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_VOLT0_VOLT_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_VOLT0_VOLT_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_VOLT0_VOLT_ERR_ALERT_OFFSET 0x4030 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_XO0_JITTERY_TRIM_DIS_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_XO0_JITTERY_TRIM_DIS_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_XO0_JITTERY_TRIM_DIS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_XO0_JITTERY_TRIM_DIS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR0_EN1_XO0_JITTERY_TRIM_DIS_ALERT_OFFSET 0x4030 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CAMO0_BREACH_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CAMO0_BREACH_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CAMO0_BREACH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CAMO0_BREACH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CAMO0_BREACH_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_DMEM_PARITY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_DMEM_PARITY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_DMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_DMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_DMEM_PARITY_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_DRF_PARITY_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_DRF_PARITY_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_DRF_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_DRF_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_DRF_PARITY_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_IMEM_PARITY_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_IMEM_PARITY_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_IMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_IMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_IMEM_PARITY_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_PGM_FAULT_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_PGM_FAULT_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_PGM_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_PGM_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_CRYPTO0_PGM_FAULT_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xc #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x1000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_LSB 0xd #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_MASK 0x2000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xe #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x4000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_LSB 0xf #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_MASK 0x8000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_LSB 0x10 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x10000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_FUSE0_FUSE_DEFAULTS_ALERT_LSB 0x11 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_FUSE0_FUSE_DEFAULTS_ALERT_MASK 0x20000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_FUSE0_FUSE_DEFAULTS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_FUSE0_FUSE_DEFAULTS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_FUSE0_FUSE_DEFAULTS_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_DIFF_FAIL_ALERT_LSB 0x12 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_DIFF_FAIL_ALERT_MASK 0x40000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_DIFF_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_DIFF_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_DIFF_FAIL_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW0_ALERT_LSB 0x13 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW0_ALERT_MASK 0x80000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW0_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW0_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW0_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW1_ALERT_LSB 0x14 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW1_ALERT_MASK 0x100000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW1_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW1_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW1_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW2_ALERT_LSB 0x15 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW2_ALERT_MASK 0x200000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW2_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW2_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW2_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW3_ALERT_LSB 0x16 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW3_ALERT_MASK 0x400000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW3_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW3_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_FW3_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_LSB 0x17 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_MASK 0x800000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_LSB 0x18 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_MASK 0x1000000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_LSB 0x19 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_MASK 0x2000000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_LSB 0x1a #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_MASK 0x4000000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_AES_HKEY_ALERT_LSB 0x1b #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_AES_HKEY_ALERT_MASK 0x8000000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_AES_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_AES_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_AES_HKEY_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_CERT_LOOKUP_ALERT_LSB 0x1c #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_CERT_LOOKUP_ALERT_MASK 0x10000000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_CERT_LOOKUP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_CERT_LOOKUP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_CERT_LOOKUP_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_FLASH_ENTRY_ALERT_LSB 0x1d #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_FLASH_ENTRY_ALERT_MASK 0x20000000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_FLASH_ENTRY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_FLASH_ENTRY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_FLASH_ENTRY_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_PW_ALERT_LSB 0x1e #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_PW_ALERT_MASK 0x40000000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_PW_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_PW_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_PW_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_LSB 0x1f #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_MASK 0x80000000 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_OFFSET 0x4034 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_KEYMGR0_SHA_FAULT_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_KEYMGR0_SHA_FAULT_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_KEYMGR0_SHA_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_KEYMGR0_SHA_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_KEYMGR0_SHA_FAULT_ALERT_OFFSET 0x4038 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_KEYMGR0_SHA_HKEY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_KEYMGR0_SHA_HKEY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_KEYMGR0_SHA_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_KEYMGR0_SHA_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_KEYMGR0_SHA_HKEY_ALERT_OFFSET 0x4038 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_PMU_BATTERY_MON_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_PMU_BATTERY_MON_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_PMU_BATTERY_MON_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_PMU_BATTERY_MON_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_PMU_BATTERY_MON_ALERT_OFFSET 0x4038 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_PMU_PMU_WDOG_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_PMU_PMU_WDOG_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_PMU_PMU_WDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_PMU_PMU_WDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_PMU_PMU_WDOG_ALERT_OFFSET 0x4038 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_RTC0_RTC_DEAD_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_RTC0_RTC_DEAD_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_RTC0_RTC_DEAD_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_RTC0_RTC_DEAD_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_RTC0_RTC_DEAD_ALERT_OFFSET 0x4038 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TEMP0_MAX_TEMP_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TEMP0_MAX_TEMP_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TEMP0_MAX_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TEMP0_MAX_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TEMP0_MAX_TEMP_ALERT_OFFSET 0x4038 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_OFFSET 0x4038 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TEMP0_MIN_TEMP_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TEMP0_MIN_TEMP_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TEMP0_MIN_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TEMP0_MIN_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TEMP0_MIN_TEMP_ALERT_OFFSET 0x4038 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TRNG0_OUT_OF_SPEC_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TRNG0_OUT_OF_SPEC_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TRNG0_OUT_OF_SPEC_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TRNG0_OUT_OF_SPEC_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TRNG0_OUT_OF_SPEC_ALERT_OFFSET 0x4038 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TRNG0_TIMEOUT_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TRNG0_TIMEOUT_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TRNG0_TIMEOUT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TRNG0_TIMEOUT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_TRNG0_TIMEOUT_ALERT_OFFSET 0x4038 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_VOLT0_VOLT_ERR_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_VOLT0_VOLT_ERR_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_VOLT0_VOLT_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_VOLT0_VOLT_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_VOLT0_VOLT_ERR_ALERT_OFFSET 0x4038 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_XO0_JITTERY_TRIM_DIS_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_XO0_JITTERY_TRIM_DIS_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_XO0_JITTERY_TRIM_DIS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_XO0_JITTERY_TRIM_DIS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR1_EN1_XO0_JITTERY_TRIM_DIS_ALERT_OFFSET 0x4038 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CAMO0_BREACH_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CAMO0_BREACH_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CAMO0_BREACH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CAMO0_BREACH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CAMO0_BREACH_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_DMEM_PARITY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_DMEM_PARITY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_DMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_DMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_DMEM_PARITY_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_DRF_PARITY_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_DRF_PARITY_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_DRF_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_DRF_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_DRF_PARITY_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_IMEM_PARITY_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_IMEM_PARITY_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_IMEM_PARITY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_IMEM_PARITY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_IMEM_PARITY_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_PGM_FAULT_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_PGM_FAULT_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_PGM_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_PGM_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_CRYPTO0_PGM_FAULT_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_D_IF_BUS_ERR_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_D_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_I_IF_BUS_ERR_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_I_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_S_IF_BUS_ERR_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_CPU0_S_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DDMA0_IF_BUS_ERR_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xc #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x1000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DDMA0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_LSB 0xd #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_MASK 0x2000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DSPS0_IF_BUS_ERR_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_LSB 0xe #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x4000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DSPS0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_LSB 0xf #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_MASK 0x8000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DUSB0_IF_BUS_ERR_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_LSB 0x10 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_MASK 0x10000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_DBCTRL_DUSB0_IF_UPDATE_WATCHDOG_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_FUSE0_FUSE_DEFAULTS_ALERT_LSB 0x11 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_FUSE0_FUSE_DEFAULTS_ALERT_MASK 0x20000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_FUSE0_FUSE_DEFAULTS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_FUSE0_FUSE_DEFAULTS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_FUSE0_FUSE_DEFAULTS_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_DIFF_FAIL_ALERT_LSB 0x12 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_DIFF_FAIL_ALERT_MASK 0x40000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_DIFF_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_DIFF_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_DIFF_FAIL_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW0_ALERT_LSB 0x13 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW0_ALERT_MASK 0x80000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW0_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW0_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW0_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW1_ALERT_LSB 0x14 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW1_ALERT_MASK 0x100000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW1_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW1_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW1_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW2_ALERT_LSB 0x15 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW2_ALERT_MASK 0x200000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW2_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW2_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW2_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW3_ALERT_LSB 0x16 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW3_ALERT_MASK 0x400000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW3_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW3_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_FW3_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_LSB 0x17 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_MASK 0x800000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_HEARTBEAT_FAIL_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_LSB 0x18 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_MASK 0x1000000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_PROC_OPCODE_HASH_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_LSB 0x19 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_MASK 0x2000000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_GLOBALSEC_SRAM_PARITY_SCRUB_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_LSB 0x1a #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_MASK 0x4000000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_AES_EXEC_CTR_MAX_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_AES_HKEY_ALERT_LSB 0x1b #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_AES_HKEY_ALERT_MASK 0x8000000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_AES_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_AES_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_AES_HKEY_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_CERT_LOOKUP_ALERT_LSB 0x1c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_CERT_LOOKUP_ALERT_MASK 0x10000000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_CERT_LOOKUP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_CERT_LOOKUP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_CERT_LOOKUP_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_FLASH_ENTRY_ALERT_LSB 0x1d #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_FLASH_ENTRY_ALERT_MASK 0x20000000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_FLASH_ENTRY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_FLASH_ENTRY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_FLASH_ENTRY_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_PW_ALERT_LSB 0x1e #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_PW_ALERT_MASK 0x40000000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_PW_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_PW_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_PW_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_LSB 0x1f #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_MASK 0x80000000 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN0_KEYMGR0_SHA_EXEC_CTR_MAX_ALERT_OFFSET 0x403c #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_KEYMGR0_SHA_FAULT_ALERT_LSB 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_KEYMGR0_SHA_FAULT_ALERT_MASK 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_KEYMGR0_SHA_FAULT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_KEYMGR0_SHA_FAULT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_KEYMGR0_SHA_FAULT_ALERT_OFFSET 0x4040 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_KEYMGR0_SHA_HKEY_ALERT_LSB 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_KEYMGR0_SHA_HKEY_ALERT_MASK 0x2 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_KEYMGR0_SHA_HKEY_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_KEYMGR0_SHA_HKEY_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_KEYMGR0_SHA_HKEY_ALERT_OFFSET 0x4040 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_PMU_BATTERY_MON_ALERT_LSB 0x2 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_PMU_BATTERY_MON_ALERT_MASK 0x4 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_PMU_BATTERY_MON_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_PMU_BATTERY_MON_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_PMU_BATTERY_MON_ALERT_OFFSET 0x4040 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_PMU_PMU_WDOG_ALERT_LSB 0x3 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_PMU_PMU_WDOG_ALERT_MASK 0x8 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_PMU_PMU_WDOG_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_PMU_PMU_WDOG_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_PMU_PMU_WDOG_ALERT_OFFSET 0x4040 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_RTC0_RTC_DEAD_ALERT_LSB 0x4 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_RTC0_RTC_DEAD_ALERT_MASK 0x10 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_RTC0_RTC_DEAD_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_RTC0_RTC_DEAD_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_RTC0_RTC_DEAD_ALERT_OFFSET 0x4040 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TEMP0_MAX_TEMP_ALERT_LSB 0x5 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TEMP0_MAX_TEMP_ALERT_MASK 0x20 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TEMP0_MAX_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TEMP0_MAX_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TEMP0_MAX_TEMP_ALERT_OFFSET 0x4040 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_LSB 0x6 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_MASK 0x40 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TEMP0_MAX_TEMP_DIFF_ALERT_OFFSET 0x4040 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TEMP0_MIN_TEMP_ALERT_LSB 0x7 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TEMP0_MIN_TEMP_ALERT_MASK 0x80 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TEMP0_MIN_TEMP_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TEMP0_MIN_TEMP_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TEMP0_MIN_TEMP_ALERT_OFFSET 0x4040 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TRNG0_OUT_OF_SPEC_ALERT_LSB 0x8 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TRNG0_OUT_OF_SPEC_ALERT_MASK 0x100 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TRNG0_OUT_OF_SPEC_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TRNG0_OUT_OF_SPEC_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TRNG0_OUT_OF_SPEC_ALERT_OFFSET 0x4040 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TRNG0_TIMEOUT_ALERT_LSB 0x9 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TRNG0_TIMEOUT_ALERT_MASK 0x200 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TRNG0_TIMEOUT_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TRNG0_TIMEOUT_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_TRNG0_TIMEOUT_ALERT_OFFSET 0x4040 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_VOLT0_VOLT_ERR_ALERT_LSB 0xa #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_VOLT0_VOLT_ERR_ALERT_MASK 0x400 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_VOLT0_VOLT_ERR_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_VOLT0_VOLT_ERR_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_VOLT0_VOLT_ERR_ALERT_OFFSET 0x4040 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_XO0_JITTERY_TRIM_DIS_ALERT_LSB 0xb #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_XO0_JITTERY_TRIM_DIS_ALERT_MASK 0x800 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_XO0_JITTERY_TRIM_DIS_ALERT_SIZE 0x1 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_XO0_JITTERY_TRIM_DIS_ALERT_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_DLYCTR2_EN1_XO0_JITTERY_TRIM_DIS_ALERT_OFFSET 0x4040 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_NMI_EN_LSB 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_NMI_EN_MASK 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_NMI_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_NMI_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_NMI_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_DLYCTR0_EN_LSB 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_DLYCTR0_EN_MASK 0x2 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_DLYCTR0_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_DLYCTR0_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_DLYCTR0_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_DLYCTR1_EN_LSB 0x2 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_DLYCTR1_EN_MASK 0x4 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_DLYCTR1_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_DLYCTR1_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_DLYCTR1_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_DLYCTR2_EN_LSB 0x3 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_DLYCTR2_EN_MASK 0x8 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_DLYCTR2_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_DLYCTR2_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPA_DLYCTR2_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_NMI_EN_LSB 0x4 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_NMI_EN_MASK 0x10 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_NMI_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_NMI_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_NMI_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_DLYCTR0_EN_LSB 0x5 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_DLYCTR0_EN_MASK 0x20 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_DLYCTR0_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_DLYCTR0_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_DLYCTR0_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_DLYCTR1_EN_LSB 0x6 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_DLYCTR1_EN_MASK 0x40 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_DLYCTR1_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_DLYCTR1_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_DLYCTR1_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_DLYCTR2_EN_LSB 0x7 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_DLYCTR2_EN_MASK 0x80 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_DLYCTR2_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_DLYCTR2_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPB_DLYCTR2_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_NMI_EN_LSB 0x8 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_NMI_EN_MASK 0x100 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_NMI_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_NMI_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_NMI_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_DLYCTR0_EN_LSB 0x9 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_DLYCTR0_EN_MASK 0x200 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_DLYCTR0_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_DLYCTR0_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_DLYCTR0_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_DLYCTR1_EN_LSB 0xa #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_DLYCTR1_EN_MASK 0x400 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_DLYCTR1_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_DLYCTR1_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_DLYCTR1_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_DLYCTR2_EN_LSB 0xb #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_DLYCTR2_EN_MASK 0x800 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_DLYCTR2_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_DLYCTR2_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_GROUPC_DLYCTR2_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR0_WDOG_DIS_LSB 0xc #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR0_WDOG_DIS_MASK 0x1000 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR0_WDOG_DIS_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR0_WDOG_DIS_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR0_WDOG_DIS_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR0_SHUTDOWN_EN_LSB 0xd #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR0_SHUTDOWN_EN_MASK 0x2000 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR0_SHUTDOWN_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR0_SHUTDOWN_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR0_SHUTDOWN_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR1_WDOG_DIS_LSB 0xe #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR1_WDOG_DIS_MASK 0x4000 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR1_WDOG_DIS_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR1_WDOG_DIS_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR1_WDOG_DIS_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR1_SHUTDOWN_EN_LSB 0xf #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR1_SHUTDOWN_EN_MASK 0x8000 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR1_SHUTDOWN_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR1_SHUTDOWN_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR1_SHUTDOWN_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR2_WDOG_DIS_LSB 0x10 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR2_WDOG_DIS_MASK 0x10000 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR2_WDOG_DIS_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR2_WDOG_DIS_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR2_WDOG_DIS_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR2_SHUTDOWN_EN_LSB 0x11 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR2_SHUTDOWN_EN_MASK 0x20000 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR2_SHUTDOWN_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR2_SHUTDOWN_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_DLYCTR2_SHUTDOWN_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_WATCHDOG_RESET_SHUTDOWN_EN_LSB 0x12 #define GC_GLOBALSEC_ALERT_CONTROL_WATCHDOG_RESET_SHUTDOWN_EN_MASK 0x40000 #define GC_GLOBALSEC_ALERT_CONTROL_WATCHDOG_RESET_SHUTDOWN_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_WATCHDOG_RESET_SHUTDOWN_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_WATCHDOG_RESET_SHUTDOWN_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_WATCHDOG_RESET_FIREWALL_EN_LSB 0x13 #define GC_GLOBALSEC_ALERT_CONTROL_WATCHDOG_RESET_FIREWALL_EN_MASK 0x80000 #define GC_GLOBALSEC_ALERT_CONTROL_WATCHDOG_RESET_FIREWALL_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_WATCHDOG_RESET_FIREWALL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_WATCHDOG_RESET_FIREWALL_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_PROC_LOCKUP_SHUTDOWN_EN_LSB 0x14 #define GC_GLOBALSEC_ALERT_CONTROL_PROC_LOCKUP_SHUTDOWN_EN_MASK 0x100000 #define GC_GLOBALSEC_ALERT_CONTROL_PROC_LOCKUP_SHUTDOWN_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_PROC_LOCKUP_SHUTDOWN_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_PROC_LOCKUP_SHUTDOWN_EN_OFFSET 0x405c #define GC_GLOBALSEC_ALERT_CONTROL_PROC_LOCKUP_FIREWALL_EN_LSB 0x15 #define GC_GLOBALSEC_ALERT_CONTROL_PROC_LOCKUP_FIREWALL_EN_MASK 0x200000 #define GC_GLOBALSEC_ALERT_CONTROL_PROC_LOCKUP_FIREWALL_EN_SIZE 0x1 #define GC_GLOBALSEC_ALERT_CONTROL_PROC_LOCKUP_FIREWALL_EN_DEFAULT 0x0 #define GC_GLOBALSEC_ALERT_CONTROL_PROC_LOCKUP_FIREWALL_EN_OFFSET 0x405c #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_DIG_IN_LSB 0x0 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_DIG_IN_MASK 0x3 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_DIG_IN_SIZE 0x2 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_DIG_IN_DEFAULT 0x3 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_DIG_IN_OFFSET 0x40d4 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_ENB_LSB 0x2 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_ENB_MASK 0xc #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_ENB_SIZE 0x2 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_ENB_DEFAULT 0x3 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_ENB_OFFSET 0x40d4 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_PWR_RDY_LSB 0x4 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_PWR_RDY_MASK 0x10 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_PWR_RDY_SIZE 0x1 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_PWR_RDY_DEFAULT 0x0 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_PWR_RDY_OFFSET 0x40d4 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_PWR_SW_ENB_LSB 0x5 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_PWR_SW_ENB_MASK 0x20 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_PWR_SW_ENB_SIZE 0x1 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_PWR_SW_ENB_DEFAULT 0x1 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_PWR_SW_ENB_OFFSET 0x40d4 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_RST_LSB 0x6 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_RST_MASK 0x40 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_RST_SIZE 0x1 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_RST_DEFAULT 0x0 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_RST_OFFSET 0x40d4 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_SEL_LSB 0x7 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_SEL_MASK 0x380 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_SEL_SIZE 0x3 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_SEL_DEFAULT 0x0 #define GC_GLOBALSEC_ANTEST_SEN_LSR_INPUT_SEL_OFFSET 0x40d4 #define GC_GLOBALSEC_VERSION_CHANGE_LSB 0x0 #define GC_GLOBALSEC_VERSION_CHANGE_MASK 0xffffff #define GC_GLOBALSEC_VERSION_CHANGE_SIZE 0x18 #define GC_GLOBALSEC_VERSION_CHANGE_DEFAULT 0x10913 #define GC_GLOBALSEC_VERSION_CHANGE_OFFSET 0x40dc #define GC_GLOBALSEC_VERSION_REVISION_LSB 0x18 #define GC_GLOBALSEC_VERSION_REVISION_MASK 0xff000000 #define GC_GLOBALSEC_VERSION_REVISION_SIZE 0x8 #define GC_GLOBALSEC_VERSION_REVISION_DEFAULT 0x59 #define GC_GLOBALSEC_VERSION_REVISION_OFFSET 0x40dc #define GC_I2C_CTRL_PHASESTEPS_P0_LSB 0x0 #define GC_I2C_CTRL_PHASESTEPS_P0_MASK 0x3f #define GC_I2C_CTRL_PHASESTEPS_P0_SIZE 0x6 #define GC_I2C_CTRL_PHASESTEPS_P0_DEFAULT 0x6 #define GC_I2C_CTRL_PHASESTEPS_P0_OFFSET 0x8 #define GC_I2C_CTRL_PHASESTEPS_P1_LSB 0x6 #define GC_I2C_CTRL_PHASESTEPS_P1_MASK 0xfc0 #define GC_I2C_CTRL_PHASESTEPS_P1_SIZE 0x6 #define GC_I2C_CTRL_PHASESTEPS_P1_DEFAULT 0x6 #define GC_I2C_CTRL_PHASESTEPS_P1_OFFSET 0x8 #define GC_I2C_CTRL_PHASESTEPS_P2_LSB 0xc #define GC_I2C_CTRL_PHASESTEPS_P2_MASK 0x3f000 #define GC_I2C_CTRL_PHASESTEPS_P2_SIZE 0x6 #define GC_I2C_CTRL_PHASESTEPS_P2_DEFAULT 0x8 #define GC_I2C_CTRL_PHASESTEPS_P2_OFFSET 0x8 #define GC_I2C_CTRL_PHASESTEPS_P3_LSB 0x12 #define GC_I2C_CTRL_PHASESTEPS_P3_MASK 0xfc0000 #define GC_I2C_CTRL_PHASESTEPS_P3_SIZE 0x6 #define GC_I2C_CTRL_PHASESTEPS_P3_DEFAULT 0x6 #define GC_I2C_CTRL_PHASESTEPS_P3_OFFSET 0x8 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_PHASE0_LSB 0x0 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_PHASE0_MASK 0x1 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_PHASE0_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_PHASE0_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_PHASE1_LSB 0x1 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_PHASE1_MASK 0x2 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_PHASE1_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_PHASE1_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_PHASE1_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_PHASE2_LSB 0x2 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_PHASE2_MASK 0x4 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_PHASE2_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_PHASE2_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_PHASE2_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_LSB 0x3 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_MASK 0x8 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_VAL_FREE_BUS_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_WRITE0_PHASE0_LSB 0x4 #define GC_I2C_CTRL_SDA_VAL_WRITE0_PHASE0_MASK 0x10 #define GC_I2C_CTRL_SDA_VAL_WRITE0_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_WRITE0_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_VAL_WRITE0_PHASE0_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_WRITE0_PHASE1_LSB 0x5 #define GC_I2C_CTRL_SDA_VAL_WRITE0_PHASE1_MASK 0x20 #define GC_I2C_CTRL_SDA_VAL_WRITE0_PHASE1_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_WRITE0_PHASE1_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_VAL_WRITE0_PHASE1_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_WRITE0_PHASE2_LSB 0x6 #define GC_I2C_CTRL_SDA_VAL_WRITE0_PHASE2_MASK 0x40 #define GC_I2C_CTRL_SDA_VAL_WRITE0_PHASE2_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_WRITE0_PHASE2_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_VAL_WRITE0_PHASE2_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_STANDBY_VAL0_LSB 0x7 #define GC_I2C_CTRL_SDA_VAL_STANDBY_VAL0_MASK 0x80 #define GC_I2C_CTRL_SDA_VAL_STANDBY_VAL0_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_STANDBY_VAL0_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_VAL_STANDBY_VAL0_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_WRITE1_PHASE0_LSB 0x8 #define GC_I2C_CTRL_SDA_VAL_WRITE1_PHASE0_MASK 0x100 #define GC_I2C_CTRL_SDA_VAL_WRITE1_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_WRITE1_PHASE0_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_VAL_WRITE1_PHASE0_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_WRITE1_PHASE1_LSB 0x9 #define GC_I2C_CTRL_SDA_VAL_WRITE1_PHASE1_MASK 0x200 #define GC_I2C_CTRL_SDA_VAL_WRITE1_PHASE1_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_WRITE1_PHASE1_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_VAL_WRITE1_PHASE1_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_WRITE1_PHASE2_LSB 0xa #define GC_I2C_CTRL_SDA_VAL_WRITE1_PHASE2_MASK 0x400 #define GC_I2C_CTRL_SDA_VAL_WRITE1_PHASE2_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_WRITE1_PHASE2_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_VAL_WRITE1_PHASE2_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_STANDBY_VAL1_LSB 0xb #define GC_I2C_CTRL_SDA_VAL_STANDBY_VAL1_MASK 0x800 #define GC_I2C_CTRL_SDA_VAL_STANDBY_VAL1_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_STANDBY_VAL1_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_VAL_STANDBY_VAL1_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_READ_PHASE0_LSB 0xc #define GC_I2C_CTRL_SDA_VAL_READ_PHASE0_MASK 0x1000 #define GC_I2C_CTRL_SDA_VAL_READ_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_READ_PHASE0_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_VAL_READ_PHASE0_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_READ_PHASE1_LSB 0xd #define GC_I2C_CTRL_SDA_VAL_READ_PHASE1_MASK 0x2000 #define GC_I2C_CTRL_SDA_VAL_READ_PHASE1_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_READ_PHASE1_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_VAL_READ_PHASE1_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_READ_PHASE2_LSB 0xe #define GC_I2C_CTRL_SDA_VAL_READ_PHASE2_MASK 0x4000 #define GC_I2C_CTRL_SDA_VAL_READ_PHASE2_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_READ_PHASE2_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_VAL_READ_PHASE2_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_HOLD0_PHASE0_LSB 0xf #define GC_I2C_CTRL_SDA_VAL_HOLD0_PHASE0_MASK 0x8000 #define GC_I2C_CTRL_SDA_VAL_HOLD0_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_HOLD0_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_VAL_HOLD0_PHASE0_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_START_PHASE0_LSB 0x10 #define GC_I2C_CTRL_SDA_VAL_START_PHASE0_MASK 0x10000 #define GC_I2C_CTRL_SDA_VAL_START_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_START_PHASE0_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_VAL_START_PHASE0_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_START_PHASE1_LSB 0x11 #define GC_I2C_CTRL_SDA_VAL_START_PHASE1_MASK 0x20000 #define GC_I2C_CTRL_SDA_VAL_START_PHASE1_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_START_PHASE1_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_VAL_START_PHASE1_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_START_PHASE2_LSB 0x12 #define GC_I2C_CTRL_SDA_VAL_START_PHASE2_MASK 0x40000 #define GC_I2C_CTRL_SDA_VAL_START_PHASE2_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_START_PHASE2_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_VAL_START_PHASE2_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_ERROR_SCL_CONFLICT_LSB 0x13 #define GC_I2C_CTRL_SDA_VAL_ERROR_SCL_CONFLICT_MASK 0x80000 #define GC_I2C_CTRL_SDA_VAL_ERROR_SCL_CONFLICT_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_ERROR_SCL_CONFLICT_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_VAL_ERROR_SCL_CONFLICT_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_STOP_PHASE0_LSB 0x14 #define GC_I2C_CTRL_SDA_VAL_STOP_PHASE0_MASK 0x100000 #define GC_I2C_CTRL_SDA_VAL_STOP_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_STOP_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_VAL_STOP_PHASE0_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_STOP_PHASE1_LSB 0x15 #define GC_I2C_CTRL_SDA_VAL_STOP_PHASE1_MASK 0x200000 #define GC_I2C_CTRL_SDA_VAL_STOP_PHASE1_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_STOP_PHASE1_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_VAL_STOP_PHASE1_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_STOP_PHASE2_LSB 0x16 #define GC_I2C_CTRL_SDA_VAL_STOP_PHASE2_MASK 0x400000 #define GC_I2C_CTRL_SDA_VAL_STOP_PHASE2_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_STOP_PHASE2_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_VAL_STOP_PHASE2_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_ERROR_SDA_CONFLICT_LSB 0x17 #define GC_I2C_CTRL_SDA_VAL_ERROR_SDA_CONFLICT_MASK 0x800000 #define GC_I2C_CTRL_SDA_VAL_ERROR_SDA_CONFLICT_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_ERROR_SDA_CONFLICT_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_VAL_ERROR_SDA_CONFLICT_OFFSET 0xc #define GC_I2C_CTRL_SDA_VAL_SCL0_PHASE0_LSB 0x18 #define GC_I2C_CTRL_SDA_VAL_SCL0_PHASE0_MASK 0x1000000 #define GC_I2C_CTRL_SDA_VAL_SCL0_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_VAL_SCL0_PHASE0_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_VAL_SCL0_PHASE0_OFFSET 0xc #define GC_I2C_CTRL_SDA_OVRD_HOLD0_PHASE0_LSB 0x0 #define GC_I2C_CTRL_SDA_OVRD_HOLD0_PHASE0_MASK 0x1 #define GC_I2C_CTRL_SDA_OVRD_HOLD0_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_OVRD_HOLD0_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_OVRD_HOLD0_PHASE0_OFFSET 0x10 #define GC_I2C_CTRL_SDA_OVRD_READ_PHASE0_LSB 0x1 #define GC_I2C_CTRL_SDA_OVRD_READ_PHASE0_MASK 0x2 #define GC_I2C_CTRL_SDA_OVRD_READ_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_OVRD_READ_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_OVRD_READ_PHASE0_OFFSET 0x10 #define GC_I2C_CTRL_SDA_OVRD_SCL0_PHASE0_LSB 0x2 #define GC_I2C_CTRL_SDA_OVRD_SCL0_PHASE0_MASK 0x4 #define GC_I2C_CTRL_SDA_OVRD_SCL0_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_OVRD_SCL0_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_OVRD_SCL0_PHASE0_OFFSET 0x10 #define GC_I2C_CTRL_SDA_OVRD_START_PHASE0_LSB 0x3 #define GC_I2C_CTRL_SDA_OVRD_START_PHASE0_MASK 0x8 #define GC_I2C_CTRL_SDA_OVRD_START_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_OVRD_START_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_OVRD_START_PHASE0_OFFSET 0x10 #define GC_I2C_CTRL_SDA_OVRD_STOP_PHASE0_LSB 0x4 #define GC_I2C_CTRL_SDA_OVRD_STOP_PHASE0_MASK 0x10 #define GC_I2C_CTRL_SDA_OVRD_STOP_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_OVRD_STOP_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_OVRD_STOP_PHASE0_OFFSET 0x10 #define GC_I2C_CTRL_SDA_OVRD_WRITE0_PHASE0_LSB 0x5 #define GC_I2C_CTRL_SDA_OVRD_WRITE0_PHASE0_MASK 0x20 #define GC_I2C_CTRL_SDA_OVRD_WRITE0_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_OVRD_WRITE0_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_OVRD_WRITE0_PHASE0_OFFSET 0x10 #define GC_I2C_CTRL_SDA_OVRD_WRITE1_PHASE0_LSB 0x6 #define GC_I2C_CTRL_SDA_OVRD_WRITE1_PHASE0_MASK 0x40 #define GC_I2C_CTRL_SDA_OVRD_WRITE1_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_OVRD_WRITE1_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_OVRD_WRITE1_PHASE0_OFFSET 0x10 #define GC_I2C_CTRL_SDA_OVRD_FREE_BUS_PHASE0_LSB 0x7 #define GC_I2C_CTRL_SDA_OVRD_FREE_BUS_PHASE0_MASK 0x80 #define GC_I2C_CTRL_SDA_OVRD_FREE_BUS_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SDA_OVRD_FREE_BUS_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_OVRD_FREE_BUS_PHASE0_OFFSET 0x10 #define GC_I2C_CTRL_SDA_OVRD_FREE_BUS_PHASE1_LSB 0x8 #define GC_I2C_CTRL_SDA_OVRD_FREE_BUS_PHASE1_MASK 0x100 #define GC_I2C_CTRL_SDA_OVRD_FREE_BUS_PHASE1_SIZE 0x1 #define GC_I2C_CTRL_SDA_OVRD_FREE_BUS_PHASE1_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_OVRD_FREE_BUS_PHASE1_OFFSET 0x10 #define GC_I2C_CTRL_SDA_OVRD_FREE_BUS_PHASE2_LSB 0x9 #define GC_I2C_CTRL_SDA_OVRD_FREE_BUS_PHASE2_MASK 0x200 #define GC_I2C_CTRL_SDA_OVRD_FREE_BUS_PHASE2_SIZE 0x1 #define GC_I2C_CTRL_SDA_OVRD_FREE_BUS_PHASE2_DEFAULT 0x1 #define GC_I2C_CTRL_SDA_OVRD_FREE_BUS_PHASE2_OFFSET 0x10 #define GC_I2C_CTRL_SDA_OVRD_ERROR_SDA_CONFLICT_LSB 0xa #define GC_I2C_CTRL_SDA_OVRD_ERROR_SDA_CONFLICT_MASK 0x400 #define GC_I2C_CTRL_SDA_OVRD_ERROR_SDA_CONFLICT_SIZE 0x1 #define GC_I2C_CTRL_SDA_OVRD_ERROR_SDA_CONFLICT_DEFAULT 0x0 #define GC_I2C_CTRL_SDA_OVRD_ERROR_SDA_CONFLICT_OFFSET 0x10 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_PHASE0_LSB 0x0 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_PHASE0_MASK 0x1 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_PHASE0_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_PHASE1_LSB 0x1 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_PHASE1_MASK 0x2 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_PHASE1_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_PHASE1_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_PHASE1_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_PHASE2_LSB 0x2 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_PHASE2_MASK 0x4 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_PHASE2_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_PHASE2_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_PHASE2_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_LSB 0x3 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_MASK 0x8 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_VAL_FREE_BUS_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_WRITE0_PHASE0_LSB 0x4 #define GC_I2C_CTRL_SCL_VAL_WRITE0_PHASE0_MASK 0x10 #define GC_I2C_CTRL_SCL_VAL_WRITE0_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_WRITE0_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_VAL_WRITE0_PHASE0_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_WRITE0_PHASE1_LSB 0x5 #define GC_I2C_CTRL_SCL_VAL_WRITE0_PHASE1_MASK 0x20 #define GC_I2C_CTRL_SCL_VAL_WRITE0_PHASE1_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_WRITE0_PHASE1_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_VAL_WRITE0_PHASE1_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_WRITE0_PHASE2_LSB 0x6 #define GC_I2C_CTRL_SCL_VAL_WRITE0_PHASE2_MASK 0x40 #define GC_I2C_CTRL_SCL_VAL_WRITE0_PHASE2_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_WRITE0_PHASE2_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_VAL_WRITE0_PHASE2_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_STANDBY_VAL0_LSB 0x7 #define GC_I2C_CTRL_SCL_VAL_STANDBY_VAL0_MASK 0x80 #define GC_I2C_CTRL_SCL_VAL_STANDBY_VAL0_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_STANDBY_VAL0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_VAL_STANDBY_VAL0_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_WRITE1_PHASE0_LSB 0x8 #define GC_I2C_CTRL_SCL_VAL_WRITE1_PHASE0_MASK 0x100 #define GC_I2C_CTRL_SCL_VAL_WRITE1_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_WRITE1_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_VAL_WRITE1_PHASE0_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_WRITE1_PHASE1_LSB 0x9 #define GC_I2C_CTRL_SCL_VAL_WRITE1_PHASE1_MASK 0x200 #define GC_I2C_CTRL_SCL_VAL_WRITE1_PHASE1_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_WRITE1_PHASE1_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_VAL_WRITE1_PHASE1_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_WRITE1_PHASE2_LSB 0xa #define GC_I2C_CTRL_SCL_VAL_WRITE1_PHASE2_MASK 0x400 #define GC_I2C_CTRL_SCL_VAL_WRITE1_PHASE2_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_WRITE1_PHASE2_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_VAL_WRITE1_PHASE2_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_STANDBY_VAL1_LSB 0xb #define GC_I2C_CTRL_SCL_VAL_STANDBY_VAL1_MASK 0x800 #define GC_I2C_CTRL_SCL_VAL_STANDBY_VAL1_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_STANDBY_VAL1_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_VAL_STANDBY_VAL1_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_READ_PHASE0_LSB 0xc #define GC_I2C_CTRL_SCL_VAL_READ_PHASE0_MASK 0x1000 #define GC_I2C_CTRL_SCL_VAL_READ_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_READ_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_VAL_READ_PHASE0_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_READ_PHASE1_LSB 0xd #define GC_I2C_CTRL_SCL_VAL_READ_PHASE1_MASK 0x2000 #define GC_I2C_CTRL_SCL_VAL_READ_PHASE1_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_READ_PHASE1_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_VAL_READ_PHASE1_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_READ_PHASE2_LSB 0xe #define GC_I2C_CTRL_SCL_VAL_READ_PHASE2_MASK 0x4000 #define GC_I2C_CTRL_SCL_VAL_READ_PHASE2_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_READ_PHASE2_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_VAL_READ_PHASE2_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_HOLD0_PHASE0_LSB 0xf #define GC_I2C_CTRL_SCL_VAL_HOLD0_PHASE0_MASK 0x8000 #define GC_I2C_CTRL_SCL_VAL_HOLD0_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_HOLD0_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_VAL_HOLD0_PHASE0_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_START_PHASE0_LSB 0x10 #define GC_I2C_CTRL_SCL_VAL_START_PHASE0_MASK 0x10000 #define GC_I2C_CTRL_SCL_VAL_START_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_START_PHASE0_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_VAL_START_PHASE0_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_START_PHASE1_LSB 0x11 #define GC_I2C_CTRL_SCL_VAL_START_PHASE1_MASK 0x20000 #define GC_I2C_CTRL_SCL_VAL_START_PHASE1_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_START_PHASE1_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_VAL_START_PHASE1_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_START_PHASE2_LSB 0x12 #define GC_I2C_CTRL_SCL_VAL_START_PHASE2_MASK 0x40000 #define GC_I2C_CTRL_SCL_VAL_START_PHASE2_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_START_PHASE2_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_VAL_START_PHASE2_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_ERROR_SCL_CONFLICT_LSB 0x13 #define GC_I2C_CTRL_SCL_VAL_ERROR_SCL_CONFLICT_MASK 0x80000 #define GC_I2C_CTRL_SCL_VAL_ERROR_SCL_CONFLICT_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_ERROR_SCL_CONFLICT_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_VAL_ERROR_SCL_CONFLICT_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_STOP_PHASE0_LSB 0x14 #define GC_I2C_CTRL_SCL_VAL_STOP_PHASE0_MASK 0x100000 #define GC_I2C_CTRL_SCL_VAL_STOP_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_STOP_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_VAL_STOP_PHASE0_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_STOP_PHASE1_LSB 0x15 #define GC_I2C_CTRL_SCL_VAL_STOP_PHASE1_MASK 0x200000 #define GC_I2C_CTRL_SCL_VAL_STOP_PHASE1_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_STOP_PHASE1_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_VAL_STOP_PHASE1_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_STOP_PHASE2_LSB 0x16 #define GC_I2C_CTRL_SCL_VAL_STOP_PHASE2_MASK 0x400000 #define GC_I2C_CTRL_SCL_VAL_STOP_PHASE2_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_STOP_PHASE2_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_VAL_STOP_PHASE2_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_ERROR_SDA_CONFLICT_LSB 0x17 #define GC_I2C_CTRL_SCL_VAL_ERROR_SDA_CONFLICT_MASK 0x800000 #define GC_I2C_CTRL_SCL_VAL_ERROR_SDA_CONFLICT_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_ERROR_SDA_CONFLICT_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_VAL_ERROR_SDA_CONFLICT_OFFSET 0x14 #define GC_I2C_CTRL_SCL_VAL_SCL0_PHASE0_LSB 0x18 #define GC_I2C_CTRL_SCL_VAL_SCL0_PHASE0_MASK 0x1000000 #define GC_I2C_CTRL_SCL_VAL_SCL0_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_VAL_SCL0_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_VAL_SCL0_PHASE0_OFFSET 0x14 #define GC_I2C_CTRL_SCL_OVRD_HOLD0_PHASE0_LSB 0x0 #define GC_I2C_CTRL_SCL_OVRD_HOLD0_PHASE0_MASK 0x1 #define GC_I2C_CTRL_SCL_OVRD_HOLD0_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_OVRD_HOLD0_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_OVRD_HOLD0_PHASE0_OFFSET 0x18 #define GC_I2C_CTRL_SCL_OVRD_READ_PHASE0_LSB 0x1 #define GC_I2C_CTRL_SCL_OVRD_READ_PHASE0_MASK 0x2 #define GC_I2C_CTRL_SCL_OVRD_READ_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_OVRD_READ_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_OVRD_READ_PHASE0_OFFSET 0x18 #define GC_I2C_CTRL_SCL_OVRD_SCL0_PHASE0_LSB 0x2 #define GC_I2C_CTRL_SCL_OVRD_SCL0_PHASE0_MASK 0x4 #define GC_I2C_CTRL_SCL_OVRD_SCL0_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_OVRD_SCL0_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_OVRD_SCL0_PHASE0_OFFSET 0x18 #define GC_I2C_CTRL_SCL_OVRD_START_PHASE0_LSB 0x3 #define GC_I2C_CTRL_SCL_OVRD_START_PHASE0_MASK 0x8 #define GC_I2C_CTRL_SCL_OVRD_START_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_OVRD_START_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_OVRD_START_PHASE0_OFFSET 0x18 #define GC_I2C_CTRL_SCL_OVRD_STOP_PHASE0_LSB 0x4 #define GC_I2C_CTRL_SCL_OVRD_STOP_PHASE0_MASK 0x10 #define GC_I2C_CTRL_SCL_OVRD_STOP_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_OVRD_STOP_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_OVRD_STOP_PHASE0_OFFSET 0x18 #define GC_I2C_CTRL_SCL_OVRD_WRITE0_PHASE0_LSB 0x5 #define GC_I2C_CTRL_SCL_OVRD_WRITE0_PHASE0_MASK 0x20 #define GC_I2C_CTRL_SCL_OVRD_WRITE0_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_OVRD_WRITE0_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_OVRD_WRITE0_PHASE0_OFFSET 0x18 #define GC_I2C_CTRL_SCL_OVRD_WRITE1_PHASE0_LSB 0x6 #define GC_I2C_CTRL_SCL_OVRD_WRITE1_PHASE0_MASK 0x40 #define GC_I2C_CTRL_SCL_OVRD_WRITE1_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_OVRD_WRITE1_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_OVRD_WRITE1_PHASE0_OFFSET 0x18 #define GC_I2C_CTRL_SCL_OVRD_FREE_BUS_PHASE0_LSB 0x7 #define GC_I2C_CTRL_SCL_OVRD_FREE_BUS_PHASE0_MASK 0x80 #define GC_I2C_CTRL_SCL_OVRD_FREE_BUS_PHASE0_SIZE 0x1 #define GC_I2C_CTRL_SCL_OVRD_FREE_BUS_PHASE0_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_OVRD_FREE_BUS_PHASE0_OFFSET 0x18 #define GC_I2C_CTRL_SCL_OVRD_FREE_BUS_PHASE1_LSB 0x8 #define GC_I2C_CTRL_SCL_OVRD_FREE_BUS_PHASE1_MASK 0x100 #define GC_I2C_CTRL_SCL_OVRD_FREE_BUS_PHASE1_SIZE 0x1 #define GC_I2C_CTRL_SCL_OVRD_FREE_BUS_PHASE1_DEFAULT 0x0 #define GC_I2C_CTRL_SCL_OVRD_FREE_BUS_PHASE1_OFFSET 0x18 #define GC_I2C_CTRL_SCL_OVRD_FREE_BUS_PHASE2_LSB 0x9 #define GC_I2C_CTRL_SCL_OVRD_FREE_BUS_PHASE2_MASK 0x200 #define GC_I2C_CTRL_SCL_OVRD_FREE_BUS_PHASE2_SIZE 0x1 #define GC_I2C_CTRL_SCL_OVRD_FREE_BUS_PHASE2_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_OVRD_FREE_BUS_PHASE2_OFFSET 0x18 #define GC_I2C_CTRL_SCL_OVRD_ERROR_SDA_CONFLICT_LSB 0xa #define GC_I2C_CTRL_SCL_OVRD_ERROR_SDA_CONFLICT_MASK 0x400 #define GC_I2C_CTRL_SCL_OVRD_ERROR_SDA_CONFLICT_SIZE 0x1 #define GC_I2C_CTRL_SCL_OVRD_ERROR_SDA_CONFLICT_DEFAULT 0x1 #define GC_I2C_CTRL_SCL_OVRD_ERROR_SDA_CONFLICT_OFFSET 0x18 #define GC_I2C_CTRL_AL_EN_LSB 0x0 #define GC_I2C_CTRL_AL_EN_MASK 0x1 #define GC_I2C_CTRL_AL_EN_SIZE 0x1 #define GC_I2C_CTRL_AL_EN_DEFAULT 0x1 #define GC_I2C_CTRL_AL_EN_OFFSET 0x20 #define GC_I2C_CTRL_AL_PHASEMASK_LSB 0x1 #define GC_I2C_CTRL_AL_PHASEMASK_MASK 0x1e #define GC_I2C_CTRL_AL_PHASEMASK_SIZE 0x4 #define GC_I2C_CTRL_AL_PHASEMASK_DEFAULT 0xf #define GC_I2C_CTRL_AL_PHASEMASK_OFFSET 0x20 #define GC_I2C_CTRL_CS_EN_LSB 0x0 #define GC_I2C_CTRL_CS_EN_MASK 0x1 #define GC_I2C_CTRL_CS_EN_SIZE 0x1 #define GC_I2C_CTRL_CS_EN_DEFAULT 0x1 #define GC_I2C_CTRL_CS_EN_OFFSET 0x24 #define GC_I2C_CTRL_CS_TIMEOUTEN_LSB 0x1 #define GC_I2C_CTRL_CS_TIMEOUTEN_MASK 0x2 #define GC_I2C_CTRL_CS_TIMEOUTEN_SIZE 0x1 #define GC_I2C_CTRL_CS_TIMEOUTEN_DEFAULT 0x1 #define GC_I2C_CTRL_CS_TIMEOUTEN_OFFSET 0x24 #define GC_I2C_CTRL_CS_TIMEOUTVAL_LSB 0x2 #define GC_I2C_CTRL_CS_TIMEOUTVAL_MASK 0x3ffffc #define GC_I2C_CTRL_CS_TIMEOUTVAL_SIZE 0x14 #define GC_I2C_CTRL_CS_TIMEOUTVAL_DEFAULT 0x4e20 #define GC_I2C_CTRL_CS_TIMEOUTVAL_OFFSET 0x24 #define GC_I2C_INST_RESERVED0_LSB 0x0 #define GC_I2C_INST_RESERVED0_MASK 0x1 #define GC_I2C_INST_RESERVED0_SIZE 0x1 #define GC_I2C_INST_RESERVED0_DEFAULT 0x0 #define GC_I2C_INST_RESERVED0_OFFSET 0x28 #define GC_I2C_INST_START_LSB 0x1 #define GC_I2C_INST_START_MASK 0x2 #define GC_I2C_INST_START_SIZE 0x1 #define GC_I2C_INST_START_DEFAULT 0x0 #define GC_I2C_INST_START_OFFSET 0x28 #define GC_I2C_INST_FWDEVADDR_LSB 0x2 #define GC_I2C_INST_FWDEVADDR_MASK 0x4 #define GC_I2C_INST_FWDEVADDR_SIZE 0x1 #define GC_I2C_INST_FWDEVADDR_DEFAULT 0x0 #define GC_I2C_INST_FWDEVADDR_OFFSET 0x28 #define GC_I2C_INST_FWBYTESCOUNT_LSB 0x3 #define GC_I2C_INST_FWBYTESCOUNT_MASK 0x38 #define GC_I2C_INST_FWBYTESCOUNT_SIZE 0x3 #define GC_I2C_INST_FWBYTESCOUNT_DEFAULT 0x0 #define GC_I2C_INST_FWBYTESCOUNT_OFFSET 0x28 #define GC_I2C_INST_SCL0_LSB 0x6 #define GC_I2C_INST_SCL0_MASK 0x40 #define GC_I2C_INST_SCL0_SIZE 0x1 #define GC_I2C_INST_SCL0_DEFAULT 0x0 #define GC_I2C_INST_SCL0_OFFSET 0x28 #define GC_I2C_INST_FREE_BUS_LSB 0x7 #define GC_I2C_INST_FREE_BUS_MASK 0x80 #define GC_I2C_INST_FREE_BUS_SIZE 0x1 #define GC_I2C_INST_FREE_BUS_DEFAULT 0x0 #define GC_I2C_INST_FREE_BUS_OFFSET 0x28 #define GC_I2C_INST_FIRSTSTOP_LSB 0x8 #define GC_I2C_INST_FIRSTSTOP_MASK 0x100 #define GC_I2C_INST_FIRSTSTOP_SIZE 0x1 #define GC_I2C_INST_FIRSTSTOP_DEFAULT 0x0 #define GC_I2C_INST_FIRSTSTOP_OFFSET 0x28 #define GC_I2C_INST_REPEATEDSTART_LSB 0x9 #define GC_I2C_INST_REPEATEDSTART_MASK 0x200 #define GC_I2C_INST_REPEATEDSTART_SIZE 0x1 #define GC_I2C_INST_REPEATEDSTART_DEFAULT 0x0 #define GC_I2C_INST_REPEATEDSTART_OFFSET 0x28 #define GC_I2C_INST_RWDEVADDR_LSB 0xa #define GC_I2C_INST_RWDEVADDR_MASK 0x400 #define GC_I2C_INST_RWDEVADDR_SIZE 0x1 #define GC_I2C_INST_RWDEVADDR_DEFAULT 0x0 #define GC_I2C_INST_RWDEVADDR_OFFSET 0x28 #define GC_I2C_INST_RWDEVADDR_RWB_LSB 0xb #define GC_I2C_INST_RWDEVADDR_RWB_MASK 0x800 #define GC_I2C_INST_RWDEVADDR_RWB_SIZE 0x1 #define GC_I2C_INST_RWDEVADDR_RWB_DEFAULT 0x0 #define GC_I2C_INST_RWDEVADDR_RWB_OFFSET 0x28 #define GC_I2C_INST_RWBYTESCOUNT_LSB 0xc #define GC_I2C_INST_RWBYTESCOUNT_MASK 0x7f000 #define GC_I2C_INST_RWBYTESCOUNT_SIZE 0x7 #define GC_I2C_INST_RWBYTESCOUNT_DEFAULT 0x0 #define GC_I2C_INST_RWBYTESCOUNT_OFFSET 0x28 #define GC_I2C_INST_FINALNA_LSB 0x13 #define GC_I2C_INST_FINALNA_MASK 0x80000 #define GC_I2C_INST_FINALNA_SIZE 0x1 #define GC_I2C_INST_FINALNA_DEFAULT 0x0 #define GC_I2C_INST_FINALNA_OFFSET 0x28 #define GC_I2C_INST_RWBIT_LSB 0x14 #define GC_I2C_INST_RWBIT_MASK 0x300000 #define GC_I2C_INST_RWBIT_SIZE 0x2 #define GC_I2C_INST_RWBIT_DEFAULT 0x0 #define GC_I2C_INST_RWBIT_OFFSET 0x28 #define GC_I2C_INST_HOLD0_LSB 0x16 #define GC_I2C_INST_HOLD0_MASK 0x400000 #define GC_I2C_INST_HOLD0_SIZE 0x1 #define GC_I2C_INST_HOLD0_DEFAULT 0x0 #define GC_I2C_INST_HOLD0_OFFSET 0x28 #define GC_I2C_INST_FINALSTOP_LSB 0x17 #define GC_I2C_INST_FINALSTOP_MASK 0x800000 #define GC_I2C_INST_FINALSTOP_SIZE 0x1 #define GC_I2C_INST_FINALSTOP_DEFAULT 0x0 #define GC_I2C_INST_FINALSTOP_OFFSET 0x28 #define GC_I2C_INST_RESETB_RWPTR_LSB 0x18 #define GC_I2C_INST_RESETB_RWPTR_MASK 0x1000000 #define GC_I2C_INST_RESETB_RWPTR_SIZE 0x1 #define GC_I2C_INST_RESETB_RWPTR_DEFAULT 0x0 #define GC_I2C_INST_RESETB_RWPTR_OFFSET 0x28 #define GC_I2C_INST_DEVADDRVAL_LSB 0x19 #define GC_I2C_INST_DEVADDRVAL_MASK 0xfe000000 #define GC_I2C_INST_DEVADDRVAL_SIZE 0x7 #define GC_I2C_INST_DEVADDRVAL_DEFAULT 0x0 #define GC_I2C_INST_DEVADDRVAL_OFFSET 0x28 #define GC_I2C_STATUS_RESERVED0_LSB 0x0 #define GC_I2C_STATUS_RESERVED0_MASK 0x1 #define GC_I2C_STATUS_RESERVED0_SIZE 0x1 #define GC_I2C_STATUS_RESERVED0_DEFAULT 0x0 #define GC_I2C_STATUS_RESERVED0_OFFSET 0x2c #define GC_I2C_STATUS_START_LSB 0x1 #define GC_I2C_STATUS_START_MASK 0x2 #define GC_I2C_STATUS_START_SIZE 0x1 #define GC_I2C_STATUS_START_DEFAULT 0x0 #define GC_I2C_STATUS_START_OFFSET 0x2c #define GC_I2C_STATUS_FWDEVADDR_LSB 0x2 #define GC_I2C_STATUS_FWDEVADDR_MASK 0x4 #define GC_I2C_STATUS_FWDEVADDR_SIZE 0x1 #define GC_I2C_STATUS_FWDEVADDR_DEFAULT 0x0 #define GC_I2C_STATUS_FWDEVADDR_OFFSET 0x2c #define GC_I2C_STATUS_FWBYTESCOUNT_LSB 0x3 #define GC_I2C_STATUS_FWBYTESCOUNT_MASK 0x38 #define GC_I2C_STATUS_FWBYTESCOUNT_SIZE 0x3 #define GC_I2C_STATUS_FWBYTESCOUNT_DEFAULT 0x0 #define GC_I2C_STATUS_FWBYTESCOUNT_OFFSET 0x2c #define GC_I2C_STATUS_SCL0_LSB 0x6 #define GC_I2C_STATUS_SCL0_MASK 0x40 #define GC_I2C_STATUS_SCL0_SIZE 0x1 #define GC_I2C_STATUS_SCL0_DEFAULT 0x0 #define GC_I2C_STATUS_SCL0_OFFSET 0x2c #define GC_I2C_STATUS_FREE_BUS_LSB 0x7 #define GC_I2C_STATUS_FREE_BUS_MASK 0x80 #define GC_I2C_STATUS_FREE_BUS_SIZE 0x1 #define GC_I2C_STATUS_FREE_BUS_DEFAULT 0x0 #define GC_I2C_STATUS_FREE_BUS_OFFSET 0x2c #define GC_I2C_STATUS_FIRSTSTOP_LSB 0x8 #define GC_I2C_STATUS_FIRSTSTOP_MASK 0x100 #define GC_I2C_STATUS_FIRSTSTOP_SIZE 0x1 #define GC_I2C_STATUS_FIRSTSTOP_DEFAULT 0x0 #define GC_I2C_STATUS_FIRSTSTOP_OFFSET 0x2c #define GC_I2C_STATUS_REPEATEDSTART_LSB 0x9 #define GC_I2C_STATUS_REPEATEDSTART_MASK 0x200 #define GC_I2C_STATUS_REPEATEDSTART_SIZE 0x1 #define GC_I2C_STATUS_REPEATEDSTART_DEFAULT 0x0 #define GC_I2C_STATUS_REPEATEDSTART_OFFSET 0x2c #define GC_I2C_STATUS_RWDEVADDR_LSB 0xa #define GC_I2C_STATUS_RWDEVADDR_MASK 0x400 #define GC_I2C_STATUS_RWDEVADDR_SIZE 0x1 #define GC_I2C_STATUS_RWDEVADDR_DEFAULT 0x0 #define GC_I2C_STATUS_RWDEVADDR_OFFSET 0x2c #define GC_I2C_STATUS_RWDEVADDR_RWB_LSB 0xb #define GC_I2C_STATUS_RWDEVADDR_RWB_MASK 0x800 #define GC_I2C_STATUS_RWDEVADDR_RWB_SIZE 0x1 #define GC_I2C_STATUS_RWDEVADDR_RWB_DEFAULT 0x0 #define GC_I2C_STATUS_RWDEVADDR_RWB_OFFSET 0x2c #define GC_I2C_STATUS_RWBYTESCOUNT_LSB 0xc #define GC_I2C_STATUS_RWBYTESCOUNT_MASK 0x7f000 #define GC_I2C_STATUS_RWBYTESCOUNT_SIZE 0x7 #define GC_I2C_STATUS_RWBYTESCOUNT_DEFAULT 0x0 #define GC_I2C_STATUS_RWBYTESCOUNT_OFFSET 0x2c #define GC_I2C_STATUS_FINALNA_LSB 0x13 #define GC_I2C_STATUS_FINALNA_MASK 0x80000 #define GC_I2C_STATUS_FINALNA_SIZE 0x1 #define GC_I2C_STATUS_FINALNA_DEFAULT 0x0 #define GC_I2C_STATUS_FINALNA_OFFSET 0x2c #define GC_I2C_STATUS_RWBIT_LSB 0x14 #define GC_I2C_STATUS_RWBIT_MASK 0x300000 #define GC_I2C_STATUS_RWBIT_SIZE 0x2 #define GC_I2C_STATUS_RWBIT_DEFAULT 0x0 #define GC_I2C_STATUS_RWBIT_OFFSET 0x2c #define GC_I2C_STATUS_HOLD0_LSB 0x16 #define GC_I2C_STATUS_HOLD0_MASK 0x400000 #define GC_I2C_STATUS_HOLD0_SIZE 0x1 #define GC_I2C_STATUS_HOLD0_DEFAULT 0x0 #define GC_I2C_STATUS_HOLD0_OFFSET 0x2c #define GC_I2C_STATUS_FINALSTOP_LSB 0x17 #define GC_I2C_STATUS_FINALSTOP_MASK 0x800000 #define GC_I2C_STATUS_FINALSTOP_SIZE 0x1 #define GC_I2C_STATUS_FINALSTOP_DEFAULT 0x0 #define GC_I2C_STATUS_FINALSTOP_OFFSET 0x2c #define GC_I2C_STATUS_INTB_LSB 0x18 #define GC_I2C_STATUS_INTB_MASK 0x1000000 #define GC_I2C_STATUS_INTB_SIZE 0x1 #define GC_I2C_STATUS_INTB_DEFAULT 0x0 #define GC_I2C_STATUS_INTB_OFFSET 0x2c #define GC_I2C_STATUS_CA_NACK_LSB 0x19 #define GC_I2C_STATUS_CA_NACK_MASK 0x2000000 #define GC_I2C_STATUS_CA_NACK_SIZE 0x1 #define GC_I2C_STATUS_CA_NACK_DEFAULT 0x0 #define GC_I2C_STATUS_CA_NACK_OFFSET 0x2c #define GC_I2C_STATUS_AL_LSB 0x1a #define GC_I2C_STATUS_AL_MASK 0x4000000 #define GC_I2C_STATUS_AL_SIZE 0x1 #define GC_I2C_STATUS_AL_DEFAULT 0x0 #define GC_I2C_STATUS_AL_OFFSET 0x2c #define GC_I2C_STATUS_ALBITPTR_LSB 0x1b #define GC_I2C_STATUS_ALBITPTR_MASK 0x78000000 #define GC_I2C_STATUS_ALBITPTR_SIZE 0x4 #define GC_I2C_STATUS_ALBITPTR_DEFAULT 0x0 #define GC_I2C_STATUS_ALBITPTR_OFFSET 0x2c #define GC_I2C_STATUS_CSTIMEOUT_LSB 0x1f #define GC_I2C_STATUS_CSTIMEOUT_MASK 0x80000000 #define GC_I2C_STATUS_CSTIMEOUT_SIZE 0x1 #define GC_I2C_STATUS_CSTIMEOUT_DEFAULT 0x0 #define GC_I2C_STATUS_CSTIMEOUT_OFFSET 0x2c #define GC_I2C_READVAL_SDA_LSB 0x0 #define GC_I2C_READVAL_SDA_MASK 0x1 #define GC_I2C_READVAL_SDA_SIZE 0x1 #define GC_I2C_READVAL_SDA_DEFAULT 0x0 #define GC_I2C_READVAL_SDA_OFFSET 0x78 #define GC_I2C_READVAL_SCL_LSB 0x1 #define GC_I2C_READVAL_SCL_MASK 0x2 #define GC_I2C_READVAL_SCL_SIZE 0x1 #define GC_I2C_READVAL_SCL_DEFAULT 0x0 #define GC_I2C_READVAL_SCL_OFFSET 0x78 #define GC_I2C_CTRL_MSR_SDA_LSB 0x0 #define GC_I2C_CTRL_MSR_SDA_MASK 0x3 #define GC_I2C_CTRL_MSR_SDA_SIZE 0x2 #define GC_I2C_CTRL_MSR_SDA_DEFAULT 0x2 #define GC_I2C_CTRL_MSR_SDA_OFFSET 0x7c #define GC_I2C_CTRL_MSR_SCL_LSB 0x2 #define GC_I2C_CTRL_MSR_SCL_MASK 0xc #define GC_I2C_CTRL_MSR_SCL_SIZE 0x2 #define GC_I2C_CTRL_MSR_SCL_DEFAULT 0x2 #define GC_I2C_CTRL_MSR_SCL_OFFSET 0x7c #define GC_I2CS_VERSION_CHANGE_LSB 0x0 #define GC_I2CS_VERSION_CHANGE_MASK 0xffffff #define GC_I2CS_VERSION_CHANGE_SIZE 0x18 #define GC_I2CS_VERSION_CHANGE_DEFAULT 0x1424a #define GC_I2CS_VERSION_CHANGE_OFFSET 0x0 #define GC_I2CS_VERSION_REVISION_LSB 0x18 #define GC_I2CS_VERSION_REVISION_MASK 0xff000000 #define GC_I2CS_VERSION_REVISION_SIZE 0x8 #define GC_I2CS_VERSION_REVISION_DEFAULT 0x1 #define GC_I2CS_VERSION_REVISION_OFFSET 0x0 #define GC_I2CS_INT_ENABLE_INTR_READ_BEGIN_LSB 0x0 #define GC_I2CS_INT_ENABLE_INTR_READ_BEGIN_MASK 0x1 #define GC_I2CS_INT_ENABLE_INTR_READ_BEGIN_SIZE 0x1 #define GC_I2CS_INT_ENABLE_INTR_READ_BEGIN_DEFAULT 0x0 #define GC_I2CS_INT_ENABLE_INTR_READ_BEGIN_OFFSET 0x4 #define GC_I2CS_INT_ENABLE_INTR_READ_COMPLETE_LSB 0x1 #define GC_I2CS_INT_ENABLE_INTR_READ_COMPLETE_MASK 0x2 #define GC_I2CS_INT_ENABLE_INTR_READ_COMPLETE_SIZE 0x1 #define GC_I2CS_INT_ENABLE_INTR_READ_COMPLETE_DEFAULT 0x0 #define GC_I2CS_INT_ENABLE_INTR_READ_COMPLETE_OFFSET 0x4 #define GC_I2CS_INT_ENABLE_INTR_WRITE_COMPLETE_LSB 0x2 #define GC_I2CS_INT_ENABLE_INTR_WRITE_COMPLETE_MASK 0x4 #define GC_I2CS_INT_ENABLE_INTR_WRITE_COMPLETE_SIZE 0x1 #define GC_I2CS_INT_ENABLE_INTR_WRITE_COMPLETE_DEFAULT 0x0 #define GC_I2CS_INT_ENABLE_INTR_WRITE_COMPLETE_OFFSET 0x4 #define GC_I2CS_INT_STATE_INTR_READ_BEGIN_LSB 0x0 #define GC_I2CS_INT_STATE_INTR_READ_BEGIN_MASK 0x1 #define GC_I2CS_INT_STATE_INTR_READ_BEGIN_SIZE 0x1 #define GC_I2CS_INT_STATE_INTR_READ_BEGIN_DEFAULT 0x0 #define GC_I2CS_INT_STATE_INTR_READ_BEGIN_OFFSET 0x8 #define GC_I2CS_INT_STATE_INTR_READ_COMPLETE_LSB 0x1 #define GC_I2CS_INT_STATE_INTR_READ_COMPLETE_MASK 0x2 #define GC_I2CS_INT_STATE_INTR_READ_COMPLETE_SIZE 0x1 #define GC_I2CS_INT_STATE_INTR_READ_COMPLETE_DEFAULT 0x0 #define GC_I2CS_INT_STATE_INTR_READ_COMPLETE_OFFSET 0x8 #define GC_I2CS_INT_STATE_INTR_WRITE_COMPLETE_LSB 0x2 #define GC_I2CS_INT_STATE_INTR_WRITE_COMPLETE_MASK 0x4 #define GC_I2CS_INT_STATE_INTR_WRITE_COMPLETE_SIZE 0x1 #define GC_I2CS_INT_STATE_INTR_WRITE_COMPLETE_DEFAULT 0x0 #define GC_I2CS_INT_STATE_INTR_WRITE_COMPLETE_OFFSET 0x8 #define GC_I2CS_INT_TEST_INTR_READ_BEGIN_LSB 0x0 #define GC_I2CS_INT_TEST_INTR_READ_BEGIN_MASK 0x1 #define GC_I2CS_INT_TEST_INTR_READ_BEGIN_SIZE 0x1 #define GC_I2CS_INT_TEST_INTR_READ_BEGIN_DEFAULT 0x0 #define GC_I2CS_INT_TEST_INTR_READ_BEGIN_OFFSET 0xc #define GC_I2CS_INT_TEST_INTR_READ_COMPLETE_LSB 0x1 #define GC_I2CS_INT_TEST_INTR_READ_COMPLETE_MASK 0x2 #define GC_I2CS_INT_TEST_INTR_READ_COMPLETE_SIZE 0x1 #define GC_I2CS_INT_TEST_INTR_READ_COMPLETE_DEFAULT 0x0 #define GC_I2CS_INT_TEST_INTR_READ_COMPLETE_OFFSET 0xc #define GC_I2CS_INT_TEST_INTR_WRITE_COMPLETE_LSB 0x2 #define GC_I2CS_INT_TEST_INTR_WRITE_COMPLETE_MASK 0x4 #define GC_I2CS_INT_TEST_INTR_WRITE_COMPLETE_SIZE 0x1 #define GC_I2CS_INT_TEST_INTR_WRITE_COMPLETE_DEFAULT 0x0 #define GC_I2CS_INT_TEST_INTR_WRITE_COMPLETE_OFFSET 0xc #define GC_I2CS_CTRL_SDA_VAL_FREE_BUS_S_LSB 0x0 #define GC_I2CS_CTRL_SDA_VAL_FREE_BUS_S_MASK 0x1 #define GC_I2CS_CTRL_SDA_VAL_FREE_BUS_S_SIZE 0x1 #define GC_I2CS_CTRL_SDA_VAL_FREE_BUS_S_DEFAULT 0x1 #define GC_I2CS_CTRL_SDA_VAL_FREE_BUS_S_OFFSET 0x10 #define GC_I2CS_CTRL_SDA_VAL_READ0_S_LSB 0x1 #define GC_I2CS_CTRL_SDA_VAL_READ0_S_MASK 0x2 #define GC_I2CS_CTRL_SDA_VAL_READ0_S_SIZE 0x1 #define GC_I2CS_CTRL_SDA_VAL_READ0_S_DEFAULT 0x0 #define GC_I2CS_CTRL_SDA_VAL_READ0_S_OFFSET 0x10 #define GC_I2CS_CTRL_SDA_VAL_READ1_S_LSB 0x2 #define GC_I2CS_CTRL_SDA_VAL_READ1_S_MASK 0x4 #define GC_I2CS_CTRL_SDA_VAL_READ1_S_SIZE 0x1 #define GC_I2CS_CTRL_SDA_VAL_READ1_S_DEFAULT 0x1 #define GC_I2CS_CTRL_SDA_VAL_READ1_S_OFFSET 0x10 #define GC_I2CS_CTRL_SDA_VAL_WRITE_S_LSB 0x3 #define GC_I2CS_CTRL_SDA_VAL_WRITE_S_MASK 0x8 #define GC_I2CS_CTRL_SDA_VAL_WRITE_S_SIZE 0x1 #define GC_I2CS_CTRL_SDA_VAL_WRITE_S_DEFAULT 0x1 #define GC_I2CS_CTRL_SDA_VAL_WRITE_S_OFFSET 0x10 #define GC_I2CS_CTRL_SDA_VAL_START_S_LSB 0x4 #define GC_I2CS_CTRL_SDA_VAL_START_S_MASK 0x10 #define GC_I2CS_CTRL_SDA_VAL_START_S_SIZE 0x1 #define GC_I2CS_CTRL_SDA_VAL_START_S_DEFAULT 0x1 #define GC_I2CS_CTRL_SDA_VAL_START_S_OFFSET 0x10 #define GC_I2CS_CTRL_SDA_VAL_STOP_S_LSB 0x5 #define GC_I2CS_CTRL_SDA_VAL_STOP_S_MASK 0x20 #define GC_I2CS_CTRL_SDA_VAL_STOP_S_SIZE 0x1 #define GC_I2CS_CTRL_SDA_VAL_STOP_S_DEFAULT 0x1 #define GC_I2CS_CTRL_SDA_VAL_STOP_S_OFFSET 0x10 #define GC_I2CS_READVAL_SDA_LSB 0x0 #define GC_I2CS_READVAL_SDA_MASK 0x1 #define GC_I2CS_READVAL_SDA_SIZE 0x1 #define GC_I2CS_READVAL_SDA_DEFAULT 0x0 #define GC_I2CS_READVAL_SDA_OFFSET 0x2c #define GC_I2CS_READVAL_SCL_LSB 0x1 #define GC_I2CS_READVAL_SCL_MASK 0x2 #define GC_I2CS_READVAL_SCL_SIZE 0x1 #define GC_I2CS_READVAL_SCL_DEFAULT 0x0 #define GC_I2CS_READVAL_SCL_OFFSET 0x2c #define GC_I2CS_CTRL_MSR_SDA_LSB 0x0 #define GC_I2CS_CTRL_MSR_SDA_MASK 0x3 #define GC_I2CS_CTRL_MSR_SDA_SIZE 0x2 #define GC_I2CS_CTRL_MSR_SDA_DEFAULT 0x2 #define GC_I2CS_CTRL_MSR_SDA_OFFSET 0x30 #define GC_I2CS_CTRL_MSR_SCL_LSB 0x2 #define GC_I2CS_CTRL_MSR_SCL_MASK 0xc #define GC_I2CS_CTRL_MSR_SCL_SIZE 0x2 #define GC_I2CS_CTRL_MSR_SCL_DEFAULT 0x2 #define GC_I2CS_CTRL_MSR_SCL_OFFSET 0x30 #define GC_KEYMGR_AES_CTRL_RESET_LSB 0x0 #define GC_KEYMGR_AES_CTRL_RESET_MASK 0x1 #define GC_KEYMGR_AES_CTRL_RESET_SIZE 0x1 #define GC_KEYMGR_AES_CTRL_RESET_DEFAULT 0x0 #define GC_KEYMGR_AES_CTRL_RESET_OFFSET 0x0 #define GC_KEYMGR_AES_CTRL_KEYSIZE_LSB 0x1 #define GC_KEYMGR_AES_CTRL_KEYSIZE_MASK 0x6 #define GC_KEYMGR_AES_CTRL_KEYSIZE_SIZE 0x2 #define GC_KEYMGR_AES_CTRL_KEYSIZE_DEFAULT 0x0 #define GC_KEYMGR_AES_CTRL_KEYSIZE_OFFSET 0x0 #define GC_KEYMGR_AES_CTRL_CIPHER_MODE_LSB 0x3 #define GC_KEYMGR_AES_CTRL_CIPHER_MODE_MASK 0x18 #define GC_KEYMGR_AES_CTRL_CIPHER_MODE_SIZE 0x2 #define GC_KEYMGR_AES_CTRL_CIPHER_MODE_DEFAULT 0x0 #define GC_KEYMGR_AES_CTRL_CIPHER_MODE_OFFSET 0x0 #define GC_KEYMGR_AES_CTRL_ENC_MODE_LSB 0x5 #define GC_KEYMGR_AES_CTRL_ENC_MODE_MASK 0x20 #define GC_KEYMGR_AES_CTRL_ENC_MODE_SIZE 0x1 #define GC_KEYMGR_AES_CTRL_ENC_MODE_DEFAULT 0x0 #define GC_KEYMGR_AES_CTRL_ENC_MODE_OFFSET 0x0 #define GC_KEYMGR_AES_CTRL_CTR_ENDIAN_LSB 0x6 #define GC_KEYMGR_AES_CTRL_CTR_ENDIAN_MASK 0x40 #define GC_KEYMGR_AES_CTRL_CTR_ENDIAN_SIZE 0x1 #define GC_KEYMGR_AES_CTRL_CTR_ENDIAN_DEFAULT 0x0 #define GC_KEYMGR_AES_CTRL_CTR_ENDIAN_OFFSET 0x0 #define GC_KEYMGR_AES_CTRL_ENABLE_LSB 0x7 #define GC_KEYMGR_AES_CTRL_ENABLE_MASK 0x80 #define GC_KEYMGR_AES_CTRL_ENABLE_SIZE 0x1 #define GC_KEYMGR_AES_CTRL_ENABLE_DEFAULT 0x0 #define GC_KEYMGR_AES_CTRL_ENABLE_OFFSET 0x0 #define GC_KEYMGR_AES_RAND_STALL_CTL_STALL_EN_LSB 0x0 #define GC_KEYMGR_AES_RAND_STALL_CTL_STALL_EN_MASK 0x1 #define GC_KEYMGR_AES_RAND_STALL_CTL_STALL_EN_SIZE 0x1 #define GC_KEYMGR_AES_RAND_STALL_CTL_STALL_EN_DEFAULT 0x1 #define GC_KEYMGR_AES_RAND_STALL_CTL_STALL_EN_OFFSET 0x60 #define GC_KEYMGR_AES_RAND_STALL_CTL_FREQ_LSB 0x1 #define GC_KEYMGR_AES_RAND_STALL_CTL_FREQ_MASK 0x6 #define GC_KEYMGR_AES_RAND_STALL_CTL_FREQ_SIZE 0x2 #define GC_KEYMGR_AES_RAND_STALL_CTL_FREQ_DEFAULT 0x3 #define GC_KEYMGR_AES_RAND_STALL_CTL_FREQ_OFFSET 0x60 #define GC_KEYMGR_AES_INT_ENABLE_AES_WFIFO_OVERFLOW_LSB 0x0 #define GC_KEYMGR_AES_INT_ENABLE_AES_WFIFO_OVERFLOW_MASK 0x1 #define GC_KEYMGR_AES_INT_ENABLE_AES_WFIFO_OVERFLOW_SIZE 0x1 #define GC_KEYMGR_AES_INT_ENABLE_AES_WFIFO_OVERFLOW_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_ENABLE_AES_WFIFO_OVERFLOW_OFFSET 0xb4 #define GC_KEYMGR_AES_INT_ENABLE_AES_RFIFO_OVERFLOW_LSB 0x1 #define GC_KEYMGR_AES_INT_ENABLE_AES_RFIFO_OVERFLOW_MASK 0x2 #define GC_KEYMGR_AES_INT_ENABLE_AES_RFIFO_OVERFLOW_SIZE 0x1 #define GC_KEYMGR_AES_INT_ENABLE_AES_RFIFO_OVERFLOW_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_ENABLE_AES_RFIFO_OVERFLOW_OFFSET 0xb4 #define GC_KEYMGR_AES_INT_ENABLE_AES_RFIFO_UNDERFLOW_LSB 0x2 #define GC_KEYMGR_AES_INT_ENABLE_AES_RFIFO_UNDERFLOW_MASK 0x4 #define GC_KEYMGR_AES_INT_ENABLE_AES_RFIFO_UNDERFLOW_SIZE 0x1 #define GC_KEYMGR_AES_INT_ENABLE_AES_RFIFO_UNDERFLOW_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_ENABLE_AES_RFIFO_UNDERFLOW_OFFSET 0xb4 #define GC_KEYMGR_AES_INT_ENABLE_AES_DONE_CIPHER_LSB 0x3 #define GC_KEYMGR_AES_INT_ENABLE_AES_DONE_CIPHER_MASK 0x8 #define GC_KEYMGR_AES_INT_ENABLE_AES_DONE_CIPHER_SIZE 0x1 #define GC_KEYMGR_AES_INT_ENABLE_AES_DONE_CIPHER_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_ENABLE_AES_DONE_CIPHER_OFFSET 0xb4 #define GC_KEYMGR_AES_INT_ENABLE_AES_DONE_KEYEXPANSION_LSB 0x4 #define GC_KEYMGR_AES_INT_ENABLE_AES_DONE_KEYEXPANSION_MASK 0x10 #define GC_KEYMGR_AES_INT_ENABLE_AES_DONE_KEYEXPANSION_SIZE 0x1 #define GC_KEYMGR_AES_INT_ENABLE_AES_DONE_KEYEXPANSION_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_ENABLE_AES_DONE_KEYEXPANSION_OFFSET 0xb4 #define GC_KEYMGR_AES_INT_ENABLE_AES_DONE_WIPE_SECRETS_LSB 0x5 #define GC_KEYMGR_AES_INT_ENABLE_AES_DONE_WIPE_SECRETS_MASK 0x20 #define GC_KEYMGR_AES_INT_ENABLE_AES_DONE_WIPE_SECRETS_SIZE 0x1 #define GC_KEYMGR_AES_INT_ENABLE_AES_DONE_WIPE_SECRETS_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_ENABLE_AES_DONE_WIPE_SECRETS_OFFSET 0xb4 #define GC_KEYMGR_AES_INT_STATE_AES_WFIFO_OVERFLOW_LSB 0x0 #define GC_KEYMGR_AES_INT_STATE_AES_WFIFO_OVERFLOW_MASK 0x1 #define GC_KEYMGR_AES_INT_STATE_AES_WFIFO_OVERFLOW_SIZE 0x1 #define GC_KEYMGR_AES_INT_STATE_AES_WFIFO_OVERFLOW_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_STATE_AES_WFIFO_OVERFLOW_OFFSET 0xb8 #define GC_KEYMGR_AES_INT_STATE_AES_RFIFO_OVERFLOW_LSB 0x1 #define GC_KEYMGR_AES_INT_STATE_AES_RFIFO_OVERFLOW_MASK 0x2 #define GC_KEYMGR_AES_INT_STATE_AES_RFIFO_OVERFLOW_SIZE 0x1 #define GC_KEYMGR_AES_INT_STATE_AES_RFIFO_OVERFLOW_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_STATE_AES_RFIFO_OVERFLOW_OFFSET 0xb8 #define GC_KEYMGR_AES_INT_STATE_AES_RFIFO_UNDERFLOW_LSB 0x2 #define GC_KEYMGR_AES_INT_STATE_AES_RFIFO_UNDERFLOW_MASK 0x4 #define GC_KEYMGR_AES_INT_STATE_AES_RFIFO_UNDERFLOW_SIZE 0x1 #define GC_KEYMGR_AES_INT_STATE_AES_RFIFO_UNDERFLOW_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_STATE_AES_RFIFO_UNDERFLOW_OFFSET 0xb8 #define GC_KEYMGR_AES_INT_STATE_AES_DONE_CIPHER_LSB 0x3 #define GC_KEYMGR_AES_INT_STATE_AES_DONE_CIPHER_MASK 0x8 #define GC_KEYMGR_AES_INT_STATE_AES_DONE_CIPHER_SIZE 0x1 #define GC_KEYMGR_AES_INT_STATE_AES_DONE_CIPHER_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_STATE_AES_DONE_CIPHER_OFFSET 0xb8 #define GC_KEYMGR_AES_INT_STATE_AES_DONE_KEYEXPANSION_LSB 0x4 #define GC_KEYMGR_AES_INT_STATE_AES_DONE_KEYEXPANSION_MASK 0x10 #define GC_KEYMGR_AES_INT_STATE_AES_DONE_KEYEXPANSION_SIZE 0x1 #define GC_KEYMGR_AES_INT_STATE_AES_DONE_KEYEXPANSION_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_STATE_AES_DONE_KEYEXPANSION_OFFSET 0xb8 #define GC_KEYMGR_AES_INT_STATE_AES_DONE_WIPE_SECRETS_LSB 0x5 #define GC_KEYMGR_AES_INT_STATE_AES_DONE_WIPE_SECRETS_MASK 0x20 #define GC_KEYMGR_AES_INT_STATE_AES_DONE_WIPE_SECRETS_SIZE 0x1 #define GC_KEYMGR_AES_INT_STATE_AES_DONE_WIPE_SECRETS_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_STATE_AES_DONE_WIPE_SECRETS_OFFSET 0xb8 #define GC_KEYMGR_AES_INT_TEST_AES_WFIFO_OVERFLOW_LSB 0x0 #define GC_KEYMGR_AES_INT_TEST_AES_WFIFO_OVERFLOW_MASK 0x1 #define GC_KEYMGR_AES_INT_TEST_AES_WFIFO_OVERFLOW_SIZE 0x1 #define GC_KEYMGR_AES_INT_TEST_AES_WFIFO_OVERFLOW_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_TEST_AES_WFIFO_OVERFLOW_OFFSET 0xbc #define GC_KEYMGR_AES_INT_TEST_AES_RFIFO_OVERFLOW_LSB 0x1 #define GC_KEYMGR_AES_INT_TEST_AES_RFIFO_OVERFLOW_MASK 0x2 #define GC_KEYMGR_AES_INT_TEST_AES_RFIFO_OVERFLOW_SIZE 0x1 #define GC_KEYMGR_AES_INT_TEST_AES_RFIFO_OVERFLOW_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_TEST_AES_RFIFO_OVERFLOW_OFFSET 0xbc #define GC_KEYMGR_AES_INT_TEST_AES_RFIFO_UNDERFLOW_LSB 0x2 #define GC_KEYMGR_AES_INT_TEST_AES_RFIFO_UNDERFLOW_MASK 0x4 #define GC_KEYMGR_AES_INT_TEST_AES_RFIFO_UNDERFLOW_SIZE 0x1 #define GC_KEYMGR_AES_INT_TEST_AES_RFIFO_UNDERFLOW_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_TEST_AES_RFIFO_UNDERFLOW_OFFSET 0xbc #define GC_KEYMGR_AES_INT_TEST_AES_DONE_CIPHER_LSB 0x3 #define GC_KEYMGR_AES_INT_TEST_AES_DONE_CIPHER_MASK 0x8 #define GC_KEYMGR_AES_INT_TEST_AES_DONE_CIPHER_SIZE 0x1 #define GC_KEYMGR_AES_INT_TEST_AES_DONE_CIPHER_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_TEST_AES_DONE_CIPHER_OFFSET 0xbc #define GC_KEYMGR_AES_INT_TEST_AES_DONE_KEYEXPANSION_LSB 0x4 #define GC_KEYMGR_AES_INT_TEST_AES_DONE_KEYEXPANSION_MASK 0x10 #define GC_KEYMGR_AES_INT_TEST_AES_DONE_KEYEXPANSION_SIZE 0x1 #define GC_KEYMGR_AES_INT_TEST_AES_DONE_KEYEXPANSION_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_TEST_AES_DONE_KEYEXPANSION_OFFSET 0xbc #define GC_KEYMGR_AES_INT_TEST_AES_DONE_WIPE_SECRETS_LSB 0x5 #define GC_KEYMGR_AES_INT_TEST_AES_DONE_WIPE_SECRETS_MASK 0x20 #define GC_KEYMGR_AES_INT_TEST_AES_DONE_WIPE_SECRETS_SIZE 0x1 #define GC_KEYMGR_AES_INT_TEST_AES_DONE_WIPE_SECRETS_DEFAULT 0x0 #define GC_KEYMGR_AES_INT_TEST_AES_DONE_WIPE_SECRETS_OFFSET 0xbc #define GC_KEYMGR_AES_USE_HIDDEN_KEY_INDEX_LSB 0x0 #define GC_KEYMGR_AES_USE_HIDDEN_KEY_INDEX_MASK 0x3ff #define GC_KEYMGR_AES_USE_HIDDEN_KEY_INDEX_SIZE 0xa #define GC_KEYMGR_AES_USE_HIDDEN_KEY_INDEX_DEFAULT 0x0 #define GC_KEYMGR_AES_USE_HIDDEN_KEY_INDEX_OFFSET 0xc0 #define GC_KEYMGR_AES_USE_HIDDEN_KEY_ENABLE_LSB 0xa #define GC_KEYMGR_AES_USE_HIDDEN_KEY_ENABLE_MASK 0x400 #define GC_KEYMGR_AES_USE_HIDDEN_KEY_ENABLE_SIZE 0x1 #define GC_KEYMGR_AES_USE_HIDDEN_KEY_ENABLE_DEFAULT 0x0 #define GC_KEYMGR_AES_USE_HIDDEN_KEY_ENABLE_OFFSET 0xc0 #define GC_KEYMGR_INT_ENABLE_SHA_WFIFO_FULL_LSB 0x0 #define GC_KEYMGR_INT_ENABLE_SHA_WFIFO_FULL_MASK 0x1 #define GC_KEYMGR_INT_ENABLE_SHA_WFIFO_FULL_SIZE 0x1 #define GC_KEYMGR_INT_ENABLE_SHA_WFIFO_FULL_DEFAULT 0x0 #define GC_KEYMGR_INT_ENABLE_SHA_WFIFO_FULL_OFFSET 0xc4 #define GC_KEYMGR_INT_STATE_SHA_WFIFO_FULL_LSB 0x0 #define GC_KEYMGR_INT_STATE_SHA_WFIFO_FULL_MASK 0x1 #define GC_KEYMGR_INT_STATE_SHA_WFIFO_FULL_SIZE 0x1 #define GC_KEYMGR_INT_STATE_SHA_WFIFO_FULL_DEFAULT 0x0 #define GC_KEYMGR_INT_STATE_SHA_WFIFO_FULL_OFFSET 0xc8 #define GC_KEYMGR_INT_TEST_SHA_WFIFO_FULL_LSB 0x0 #define GC_KEYMGR_INT_TEST_SHA_WFIFO_FULL_MASK 0x1 #define GC_KEYMGR_INT_TEST_SHA_WFIFO_FULL_SIZE 0x1 #define GC_KEYMGR_INT_TEST_SHA_WFIFO_FULL_DEFAULT 0x0 #define GC_KEYMGR_INT_TEST_SHA_WFIFO_FULL_OFFSET 0xcc #define GC_KEYMGR_SHA_CFG_EN_BIG_ENDIAN_LSB 0x0 #define GC_KEYMGR_SHA_CFG_EN_BIG_ENDIAN_MASK 0x1 #define GC_KEYMGR_SHA_CFG_EN_BIG_ENDIAN_SIZE 0x1 #define GC_KEYMGR_SHA_CFG_EN_BIG_ENDIAN_DEFAULT 0x1 #define GC_KEYMGR_SHA_CFG_EN_BIG_ENDIAN_OFFSET 0x408 #define GC_KEYMGR_SHA_CFG_EN_SHA1_LSB 0x1 #define GC_KEYMGR_SHA_CFG_EN_SHA1_MASK 0x2 #define GC_KEYMGR_SHA_CFG_EN_SHA1_SIZE 0x1 #define GC_KEYMGR_SHA_CFG_EN_SHA1_DEFAULT 0x0 #define GC_KEYMGR_SHA_CFG_EN_SHA1_OFFSET 0x408 #define GC_KEYMGR_SHA_CFG_EN_BUS_ERROR_LSB 0x3 #define GC_KEYMGR_SHA_CFG_EN_BUS_ERROR_MASK 0x8 #define GC_KEYMGR_SHA_CFG_EN_BUS_ERROR_SIZE 0x1 #define GC_KEYMGR_SHA_CFG_EN_BUS_ERROR_DEFAULT 0x0 #define GC_KEYMGR_SHA_CFG_EN_BUS_ERROR_OFFSET 0x408 #define GC_KEYMGR_SHA_CFG_EN_LIVESTREAM_LSB 0x4 #define GC_KEYMGR_SHA_CFG_EN_LIVESTREAM_MASK 0x10 #define GC_KEYMGR_SHA_CFG_EN_LIVESTREAM_SIZE 0x1 #define GC_KEYMGR_SHA_CFG_EN_LIVESTREAM_DEFAULT 0x0 #define GC_KEYMGR_SHA_CFG_EN_LIVESTREAM_OFFSET 0x408 #define GC_KEYMGR_SHA_CFG_EN_HMAC_LSB 0x5 #define GC_KEYMGR_SHA_CFG_EN_HMAC_MASK 0x20 #define GC_KEYMGR_SHA_CFG_EN_HMAC_SIZE 0x1 #define GC_KEYMGR_SHA_CFG_EN_HMAC_DEFAULT 0x0 #define GC_KEYMGR_SHA_CFG_EN_HMAC_OFFSET 0x408 #define GC_KEYMGR_SHA_CFG_EN_INT_EN_DONE_LSB 0x10 #define GC_KEYMGR_SHA_CFG_EN_INT_EN_DONE_MASK 0x10000 #define GC_KEYMGR_SHA_CFG_EN_INT_EN_DONE_SIZE 0x1 #define GC_KEYMGR_SHA_CFG_EN_INT_EN_DONE_DEFAULT 0x0 #define GC_KEYMGR_SHA_CFG_EN_INT_EN_DONE_OFFSET 0x408 #define GC_KEYMGR_SHA_CFG_EN_INT_MASK_DONE_LSB 0x11 #define GC_KEYMGR_SHA_CFG_EN_INT_MASK_DONE_MASK 0x20000 #define GC_KEYMGR_SHA_CFG_EN_INT_MASK_DONE_SIZE 0x1 #define GC_KEYMGR_SHA_CFG_EN_INT_MASK_DONE_DEFAULT 0x0 #define GC_KEYMGR_SHA_CFG_EN_INT_MASK_DONE_OFFSET 0x408 #define GC_KEYMGR_SHA_TRIG_TRIG_GO_LSB 0x0 #define GC_KEYMGR_SHA_TRIG_TRIG_GO_MASK 0x1 #define GC_KEYMGR_SHA_TRIG_TRIG_GO_SIZE 0x1 #define GC_KEYMGR_SHA_TRIG_TRIG_GO_DEFAULT 0x0 #define GC_KEYMGR_SHA_TRIG_TRIG_GO_OFFSET 0x410 #define GC_KEYMGR_SHA_TRIG_TRIG_RESET_LSB 0x1 #define GC_KEYMGR_SHA_TRIG_TRIG_RESET_MASK 0x2 #define GC_KEYMGR_SHA_TRIG_TRIG_RESET_SIZE 0x1 #define GC_KEYMGR_SHA_TRIG_TRIG_RESET_DEFAULT 0x0 #define GC_KEYMGR_SHA_TRIG_TRIG_RESET_OFFSET 0x410 #define GC_KEYMGR_SHA_TRIG_TRIG_STEP_LSB 0x2 #define GC_KEYMGR_SHA_TRIG_TRIG_STEP_MASK 0x4 #define GC_KEYMGR_SHA_TRIG_TRIG_STEP_SIZE 0x1 #define GC_KEYMGR_SHA_TRIG_TRIG_STEP_DEFAULT 0x0 #define GC_KEYMGR_SHA_TRIG_TRIG_STEP_OFFSET 0x410 #define GC_KEYMGR_SHA_TRIG_TRIG_STOP_LSB 0x3 #define GC_KEYMGR_SHA_TRIG_TRIG_STOP_MASK 0x8 #define GC_KEYMGR_SHA_TRIG_TRIG_STOP_SIZE 0x1 #define GC_KEYMGR_SHA_TRIG_TRIG_STOP_DEFAULT 0x0 #define GC_KEYMGR_SHA_TRIG_TRIG_STOP_OFFSET 0x410 #define GC_KEYMGR_SHA_STS_FIFO_EMPTY_LSB 0x0 #define GC_KEYMGR_SHA_STS_FIFO_EMPTY_MASK 0x1 #define GC_KEYMGR_SHA_STS_FIFO_EMPTY_SIZE 0x1 #define GC_KEYMGR_SHA_STS_FIFO_EMPTY_DEFAULT 0x0 #define GC_KEYMGR_SHA_STS_FIFO_EMPTY_OFFSET 0x484 #define GC_KEYMGR_SHA_STS_FIFO_FULL_LSB 0x1 #define GC_KEYMGR_SHA_STS_FIFO_FULL_MASK 0x2 #define GC_KEYMGR_SHA_STS_FIFO_FULL_SIZE 0x1 #define GC_KEYMGR_SHA_STS_FIFO_FULL_DEFAULT 0x0 #define GC_KEYMGR_SHA_STS_FIFO_FULL_OFFSET 0x484 #define GC_KEYMGR_SHA_STS_ERROR_LSB 0x2 #define GC_KEYMGR_SHA_STS_ERROR_MASK 0x4 #define GC_KEYMGR_SHA_STS_ERROR_SIZE 0x1 #define GC_KEYMGR_SHA_STS_ERROR_DEFAULT 0x0 #define GC_KEYMGR_SHA_STS_ERROR_OFFSET 0x484 #define GC_KEYMGR_SHA_USE_HIDDEN_KEY_INDEX_LSB 0x0 #define GC_KEYMGR_SHA_USE_HIDDEN_KEY_INDEX_MASK 0x3ff #define GC_KEYMGR_SHA_USE_HIDDEN_KEY_INDEX_SIZE 0xa #define GC_KEYMGR_SHA_USE_HIDDEN_KEY_INDEX_DEFAULT 0x0 #define GC_KEYMGR_SHA_USE_HIDDEN_KEY_INDEX_OFFSET 0x490 #define GC_KEYMGR_SHA_USE_HIDDEN_KEY_ENABLE_LSB 0xa #define GC_KEYMGR_SHA_USE_HIDDEN_KEY_ENABLE_MASK 0x400 #define GC_KEYMGR_SHA_USE_HIDDEN_KEY_ENABLE_SIZE 0x1 #define GC_KEYMGR_SHA_USE_HIDDEN_KEY_ENABLE_DEFAULT 0x0 #define GC_KEYMGR_SHA_USE_HIDDEN_KEY_ENABLE_OFFSET 0x490 #define GC_KEYMGR_SHA_USE_CERT_INDEX_LSB 0x0 #define GC_KEYMGR_SHA_USE_CERT_INDEX_MASK 0x3f #define GC_KEYMGR_SHA_USE_CERT_INDEX_SIZE 0x6 #define GC_KEYMGR_SHA_USE_CERT_INDEX_DEFAULT 0x0 #define GC_KEYMGR_SHA_USE_CERT_INDEX_OFFSET 0x494 #define GC_KEYMGR_SHA_USE_CERT_ENABLE_LSB 0x6 #define GC_KEYMGR_SHA_USE_CERT_ENABLE_MASK 0x40 #define GC_KEYMGR_SHA_USE_CERT_ENABLE_SIZE 0x1 #define GC_KEYMGR_SHA_USE_CERT_ENABLE_DEFAULT 0x0 #define GC_KEYMGR_SHA_USE_CERT_ENABLE_OFFSET 0x494 #define GC_KEYMGR_SHA_USE_CERT_CHECK_ONLY_LSB 0x7 #define GC_KEYMGR_SHA_USE_CERT_CHECK_ONLY_MASK 0x80 #define GC_KEYMGR_SHA_USE_CERT_CHECK_ONLY_SIZE 0x1 #define GC_KEYMGR_SHA_USE_CERT_CHECK_ONLY_DEFAULT 0x0 #define GC_KEYMGR_SHA_USE_CERT_CHECK_ONLY_OFFSET 0x494 #define GC_KEYMGR_SHA_CERT_OVERRIDE_DIGEST_PTR_LSB 0x0 #define GC_KEYMGR_SHA_CERT_OVERRIDE_DIGEST_PTR_MASK 0x3f #define GC_KEYMGR_SHA_CERT_OVERRIDE_DIGEST_PTR_SIZE 0x6 #define GC_KEYMGR_SHA_CERT_OVERRIDE_DIGEST_PTR_DEFAULT 0x0 #define GC_KEYMGR_SHA_CERT_OVERRIDE_DIGEST_PTR_OFFSET 0x498 #define GC_KEYMGR_SHA_CERT_OVERRIDE_KEY_PTR_LSB 0x10 #define GC_KEYMGR_SHA_CERT_OVERRIDE_KEY_PTR_MASK 0x3f0000 #define GC_KEYMGR_SHA_CERT_OVERRIDE_KEY_PTR_SIZE 0x6 #define GC_KEYMGR_SHA_CERT_OVERRIDE_KEY_PTR_DEFAULT 0x0 #define GC_KEYMGR_SHA_CERT_OVERRIDE_KEY_PTR_OFFSET 0x498 #define GC_KEYMGR_SHA_RAND_STALL_CTL_STALL_EN_LSB 0x0 #define GC_KEYMGR_SHA_RAND_STALL_CTL_STALL_EN_MASK 0x1 #define GC_KEYMGR_SHA_RAND_STALL_CTL_STALL_EN_SIZE 0x1 #define GC_KEYMGR_SHA_RAND_STALL_CTL_STALL_EN_DEFAULT 0x1 #define GC_KEYMGR_SHA_RAND_STALL_CTL_STALL_EN_OFFSET 0x49c #define GC_KEYMGR_SHA_RAND_STALL_CTL_FREQ_LSB 0x1 #define GC_KEYMGR_SHA_RAND_STALL_CTL_FREQ_MASK 0x6 #define GC_KEYMGR_SHA_RAND_STALL_CTL_FREQ_SIZE 0x2 #define GC_KEYMGR_SHA_RAND_STALL_CTL_FREQ_DEFAULT 0x3 #define GC_KEYMGR_SHA_RAND_STALL_CTL_FREQ_OFFSET 0x49c #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_PHIK_LSB 0x0 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_PHIK_MASK 0x3 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_PHIK_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_PHIK_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_PHIK_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_PHIK_SIGNATURE_LSB 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_PHIK_SIGNATURE_MASK 0xc #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_PHIK_SIGNATURE_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_PHIK_SIGNATURE_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_PHIK_SIGNATURE_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_EXPORT_INTEGRITY_PHIK_LSB 0x4 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_EXPORT_INTEGRITY_PHIK_MASK 0x30 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_EXPORT_INTEGRITY_PHIK_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_EXPORT_INTEGRITY_PHIK_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_EXPORT_INTEGRITY_PHIK_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_CREATION_PHIK_LSB 0x6 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_CREATION_PHIK_MASK 0xc0 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_CREATION_PHIK_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_CREATION_PHIK_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_CREATION_PHIK_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_CHURN_OBS_FBS_LSB 0x8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_CHURN_OBS_FBS_MASK 0x300 #define GC_KEYMGR_CERT_REVOKE_CTRL0_CHURN_OBS_FBS_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_CHURN_OBS_FBS_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_CHURN_OBS_FBS_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_ROOTKEY_LSB 0xa #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_ROOTKEY_MASK 0xc00 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_ROOTKEY_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_ROOTKEY_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_ROOTKEY_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_RT_SIGNATURE_LSB 0xc #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_RT_SIGNATURE_MASK 0x3000 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_RT_SIGNATURE_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_RT_SIGNATURE_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_RT_SIGNATURE_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_BOOT_LOADER_HIK_LSB 0xe #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_BOOT_LOADER_HIK_MASK 0xc000 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_BOOT_LOADER_HIK_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_BOOT_LOADER_HIK_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_BOOT_LOADER_HIK_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_PRIVATE_KEY_LSB 0x10 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_PRIVATE_KEY_MASK 0x30000 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_PRIVATE_KEY_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_PRIVATE_KEY_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK_PRIVATE_KEY_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK0_FOR_EXPORT_LSB 0x12 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK0_FOR_EXPORT_MASK 0xc0000 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK0_FOR_EXPORT_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK0_FOR_EXPORT_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK0_FOR_EXPORT_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK1_FOR_EXPORT_LSB 0x14 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK1_FOR_EXPORT_MASK 0x300000 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK1_FOR_EXPORT_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK1_FOR_EXPORT_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK1_FOR_EXPORT_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK2_FOR_EXPORT_LSB 0x16 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK2_FOR_EXPORT_MASK 0xc00000 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK2_FOR_EXPORT_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK2_FOR_EXPORT_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK2_FOR_EXPORT_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_ENCRYPTED_PERSO_PAYLOAD_MAC_LSB 0x18 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_ENCRYPTED_PERSO_PAYLOAD_MAC_MASK 0x3000000 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_ENCRYPTED_PERSO_PAYLOAD_MAC_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_ENCRYPTED_PERSO_PAYLOAD_MAC_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_ENCRYPTED_PERSO_PAYLOAD_MAC_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK0_LSB 0x1a #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK0_MASK 0xc000000 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK0_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK0_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK0_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK1_LSB 0x1c #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK1_MASK 0x30000000 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK1_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK1_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK1_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK2_LSB 0x1e #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK2_MASK 0xc0000000 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK2_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK2_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL0_DERIVE_HIK2_OFFSET 0x4a8 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_TESTMODE_PASSWORD_ROOTKEY_LSB 0x0 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_TESTMODE_PASSWORD_ROOTKEY_MASK 0x3 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_TESTMODE_PASSWORD_ROOTKEY_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_TESTMODE_PASSWORD_ROOTKEY_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_TESTMODE_PASSWORD_ROOTKEY_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_TESTMODE_PASSWORD_LSB 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_TESTMODE_PASSWORD_MASK 0xc #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_TESTMODE_PASSWORD_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_TESTMODE_PASSWORD_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_TESTMODE_PASSWORD_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_STAGE2_FIRMWARE_HIK0_LSB 0x4 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_STAGE2_FIRMWARE_HIK0_MASK 0x30 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_STAGE2_FIRMWARE_HIK0_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_STAGE2_FIRMWARE_HIK0_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_STAGE2_FIRMWARE_HIK0_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_STAGE2_FIRMWARE_HIK1_LSB 0x6 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_STAGE2_FIRMWARE_HIK1_MASK 0xc0 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_STAGE2_FIRMWARE_HIK1_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_STAGE2_FIRMWARE_HIK1_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_STAGE2_FIRMWARE_HIK1_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_STAGE2_FIRMWARE_HIK2_LSB 0x8 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_STAGE2_FIRMWARE_HIK2_MASK 0x300 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_STAGE2_FIRMWARE_HIK2_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_STAGE2_FIRMWARE_HIK2_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_DERIVE_STAGE2_FIRMWARE_HIK2_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_STAGE2_HIK0_FIRMWARE_HASH_CHAIN_LSB 0xa #define GC_KEYMGR_CERT_REVOKE_CTRL1_STAGE2_HIK0_FIRMWARE_HASH_CHAIN_MASK 0xc00 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STAGE2_HIK0_FIRMWARE_HASH_CHAIN_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STAGE2_HIK0_FIRMWARE_HASH_CHAIN_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STAGE2_HIK0_FIRMWARE_HASH_CHAIN_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_FW2_HIK0_CHAIN_LAST_LINK_EXPORT_LSB 0xc #define GC_KEYMGR_CERT_REVOKE_CTRL1_FW2_HIK0_CHAIN_LAST_LINK_EXPORT_MASK 0x3000 #define GC_KEYMGR_CERT_REVOKE_CTRL1_FW2_HIK0_CHAIN_LAST_LINK_EXPORT_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_FW2_HIK0_CHAIN_LAST_LINK_EXPORT_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_FW2_HIK0_CHAIN_LAST_LINK_EXPORT_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_STAGE2_HIK1_FIRMWARE_HASH_CHAIN_LSB 0xe #define GC_KEYMGR_CERT_REVOKE_CTRL1_STAGE2_HIK1_FIRMWARE_HASH_CHAIN_MASK 0xc000 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STAGE2_HIK1_FIRMWARE_HASH_CHAIN_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STAGE2_HIK1_FIRMWARE_HASH_CHAIN_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STAGE2_HIK1_FIRMWARE_HASH_CHAIN_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_FW2_HIK1_CHAIN_LAST_LINK_EXPORT_LSB 0x10 #define GC_KEYMGR_CERT_REVOKE_CTRL1_FW2_HIK1_CHAIN_LAST_LINK_EXPORT_MASK 0x30000 #define GC_KEYMGR_CERT_REVOKE_CTRL1_FW2_HIK1_CHAIN_LAST_LINK_EXPORT_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_FW2_HIK1_CHAIN_LAST_LINK_EXPORT_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_FW2_HIK1_CHAIN_LAST_LINK_EXPORT_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_STAGE2_HIK2_FIRMWARE_HASH_CHAIN_LSB 0x12 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STAGE2_HIK2_FIRMWARE_HASH_CHAIN_MASK 0xc0000 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STAGE2_HIK2_FIRMWARE_HASH_CHAIN_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STAGE2_HIK2_FIRMWARE_HASH_CHAIN_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STAGE2_HIK2_FIRMWARE_HASH_CHAIN_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_FW2_HIK2_CHAIN_LAST_LINK_EXPORT_LSB 0x14 #define GC_KEYMGR_CERT_REVOKE_CTRL1_FW2_HIK2_CHAIN_LAST_LINK_EXPORT_MASK 0x300000 #define GC_KEYMGR_CERT_REVOKE_CTRL1_FW2_HIK2_CHAIN_LAST_LINK_EXPORT_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_FW2_HIK2_CHAIN_LAST_LINK_EXPORT_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_FW2_HIK2_CHAIN_LAST_LINK_EXPORT_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_GET_STIRRED_RANDOM_DATA_LSB 0x16 #define GC_KEYMGR_CERT_REVOKE_CTRL1_GET_STIRRED_RANDOM_DATA_MASK 0xc00000 #define GC_KEYMGR_CERT_REVOKE_CTRL1_GET_STIRRED_RANDOM_DATA_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_GET_STIRRED_RANDOM_DATA_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_GET_STIRRED_RANDOM_DATA_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_STIR_RANDOM_DATA_AND_UPDATE_RSR_LSB 0x18 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STIR_RANDOM_DATA_AND_UPDATE_RSR_MASK 0x3000000 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STIR_RANDOM_DATA_AND_UPDATE_RSR_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STIR_RANDOM_DATA_AND_UPDATE_RSR_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STIR_RANDOM_DATA_AND_UPDATE_RSR_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_STIR_RANDOM_DATA_INTO_USRS_LSB 0x1a #define GC_KEYMGR_CERT_REVOKE_CTRL1_STIR_RANDOM_DATA_INTO_USRS_MASK 0xc000000 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STIR_RANDOM_DATA_INTO_USRS_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STIR_RANDOM_DATA_INTO_USRS_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_STIR_RANDOM_DATA_INTO_USRS_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_HIK0_ISR0_KEYS_LSB 0x1c #define GC_KEYMGR_CERT_REVOKE_CTRL1_HIK0_ISR0_KEYS_MASK 0x30000000 #define GC_KEYMGR_CERT_REVOKE_CTRL1_HIK0_ISR0_KEYS_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_HIK0_ISR0_KEYS_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_HIK0_ISR0_KEYS_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL1_HIK0_USR_KEYS_LSB 0x1e #define GC_KEYMGR_CERT_REVOKE_CTRL1_HIK0_USR_KEYS_MASK 0xc0000000 #define GC_KEYMGR_CERT_REVOKE_CTRL1_HIK0_USR_KEYS_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_HIK0_USR_KEYS_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL1_HIK0_USR_KEYS_OFFSET 0x4ac #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK1_ISR1_KEYS_LSB 0x0 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK1_ISR1_KEYS_MASK 0x3 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK1_ISR1_KEYS_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK1_ISR1_KEYS_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK1_ISR1_KEYS_OFFSET 0x4b0 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK1_USR_KEYS_LSB 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK1_USR_KEYS_MASK 0xc #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK1_USR_KEYS_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK1_USR_KEYS_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK1_USR_KEYS_OFFSET 0x4b0 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK2_ISR2_KEYS_LSB 0x4 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK2_ISR2_KEYS_MASK 0x30 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK2_ISR2_KEYS_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK2_ISR2_KEYS_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK2_ISR2_KEYS_OFFSET 0x4b0 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK2_USR_KEYS_LSB 0x6 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK2_USR_KEYS_MASK 0xc0 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK2_USR_KEYS_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK2_USR_KEYS_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK2_USR_KEYS_OFFSET 0x4b0 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK0_HMAC_USER_DATA_LSB 0x8 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK0_HMAC_USER_DATA_MASK 0x300 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK0_HMAC_USER_DATA_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK0_HMAC_USER_DATA_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK0_HMAC_USER_DATA_OFFSET 0x4b0 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK1_HMAC_USER_DATA_LSB 0xa #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK1_HMAC_USER_DATA_MASK 0xc00 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK1_HMAC_USER_DATA_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK1_HMAC_USER_DATA_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK1_HMAC_USER_DATA_OFFSET 0x4b0 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK2_HMAC_USER_DATA_LSB 0xc #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK2_HMAC_USER_DATA_MASK 0x3000 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK2_HMAC_USER_DATA_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK2_HMAC_USER_DATA_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HIK2_HMAC_USER_DATA_OFFSET 0x4b0 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HASH_ROM_FOR_RBC_LSB 0xe #define GC_KEYMGR_CERT_REVOKE_CTRL2_HASH_ROM_FOR_RBC_MASK 0xc000 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HASH_ROM_FOR_RBC_SIZE 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HASH_ROM_FOR_RBC_DEFAULT 0x2 #define GC_KEYMGR_CERT_REVOKE_CTRL2_HASH_ROM_FOR_RBC_OFFSET 0x4b0 #define GC_KEYMGR_HKEY_ERR_FLAGS_AES_ALL_0S_ERR_LSB 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_AES_ALL_0S_ERR_MASK 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_AES_ALL_0S_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_AES_ALL_0S_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_AES_ALL_0S_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_AES_ALL_1S_ERR_LSB 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_AES_ALL_1S_ERR_MASK 0x2 #define GC_KEYMGR_HKEY_ERR_FLAGS_AES_ALL_1S_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_AES_ALL_1S_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_AES_ALL_1S_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_AES_SLOT_VLD_ERR_LSB 0x2 #define GC_KEYMGR_HKEY_ERR_FLAGS_AES_SLOT_VLD_ERR_MASK 0x4 #define GC_KEYMGR_HKEY_ERR_FLAGS_AES_SLOT_VLD_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_AES_SLOT_VLD_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_AES_SLOT_VLD_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_DIGEST_ADDR_ERR_LSB 0x3 #define GC_KEYMGR_HKEY_ERR_FLAGS_DIGEST_ADDR_ERR_MASK 0x8 #define GC_KEYMGR_HKEY_ERR_FLAGS_DIGEST_ADDR_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_DIGEST_ADDR_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_DIGEST_ADDR_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_DIGEST_ALL_0S_ERR_LSB 0x4 #define GC_KEYMGR_HKEY_ERR_FLAGS_DIGEST_ALL_0S_ERR_MASK 0x10 #define GC_KEYMGR_HKEY_ERR_FLAGS_DIGEST_ALL_0S_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_DIGEST_ALL_0S_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_DIGEST_ALL_0S_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_DIGEST_ALL_1S_ERR_LSB 0x5 #define GC_KEYMGR_HKEY_ERR_FLAGS_DIGEST_ALL_1S_ERR_MASK 0x20 #define GC_KEYMGR_HKEY_ERR_FLAGS_DIGEST_ALL_1S_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_DIGEST_ALL_1S_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_DIGEST_ALL_1S_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_OVFL_GEN_ERR_LSB 0x6 #define GC_KEYMGR_HKEY_ERR_FLAGS_OVFL_GEN_ERR_MASK 0x40 #define GC_KEYMGR_HKEY_ERR_FLAGS_OVFL_GEN_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_OVFL_GEN_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_OVFL_GEN_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_SHA_ALL_0S_ERR_LSB 0x7 #define GC_KEYMGR_HKEY_ERR_FLAGS_SHA_ALL_0S_ERR_MASK 0x80 #define GC_KEYMGR_HKEY_ERR_FLAGS_SHA_ALL_0S_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_SHA_ALL_0S_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_SHA_ALL_0S_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_SHA_ALL_1S_ERR_LSB 0x8 #define GC_KEYMGR_HKEY_ERR_FLAGS_SHA_ALL_1S_ERR_MASK 0x100 #define GC_KEYMGR_HKEY_ERR_FLAGS_SHA_ALL_1S_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_SHA_ALL_1S_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_SHA_ALL_1S_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_SHA_SLOT_VLD_ERR_LSB 0x9 #define GC_KEYMGR_HKEY_ERR_FLAGS_SHA_SLOT_VLD_ERR_MASK 0x200 #define GC_KEYMGR_HKEY_ERR_FLAGS_SHA_SLOT_VLD_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_SHA_SLOT_VLD_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_SHA_SLOT_VLD_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_SLOT_CMP_FAIL_ERR_LSB 0xa #define GC_KEYMGR_HKEY_ERR_FLAGS_SLOT_CMP_FAIL_ERR_MASK 0x400 #define GC_KEYMGR_HKEY_ERR_FLAGS_SLOT_CMP_FAIL_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_SLOT_CMP_FAIL_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_SLOT_CMP_FAIL_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_SLOT_WRG_GEN_ERR_LSB 0xb #define GC_KEYMGR_HKEY_ERR_FLAGS_SLOT_WRG_GEN_ERR_MASK 0x800 #define GC_KEYMGR_HKEY_ERR_FLAGS_SLOT_WRG_GEN_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_SLOT_WRG_GEN_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_SLOT_WRG_GEN_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_SLOT_WRG_ID_ERR_LSB 0xc #define GC_KEYMGR_HKEY_ERR_FLAGS_SLOT_WRG_ID_ERR_MASK 0x1000 #define GC_KEYMGR_HKEY_ERR_FLAGS_SLOT_WRG_ID_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_SLOT_WRG_ID_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_SLOT_WRG_ID_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_PW_ALL_0S_ERR_LSB 0xd #define GC_KEYMGR_HKEY_ERR_FLAGS_PW_ALL_0S_ERR_MASK 0x2000 #define GC_KEYMGR_HKEY_ERR_FLAGS_PW_ALL_0S_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_PW_ALL_0S_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_PW_ALL_0S_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_PW_ALL_1S_ERR_LSB 0xe #define GC_KEYMGR_HKEY_ERR_FLAGS_PW_ALL_1S_ERR_MASK 0x4000 #define GC_KEYMGR_HKEY_ERR_FLAGS_PW_ALL_1S_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_PW_ALL_1S_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_PW_ALL_1S_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_UNLOCK_TRYS_ERR_LSB 0xf #define GC_KEYMGR_HKEY_ERR_FLAGS_UNLOCK_TRYS_ERR_MASK 0x8000 #define GC_KEYMGR_HKEY_ERR_FLAGS_UNLOCK_TRYS_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_UNLOCK_TRYS_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_UNLOCK_TRYS_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_FLASH_FBS_ERR_LSB 0x10 #define GC_KEYMGR_HKEY_ERR_FLAGS_FLASH_FBS_ERR_MASK 0x10000 #define GC_KEYMGR_HKEY_ERR_FLAGS_FLASH_FBS_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_FLASH_FBS_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_FLASH_FBS_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_FLAGS_FLASH_RSR_ERR_LSB 0x11 #define GC_KEYMGR_HKEY_ERR_FLAGS_FLASH_RSR_ERR_MASK 0x20000 #define GC_KEYMGR_HKEY_ERR_FLAGS_FLASH_RSR_ERR_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_FLAGS_FLASH_RSR_ERR_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_FLAGS_FLASH_RSR_ERR_OFFSET 0x3324 #define GC_KEYMGR_HKEY_ERR_CTRL_LONG0_CHK_EN_LSB 0x0 #define GC_KEYMGR_HKEY_ERR_CTRL_LONG0_CHK_EN_MASK 0x1 #define GC_KEYMGR_HKEY_ERR_CTRL_LONG0_CHK_EN_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_CTRL_LONG0_CHK_EN_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_CTRL_LONG0_CHK_EN_OFFSET 0x3328 #define GC_KEYMGR_HKEY_ERR_CTRL_LONG1_CHK_EN_LSB 0x1 #define GC_KEYMGR_HKEY_ERR_CTRL_LONG1_CHK_EN_MASK 0x2 #define GC_KEYMGR_HKEY_ERR_CTRL_LONG1_CHK_EN_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_CTRL_LONG1_CHK_EN_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_CTRL_LONG1_CHK_EN_OFFSET 0x3328 #define GC_KEYMGR_HKEY_ERR_CTRL_TM_LONG0_CHK_EN_LSB 0x2 #define GC_KEYMGR_HKEY_ERR_CTRL_TM_LONG0_CHK_EN_MASK 0x4 #define GC_KEYMGR_HKEY_ERR_CTRL_TM_LONG0_CHK_EN_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_CTRL_TM_LONG0_CHK_EN_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_CTRL_TM_LONG0_CHK_EN_OFFSET 0x3328 #define GC_KEYMGR_HKEY_ERR_CTRL_TM_LONG1_CHK_EN_LSB 0x3 #define GC_KEYMGR_HKEY_ERR_CTRL_TM_LONG1_CHK_EN_MASK 0x8 #define GC_KEYMGR_HKEY_ERR_CTRL_TM_LONG1_CHK_EN_SIZE 0x1 #define GC_KEYMGR_HKEY_ERR_CTRL_TM_LONG1_CHK_EN_DEFAULT 0x0 #define GC_KEYMGR_HKEY_ERR_CTRL_TM_LONG1_CHK_EN_OFFSET 0x3328 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_FBS_START_LSB 0x0 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_FBS_START_MASK 0x1 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_FBS_START_SIZE 0x1 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_FBS_START_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_FBS_START_OFFSET 0x332c #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_FBS_SUCCESS_LSB 0x1 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_FBS_SUCCESS_MASK 0x2 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_FBS_SUCCESS_SIZE 0x1 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_FBS_SUCCESS_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_FBS_SUCCESS_OFFSET 0x332c #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_RSR_START_LSB 0x2 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_RSR_START_MASK 0x4 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_RSR_START_SIZE 0x1 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_RSR_START_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_RSR_START_OFFSET 0x332c #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_RSR_SUCCESS_LSB 0x3 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_RSR_SUCCESS_MASK 0x8 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_RSR_SUCCESS_SIZE 0x1 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_RSR_SUCCESS_DEFAULT 0x0 #define GC_KEYMGR_HKEY_FLASH_RCV_STATUS_RSR_SUCCESS_OFFSET 0x332c #define GC_PINMUX_DIOM0_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOM0_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOM0_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOM0_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOM0_CTL_DS_OFFSET 0x4 #define GC_PINMUX_DIOM0_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOM0_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOM0_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOM0_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOM0_CTL_IE_OFFSET 0x4 #define GC_PINMUX_DIOM0_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOM0_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOM0_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOM0_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOM0_CTL_PD_OFFSET 0x4 #define GC_PINMUX_DIOM0_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOM0_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOM0_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOM0_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOM0_CTL_PU_OFFSET 0x4 #define GC_PINMUX_DIOM0_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOM0_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOM0_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOM0_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOM0_CTL_INV_OFFSET 0x4 #define GC_PINMUX_DIOM1_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOM1_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOM1_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOM1_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOM1_CTL_DS_OFFSET 0xc #define GC_PINMUX_DIOM1_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOM1_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOM1_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOM1_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOM1_CTL_IE_OFFSET 0xc #define GC_PINMUX_DIOM1_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOM1_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOM1_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOM1_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOM1_CTL_PD_OFFSET 0xc #define GC_PINMUX_DIOM1_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOM1_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOM1_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOM1_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOM1_CTL_PU_OFFSET 0xc #define GC_PINMUX_DIOM1_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOM1_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOM1_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOM1_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOM1_CTL_INV_OFFSET 0xc #define GC_PINMUX_DIOM2_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOM2_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOM2_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOM2_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOM2_CTL_DS_OFFSET 0x14 #define GC_PINMUX_DIOM2_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOM2_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOM2_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOM2_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOM2_CTL_IE_OFFSET 0x14 #define GC_PINMUX_DIOM2_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOM2_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOM2_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOM2_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOM2_CTL_PD_OFFSET 0x14 #define GC_PINMUX_DIOM2_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOM2_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOM2_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOM2_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOM2_CTL_PU_OFFSET 0x14 #define GC_PINMUX_DIOM2_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOM2_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOM2_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOM2_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOM2_CTL_INV_OFFSET 0x14 #define GC_PINMUX_DIOM3_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOM3_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOM3_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOM3_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOM3_CTL_DS_OFFSET 0x1c #define GC_PINMUX_DIOM3_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOM3_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOM3_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOM3_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOM3_CTL_IE_OFFSET 0x1c #define GC_PINMUX_DIOM3_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOM3_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOM3_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOM3_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOM3_CTL_PD_OFFSET 0x1c #define GC_PINMUX_DIOM3_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOM3_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOM3_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOM3_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOM3_CTL_PU_OFFSET 0x1c #define GC_PINMUX_DIOM3_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOM3_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOM3_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOM3_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOM3_CTL_INV_OFFSET 0x1c #define GC_PINMUX_DIOM4_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOM4_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOM4_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOM4_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOM4_CTL_DS_OFFSET 0x24 #define GC_PINMUX_DIOM4_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOM4_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOM4_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOM4_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOM4_CTL_IE_OFFSET 0x24 #define GC_PINMUX_DIOM4_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOM4_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOM4_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOM4_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOM4_CTL_PD_OFFSET 0x24 #define GC_PINMUX_DIOM4_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOM4_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOM4_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOM4_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOM4_CTL_PU_OFFSET 0x24 #define GC_PINMUX_DIOM4_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOM4_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOM4_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOM4_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOM4_CTL_INV_OFFSET 0x24 #define GC_PINMUX_DIOA0_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOA0_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOA0_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOA0_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOA0_CTL_DS_OFFSET 0x2c #define GC_PINMUX_DIOA0_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOA0_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOA0_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOA0_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOA0_CTL_IE_OFFSET 0x2c #define GC_PINMUX_DIOA0_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOA0_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOA0_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOA0_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOA0_CTL_PD_OFFSET 0x2c #define GC_PINMUX_DIOA0_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOA0_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOA0_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOA0_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOA0_CTL_PU_OFFSET 0x2c #define GC_PINMUX_DIOA0_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOA0_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOA0_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOA0_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOA0_CTL_INV_OFFSET 0x2c #define GC_PINMUX_DIOA1_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOA1_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOA1_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOA1_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOA1_CTL_DS_OFFSET 0x34 #define GC_PINMUX_DIOA1_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOA1_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOA1_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOA1_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOA1_CTL_IE_OFFSET 0x34 #define GC_PINMUX_DIOA1_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOA1_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOA1_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOA1_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOA1_CTL_PD_OFFSET 0x34 #define GC_PINMUX_DIOA1_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOA1_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOA1_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOA1_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOA1_CTL_PU_OFFSET 0x34 #define GC_PINMUX_DIOA1_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOA1_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOA1_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOA1_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOA1_CTL_INV_OFFSET 0x34 #define GC_PINMUX_DIOA2_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOA2_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOA2_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOA2_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOA2_CTL_DS_OFFSET 0x3c #define GC_PINMUX_DIOA2_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOA2_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOA2_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOA2_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOA2_CTL_IE_OFFSET 0x3c #define GC_PINMUX_DIOA2_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOA2_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOA2_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOA2_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOA2_CTL_PD_OFFSET 0x3c #define GC_PINMUX_DIOA2_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOA2_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOA2_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOA2_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOA2_CTL_PU_OFFSET 0x3c #define GC_PINMUX_DIOA2_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOA2_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOA2_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOA2_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOA2_CTL_INV_OFFSET 0x3c #define GC_PINMUX_DIOA3_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOA3_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOA3_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOA3_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOA3_CTL_DS_OFFSET 0x44 #define GC_PINMUX_DIOA3_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOA3_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOA3_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOA3_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOA3_CTL_IE_OFFSET 0x44 #define GC_PINMUX_DIOA3_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOA3_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOA3_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOA3_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOA3_CTL_PD_OFFSET 0x44 #define GC_PINMUX_DIOA3_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOA3_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOA3_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOA3_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOA3_CTL_PU_OFFSET 0x44 #define GC_PINMUX_DIOA3_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOA3_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOA3_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOA3_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOA3_CTL_INV_OFFSET 0x44 #define GC_PINMUX_DIOA4_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOA4_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOA4_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOA4_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOA4_CTL_DS_OFFSET 0x4c #define GC_PINMUX_DIOA4_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOA4_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOA4_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOA4_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOA4_CTL_IE_OFFSET 0x4c #define GC_PINMUX_DIOA4_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOA4_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOA4_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOA4_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOA4_CTL_PD_OFFSET 0x4c #define GC_PINMUX_DIOA4_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOA4_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOA4_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOA4_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOA4_CTL_PU_OFFSET 0x4c #define GC_PINMUX_DIOA4_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOA4_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOA4_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOA4_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOA4_CTL_INV_OFFSET 0x4c #define GC_PINMUX_DIOA5_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOA5_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOA5_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOA5_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOA5_CTL_DS_OFFSET 0x54 #define GC_PINMUX_DIOA5_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOA5_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOA5_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOA5_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOA5_CTL_IE_OFFSET 0x54 #define GC_PINMUX_DIOA5_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOA5_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOA5_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOA5_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOA5_CTL_PD_OFFSET 0x54 #define GC_PINMUX_DIOA5_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOA5_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOA5_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOA5_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOA5_CTL_PU_OFFSET 0x54 #define GC_PINMUX_DIOA5_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOA5_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOA5_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOA5_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOA5_CTL_INV_OFFSET 0x54 #define GC_PINMUX_DIOA6_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOA6_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOA6_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOA6_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOA6_CTL_DS_OFFSET 0x5c #define GC_PINMUX_DIOA6_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOA6_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOA6_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOA6_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOA6_CTL_IE_OFFSET 0x5c #define GC_PINMUX_DIOA6_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOA6_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOA6_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOA6_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOA6_CTL_PD_OFFSET 0x5c #define GC_PINMUX_DIOA6_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOA6_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOA6_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOA6_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOA6_CTL_PU_OFFSET 0x5c #define GC_PINMUX_DIOA6_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOA6_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOA6_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOA6_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOA6_CTL_INV_OFFSET 0x5c #define GC_PINMUX_DIOA7_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOA7_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOA7_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOA7_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOA7_CTL_DS_OFFSET 0x64 #define GC_PINMUX_DIOA7_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOA7_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOA7_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOA7_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOA7_CTL_IE_OFFSET 0x64 #define GC_PINMUX_DIOA7_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOA7_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOA7_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOA7_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOA7_CTL_PD_OFFSET 0x64 #define GC_PINMUX_DIOA7_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOA7_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOA7_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOA7_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOA7_CTL_PU_OFFSET 0x64 #define GC_PINMUX_DIOA7_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOA7_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOA7_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOA7_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOA7_CTL_INV_OFFSET 0x64 #define GC_PINMUX_DIOA8_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOA8_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOA8_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOA8_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOA8_CTL_DS_OFFSET 0x6c #define GC_PINMUX_DIOA8_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOA8_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOA8_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOA8_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOA8_CTL_IE_OFFSET 0x6c #define GC_PINMUX_DIOA8_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOA8_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOA8_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOA8_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOA8_CTL_PD_OFFSET 0x6c #define GC_PINMUX_DIOA8_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOA8_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOA8_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOA8_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOA8_CTL_PU_OFFSET 0x6c #define GC_PINMUX_DIOA8_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOA8_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOA8_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOA8_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOA8_CTL_INV_OFFSET 0x6c #define GC_PINMUX_DIOA9_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOA9_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOA9_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOA9_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOA9_CTL_DS_OFFSET 0x74 #define GC_PINMUX_DIOA9_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOA9_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOA9_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOA9_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOA9_CTL_IE_OFFSET 0x74 #define GC_PINMUX_DIOA9_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOA9_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOA9_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOA9_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOA9_CTL_PD_OFFSET 0x74 #define GC_PINMUX_DIOA9_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOA9_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOA9_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOA9_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOA9_CTL_PU_OFFSET 0x74 #define GC_PINMUX_DIOA9_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOA9_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOA9_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOA9_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOA9_CTL_INV_OFFSET 0x74 #define GC_PINMUX_DIOA10_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOA10_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOA10_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOA10_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOA10_CTL_DS_OFFSET 0x7c #define GC_PINMUX_DIOA10_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOA10_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOA10_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOA10_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOA10_CTL_IE_OFFSET 0x7c #define GC_PINMUX_DIOA10_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOA10_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOA10_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOA10_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOA10_CTL_PD_OFFSET 0x7c #define GC_PINMUX_DIOA10_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOA10_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOA10_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOA10_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOA10_CTL_PU_OFFSET 0x7c #define GC_PINMUX_DIOA10_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOA10_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOA10_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOA10_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOA10_CTL_INV_OFFSET 0x7c #define GC_PINMUX_DIOA11_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOA11_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOA11_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOA11_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOA11_CTL_DS_OFFSET 0x84 #define GC_PINMUX_DIOA11_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOA11_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOA11_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOA11_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOA11_CTL_IE_OFFSET 0x84 #define GC_PINMUX_DIOA11_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOA11_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOA11_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOA11_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOA11_CTL_PD_OFFSET 0x84 #define GC_PINMUX_DIOA11_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOA11_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOA11_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOA11_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOA11_CTL_PU_OFFSET 0x84 #define GC_PINMUX_DIOA11_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOA11_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOA11_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOA11_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOA11_CTL_INV_OFFSET 0x84 #define GC_PINMUX_DIOA12_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOA12_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOA12_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOA12_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOA12_CTL_DS_OFFSET 0x8c #define GC_PINMUX_DIOA12_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOA12_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOA12_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOA12_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOA12_CTL_IE_OFFSET 0x8c #define GC_PINMUX_DIOA12_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOA12_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOA12_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOA12_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOA12_CTL_PD_OFFSET 0x8c #define GC_PINMUX_DIOA12_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOA12_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOA12_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOA12_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOA12_CTL_PU_OFFSET 0x8c #define GC_PINMUX_DIOA12_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOA12_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOA12_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOA12_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOA12_CTL_INV_OFFSET 0x8c #define GC_PINMUX_DIOA13_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOA13_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOA13_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOA13_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOA13_CTL_DS_OFFSET 0x94 #define GC_PINMUX_DIOA13_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOA13_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOA13_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOA13_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOA13_CTL_IE_OFFSET 0x94 #define GC_PINMUX_DIOA13_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOA13_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOA13_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOA13_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOA13_CTL_PD_OFFSET 0x94 #define GC_PINMUX_DIOA13_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOA13_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOA13_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOA13_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOA13_CTL_PU_OFFSET 0x94 #define GC_PINMUX_DIOA13_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOA13_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOA13_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOA13_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOA13_CTL_INV_OFFSET 0x94 #define GC_PINMUX_DIOA14_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOA14_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOA14_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOA14_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOA14_CTL_DS_OFFSET 0x9c #define GC_PINMUX_DIOA14_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOA14_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOA14_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOA14_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOA14_CTL_IE_OFFSET 0x9c #define GC_PINMUX_DIOA14_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOA14_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOA14_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOA14_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOA14_CTL_PD_OFFSET 0x9c #define GC_PINMUX_DIOA14_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOA14_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOA14_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOA14_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOA14_CTL_PU_OFFSET 0x9c #define GC_PINMUX_DIOA14_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOA14_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOA14_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOA14_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOA14_CTL_INV_OFFSET 0x9c #define GC_PINMUX_DIOB0_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOB0_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOB0_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOB0_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOB0_CTL_DS_OFFSET 0xa4 #define GC_PINMUX_DIOB0_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOB0_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOB0_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOB0_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOB0_CTL_IE_OFFSET 0xa4 #define GC_PINMUX_DIOB0_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOB0_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOB0_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOB0_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOB0_CTL_PD_OFFSET 0xa4 #define GC_PINMUX_DIOB0_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOB0_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOB0_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOB0_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOB0_CTL_PU_OFFSET 0xa4 #define GC_PINMUX_DIOB0_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOB0_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOB0_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOB0_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOB0_CTL_INV_OFFSET 0xa4 #define GC_PINMUX_DIOB1_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOB1_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOB1_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOB1_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOB1_CTL_DS_OFFSET 0xac #define GC_PINMUX_DIOB1_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOB1_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOB1_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOB1_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOB1_CTL_IE_OFFSET 0xac #define GC_PINMUX_DIOB1_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOB1_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOB1_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOB1_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOB1_CTL_PD_OFFSET 0xac #define GC_PINMUX_DIOB1_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOB1_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOB1_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOB1_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOB1_CTL_PU_OFFSET 0xac #define GC_PINMUX_DIOB1_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOB1_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOB1_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOB1_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOB1_CTL_INV_OFFSET 0xac #define GC_PINMUX_DIOB2_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOB2_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOB2_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOB2_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOB2_CTL_DS_OFFSET 0xb4 #define GC_PINMUX_DIOB2_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOB2_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOB2_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOB2_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOB2_CTL_IE_OFFSET 0xb4 #define GC_PINMUX_DIOB2_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOB2_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOB2_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOB2_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOB2_CTL_PD_OFFSET 0xb4 #define GC_PINMUX_DIOB2_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOB2_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOB2_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOB2_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOB2_CTL_PU_OFFSET 0xb4 #define GC_PINMUX_DIOB2_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOB2_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOB2_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOB2_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOB2_CTL_INV_OFFSET 0xb4 #define GC_PINMUX_DIOB3_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOB3_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOB3_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOB3_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOB3_CTL_DS_OFFSET 0xbc #define GC_PINMUX_DIOB3_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOB3_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOB3_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOB3_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOB3_CTL_IE_OFFSET 0xbc #define GC_PINMUX_DIOB3_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOB3_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOB3_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOB3_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOB3_CTL_PD_OFFSET 0xbc #define GC_PINMUX_DIOB3_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOB3_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOB3_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOB3_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOB3_CTL_PU_OFFSET 0xbc #define GC_PINMUX_DIOB3_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOB3_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOB3_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOB3_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOB3_CTL_INV_OFFSET 0xbc #define GC_PINMUX_DIOB4_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOB4_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOB4_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOB4_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOB4_CTL_DS_OFFSET 0xc4 #define GC_PINMUX_DIOB4_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOB4_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOB4_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOB4_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOB4_CTL_IE_OFFSET 0xc4 #define GC_PINMUX_DIOB4_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOB4_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOB4_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOB4_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOB4_CTL_PD_OFFSET 0xc4 #define GC_PINMUX_DIOB4_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOB4_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOB4_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOB4_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOB4_CTL_PU_OFFSET 0xc4 #define GC_PINMUX_DIOB4_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOB4_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOB4_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOB4_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOB4_CTL_INV_OFFSET 0xc4 #define GC_PINMUX_DIOB5_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOB5_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOB5_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOB5_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOB5_CTL_DS_OFFSET 0xcc #define GC_PINMUX_DIOB5_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOB5_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOB5_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOB5_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOB5_CTL_IE_OFFSET 0xcc #define GC_PINMUX_DIOB5_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOB5_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOB5_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOB5_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOB5_CTL_PD_OFFSET 0xcc #define GC_PINMUX_DIOB5_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOB5_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOB5_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOB5_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOB5_CTL_PU_OFFSET 0xcc #define GC_PINMUX_DIOB5_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOB5_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOB5_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOB5_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOB5_CTL_INV_OFFSET 0xcc #define GC_PINMUX_DIOB6_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOB6_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOB6_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOB6_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOB6_CTL_DS_OFFSET 0xd4 #define GC_PINMUX_DIOB6_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOB6_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOB6_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOB6_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOB6_CTL_IE_OFFSET 0xd4 #define GC_PINMUX_DIOB6_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOB6_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOB6_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOB6_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOB6_CTL_PD_OFFSET 0xd4 #define GC_PINMUX_DIOB6_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOB6_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOB6_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOB6_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOB6_CTL_PU_OFFSET 0xd4 #define GC_PINMUX_DIOB6_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOB6_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOB6_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOB6_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOB6_CTL_INV_OFFSET 0xd4 #define GC_PINMUX_DIOB7_CTL_DS_LSB 0x0 #define GC_PINMUX_DIOB7_CTL_DS_MASK 0x3 #define GC_PINMUX_DIOB7_CTL_DS_SIZE 0x2 #define GC_PINMUX_DIOB7_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_DIOB7_CTL_DS_OFFSET 0xdc #define GC_PINMUX_DIOB7_CTL_IE_LSB 0x2 #define GC_PINMUX_DIOB7_CTL_IE_MASK 0x4 #define GC_PINMUX_DIOB7_CTL_IE_SIZE 0x1 #define GC_PINMUX_DIOB7_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_DIOB7_CTL_IE_OFFSET 0xdc #define GC_PINMUX_DIOB7_CTL_PD_LSB 0x3 #define GC_PINMUX_DIOB7_CTL_PD_MASK 0x8 #define GC_PINMUX_DIOB7_CTL_PD_SIZE 0x1 #define GC_PINMUX_DIOB7_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_DIOB7_CTL_PD_OFFSET 0xdc #define GC_PINMUX_DIOB7_CTL_PU_LSB 0x4 #define GC_PINMUX_DIOB7_CTL_PU_MASK 0x10 #define GC_PINMUX_DIOB7_CTL_PU_SIZE 0x1 #define GC_PINMUX_DIOB7_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_DIOB7_CTL_PU_OFFSET 0xdc #define GC_PINMUX_DIOB7_CTL_INV_LSB 0x5 #define GC_PINMUX_DIOB7_CTL_INV_MASK 0x20 #define GC_PINMUX_DIOB7_CTL_INV_SIZE 0x1 #define GC_PINMUX_DIOB7_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_DIOB7_CTL_INV_OFFSET 0xdc #define GC_PINMUX_RESETB_CTL_DS_LSB 0x0 #define GC_PINMUX_RESETB_CTL_DS_MASK 0x3 #define GC_PINMUX_RESETB_CTL_DS_SIZE 0x2 #define GC_PINMUX_RESETB_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_RESETB_CTL_DS_OFFSET 0xe4 #define GC_PINMUX_RESETB_CTL_IE_LSB 0x2 #define GC_PINMUX_RESETB_CTL_IE_MASK 0x4 #define GC_PINMUX_RESETB_CTL_IE_SIZE 0x1 #define GC_PINMUX_RESETB_CTL_IE_DEFAULT 0x1 #define GC_PINMUX_RESETB_CTL_IE_OFFSET 0xe4 #define GC_PINMUX_RESETB_CTL_PD_LSB 0x3 #define GC_PINMUX_RESETB_CTL_PD_MASK 0x8 #define GC_PINMUX_RESETB_CTL_PD_SIZE 0x1 #define GC_PINMUX_RESETB_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_RESETB_CTL_PD_OFFSET 0xe4 #define GC_PINMUX_RESETB_CTL_PU_LSB 0x4 #define GC_PINMUX_RESETB_CTL_PU_MASK 0x10 #define GC_PINMUX_RESETB_CTL_PU_SIZE 0x1 #define GC_PINMUX_RESETB_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_RESETB_CTL_PU_OFFSET 0xe4 #define GC_PINMUX_RESETB_CTL_INV_LSB 0x5 #define GC_PINMUX_RESETB_CTL_INV_MASK 0x20 #define GC_PINMUX_RESETB_CTL_INV_SIZE 0x1 #define GC_PINMUX_RESETB_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_RESETB_CTL_INV_OFFSET 0xe4 #define GC_PINMUX_VIO0_CTL_DS_LSB 0x0 #define GC_PINMUX_VIO0_CTL_DS_MASK 0x3 #define GC_PINMUX_VIO0_CTL_DS_SIZE 0x2 #define GC_PINMUX_VIO0_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_VIO0_CTL_DS_OFFSET 0xec #define GC_PINMUX_VIO0_CTL_IE_LSB 0x2 #define GC_PINMUX_VIO0_CTL_IE_MASK 0x4 #define GC_PINMUX_VIO0_CTL_IE_SIZE 0x1 #define GC_PINMUX_VIO0_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_VIO0_CTL_IE_OFFSET 0xec #define GC_PINMUX_VIO0_CTL_PD_LSB 0x3 #define GC_PINMUX_VIO0_CTL_PD_MASK 0x8 #define GC_PINMUX_VIO0_CTL_PD_SIZE 0x1 #define GC_PINMUX_VIO0_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_VIO0_CTL_PD_OFFSET 0xec #define GC_PINMUX_VIO0_CTL_PU_LSB 0x4 #define GC_PINMUX_VIO0_CTL_PU_MASK 0x10 #define GC_PINMUX_VIO0_CTL_PU_SIZE 0x1 #define GC_PINMUX_VIO0_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_VIO0_CTL_PU_OFFSET 0xec #define GC_PINMUX_VIO0_CTL_INV_LSB 0x5 #define GC_PINMUX_VIO0_CTL_INV_MASK 0x20 #define GC_PINMUX_VIO0_CTL_INV_SIZE 0x1 #define GC_PINMUX_VIO0_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_VIO0_CTL_INV_OFFSET 0xec #define GC_PINMUX_VIO1_CTL_DS_LSB 0x0 #define GC_PINMUX_VIO1_CTL_DS_MASK 0x3 #define GC_PINMUX_VIO1_CTL_DS_SIZE 0x2 #define GC_PINMUX_VIO1_CTL_DS_DEFAULT 0x3 #define GC_PINMUX_VIO1_CTL_DS_OFFSET 0xf4 #define GC_PINMUX_VIO1_CTL_IE_LSB 0x2 #define GC_PINMUX_VIO1_CTL_IE_MASK 0x4 #define GC_PINMUX_VIO1_CTL_IE_SIZE 0x1 #define GC_PINMUX_VIO1_CTL_IE_DEFAULT 0x0 #define GC_PINMUX_VIO1_CTL_IE_OFFSET 0xf4 #define GC_PINMUX_VIO1_CTL_PD_LSB 0x3 #define GC_PINMUX_VIO1_CTL_PD_MASK 0x8 #define GC_PINMUX_VIO1_CTL_PD_SIZE 0x1 #define GC_PINMUX_VIO1_CTL_PD_DEFAULT 0x0 #define GC_PINMUX_VIO1_CTL_PD_OFFSET 0xf4 #define GC_PINMUX_VIO1_CTL_PU_LSB 0x4 #define GC_PINMUX_VIO1_CTL_PU_MASK 0x10 #define GC_PINMUX_VIO1_CTL_PU_SIZE 0x1 #define GC_PINMUX_VIO1_CTL_PU_DEFAULT 0x0 #define GC_PINMUX_VIO1_CTL_PU_OFFSET 0xf4 #define GC_PINMUX_VIO1_CTL_INV_LSB 0x5 #define GC_PINMUX_VIO1_CTL_INV_MASK 0x20 #define GC_PINMUX_VIO1_CTL_INV_SIZE 0x1 #define GC_PINMUX_VIO1_CTL_INV_DEFAULT 0x0 #define GC_PINMUX_VIO1_CTL_INV_OFFSET 0xf4 #define GC_PINMUX_EXITEN0_DIOM0_LSB 0x0 #define GC_PINMUX_EXITEN0_DIOM0_MASK 0x1 #define GC_PINMUX_EXITEN0_DIOM0_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOM0_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOM0_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOM1_LSB 0x1 #define GC_PINMUX_EXITEN0_DIOM1_MASK 0x2 #define GC_PINMUX_EXITEN0_DIOM1_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOM1_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOM1_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOM2_LSB 0x2 #define GC_PINMUX_EXITEN0_DIOM2_MASK 0x4 #define GC_PINMUX_EXITEN0_DIOM2_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOM2_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOM2_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOM3_LSB 0x3 #define GC_PINMUX_EXITEN0_DIOM3_MASK 0x8 #define GC_PINMUX_EXITEN0_DIOM3_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOM3_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOM3_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOM4_LSB 0x4 #define GC_PINMUX_EXITEN0_DIOM4_MASK 0x10 #define GC_PINMUX_EXITEN0_DIOM4_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOM4_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOM4_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOA0_LSB 0x5 #define GC_PINMUX_EXITEN0_DIOA0_MASK 0x20 #define GC_PINMUX_EXITEN0_DIOA0_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOA0_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOA0_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOA1_LSB 0x6 #define GC_PINMUX_EXITEN0_DIOA1_MASK 0x40 #define GC_PINMUX_EXITEN0_DIOA1_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOA1_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOA1_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOA2_LSB 0x7 #define GC_PINMUX_EXITEN0_DIOA2_MASK 0x80 #define GC_PINMUX_EXITEN0_DIOA2_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOA2_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOA2_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOA3_LSB 0x8 #define GC_PINMUX_EXITEN0_DIOA3_MASK 0x100 #define GC_PINMUX_EXITEN0_DIOA3_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOA3_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOA3_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOA4_LSB 0x9 #define GC_PINMUX_EXITEN0_DIOA4_MASK 0x200 #define GC_PINMUX_EXITEN0_DIOA4_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOA4_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOA4_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOA5_LSB 0xa #define GC_PINMUX_EXITEN0_DIOA5_MASK 0x400 #define GC_PINMUX_EXITEN0_DIOA5_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOA5_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOA5_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOA6_LSB 0xb #define GC_PINMUX_EXITEN0_DIOA6_MASK 0x800 #define GC_PINMUX_EXITEN0_DIOA6_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOA6_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOA6_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOA7_LSB 0xc #define GC_PINMUX_EXITEN0_DIOA7_MASK 0x1000 #define GC_PINMUX_EXITEN0_DIOA7_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOA7_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOA7_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOA8_LSB 0xd #define GC_PINMUX_EXITEN0_DIOA8_MASK 0x2000 #define GC_PINMUX_EXITEN0_DIOA8_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOA8_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOA8_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOA9_LSB 0xe #define GC_PINMUX_EXITEN0_DIOA9_MASK 0x4000 #define GC_PINMUX_EXITEN0_DIOA9_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOA9_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOA9_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOA10_LSB 0xf #define GC_PINMUX_EXITEN0_DIOA10_MASK 0x8000 #define GC_PINMUX_EXITEN0_DIOA10_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOA10_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOA10_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOA11_LSB 0x10 #define GC_PINMUX_EXITEN0_DIOA11_MASK 0x10000 #define GC_PINMUX_EXITEN0_DIOA11_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOA11_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOA11_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOA12_LSB 0x11 #define GC_PINMUX_EXITEN0_DIOA12_MASK 0x20000 #define GC_PINMUX_EXITEN0_DIOA12_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOA12_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOA12_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOA13_LSB 0x12 #define GC_PINMUX_EXITEN0_DIOA13_MASK 0x40000 #define GC_PINMUX_EXITEN0_DIOA13_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOA13_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOA13_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOA14_LSB 0x13 #define GC_PINMUX_EXITEN0_DIOA14_MASK 0x80000 #define GC_PINMUX_EXITEN0_DIOA14_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOA14_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOA14_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOB0_LSB 0x14 #define GC_PINMUX_EXITEN0_DIOB0_MASK 0x100000 #define GC_PINMUX_EXITEN0_DIOB0_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOB0_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOB0_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOB1_LSB 0x15 #define GC_PINMUX_EXITEN0_DIOB1_MASK 0x200000 #define GC_PINMUX_EXITEN0_DIOB1_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOB1_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOB1_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOB2_LSB 0x16 #define GC_PINMUX_EXITEN0_DIOB2_MASK 0x400000 #define GC_PINMUX_EXITEN0_DIOB2_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOB2_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOB2_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOB3_LSB 0x17 #define GC_PINMUX_EXITEN0_DIOB3_MASK 0x800000 #define GC_PINMUX_EXITEN0_DIOB3_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOB3_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOB3_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOB4_LSB 0x18 #define GC_PINMUX_EXITEN0_DIOB4_MASK 0x1000000 #define GC_PINMUX_EXITEN0_DIOB4_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOB4_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOB4_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOB5_LSB 0x19 #define GC_PINMUX_EXITEN0_DIOB5_MASK 0x2000000 #define GC_PINMUX_EXITEN0_DIOB5_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOB5_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOB5_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOB6_LSB 0x1a #define GC_PINMUX_EXITEN0_DIOB6_MASK 0x4000000 #define GC_PINMUX_EXITEN0_DIOB6_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOB6_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOB6_OFFSET 0x284 #define GC_PINMUX_EXITEN0_DIOB7_LSB 0x1b #define GC_PINMUX_EXITEN0_DIOB7_MASK 0x8000000 #define GC_PINMUX_EXITEN0_DIOB7_SIZE 0x1 #define GC_PINMUX_EXITEN0_DIOB7_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_DIOB7_OFFSET 0x284 #define GC_PINMUX_EXITEN0_VIO0_LSB 0x1c #define GC_PINMUX_EXITEN0_VIO0_MASK 0x10000000 #define GC_PINMUX_EXITEN0_VIO0_SIZE 0x1 #define GC_PINMUX_EXITEN0_VIO0_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_VIO0_OFFSET 0x284 #define GC_PINMUX_EXITEN0_VIO1_LSB 0x1d #define GC_PINMUX_EXITEN0_VIO1_MASK 0x20000000 #define GC_PINMUX_EXITEN0_VIO1_SIZE 0x1 #define GC_PINMUX_EXITEN0_VIO1_DEFAULT 0x0 #define GC_PINMUX_EXITEN0_VIO1_OFFSET 0x284 #define GC_PINMUX_EXITEDGE0_DIOM0_LSB 0x0 #define GC_PINMUX_EXITEDGE0_DIOM0_MASK 0x1 #define GC_PINMUX_EXITEDGE0_DIOM0_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOM0_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOM0_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOM1_LSB 0x1 #define GC_PINMUX_EXITEDGE0_DIOM1_MASK 0x2 #define GC_PINMUX_EXITEDGE0_DIOM1_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOM1_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOM1_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOM2_LSB 0x2 #define GC_PINMUX_EXITEDGE0_DIOM2_MASK 0x4 #define GC_PINMUX_EXITEDGE0_DIOM2_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOM2_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOM2_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOM3_LSB 0x3 #define GC_PINMUX_EXITEDGE0_DIOM3_MASK 0x8 #define GC_PINMUX_EXITEDGE0_DIOM3_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOM3_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOM3_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOM4_LSB 0x4 #define GC_PINMUX_EXITEDGE0_DIOM4_MASK 0x10 #define GC_PINMUX_EXITEDGE0_DIOM4_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOM4_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOM4_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOA0_LSB 0x5 #define GC_PINMUX_EXITEDGE0_DIOA0_MASK 0x20 #define GC_PINMUX_EXITEDGE0_DIOA0_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOA0_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOA0_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOA1_LSB 0x6 #define GC_PINMUX_EXITEDGE0_DIOA1_MASK 0x40 #define GC_PINMUX_EXITEDGE0_DIOA1_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOA1_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOA1_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOA2_LSB 0x7 #define GC_PINMUX_EXITEDGE0_DIOA2_MASK 0x80 #define GC_PINMUX_EXITEDGE0_DIOA2_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOA2_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOA2_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOA3_LSB 0x8 #define GC_PINMUX_EXITEDGE0_DIOA3_MASK 0x100 #define GC_PINMUX_EXITEDGE0_DIOA3_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOA3_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOA3_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOA4_LSB 0x9 #define GC_PINMUX_EXITEDGE0_DIOA4_MASK 0x200 #define GC_PINMUX_EXITEDGE0_DIOA4_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOA4_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOA4_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOA5_LSB 0xa #define GC_PINMUX_EXITEDGE0_DIOA5_MASK 0x400 #define GC_PINMUX_EXITEDGE0_DIOA5_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOA5_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOA5_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOA6_LSB 0xb #define GC_PINMUX_EXITEDGE0_DIOA6_MASK 0x800 #define GC_PINMUX_EXITEDGE0_DIOA6_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOA6_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOA6_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOA7_LSB 0xc #define GC_PINMUX_EXITEDGE0_DIOA7_MASK 0x1000 #define GC_PINMUX_EXITEDGE0_DIOA7_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOA7_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOA7_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOA8_LSB 0xd #define GC_PINMUX_EXITEDGE0_DIOA8_MASK 0x2000 #define GC_PINMUX_EXITEDGE0_DIOA8_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOA8_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOA8_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOA9_LSB 0xe #define GC_PINMUX_EXITEDGE0_DIOA9_MASK 0x4000 #define GC_PINMUX_EXITEDGE0_DIOA9_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOA9_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOA9_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOA10_LSB 0xf #define GC_PINMUX_EXITEDGE0_DIOA10_MASK 0x8000 #define GC_PINMUX_EXITEDGE0_DIOA10_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOA10_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOA10_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOA11_LSB 0x10 #define GC_PINMUX_EXITEDGE0_DIOA11_MASK 0x10000 #define GC_PINMUX_EXITEDGE0_DIOA11_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOA11_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOA11_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOA12_LSB 0x11 #define GC_PINMUX_EXITEDGE0_DIOA12_MASK 0x20000 #define GC_PINMUX_EXITEDGE0_DIOA12_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOA12_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOA12_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOA13_LSB 0x12 #define GC_PINMUX_EXITEDGE0_DIOA13_MASK 0x40000 #define GC_PINMUX_EXITEDGE0_DIOA13_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOA13_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOA13_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOA14_LSB 0x13 #define GC_PINMUX_EXITEDGE0_DIOA14_MASK 0x80000 #define GC_PINMUX_EXITEDGE0_DIOA14_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOA14_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOA14_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOB0_LSB 0x14 #define GC_PINMUX_EXITEDGE0_DIOB0_MASK 0x100000 #define GC_PINMUX_EXITEDGE0_DIOB0_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOB0_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOB0_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOB1_LSB 0x15 #define GC_PINMUX_EXITEDGE0_DIOB1_MASK 0x200000 #define GC_PINMUX_EXITEDGE0_DIOB1_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOB1_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOB1_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOB2_LSB 0x16 #define GC_PINMUX_EXITEDGE0_DIOB2_MASK 0x400000 #define GC_PINMUX_EXITEDGE0_DIOB2_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOB2_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOB2_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOB3_LSB 0x17 #define GC_PINMUX_EXITEDGE0_DIOB3_MASK 0x800000 #define GC_PINMUX_EXITEDGE0_DIOB3_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOB3_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOB3_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOB4_LSB 0x18 #define GC_PINMUX_EXITEDGE0_DIOB4_MASK 0x1000000 #define GC_PINMUX_EXITEDGE0_DIOB4_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOB4_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOB4_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOB5_LSB 0x19 #define GC_PINMUX_EXITEDGE0_DIOB5_MASK 0x2000000 #define GC_PINMUX_EXITEDGE0_DIOB5_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOB5_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOB5_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOB6_LSB 0x1a #define GC_PINMUX_EXITEDGE0_DIOB6_MASK 0x4000000 #define GC_PINMUX_EXITEDGE0_DIOB6_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOB6_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOB6_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_DIOB7_LSB 0x1b #define GC_PINMUX_EXITEDGE0_DIOB7_MASK 0x8000000 #define GC_PINMUX_EXITEDGE0_DIOB7_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_DIOB7_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_DIOB7_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_VIO0_LSB 0x1c #define GC_PINMUX_EXITEDGE0_VIO0_MASK 0x10000000 #define GC_PINMUX_EXITEDGE0_VIO0_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_VIO0_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_VIO0_OFFSET 0x288 #define GC_PINMUX_EXITEDGE0_VIO1_LSB 0x1d #define GC_PINMUX_EXITEDGE0_VIO1_MASK 0x20000000 #define GC_PINMUX_EXITEDGE0_VIO1_SIZE 0x1 #define GC_PINMUX_EXITEDGE0_VIO1_DEFAULT 0x0 #define GC_PINMUX_EXITEDGE0_VIO1_OFFSET 0x288 #define GC_PINMUX_EXITINV0_DIOM0_LSB 0x0 #define GC_PINMUX_EXITINV0_DIOM0_MASK 0x1 #define GC_PINMUX_EXITINV0_DIOM0_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOM0_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOM0_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOM1_LSB 0x1 #define GC_PINMUX_EXITINV0_DIOM1_MASK 0x2 #define GC_PINMUX_EXITINV0_DIOM1_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOM1_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOM1_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOM2_LSB 0x2 #define GC_PINMUX_EXITINV0_DIOM2_MASK 0x4 #define GC_PINMUX_EXITINV0_DIOM2_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOM2_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOM2_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOM3_LSB 0x3 #define GC_PINMUX_EXITINV0_DIOM3_MASK 0x8 #define GC_PINMUX_EXITINV0_DIOM3_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOM3_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOM3_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOM4_LSB 0x4 #define GC_PINMUX_EXITINV0_DIOM4_MASK 0x10 #define GC_PINMUX_EXITINV0_DIOM4_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOM4_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOM4_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOA0_LSB 0x5 #define GC_PINMUX_EXITINV0_DIOA0_MASK 0x20 #define GC_PINMUX_EXITINV0_DIOA0_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOA0_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOA0_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOA1_LSB 0x6 #define GC_PINMUX_EXITINV0_DIOA1_MASK 0x40 #define GC_PINMUX_EXITINV0_DIOA1_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOA1_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOA1_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOA2_LSB 0x7 #define GC_PINMUX_EXITINV0_DIOA2_MASK 0x80 #define GC_PINMUX_EXITINV0_DIOA2_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOA2_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOA2_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOA3_LSB 0x8 #define GC_PINMUX_EXITINV0_DIOA3_MASK 0x100 #define GC_PINMUX_EXITINV0_DIOA3_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOA3_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOA3_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOA4_LSB 0x9 #define GC_PINMUX_EXITINV0_DIOA4_MASK 0x200 #define GC_PINMUX_EXITINV0_DIOA4_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOA4_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOA4_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOA5_LSB 0xa #define GC_PINMUX_EXITINV0_DIOA5_MASK 0x400 #define GC_PINMUX_EXITINV0_DIOA5_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOA5_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOA5_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOA6_LSB 0xb #define GC_PINMUX_EXITINV0_DIOA6_MASK 0x800 #define GC_PINMUX_EXITINV0_DIOA6_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOA6_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOA6_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOA7_LSB 0xc #define GC_PINMUX_EXITINV0_DIOA7_MASK 0x1000 #define GC_PINMUX_EXITINV0_DIOA7_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOA7_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOA7_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOA8_LSB 0xd #define GC_PINMUX_EXITINV0_DIOA8_MASK 0x2000 #define GC_PINMUX_EXITINV0_DIOA8_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOA8_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOA8_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOA9_LSB 0xe #define GC_PINMUX_EXITINV0_DIOA9_MASK 0x4000 #define GC_PINMUX_EXITINV0_DIOA9_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOA9_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOA9_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOA10_LSB 0xf #define GC_PINMUX_EXITINV0_DIOA10_MASK 0x8000 #define GC_PINMUX_EXITINV0_DIOA10_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOA10_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOA10_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOA11_LSB 0x10 #define GC_PINMUX_EXITINV0_DIOA11_MASK 0x10000 #define GC_PINMUX_EXITINV0_DIOA11_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOA11_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOA11_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOA12_LSB 0x11 #define GC_PINMUX_EXITINV0_DIOA12_MASK 0x20000 #define GC_PINMUX_EXITINV0_DIOA12_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOA12_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOA12_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOA13_LSB 0x12 #define GC_PINMUX_EXITINV0_DIOA13_MASK 0x40000 #define GC_PINMUX_EXITINV0_DIOA13_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOA13_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOA13_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOA14_LSB 0x13 #define GC_PINMUX_EXITINV0_DIOA14_MASK 0x80000 #define GC_PINMUX_EXITINV0_DIOA14_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOA14_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOA14_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOB0_LSB 0x14 #define GC_PINMUX_EXITINV0_DIOB0_MASK 0x100000 #define GC_PINMUX_EXITINV0_DIOB0_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOB0_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOB0_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOB1_LSB 0x15 #define GC_PINMUX_EXITINV0_DIOB1_MASK 0x200000 #define GC_PINMUX_EXITINV0_DIOB1_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOB1_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOB1_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOB2_LSB 0x16 #define GC_PINMUX_EXITINV0_DIOB2_MASK 0x400000 #define GC_PINMUX_EXITINV0_DIOB2_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOB2_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOB2_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOB3_LSB 0x17 #define GC_PINMUX_EXITINV0_DIOB3_MASK 0x800000 #define GC_PINMUX_EXITINV0_DIOB3_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOB3_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOB3_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOB4_LSB 0x18 #define GC_PINMUX_EXITINV0_DIOB4_MASK 0x1000000 #define GC_PINMUX_EXITINV0_DIOB4_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOB4_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOB4_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOB5_LSB 0x19 #define GC_PINMUX_EXITINV0_DIOB5_MASK 0x2000000 #define GC_PINMUX_EXITINV0_DIOB5_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOB5_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOB5_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOB6_LSB 0x1a #define GC_PINMUX_EXITINV0_DIOB6_MASK 0x4000000 #define GC_PINMUX_EXITINV0_DIOB6_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOB6_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOB6_OFFSET 0x28c #define GC_PINMUX_EXITINV0_DIOB7_LSB 0x1b #define GC_PINMUX_EXITINV0_DIOB7_MASK 0x8000000 #define GC_PINMUX_EXITINV0_DIOB7_SIZE 0x1 #define GC_PINMUX_EXITINV0_DIOB7_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_DIOB7_OFFSET 0x28c #define GC_PINMUX_EXITINV0_VIO0_LSB 0x1c #define GC_PINMUX_EXITINV0_VIO0_MASK 0x10000000 #define GC_PINMUX_EXITINV0_VIO0_SIZE 0x1 #define GC_PINMUX_EXITINV0_VIO0_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_VIO0_OFFSET 0x28c #define GC_PINMUX_EXITINV0_VIO1_LSB 0x1d #define GC_PINMUX_EXITINV0_VIO1_MASK 0x20000000 #define GC_PINMUX_EXITINV0_VIO1_SIZE 0x1 #define GC_PINMUX_EXITINV0_VIO1_DEFAULT 0x0 #define GC_PINMUX_EXITINV0_VIO1_OFFSET 0x28c #define GC_PMU_RESET_PORESETB1_LSB 0x0 #define GC_PMU_RESET_PORESETB1_MASK 0x1 #define GC_PMU_RESET_PORESETB1_SIZE 0x1 #define GC_PMU_RESET_PORESETB1_DEFAULT 0x1 #define GC_PMU_RESET_PORESETB1_OFFSET 0x0 #define GC_PMU_RESET_DAPRESETB1_LSB 0x1 #define GC_PMU_RESET_DAPRESETB1_MASK 0x2 #define GC_PMU_RESET_DAPRESETB1_SIZE 0x1 #define GC_PMU_RESET_DAPRESETB1_DEFAULT 0x1 #define GC_PMU_RESET_DAPRESETB1_OFFSET 0x0 #define GC_PMU_SETRST_SRC_LSB 0x0 #define GC_PMU_SETRST_SRC_MASK 0x1 #define GC_PMU_SETRST_SRC_SIZE 0x1 #define GC_PMU_SETRST_SRC_DEFAULT 0x0 #define GC_PMU_SETRST_SRC_OFFSET 0x4 #define GC_PMU_CLRRST_SRC_LSB 0x0 #define GC_PMU_CLRRST_SRC_MASK 0x1 #define GC_PMU_CLRRST_SRC_SIZE 0x1 #define GC_PMU_CLRRST_SRC_DEFAULT 0x0 #define GC_PMU_CLRRST_SRC_OFFSET 0x8 #define GC_PMU_RSTSRC_POR_LSB 0x0 #define GC_PMU_RSTSRC_POR_MASK 0x1 #define GC_PMU_RSTSRC_POR_SIZE 0x1 #define GC_PMU_RSTSRC_POR_DEFAULT 0x0 #define GC_PMU_RSTSRC_POR_OFFSET 0xc #define GC_PMU_RSTSRC_EXIT_LSB 0x1 #define GC_PMU_RSTSRC_EXIT_MASK 0x2 #define GC_PMU_RSTSRC_EXIT_SIZE 0x1 #define GC_PMU_RSTSRC_EXIT_DEFAULT 0x0 #define GC_PMU_RSTSRC_EXIT_OFFSET 0xc #define GC_PMU_RSTSRC_WDOG_LSB 0x2 #define GC_PMU_RSTSRC_WDOG_MASK 0x4 #define GC_PMU_RSTSRC_WDOG_SIZE 0x1 #define GC_PMU_RSTSRC_WDOG_DEFAULT 0x0 #define GC_PMU_RSTSRC_WDOG_OFFSET 0xc #define GC_PMU_RSTSRC_LOCKUP_LSB 0x3 #define GC_PMU_RSTSRC_LOCKUP_MASK 0x8 #define GC_PMU_RSTSRC_LOCKUP_SIZE 0x1 #define GC_PMU_RSTSRC_LOCKUP_DEFAULT 0x0 #define GC_PMU_RSTSRC_LOCKUP_OFFSET 0xc #define GC_PMU_RSTSRC_SYSRESET_LSB 0x4 #define GC_PMU_RSTSRC_SYSRESET_MASK 0x10 #define GC_PMU_RSTSRC_SYSRESET_SIZE 0x1 #define GC_PMU_RSTSRC_SYSRESET_DEFAULT 0x0 #define GC_PMU_RSTSRC_SYSRESET_OFFSET 0xc #define GC_PMU_RSTSRC_SOFTWARE_LSB 0x5 #define GC_PMU_RSTSRC_SOFTWARE_MASK 0x20 #define GC_PMU_RSTSRC_SOFTWARE_SIZE 0x1 #define GC_PMU_RSTSRC_SOFTWARE_DEFAULT 0x0 #define GC_PMU_RSTSRC_SOFTWARE_OFFSET 0xc #define GC_PMU_RSTSRC_FST_BRNOUT_LSB 0x6 #define GC_PMU_RSTSRC_FST_BRNOUT_MASK 0x40 #define GC_PMU_RSTSRC_FST_BRNOUT_SIZE 0x1 #define GC_PMU_RSTSRC_FST_BRNOUT_DEFAULT 0x0 #define GC_PMU_RSTSRC_FST_BRNOUT_OFFSET 0xc #define GC_PMU_RSTSRC_SEC_THREAT_LSB 0x7 #define GC_PMU_RSTSRC_SEC_THREAT_MASK 0x80 #define GC_PMU_RSTSRC_SEC_THREAT_SIZE 0x1 #define GC_PMU_RSTSRC_SEC_THREAT_DEFAULT 0x0 #define GC_PMU_RSTSRC_SEC_THREAT_OFFSET 0xc #define GC_PMU_LOW_POWER_DIS_START_LSB 0x0 #define GC_PMU_LOW_POWER_DIS_START_MASK 0x1 #define GC_PMU_LOW_POWER_DIS_START_SIZE 0x1 #define GC_PMU_LOW_POWER_DIS_START_DEFAULT 0x0 #define GC_PMU_LOW_POWER_DIS_START_OFFSET 0x14 #define GC_PMU_LOW_POWER_DIS_VDDL_LSB 0x1 #define GC_PMU_LOW_POWER_DIS_VDDL_MASK 0x2 #define GC_PMU_LOW_POWER_DIS_VDDL_SIZE 0x1 #define GC_PMU_LOW_POWER_DIS_VDDL_DEFAULT 0x1 #define GC_PMU_LOW_POWER_DIS_VDDL_OFFSET 0x14 #define GC_PMU_LOW_POWER_DIS_VDDIOF_LSB 0x2 #define GC_PMU_LOW_POWER_DIS_VDDIOF_MASK 0x4 #define GC_PMU_LOW_POWER_DIS_VDDIOF_SIZE 0x1 #define GC_PMU_LOW_POWER_DIS_VDDIOF_DEFAULT 0x1 #define GC_PMU_LOW_POWER_DIS_VDDIOF_OFFSET 0x14 #define GC_PMU_LOW_POWER_DIS_VDDXO_LSB 0x3 #define GC_PMU_LOW_POWER_DIS_VDDXO_MASK 0x8 #define GC_PMU_LOW_POWER_DIS_VDDXO_SIZE 0x1 #define GC_PMU_LOW_POWER_DIS_VDDXO_DEFAULT 0x1 #define GC_PMU_LOW_POWER_DIS_VDDXO_OFFSET 0x14 #define GC_PMU_LOW_POWER_DIS_JTR_RC_LSB 0x4 #define GC_PMU_LOW_POWER_DIS_JTR_RC_MASK 0x10 #define GC_PMU_LOW_POWER_DIS_JTR_RC_SIZE 0x1 #define GC_PMU_LOW_POWER_DIS_JTR_RC_DEFAULT 0x1 #define GC_PMU_LOW_POWER_DIS_JTR_RC_OFFSET 0x14 #define GC_PMU_LOW_POWER_BYPASS_VDDL_LSB 0x0 #define GC_PMU_LOW_POWER_BYPASS_VDDL_MASK 0x1 #define GC_PMU_LOW_POWER_BYPASS_VDDL_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_VDDL_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VDDL_OFFSET 0x18 #define GC_PMU_LOW_POWER_BYPASS_VDDIOF_LSB 0x1 #define GC_PMU_LOW_POWER_BYPASS_VDDIOF_MASK 0x2 #define GC_PMU_LOW_POWER_BYPASS_VDDIOF_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_VDDIOF_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VDDIOF_OFFSET 0x18 #define GC_PMU_LOW_POWER_BYPASS_VDDXO_LSB 0x2 #define GC_PMU_LOW_POWER_BYPASS_VDDXO_MASK 0x4 #define GC_PMU_LOW_POWER_BYPASS_VDDXO_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_VDDXO_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VDDXO_OFFSET 0x18 #define GC_PMU_LOW_POWER_BYPASS_VDDXO_COMP_LSB 0x3 #define GC_PMU_LOW_POWER_BYPASS_VDDXO_COMP_MASK 0x8 #define GC_PMU_LOW_POWER_BYPASS_VDDXO_COMP_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_VDDXO_COMP_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VDDXO_COMP_OFFSET 0x18 #define GC_PMU_LOW_POWER_BYPASS_JTR_RC_LSB 0x4 #define GC_PMU_LOW_POWER_BYPASS_JTR_RC_MASK 0x10 #define GC_PMU_LOW_POWER_BYPASS_JTR_RC_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_JTR_RC_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_JTR_RC_OFFSET 0x18 #define GC_PMU_LOW_POWER_BYPASS_TIMER_RC_LSB 0x5 #define GC_PMU_LOW_POWER_BYPASS_TIMER_RC_MASK 0x20 #define GC_PMU_LOW_POWER_BYPASS_TIMER_RC_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_TIMER_RC_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_TIMER_RC_OFFSET 0x18 #define GC_PMU_LOW_POWER_BYPASS_PDM25_LSB 0x6 #define GC_PMU_LOW_POWER_BYPASS_PDM25_MASK 0x40 #define GC_PMU_LOW_POWER_BYPASS_PDM25_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_PDM25_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_PDM25_OFFSET 0x18 #define GC_PMU_LOW_POWER_BYPASS_VDDL_ISO_LSB 0x7 #define GC_PMU_LOW_POWER_BYPASS_VDDL_ISO_MASK 0x80 #define GC_PMU_LOW_POWER_BYPASS_VDDL_ISO_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_VDDL_ISO_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VDDL_ISO_OFFSET 0x18 #define GC_PMU_LOW_POWER_BYPASS_VDDXO_ISO_LSB 0x8 #define GC_PMU_LOW_POWER_BYPASS_VDDXO_ISO_MASK 0x100 #define GC_PMU_LOW_POWER_BYPASS_VDDXO_ISO_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_VDDXO_ISO_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VDDXO_ISO_OFFSET 0x18 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDL_LSB 0x0 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDL_MASK 0x1 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDL_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDL_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDL_OFFSET 0x1c #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDIOF_LSB 0x1 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDIOF_MASK 0x2 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDIOF_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDIOF_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDIOF_OFFSET 0x1c #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDXO_LSB 0x2 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDXO_MASK 0x4 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDXO_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDXO_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDXO_OFFSET 0x1c #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDXO_COMP_LSB 0x3 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDXO_COMP_MASK 0x8 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDXO_COMP_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDXO_COMP_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDXO_COMP_OFFSET 0x1c #define GC_PMU_LOW_POWER_BYPASS_VALUE_JTR_RC_LSB 0x4 #define GC_PMU_LOW_POWER_BYPASS_VALUE_JTR_RC_MASK 0x10 #define GC_PMU_LOW_POWER_BYPASS_VALUE_JTR_RC_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_VALUE_JTR_RC_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VALUE_JTR_RC_OFFSET 0x1c #define GC_PMU_LOW_POWER_BYPASS_VALUE_TIMER_RC_LSB 0x5 #define GC_PMU_LOW_POWER_BYPASS_VALUE_TIMER_RC_MASK 0x20 #define GC_PMU_LOW_POWER_BYPASS_VALUE_TIMER_RC_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_VALUE_TIMER_RC_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VALUE_TIMER_RC_OFFSET 0x1c #define GC_PMU_LOW_POWER_BYPASS_VALUE_PDM25_LSB 0x6 #define GC_PMU_LOW_POWER_BYPASS_VALUE_PDM25_MASK 0x40 #define GC_PMU_LOW_POWER_BYPASS_VALUE_PDM25_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_VALUE_PDM25_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VALUE_PDM25_OFFSET 0x1c #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDL_ISO_LSB 0x7 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDL_ISO_MASK 0x80 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDL_ISO_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDL_ISO_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDL_ISO_OFFSET 0x1c #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDXO_ISO_LSB 0x8 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDXO_ISO_MASK 0x100 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDXO_ISO_SIZE 0x1 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDXO_ISO_DEFAULT 0x0 #define GC_PMU_LOW_POWER_BYPASS_VALUE_VDDXO_ISO_OFFSET 0x1c #define GC_PMU_SETWIC_PROC0_LSB 0x0 #define GC_PMU_SETWIC_PROC0_MASK 0x1 #define GC_PMU_SETWIC_PROC0_SIZE 0x1 #define GC_PMU_SETWIC_PROC0_DEFAULT 0x0 #define GC_PMU_SETWIC_PROC0_OFFSET 0x20 #define GC_PMU_CLRWIC_PROC0_LSB 0x0 #define GC_PMU_CLRWIC_PROC0_MASK 0x1 #define GC_PMU_CLRWIC_PROC0_SIZE 0x1 #define GC_PMU_CLRWIC_PROC0_DEFAULT 0x0 #define GC_PMU_CLRWIC_PROC0_OFFSET 0x24 #define GC_PMU_SW_PDB_TIMER_RC_LSB 0x0 #define GC_PMU_SW_PDB_TIMER_RC_MASK 0x1 #define GC_PMU_SW_PDB_TIMER_RC_SIZE 0x1 #define GC_PMU_SW_PDB_TIMER_RC_DEFAULT 0x0 #define GC_PMU_SW_PDB_TIMER_RC_OFFSET 0x30 #define GC_PMU_SW_PDB_FST_BRNOUT_PWR_LSB 0x1 #define GC_PMU_SW_PDB_FST_BRNOUT_PWR_MASK 0x2 #define GC_PMU_SW_PDB_FST_BRNOUT_PWR_SIZE 0x1 #define GC_PMU_SW_PDB_FST_BRNOUT_PWR_DEFAULT 0x0 #define GC_PMU_SW_PDB_FST_BRNOUT_PWR_OFFSET 0x30 #define GC_PMU_SW_PDB_FST_BRNOUT_LSB 0x2 #define GC_PMU_SW_PDB_FST_BRNOUT_MASK 0x4 #define GC_PMU_SW_PDB_FST_BRNOUT_SIZE 0x1 #define GC_PMU_SW_PDB_FST_BRNOUT_DEFAULT 0x0 #define GC_PMU_SW_PDB_FST_BRNOUT_OFFSET 0x30 #define GC_PMU_SW_PDB_SECURE_BATMON_LSB 0x0 #define GC_PMU_SW_PDB_SECURE_BATMON_MASK 0x1 #define GC_PMU_SW_PDB_SECURE_BATMON_SIZE 0x1 #define GC_PMU_SW_PDB_SECURE_BATMON_DEFAULT 0x0 #define GC_PMU_SW_PDB_SECURE_BATMON_OFFSET 0x34 #define GC_PMU_SW_PDB_SECURE_BATMON_EN_LSB 0x1 #define GC_PMU_SW_PDB_SECURE_BATMON_EN_MASK 0x2 #define GC_PMU_SW_PDB_SECURE_BATMON_EN_SIZE 0x1 #define GC_PMU_SW_PDB_SECURE_BATMON_EN_DEFAULT 0x0 #define GC_PMU_SW_PDB_SECURE_BATMON_EN_OFFSET 0x34 #define GC_PMU_SW_PDB_SECURE_XTL_LSB 0x2 #define GC_PMU_SW_PDB_SECURE_XTL_MASK 0x4 #define GC_PMU_SW_PDB_SECURE_XTL_SIZE 0x1 #define GC_PMU_SW_PDB_SECURE_XTL_DEFAULT 0x0 #define GC_PMU_SW_PDB_SECURE_XTL_OFFSET 0x34 #define GC_PMU_VREF_REG_LSB 0x0 #define GC_PMU_VREF_REG_MASK 0xf #define GC_PMU_VREF_REG_SIZE 0x4 #define GC_PMU_VREF_REG_DEFAULT 0xb #define GC_PMU_VREF_REG_OFFSET 0x38 #define GC_PMU_VREF_LDOXO_LSB 0x4 #define GC_PMU_VREF_LDOXO_MASK 0xf0 #define GC_PMU_VREF_LDOXO_SIZE 0x4 #define GC_PMU_VREF_LDOXO_DEFAULT 0xd #define GC_PMU_VREF_LDOXO_OFFSET 0x38 #define GC_PMU_VREF_BATMON_LSB 0x8 #define GC_PMU_VREF_BATMON_MASK 0x700 #define GC_PMU_VREF_BATMON_SIZE 0x3 #define GC_PMU_VREF_BATMON_DEFAULT 0x0 #define GC_PMU_VREF_BATMON_OFFSET 0x38 #define GC_PMU_VREF_BATMON_V1P9 0x2 #define GC_PMU_VREF_BATMON_V1P8 0x1 #define GC_PMU_VREF_BATMON_V1P7 0x0 #define GC_PMU_VREF_BATMON_V2P4 0x7 #define GC_PMU_VREF_BATMON_V2P0 0x3 #define GC_PMU_VREF_BATMON_V2P1 0x4 #define GC_PMU_VREF_BATMON_V2P2 0x5 #define GC_PMU_VREF_BATMON_V2P3 0x6 #define GC_PMU_B_REG_DIG_CTRL_RBANK_SEL_LSB 0x0 #define GC_PMU_B_REG_DIG_CTRL_RBANK_SEL_MASK 0x3 #define GC_PMU_B_REG_DIG_CTRL_RBANK_SEL_SIZE 0x2 #define GC_PMU_B_REG_DIG_CTRL_RBANK_SEL_DEFAULT 0x2 #define GC_PMU_B_REG_DIG_CTRL_RBANK_SEL_OFFSET 0x48 #define GC_PMU_B_REG_DIG_CTRL_SPARE_LSB 0x2 #define GC_PMU_B_REG_DIG_CTRL_SPARE_MASK 0x3c #define GC_PMU_B_REG_DIG_CTRL_SPARE_SIZE 0x4 #define GC_PMU_B_REG_DIG_CTRL_SPARE_DEFAULT 0x0 #define GC_PMU_B_REG_DIG_CTRL_SPARE_OFFSET 0x48 #define GC_PMU_EXITPD_MASK_PIN_PD_EXIT_LSB 0x0 #define GC_PMU_EXITPD_MASK_PIN_PD_EXIT_MASK 0x1 #define GC_PMU_EXITPD_MASK_PIN_PD_EXIT_SIZE 0x1 #define GC_PMU_EXITPD_MASK_PIN_PD_EXIT_DEFAULT 0x0 #define GC_PMU_EXITPD_MASK_PIN_PD_EXIT_OFFSET 0x4c #define GC_PMU_EXITPD_MASK_UTMI_SUSPEND_N_LSB 0x1 #define GC_PMU_EXITPD_MASK_UTMI_SUSPEND_N_MASK 0x2 #define GC_PMU_EXITPD_MASK_UTMI_SUSPEND_N_SIZE 0x1 #define GC_PMU_EXITPD_MASK_UTMI_SUSPEND_N_DEFAULT 0x0 #define GC_PMU_EXITPD_MASK_UTMI_SUSPEND_N_OFFSET 0x4c #define GC_PMU_EXITPD_MASK_RDD0_PD_EXIT_TIMER_LSB 0x2 #define GC_PMU_EXITPD_MASK_RDD0_PD_EXIT_TIMER_MASK 0x4 #define GC_PMU_EXITPD_MASK_RDD0_PD_EXIT_TIMER_SIZE 0x1 #define GC_PMU_EXITPD_MASK_RDD0_PD_EXIT_TIMER_DEFAULT 0x0 #define GC_PMU_EXITPD_MASK_RDD0_PD_EXIT_TIMER_OFFSET 0x4c #define GC_PMU_EXITPD_MASK_TIMELS0_PD_EXIT_TIMER0_LSB 0x3 #define GC_PMU_EXITPD_MASK_TIMELS0_PD_EXIT_TIMER0_MASK 0x8 #define GC_PMU_EXITPD_MASK_TIMELS0_PD_EXIT_TIMER0_SIZE 0x1 #define GC_PMU_EXITPD_MASK_TIMELS0_PD_EXIT_TIMER0_DEFAULT 0x0 #define GC_PMU_EXITPD_MASK_TIMELS0_PD_EXIT_TIMER0_OFFSET 0x4c #define GC_PMU_EXITPD_MASK_TIMELS0_PD_EXIT_TIMER1_LSB 0x4 #define GC_PMU_EXITPD_MASK_TIMELS0_PD_EXIT_TIMER1_MASK 0x10 #define GC_PMU_EXITPD_MASK_TIMELS0_PD_EXIT_TIMER1_SIZE 0x1 #define GC_PMU_EXITPD_MASK_TIMELS0_PD_EXIT_TIMER1_DEFAULT 0x0 #define GC_PMU_EXITPD_MASK_TIMELS0_PD_EXIT_TIMER1_OFFSET 0x4c #define GC_PMU_EXITPD_MASK_RBOX_WAKEUP_LSB 0x5 #define GC_PMU_EXITPD_MASK_RBOX_WAKEUP_MASK 0x20 #define GC_PMU_EXITPD_MASK_RBOX_WAKEUP_SIZE 0x1 #define GC_PMU_EXITPD_MASK_RBOX_WAKEUP_DEFAULT 0x0 #define GC_PMU_EXITPD_MASK_RBOX_WAKEUP_OFFSET 0x4c #define GC_PMU_EXITPD_SRC_PIN_PD_EXIT_LSB 0x0 #define GC_PMU_EXITPD_SRC_PIN_PD_EXIT_MASK 0x1 #define GC_PMU_EXITPD_SRC_PIN_PD_EXIT_SIZE 0x1 #define GC_PMU_EXITPD_SRC_PIN_PD_EXIT_DEFAULT 0x0 #define GC_PMU_EXITPD_SRC_PIN_PD_EXIT_OFFSET 0x50 #define GC_PMU_EXITPD_SRC_UTMI_SUSPEND_N_LSB 0x1 #define GC_PMU_EXITPD_SRC_UTMI_SUSPEND_N_MASK 0x2 #define GC_PMU_EXITPD_SRC_UTMI_SUSPEND_N_SIZE 0x1 #define GC_PMU_EXITPD_SRC_UTMI_SUSPEND_N_DEFAULT 0x0 #define GC_PMU_EXITPD_SRC_UTMI_SUSPEND_N_OFFSET 0x50 #define GC_PMU_EXITPD_SRC_RDD0_PD_EXIT_TIMER_LSB 0x2 #define GC_PMU_EXITPD_SRC_RDD0_PD_EXIT_TIMER_MASK 0x4 #define GC_PMU_EXITPD_SRC_RDD0_PD_EXIT_TIMER_SIZE 0x1 #define GC_PMU_EXITPD_SRC_RDD0_PD_EXIT_TIMER_DEFAULT 0x0 #define GC_PMU_EXITPD_SRC_RDD0_PD_EXIT_TIMER_OFFSET 0x50 #define GC_PMU_EXITPD_SRC_TIMELS0_PD_EXIT_TIMER0_LSB 0x3 #define GC_PMU_EXITPD_SRC_TIMELS0_PD_EXIT_TIMER0_MASK 0x8 #define GC_PMU_EXITPD_SRC_TIMELS0_PD_EXIT_TIMER0_SIZE 0x1 #define GC_PMU_EXITPD_SRC_TIMELS0_PD_EXIT_TIMER0_DEFAULT 0x0 #define GC_PMU_EXITPD_SRC_TIMELS0_PD_EXIT_TIMER0_OFFSET 0x50 #define GC_PMU_EXITPD_SRC_TIMELS0_PD_EXIT_TIMER1_LSB 0x4 #define GC_PMU_EXITPD_SRC_TIMELS0_PD_EXIT_TIMER1_MASK 0x10 #define GC_PMU_EXITPD_SRC_TIMELS0_PD_EXIT_TIMER1_SIZE 0x1 #define GC_PMU_EXITPD_SRC_TIMELS0_PD_EXIT_TIMER1_DEFAULT 0x0 #define GC_PMU_EXITPD_SRC_TIMELS0_PD_EXIT_TIMER1_OFFSET 0x50 #define GC_PMU_EXITPD_SRC_RBOX_WAKEUP_LSB 0x5 #define GC_PMU_EXITPD_SRC_RBOX_WAKEUP_MASK 0x20 #define GC_PMU_EXITPD_SRC_RBOX_WAKEUP_SIZE 0x1 #define GC_PMU_EXITPD_SRC_RBOX_WAKEUP_DEFAULT 0x0 #define GC_PMU_EXITPD_SRC_RBOX_WAKEUP_OFFSET 0x50 #define GC_PMU_EXITPD_MON_PIN_PD_EXIT_LSB 0x0 #define GC_PMU_EXITPD_MON_PIN_PD_EXIT_MASK 0x1 #define GC_PMU_EXITPD_MON_PIN_PD_EXIT_SIZE 0x1 #define GC_PMU_EXITPD_MON_PIN_PD_EXIT_DEFAULT 0x0 #define GC_PMU_EXITPD_MON_PIN_PD_EXIT_OFFSET 0x54 #define GC_PMU_EXITPD_MON_UTMI_SUSPEND_N_LSB 0x1 #define GC_PMU_EXITPD_MON_UTMI_SUSPEND_N_MASK 0x2 #define GC_PMU_EXITPD_MON_UTMI_SUSPEND_N_SIZE 0x1 #define GC_PMU_EXITPD_MON_UTMI_SUSPEND_N_DEFAULT 0x0 #define GC_PMU_EXITPD_MON_UTMI_SUSPEND_N_OFFSET 0x54 #define GC_PMU_EXITPD_MON_RDD0_PD_EXIT_TIMER_LSB 0x2 #define GC_PMU_EXITPD_MON_RDD0_PD_EXIT_TIMER_MASK 0x4 #define GC_PMU_EXITPD_MON_RDD0_PD_EXIT_TIMER_SIZE 0x1 #define GC_PMU_EXITPD_MON_RDD0_PD_EXIT_TIMER_DEFAULT 0x0 #define GC_PMU_EXITPD_MON_RDD0_PD_EXIT_TIMER_OFFSET 0x54 #define GC_PMU_EXITPD_MON_TIMELS0_PD_EXIT_TIMER0_LSB 0x3 #define GC_PMU_EXITPD_MON_TIMELS0_PD_EXIT_TIMER0_MASK 0x8 #define GC_PMU_EXITPD_MON_TIMELS0_PD_EXIT_TIMER0_SIZE 0x1 #define GC_PMU_EXITPD_MON_TIMELS0_PD_EXIT_TIMER0_DEFAULT 0x0 #define GC_PMU_EXITPD_MON_TIMELS0_PD_EXIT_TIMER0_OFFSET 0x54 #define GC_PMU_EXITPD_MON_TIMELS0_PD_EXIT_TIMER1_LSB 0x4 #define GC_PMU_EXITPD_MON_TIMELS0_PD_EXIT_TIMER1_MASK 0x10 #define GC_PMU_EXITPD_MON_TIMELS0_PD_EXIT_TIMER1_SIZE 0x1 #define GC_PMU_EXITPD_MON_TIMELS0_PD_EXIT_TIMER1_DEFAULT 0x0 #define GC_PMU_EXITPD_MON_TIMELS0_PD_EXIT_TIMER1_OFFSET 0x54 #define GC_PMU_EXITPD_MON_RBOX_WAKEUP_LSB 0x5 #define GC_PMU_EXITPD_MON_RBOX_WAKEUP_MASK 0x20 #define GC_PMU_EXITPD_MON_RBOX_WAKEUP_SIZE 0x1 #define GC_PMU_EXITPD_MON_RBOX_WAKEUP_DEFAULT 0x0 #define GC_PMU_EXITPD_MON_RBOX_WAKEUP_OFFSET 0x54 #define GC_PMU_OSC_CTRL_XTL_READYB_LSB 0x0 #define GC_PMU_OSC_CTRL_XTL_READYB_MASK 0x1 #define GC_PMU_OSC_CTRL_XTL_READYB_SIZE 0x1 #define GC_PMU_OSC_CTRL_XTL_READYB_DEFAULT 0x1 #define GC_PMU_OSC_CTRL_XTL_READYB_OFFSET 0x58 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK0_LSB 0x0 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK0_MASK 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK0_SIZE 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK0_DEFAULT 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK0_OFFSET 0x5c #define GC_PMU_MEMCLKSET_MEM_BANK_CLK1_LSB 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK1_MASK 0x2 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK1_SIZE 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK1_DEFAULT 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK1_OFFSET 0x5c #define GC_PMU_MEMCLKSET_MEM_BANK_CLK2_LSB 0x2 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK2_MASK 0x4 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK2_SIZE 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK2_DEFAULT 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK2_OFFSET 0x5c #define GC_PMU_MEMCLKSET_MEM_BANK_CLK3_LSB 0x3 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK3_MASK 0x8 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK3_SIZE 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK3_DEFAULT 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK3_OFFSET 0x5c #define GC_PMU_MEMCLKSET_MEM_BANK_CLK4_LSB 0x4 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK4_MASK 0x10 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK4_SIZE 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK4_DEFAULT 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK4_OFFSET 0x5c #define GC_PMU_MEMCLKSET_MEM_BANK_CLK5_LSB 0x5 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK5_MASK 0x20 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK5_SIZE 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK5_DEFAULT 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK5_OFFSET 0x5c #define GC_PMU_MEMCLKSET_MEM_BANK_CLK6_LSB 0x6 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK6_MASK 0x40 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK6_SIZE 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK6_DEFAULT 0x1 #define GC_PMU_MEMCLKSET_MEM_BANK_CLK6_OFFSET 0x5c #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK0_LSB 0x0 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK0_MASK 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK0_SIZE 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK0_DEFAULT 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK0_OFFSET 0x60 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK1_LSB 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK1_MASK 0x2 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK1_SIZE 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK1_DEFAULT 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK1_OFFSET 0x60 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK2_LSB 0x2 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK2_MASK 0x4 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK2_SIZE 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK2_DEFAULT 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK2_OFFSET 0x60 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK3_LSB 0x3 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK3_MASK 0x8 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK3_SIZE 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK3_DEFAULT 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK3_OFFSET 0x60 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK4_LSB 0x4 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK4_MASK 0x10 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK4_SIZE 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK4_DEFAULT 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK4_OFFSET 0x60 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK5_LSB 0x5 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK5_MASK 0x20 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK5_SIZE 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK5_DEFAULT 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK5_OFFSET 0x60 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK6_LSB 0x6 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK6_MASK 0x40 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK6_SIZE 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK6_DEFAULT 0x1 #define GC_PMU_MEMCLKCLR_MEM_BANK_CLK6_OFFSET 0x60 #define GC_PMU_PERICLKSET0_DCAMO0_CLK_LSB 0x0 #define GC_PMU_PERICLKSET0_DCAMO0_CLK_MASK 0x1 #define GC_PMU_PERICLKSET0_DCAMO0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DCAMO0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DCAMO0_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DCRYPTO0_CLK_LSB 0x1 #define GC_PMU_PERICLKSET0_DCRYPTO0_CLK_MASK 0x2 #define GC_PMU_PERICLKSET0_DCRYPTO0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DCRYPTO0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DCRYPTO0_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DDMA0_CLK_LSB 0x2 #define GC_PMU_PERICLKSET0_DDMA0_CLK_MASK 0x4 #define GC_PMU_PERICLKSET0_DDMA0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DDMA0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DDMA0_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DFLASH0_CLK_LSB 0x3 #define GC_PMU_PERICLKSET0_DFLASH0_CLK_MASK 0x8 #define GC_PMU_PERICLKSET0_DFLASH0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DFLASH0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DFLASH0_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DFUSE0_CLK_LSB 0x4 #define GC_PMU_PERICLKSET0_DFUSE0_CLK_MASK 0x10 #define GC_PMU_PERICLKSET0_DFUSE0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DFUSE0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DFUSE0_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_LSB 0x5 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_MASK 0x20 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_TIMER_LSB 0x6 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_TIMER_MASK 0x40 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_TIMER_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_HS_LSB 0x7 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_HS_MASK 0x80 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_HS_SIZE 0x1 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_HS_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DGLOBALSEC_CLK_HS_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DGPIO0_CLK_LSB 0x8 #define GC_PMU_PERICLKSET0_DGPIO0_CLK_MASK 0x100 #define GC_PMU_PERICLKSET0_DGPIO0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DGPIO0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DGPIO0_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DGPIO1_CLK_LSB 0x9 #define GC_PMU_PERICLKSET0_DGPIO1_CLK_MASK 0x200 #define GC_PMU_PERICLKSET0_DGPIO1_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DGPIO1_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DGPIO1_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DI2C0_CLK_TIMER_LSB 0xa #define GC_PMU_PERICLKSET0_DI2C0_CLK_TIMER_MASK 0x400 #define GC_PMU_PERICLKSET0_DI2C0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET0_DI2C0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DI2C0_CLK_TIMER_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DI2C1_CLK_TIMER_LSB 0xb #define GC_PMU_PERICLKSET0_DI2C1_CLK_TIMER_MASK 0x800 #define GC_PMU_PERICLKSET0_DI2C1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET0_DI2C1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DI2C1_CLK_TIMER_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DI2CS0_CLK_LSB 0xc #define GC_PMU_PERICLKSET0_DI2CS0_CLK_MASK 0x1000 #define GC_PMU_PERICLKSET0_DI2CS0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DI2CS0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DI2CS0_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DKEYMGR0_CLK_LSB 0xd #define GC_PMU_PERICLKSET0_DKEYMGR0_CLK_MASK 0x2000 #define GC_PMU_PERICLKSET0_DKEYMGR0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DKEYMGR0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DKEYMGR0_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DPERI_APB0_CLK_LSB 0xe #define GC_PMU_PERICLKSET0_DPERI_APB0_CLK_MASK 0x4000 #define GC_PMU_PERICLKSET0_DPERI_APB0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB0_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DPERI_APB1_CLK_LSB 0xf #define GC_PMU_PERICLKSET0_DPERI_APB1_CLK_MASK 0x8000 #define GC_PMU_PERICLKSET0_DPERI_APB1_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB1_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB1_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_LSB 0x10 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_MASK 0x10000 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_TIMER_LSB 0x11 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_TIMER_MASK 0x20000 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB2_CLK_TIMER_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_LSB 0x12 #define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_MASK 0x40000 #define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_HS_LSB 0x13 #define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_HS_MASK 0x80000 #define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_HS_SIZE 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_HS_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DPERI_APB3_CLK_HS_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DPINMUX_CLK_LSB 0x14 #define GC_PMU_PERICLKSET0_DPINMUX_CLK_MASK 0x100000 #define GC_PMU_PERICLKSET0_DPINMUX_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DPINMUX_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DPINMUX_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DPMU_CLK_LSB 0x15 #define GC_PMU_PERICLKSET0_DPMU_CLK_MASK 0x200000 #define GC_PMU_PERICLKSET0_DPMU_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DPMU_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DPMU_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DRBOX0_CLK_LSB 0x16 #define GC_PMU_PERICLKSET0_DRBOX0_CLK_MASK 0x400000 #define GC_PMU_PERICLKSET0_DRBOX0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DRBOX0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DRBOX0_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DRDD0_CLK_LSB 0x17 #define GC_PMU_PERICLKSET0_DRDD0_CLK_MASK 0x800000 #define GC_PMU_PERICLKSET0_DRDD0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DRDD0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET0_DRDD0_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DRTC0_CLK_LSB 0x18 #define GC_PMU_PERICLKSET0_DRTC0_CLK_MASK 0x1000000 #define GC_PMU_PERICLKSET0_DRTC0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DRTC0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DRTC0_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DRTC0_CLK_TIMER_LSB 0x19 #define GC_PMU_PERICLKSET0_DRTC0_CLK_TIMER_MASK 0x2000000 #define GC_PMU_PERICLKSET0_DRTC0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET0_DRTC0_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DRTC0_CLK_TIMER_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DSPI0_CLK_HS_LSB 0x1a #define GC_PMU_PERICLKSET0_DSPI0_CLK_HS_MASK 0x4000000 #define GC_PMU_PERICLKSET0_DSPI0_CLK_HS_SIZE 0x1 #define GC_PMU_PERICLKSET0_DSPI0_CLK_HS_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DSPI0_CLK_HS_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DSPI1_CLK_HS_LSB 0x1b #define GC_PMU_PERICLKSET0_DSPI1_CLK_HS_MASK 0x8000000 #define GC_PMU_PERICLKSET0_DSPI1_CLK_HS_SIZE 0x1 #define GC_PMU_PERICLKSET0_DSPI1_CLK_HS_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DSPI1_CLK_HS_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DSPS0_CLK_LSB 0x1c #define GC_PMU_PERICLKSET0_DSPS0_CLK_MASK 0x10000000 #define GC_PMU_PERICLKSET0_DSPS0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DSPS0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DSPS0_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DSPS0_CLK_TIMER_HS_LSB 0x1d #define GC_PMU_PERICLKSET0_DSPS0_CLK_TIMER_HS_MASK 0x20000000 #define GC_PMU_PERICLKSET0_DSPS0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERICLKSET0_DSPS0_CLK_TIMER_HS_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DSPS0_CLK_TIMER_HS_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DSWDP0_CLK_LSB 0x1e #define GC_PMU_PERICLKSET0_DSWDP0_CLK_MASK 0x40000000 #define GC_PMU_PERICLKSET0_DSWDP0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DSWDP0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DSWDP0_CLK_OFFSET 0x64 #define GC_PMU_PERICLKSET0_DTEMP0_CLK_LSB 0x1f #define GC_PMU_PERICLKSET0_DTEMP0_CLK_MASK 0x80000000 #define GC_PMU_PERICLKSET0_DTEMP0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET0_DTEMP0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET0_DTEMP0_CLK_OFFSET 0x64 #define GC_PMU_PERICLKCLR0_DCAMO0_CLK_LSB 0x0 #define GC_PMU_PERICLKCLR0_DCAMO0_CLK_MASK 0x1 #define GC_PMU_PERICLKCLR0_DCAMO0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DCAMO0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DCAMO0_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DCRYPTO0_CLK_LSB 0x1 #define GC_PMU_PERICLKCLR0_DCRYPTO0_CLK_MASK 0x2 #define GC_PMU_PERICLKCLR0_DCRYPTO0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DCRYPTO0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DCRYPTO0_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DDMA0_CLK_LSB 0x2 #define GC_PMU_PERICLKCLR0_DDMA0_CLK_MASK 0x4 #define GC_PMU_PERICLKCLR0_DDMA0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DDMA0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DDMA0_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DFLASH0_CLK_LSB 0x3 #define GC_PMU_PERICLKCLR0_DFLASH0_CLK_MASK 0x8 #define GC_PMU_PERICLKCLR0_DFLASH0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DFLASH0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DFLASH0_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DFUSE0_CLK_LSB 0x4 #define GC_PMU_PERICLKCLR0_DFUSE0_CLK_MASK 0x10 #define GC_PMU_PERICLKCLR0_DFUSE0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DFUSE0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DFUSE0_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_LSB 0x5 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_MASK 0x20 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_TIMER_LSB 0x6 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_TIMER_MASK 0x40 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_TIMER_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_HS_LSB 0x7 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_HS_MASK 0x80 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_HS_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_HS_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DGLOBALSEC_CLK_HS_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DGPIO0_CLK_LSB 0x8 #define GC_PMU_PERICLKCLR0_DGPIO0_CLK_MASK 0x100 #define GC_PMU_PERICLKCLR0_DGPIO0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DGPIO0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DGPIO0_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DGPIO1_CLK_LSB 0x9 #define GC_PMU_PERICLKCLR0_DGPIO1_CLK_MASK 0x200 #define GC_PMU_PERICLKCLR0_DGPIO1_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DGPIO1_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DGPIO1_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DI2C0_CLK_TIMER_LSB 0xa #define GC_PMU_PERICLKCLR0_DI2C0_CLK_TIMER_MASK 0x400 #define GC_PMU_PERICLKCLR0_DI2C0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DI2C0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DI2C0_CLK_TIMER_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DI2C1_CLK_TIMER_LSB 0xb #define GC_PMU_PERICLKCLR0_DI2C1_CLK_TIMER_MASK 0x800 #define GC_PMU_PERICLKCLR0_DI2C1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DI2C1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DI2C1_CLK_TIMER_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DI2CS0_CLK_LSB 0xc #define GC_PMU_PERICLKCLR0_DI2CS0_CLK_MASK 0x1000 #define GC_PMU_PERICLKCLR0_DI2CS0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DI2CS0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DI2CS0_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DKEYMGR0_CLK_LSB 0xd #define GC_PMU_PERICLKCLR0_DKEYMGR0_CLK_MASK 0x2000 #define GC_PMU_PERICLKCLR0_DKEYMGR0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DKEYMGR0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DKEYMGR0_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DPERI_APB0_CLK_LSB 0xe #define GC_PMU_PERICLKCLR0_DPERI_APB0_CLK_MASK 0x4000 #define GC_PMU_PERICLKCLR0_DPERI_APB0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB0_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DPERI_APB1_CLK_LSB 0xf #define GC_PMU_PERICLKCLR0_DPERI_APB1_CLK_MASK 0x8000 #define GC_PMU_PERICLKCLR0_DPERI_APB1_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB1_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB1_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_LSB 0x10 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_MASK 0x10000 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_TIMER_LSB 0x11 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_TIMER_MASK 0x20000 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB2_CLK_TIMER_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_LSB 0x12 #define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_MASK 0x40000 #define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_HS_LSB 0x13 #define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_HS_MASK 0x80000 #define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_HS_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_HS_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DPERI_APB3_CLK_HS_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DPINMUX_CLK_LSB 0x14 #define GC_PMU_PERICLKCLR0_DPINMUX_CLK_MASK 0x100000 #define GC_PMU_PERICLKCLR0_DPINMUX_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DPINMUX_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DPINMUX_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DPMU_CLK_LSB 0x15 #define GC_PMU_PERICLKCLR0_DPMU_CLK_MASK 0x200000 #define GC_PMU_PERICLKCLR0_DPMU_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DPMU_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DPMU_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DRBOX0_CLK_LSB 0x16 #define GC_PMU_PERICLKCLR0_DRBOX0_CLK_MASK 0x400000 #define GC_PMU_PERICLKCLR0_DRBOX0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DRBOX0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DRBOX0_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DRDD0_CLK_LSB 0x17 #define GC_PMU_PERICLKCLR0_DRDD0_CLK_MASK 0x800000 #define GC_PMU_PERICLKCLR0_DRDD0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DRDD0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR0_DRDD0_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_LSB 0x18 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_MASK 0x1000000 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_TIMER_LSB 0x19 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_TIMER_MASK 0x2000000 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DRTC0_CLK_TIMER_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DSPI0_CLK_HS_LSB 0x1a #define GC_PMU_PERICLKCLR0_DSPI0_CLK_HS_MASK 0x4000000 #define GC_PMU_PERICLKCLR0_DSPI0_CLK_HS_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DSPI0_CLK_HS_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DSPI0_CLK_HS_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DSPI1_CLK_HS_LSB 0x1b #define GC_PMU_PERICLKCLR0_DSPI1_CLK_HS_MASK 0x8000000 #define GC_PMU_PERICLKCLR0_DSPI1_CLK_HS_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DSPI1_CLK_HS_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DSPI1_CLK_HS_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DSPS0_CLK_LSB 0x1c #define GC_PMU_PERICLKCLR0_DSPS0_CLK_MASK 0x10000000 #define GC_PMU_PERICLKCLR0_DSPS0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DSPS0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DSPS0_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DSPS0_CLK_TIMER_HS_LSB 0x1d #define GC_PMU_PERICLKCLR0_DSPS0_CLK_TIMER_HS_MASK 0x20000000 #define GC_PMU_PERICLKCLR0_DSPS0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DSPS0_CLK_TIMER_HS_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DSPS0_CLK_TIMER_HS_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DSWDP0_CLK_LSB 0x1e #define GC_PMU_PERICLKCLR0_DSWDP0_CLK_MASK 0x40000000 #define GC_PMU_PERICLKCLR0_DSWDP0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DSWDP0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DSWDP0_CLK_OFFSET 0x68 #define GC_PMU_PERICLKCLR0_DTEMP0_CLK_LSB 0x1f #define GC_PMU_PERICLKCLR0_DTEMP0_CLK_MASK 0x80000000 #define GC_PMU_PERICLKCLR0_DTEMP0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR0_DTEMP0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR0_DTEMP0_CLK_OFFSET 0x68 #define GC_PMU_PERICLKSET1_DTIMEHS0_CLK_TIMER_LSB 0x0 #define GC_PMU_PERICLKSET1_DTIMEHS0_CLK_TIMER_MASK 0x1 #define GC_PMU_PERICLKSET1_DTIMEHS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET1_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKSET1_DTIMEHS0_CLK_TIMER_OFFSET 0x6c #define GC_PMU_PERICLKSET1_DTIMEHS1_CLK_TIMER_LSB 0x1 #define GC_PMU_PERICLKSET1_DTIMEHS1_CLK_TIMER_MASK 0x2 #define GC_PMU_PERICLKSET1_DTIMEHS1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET1_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKSET1_DTIMEHS1_CLK_TIMER_OFFSET 0x6c #define GC_PMU_PERICLKSET1_DTIMELS0_CLK_LSB 0x2 #define GC_PMU_PERICLKSET1_DTIMELS0_CLK_MASK 0x4 #define GC_PMU_PERICLKSET1_DTIMELS0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_DTIMELS0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKSET1_DTIMELS0_CLK_OFFSET 0x6c #define GC_PMU_PERICLKSET1_DTIMEUS0_CLK_TIMER_LSB 0x3 #define GC_PMU_PERICLKSET1_DTIMEUS0_CLK_TIMER_MASK 0x8 #define GC_PMU_PERICLKSET1_DTIMEUS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET1_DTIMEUS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKSET1_DTIMEUS0_CLK_TIMER_OFFSET 0x6c #define GC_PMU_PERICLKSET1_DTRNG0_CLK_LSB 0x4 #define GC_PMU_PERICLKSET1_DTRNG0_CLK_MASK 0x10 #define GC_PMU_PERICLKSET1_DTRNG0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_DTRNG0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_DTRNG0_CLK_OFFSET 0x6c #define GC_PMU_PERICLKSET1_DUART0_CLK_TIMER_LSB 0x5 #define GC_PMU_PERICLKSET1_DUART0_CLK_TIMER_MASK 0x20 #define GC_PMU_PERICLKSET1_DUART0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET1_DUART0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKSET1_DUART0_CLK_TIMER_OFFSET 0x6c #define GC_PMU_PERICLKSET1_DUART1_CLK_TIMER_LSB 0x6 #define GC_PMU_PERICLKSET1_DUART1_CLK_TIMER_MASK 0x40 #define GC_PMU_PERICLKSET1_DUART1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET1_DUART1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKSET1_DUART1_CLK_TIMER_OFFSET 0x6c #define GC_PMU_PERICLKSET1_DUART2_CLK_TIMER_LSB 0x7 #define GC_PMU_PERICLKSET1_DUART2_CLK_TIMER_MASK 0x80 #define GC_PMU_PERICLKSET1_DUART2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET1_DUART2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKSET1_DUART2_CLK_TIMER_OFFSET 0x6c #define GC_PMU_PERICLKSET1_DUSB0_CLK_LSB 0x8 #define GC_PMU_PERICLKSET1_DUSB0_CLK_MASK 0x100 #define GC_PMU_PERICLKSET1_DUSB0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_DUSB0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_DUSB0_CLK_OFFSET 0x6c #define GC_PMU_PERICLKSET1_DUSB0_CLK_TIMER_HS_LSB 0x9 #define GC_PMU_PERICLKSET1_DUSB0_CLK_TIMER_HS_MASK 0x200 #define GC_PMU_PERICLKSET1_DUSB0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERICLKSET1_DUSB0_CLK_TIMER_HS_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_DUSB0_CLK_TIMER_HS_OFFSET 0x6c #define GC_PMU_PERICLKSET1_DVOLT0_CLK_LSB 0xa #define GC_PMU_PERICLKSET1_DVOLT0_CLK_MASK 0x400 #define GC_PMU_PERICLKSET1_DVOLT0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_DVOLT0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_DVOLT0_CLK_OFFSET 0x6c #define GC_PMU_PERICLKSET1_DWATCHDOG0_CLK_LSB 0xb #define GC_PMU_PERICLKSET1_DWATCHDOG0_CLK_MASK 0x800 #define GC_PMU_PERICLKSET1_DWATCHDOG0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_DWATCHDOG0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_DWATCHDOG0_CLK_OFFSET 0x6c #define GC_PMU_PERICLKSET1_DXO0_CLK_LSB 0xc #define GC_PMU_PERICLKSET1_DXO0_CLK_MASK 0x1000 #define GC_PMU_PERICLKSET1_DXO0_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_DXO0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_DXO0_CLK_OFFSET 0x6c #define GC_PMU_PERICLKSET1_DXO0_CLK_TIMER_LSB 0xd #define GC_PMU_PERICLKSET1_DXO0_CLK_TIMER_MASK 0x2000 #define GC_PMU_PERICLKSET1_DXO0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKSET1_DXO0_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_DXO0_CLK_TIMER_OFFSET 0x6c #define GC_PMU_PERICLKSET1_PERI_MASTER_MATRIX_CLK_LSB 0xe #define GC_PMU_PERICLKSET1_PERI_MASTER_MATRIX_CLK_MASK 0x4000 #define GC_PMU_PERICLKSET1_PERI_MASTER_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_PERI_MASTER_MATRIX_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_PERI_MASTER_MATRIX_CLK_OFFSET 0x6c #define GC_PMU_PERICLKSET1_PERI_MATRIX_CLK_LSB 0xf #define GC_PMU_PERICLKSET1_PERI_MATRIX_CLK_MASK 0x8000 #define GC_PMU_PERICLKSET1_PERI_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERICLKSET1_PERI_MATRIX_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKSET1_PERI_MATRIX_CLK_OFFSET 0x6c #define GC_PMU_PERICLKCLR1_DTIMEHS0_CLK_TIMER_LSB 0x0 #define GC_PMU_PERICLKCLR1_DTIMEHS0_CLK_TIMER_MASK 0x1 #define GC_PMU_PERICLKCLR1_DTIMEHS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKCLR1_DTIMEHS0_CLK_TIMER_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_DTIMEHS1_CLK_TIMER_LSB 0x1 #define GC_PMU_PERICLKCLR1_DTIMEHS1_CLK_TIMER_MASK 0x2 #define GC_PMU_PERICLKCLR1_DTIMEHS1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKCLR1_DTIMEHS1_CLK_TIMER_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_DTIMELS0_CLK_LSB 0x2 #define GC_PMU_PERICLKCLR1_DTIMELS0_CLK_MASK 0x4 #define GC_PMU_PERICLKCLR1_DTIMELS0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DTIMELS0_CLK_DEFAULT 0x0 #define GC_PMU_PERICLKCLR1_DTIMELS0_CLK_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_DTIMEUS0_CLK_TIMER_LSB 0x3 #define GC_PMU_PERICLKCLR1_DTIMEUS0_CLK_TIMER_MASK 0x8 #define GC_PMU_PERICLKCLR1_DTIMEUS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DTIMEUS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKCLR1_DTIMEUS0_CLK_TIMER_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_DTRNG0_CLK_LSB 0x4 #define GC_PMU_PERICLKCLR1_DTRNG0_CLK_MASK 0x10 #define GC_PMU_PERICLKCLR1_DTRNG0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DTRNG0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_DTRNG0_CLK_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_DUART0_CLK_TIMER_LSB 0x5 #define GC_PMU_PERICLKCLR1_DUART0_CLK_TIMER_MASK 0x20 #define GC_PMU_PERICLKCLR1_DUART0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DUART0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKCLR1_DUART0_CLK_TIMER_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_DUART1_CLK_TIMER_LSB 0x6 #define GC_PMU_PERICLKCLR1_DUART1_CLK_TIMER_MASK 0x40 #define GC_PMU_PERICLKCLR1_DUART1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DUART1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKCLR1_DUART1_CLK_TIMER_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_DUART2_CLK_TIMER_LSB 0x7 #define GC_PMU_PERICLKCLR1_DUART2_CLK_TIMER_MASK 0x80 #define GC_PMU_PERICLKCLR1_DUART2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DUART2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERICLKCLR1_DUART2_CLK_TIMER_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_LSB 0x8 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_MASK 0x100 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_TIMER_HS_LSB 0x9 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_TIMER_HS_MASK 0x200 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_TIMER_HS_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_DUSB0_CLK_TIMER_HS_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_DVOLT0_CLK_LSB 0xa #define GC_PMU_PERICLKCLR1_DVOLT0_CLK_MASK 0x400 #define GC_PMU_PERICLKCLR1_DVOLT0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DVOLT0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_DVOLT0_CLK_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_DWATCHDOG0_CLK_LSB 0xb #define GC_PMU_PERICLKCLR1_DWATCHDOG0_CLK_MASK 0x800 #define GC_PMU_PERICLKCLR1_DWATCHDOG0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DWATCHDOG0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_DWATCHDOG0_CLK_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_DXO0_CLK_LSB 0xc #define GC_PMU_PERICLKCLR1_DXO0_CLK_MASK 0x1000 #define GC_PMU_PERICLKCLR1_DXO0_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DXO0_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_DXO0_CLK_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_DXO0_CLK_TIMER_LSB 0xd #define GC_PMU_PERICLKCLR1_DXO0_CLK_TIMER_MASK 0x2000 #define GC_PMU_PERICLKCLR1_DXO0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERICLKCLR1_DXO0_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_DXO0_CLK_TIMER_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_PERI_MASTER_MATRIX_CLK_LSB 0xe #define GC_PMU_PERICLKCLR1_PERI_MASTER_MATRIX_CLK_MASK 0x4000 #define GC_PMU_PERICLKCLR1_PERI_MASTER_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_PERI_MASTER_MATRIX_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_PERI_MASTER_MATRIX_CLK_OFFSET 0x70 #define GC_PMU_PERICLKCLR1_PERI_MATRIX_CLK_LSB 0xf #define GC_PMU_PERICLKCLR1_PERI_MATRIX_CLK_MASK 0x8000 #define GC_PMU_PERICLKCLR1_PERI_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERICLKCLR1_PERI_MATRIX_CLK_DEFAULT 0x1 #define GC_PMU_PERICLKCLR1_PERI_MATRIX_CLK_OFFSET 0x70 #define GC_PMU_CLK_RO_MASK0_DCAMO0_CLK_LSB 0x0 #define GC_PMU_CLK_RO_MASK0_DCAMO0_CLK_MASK 0x1 #define GC_PMU_CLK_RO_MASK0_DCAMO0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DCAMO0_CLK_DEFAULT 0x1 #define GC_PMU_CLK_RO_MASK0_DCAMO0_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DCRYPTO0_CLK_LSB 0x1 #define GC_PMU_CLK_RO_MASK0_DCRYPTO0_CLK_MASK 0x2 #define GC_PMU_CLK_RO_MASK0_DCRYPTO0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DCRYPTO0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DCRYPTO0_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DDMA0_CLK_LSB 0x2 #define GC_PMU_CLK_RO_MASK0_DDMA0_CLK_MASK 0x4 #define GC_PMU_CLK_RO_MASK0_DDMA0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DDMA0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DDMA0_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DFLASH0_CLK_LSB 0x3 #define GC_PMU_CLK_RO_MASK0_DFLASH0_CLK_MASK 0x8 #define GC_PMU_CLK_RO_MASK0_DFLASH0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DFLASH0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DFLASH0_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DFUSE0_CLK_LSB 0x4 #define GC_PMU_CLK_RO_MASK0_DFUSE0_CLK_MASK 0x10 #define GC_PMU_CLK_RO_MASK0_DFUSE0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DFUSE0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DFUSE0_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DGLOBALSEC_CLK_LSB 0x5 #define GC_PMU_CLK_RO_MASK0_DGLOBALSEC_CLK_MASK 0x20 #define GC_PMU_CLK_RO_MASK0_DGLOBALSEC_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DGLOBALSEC_CLK_DEFAULT 0x1 #define GC_PMU_CLK_RO_MASK0_DGLOBALSEC_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DGLOBALSEC_CLK_TIMER_LSB 0x6 #define GC_PMU_CLK_RO_MASK0_DGLOBALSEC_CLK_TIMER_MASK 0x40 #define GC_PMU_CLK_RO_MASK0_DGLOBALSEC_CLK_TIMER_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DGLOBALSEC_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_CLK_RO_MASK0_DGLOBALSEC_CLK_TIMER_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DGLOBALSEC_CLK_HS_LSB 0x7 #define GC_PMU_CLK_RO_MASK0_DGLOBALSEC_CLK_HS_MASK 0x80 #define GC_PMU_CLK_RO_MASK0_DGLOBALSEC_CLK_HS_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DGLOBALSEC_CLK_HS_DEFAULT 0x1 #define GC_PMU_CLK_RO_MASK0_DGLOBALSEC_CLK_HS_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DGPIO0_CLK_LSB 0x8 #define GC_PMU_CLK_RO_MASK0_DGPIO0_CLK_MASK 0x100 #define GC_PMU_CLK_RO_MASK0_DGPIO0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DGPIO0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DGPIO0_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DGPIO1_CLK_LSB 0x9 #define GC_PMU_CLK_RO_MASK0_DGPIO1_CLK_MASK 0x200 #define GC_PMU_CLK_RO_MASK0_DGPIO1_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DGPIO1_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DGPIO1_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DI2C0_CLK_TIMER_LSB 0xa #define GC_PMU_CLK_RO_MASK0_DI2C0_CLK_TIMER_MASK 0x400 #define GC_PMU_CLK_RO_MASK0_DI2C0_CLK_TIMER_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DI2C0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DI2C0_CLK_TIMER_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DI2C1_CLK_TIMER_LSB 0xb #define GC_PMU_CLK_RO_MASK0_DI2C1_CLK_TIMER_MASK 0x800 #define GC_PMU_CLK_RO_MASK0_DI2C1_CLK_TIMER_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DI2C1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DI2C1_CLK_TIMER_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DI2CS0_CLK_LSB 0xc #define GC_PMU_CLK_RO_MASK0_DI2CS0_CLK_MASK 0x1000 #define GC_PMU_CLK_RO_MASK0_DI2CS0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DI2CS0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DI2CS0_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DKEYMGR0_CLK_LSB 0xd #define GC_PMU_CLK_RO_MASK0_DKEYMGR0_CLK_MASK 0x2000 #define GC_PMU_CLK_RO_MASK0_DKEYMGR0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DKEYMGR0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DKEYMGR0_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DPERI_APB0_CLK_LSB 0xe #define GC_PMU_CLK_RO_MASK0_DPERI_APB0_CLK_MASK 0x4000 #define GC_PMU_CLK_RO_MASK0_DPERI_APB0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DPERI_APB0_CLK_DEFAULT 0x1 #define GC_PMU_CLK_RO_MASK0_DPERI_APB0_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DPERI_APB1_CLK_LSB 0xf #define GC_PMU_CLK_RO_MASK0_DPERI_APB1_CLK_MASK 0x8000 #define GC_PMU_CLK_RO_MASK0_DPERI_APB1_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DPERI_APB1_CLK_DEFAULT 0x1 #define GC_PMU_CLK_RO_MASK0_DPERI_APB1_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DPERI_APB2_CLK_LSB 0x10 #define GC_PMU_CLK_RO_MASK0_DPERI_APB2_CLK_MASK 0x10000 #define GC_PMU_CLK_RO_MASK0_DPERI_APB2_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DPERI_APB2_CLK_DEFAULT 0x1 #define GC_PMU_CLK_RO_MASK0_DPERI_APB2_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DPERI_APB2_CLK_TIMER_LSB 0x11 #define GC_PMU_CLK_RO_MASK0_DPERI_APB2_CLK_TIMER_MASK 0x20000 #define GC_PMU_CLK_RO_MASK0_DPERI_APB2_CLK_TIMER_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DPERI_APB2_CLK_TIMER_DEFAULT 0x1 #define GC_PMU_CLK_RO_MASK0_DPERI_APB2_CLK_TIMER_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DPERI_APB3_CLK_LSB 0x12 #define GC_PMU_CLK_RO_MASK0_DPERI_APB3_CLK_MASK 0x40000 #define GC_PMU_CLK_RO_MASK0_DPERI_APB3_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DPERI_APB3_CLK_DEFAULT 0x1 #define GC_PMU_CLK_RO_MASK0_DPERI_APB3_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DPERI_APB3_CLK_HS_LSB 0x13 #define GC_PMU_CLK_RO_MASK0_DPERI_APB3_CLK_HS_MASK 0x80000 #define GC_PMU_CLK_RO_MASK0_DPERI_APB3_CLK_HS_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DPERI_APB3_CLK_HS_DEFAULT 0x1 #define GC_PMU_CLK_RO_MASK0_DPERI_APB3_CLK_HS_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DPINMUX_CLK_LSB 0x14 #define GC_PMU_CLK_RO_MASK0_DPINMUX_CLK_MASK 0x100000 #define GC_PMU_CLK_RO_MASK0_DPINMUX_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DPINMUX_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DPINMUX_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DPMU_CLK_LSB 0x15 #define GC_PMU_CLK_RO_MASK0_DPMU_CLK_MASK 0x200000 #define GC_PMU_CLK_RO_MASK0_DPMU_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DPMU_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DPMU_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DRBOX0_CLK_LSB 0x16 #define GC_PMU_CLK_RO_MASK0_DRBOX0_CLK_MASK 0x400000 #define GC_PMU_CLK_RO_MASK0_DRBOX0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DRBOX0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DRBOX0_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DRDD0_CLK_LSB 0x17 #define GC_PMU_CLK_RO_MASK0_DRDD0_CLK_MASK 0x800000 #define GC_PMU_CLK_RO_MASK0_DRDD0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DRDD0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DRDD0_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DRTC0_CLK_LSB 0x18 #define GC_PMU_CLK_RO_MASK0_DRTC0_CLK_MASK 0x1000000 #define GC_PMU_CLK_RO_MASK0_DRTC0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DRTC0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DRTC0_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DRTC0_CLK_TIMER_LSB 0x19 #define GC_PMU_CLK_RO_MASK0_DRTC0_CLK_TIMER_MASK 0x2000000 #define GC_PMU_CLK_RO_MASK0_DRTC0_CLK_TIMER_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DRTC0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DRTC0_CLK_TIMER_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DSPI0_CLK_HS_LSB 0x1a #define GC_PMU_CLK_RO_MASK0_DSPI0_CLK_HS_MASK 0x4000000 #define GC_PMU_CLK_RO_MASK0_DSPI0_CLK_HS_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DSPI0_CLK_HS_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DSPI0_CLK_HS_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DSPI1_CLK_HS_LSB 0x1b #define GC_PMU_CLK_RO_MASK0_DSPI1_CLK_HS_MASK 0x8000000 #define GC_PMU_CLK_RO_MASK0_DSPI1_CLK_HS_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DSPI1_CLK_HS_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DSPI1_CLK_HS_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DSPS0_CLK_LSB 0x1c #define GC_PMU_CLK_RO_MASK0_DSPS0_CLK_MASK 0x10000000 #define GC_PMU_CLK_RO_MASK0_DSPS0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DSPS0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DSPS0_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DSPS0_CLK_TIMER_HS_LSB 0x1d #define GC_PMU_CLK_RO_MASK0_DSPS0_CLK_TIMER_HS_MASK 0x20000000 #define GC_PMU_CLK_RO_MASK0_DSPS0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DSPS0_CLK_TIMER_HS_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DSPS0_CLK_TIMER_HS_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DSWDP0_CLK_LSB 0x1e #define GC_PMU_CLK_RO_MASK0_DSWDP0_CLK_MASK 0x40000000 #define GC_PMU_CLK_RO_MASK0_DSWDP0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DSWDP0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK0_DSWDP0_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK0_DTEMP0_CLK_LSB 0x1f #define GC_PMU_CLK_RO_MASK0_DTEMP0_CLK_MASK 0x80000000 #define GC_PMU_CLK_RO_MASK0_DTEMP0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK0_DTEMP0_CLK_DEFAULT 0x1 #define GC_PMU_CLK_RO_MASK0_DTEMP0_CLK_OFFSET 0x74 #define GC_PMU_CLK_RO_MASK1_DTIMEHS0_CLK_TIMER_LSB 0x0 #define GC_PMU_CLK_RO_MASK1_DTIMEHS0_CLK_TIMER_MASK 0x1 #define GC_PMU_CLK_RO_MASK1_DTIMEHS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK1_DTIMEHS0_CLK_TIMER_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_DTIMEHS1_CLK_TIMER_LSB 0x1 #define GC_PMU_CLK_RO_MASK1_DTIMEHS1_CLK_TIMER_MASK 0x2 #define GC_PMU_CLK_RO_MASK1_DTIMEHS1_CLK_TIMER_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK1_DTIMEHS1_CLK_TIMER_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_DTIMELS0_CLK_LSB 0x2 #define GC_PMU_CLK_RO_MASK1_DTIMELS0_CLK_MASK 0x4 #define GC_PMU_CLK_RO_MASK1_DTIMELS0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_DTIMELS0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK1_DTIMELS0_CLK_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_DTIMEUS0_CLK_TIMER_LSB 0x3 #define GC_PMU_CLK_RO_MASK1_DTIMEUS0_CLK_TIMER_MASK 0x8 #define GC_PMU_CLK_RO_MASK1_DTIMEUS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_DTIMEUS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK1_DTIMEUS0_CLK_TIMER_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_DTRNG0_CLK_LSB 0x4 #define GC_PMU_CLK_RO_MASK1_DTRNG0_CLK_MASK 0x10 #define GC_PMU_CLK_RO_MASK1_DTRNG0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_DTRNG0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK1_DTRNG0_CLK_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_DUART0_CLK_TIMER_LSB 0x5 #define GC_PMU_CLK_RO_MASK1_DUART0_CLK_TIMER_MASK 0x20 #define GC_PMU_CLK_RO_MASK1_DUART0_CLK_TIMER_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_DUART0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK1_DUART0_CLK_TIMER_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_DUART1_CLK_TIMER_LSB 0x6 #define GC_PMU_CLK_RO_MASK1_DUART1_CLK_TIMER_MASK 0x40 #define GC_PMU_CLK_RO_MASK1_DUART1_CLK_TIMER_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_DUART1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK1_DUART1_CLK_TIMER_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_DUART2_CLK_TIMER_LSB 0x7 #define GC_PMU_CLK_RO_MASK1_DUART2_CLK_TIMER_MASK 0x80 #define GC_PMU_CLK_RO_MASK1_DUART2_CLK_TIMER_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_DUART2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK1_DUART2_CLK_TIMER_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_DUSB0_CLK_LSB 0x8 #define GC_PMU_CLK_RO_MASK1_DUSB0_CLK_MASK 0x100 #define GC_PMU_CLK_RO_MASK1_DUSB0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_DUSB0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK1_DUSB0_CLK_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_DUSB0_CLK_TIMER_HS_LSB 0x9 #define GC_PMU_CLK_RO_MASK1_DUSB0_CLK_TIMER_HS_MASK 0x200 #define GC_PMU_CLK_RO_MASK1_DUSB0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_DUSB0_CLK_TIMER_HS_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK1_DUSB0_CLK_TIMER_HS_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_DVOLT0_CLK_LSB 0xa #define GC_PMU_CLK_RO_MASK1_DVOLT0_CLK_MASK 0x400 #define GC_PMU_CLK_RO_MASK1_DVOLT0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_DVOLT0_CLK_DEFAULT 0x1 #define GC_PMU_CLK_RO_MASK1_DVOLT0_CLK_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_DWATCHDOG0_CLK_LSB 0xb #define GC_PMU_CLK_RO_MASK1_DWATCHDOG0_CLK_MASK 0x800 #define GC_PMU_CLK_RO_MASK1_DWATCHDOG0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_DWATCHDOG0_CLK_DEFAULT 0x1 #define GC_PMU_CLK_RO_MASK1_DWATCHDOG0_CLK_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_DXO0_CLK_LSB 0xc #define GC_PMU_CLK_RO_MASK1_DXO0_CLK_MASK 0x1000 #define GC_PMU_CLK_RO_MASK1_DXO0_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_DXO0_CLK_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK1_DXO0_CLK_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_DXO0_CLK_TIMER_LSB 0xd #define GC_PMU_CLK_RO_MASK1_DXO0_CLK_TIMER_MASK 0x2000 #define GC_PMU_CLK_RO_MASK1_DXO0_CLK_TIMER_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_DXO0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_CLK_RO_MASK1_DXO0_CLK_TIMER_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_PERI_MASTER_MATRIX_CLK_LSB 0xe #define GC_PMU_CLK_RO_MASK1_PERI_MASTER_MATRIX_CLK_MASK 0x4000 #define GC_PMU_CLK_RO_MASK1_PERI_MASTER_MATRIX_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_PERI_MASTER_MATRIX_CLK_DEFAULT 0x1 #define GC_PMU_CLK_RO_MASK1_PERI_MASTER_MATRIX_CLK_OFFSET 0x78 #define GC_PMU_CLK_RO_MASK1_PERI_MATRIX_CLK_LSB 0xf #define GC_PMU_CLK_RO_MASK1_PERI_MATRIX_CLK_MASK 0x8000 #define GC_PMU_CLK_RO_MASK1_PERI_MATRIX_CLK_SIZE 0x1 #define GC_PMU_CLK_RO_MASK1_PERI_MATRIX_CLK_DEFAULT 0x1 #define GC_PMU_CLK_RO_MASK1_PERI_MATRIX_CLK_OFFSET 0x78 #define GC_PMU_PERIGATEONSLEEPSET0_DCAMO0_CLK_LSB 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DCAMO0_CLK_MASK 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DCAMO0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DCAMO0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DCAMO0_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DCRYPTO0_CLK_LSB 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DCRYPTO0_CLK_MASK 0x2 #define GC_PMU_PERIGATEONSLEEPSET0_DCRYPTO0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DCRYPTO0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DCRYPTO0_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DDMA0_CLK_LSB 0x2 #define GC_PMU_PERIGATEONSLEEPSET0_DDMA0_CLK_MASK 0x4 #define GC_PMU_PERIGATEONSLEEPSET0_DDMA0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DDMA0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DDMA0_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DFLASH0_CLK_LSB 0x3 #define GC_PMU_PERIGATEONSLEEPSET0_DFLASH0_CLK_MASK 0x8 #define GC_PMU_PERIGATEONSLEEPSET0_DFLASH0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DFLASH0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DFLASH0_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DFUSE0_CLK_LSB 0x4 #define GC_PMU_PERIGATEONSLEEPSET0_DFUSE0_CLK_MASK 0x10 #define GC_PMU_PERIGATEONSLEEPSET0_DFUSE0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DFUSE0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DFUSE0_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_LSB 0x5 #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_MASK 0x20 #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_TIMER_LSB 0x6 #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_TIMER_MASK 0x40 #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_TIMER_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_HS_LSB 0x7 #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_HS_MASK 0x80 #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DGLOBALSEC_CLK_HS_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO0_CLK_LSB 0x8 #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO0_CLK_MASK 0x100 #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO0_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO1_CLK_LSB 0x9 #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO1_CLK_MASK 0x200 #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO1_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO1_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DGPIO1_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DI2C0_CLK_TIMER_LSB 0xa #define GC_PMU_PERIGATEONSLEEPSET0_DI2C0_CLK_TIMER_MASK 0x400 #define GC_PMU_PERIGATEONSLEEPSET0_DI2C0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DI2C0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DI2C0_CLK_TIMER_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DI2C1_CLK_TIMER_LSB 0xb #define GC_PMU_PERIGATEONSLEEPSET0_DI2C1_CLK_TIMER_MASK 0x800 #define GC_PMU_PERIGATEONSLEEPSET0_DI2C1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DI2C1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DI2C1_CLK_TIMER_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DI2CS0_CLK_LSB 0xc #define GC_PMU_PERIGATEONSLEEPSET0_DI2CS0_CLK_MASK 0x1000 #define GC_PMU_PERIGATEONSLEEPSET0_DI2CS0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DI2CS0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DI2CS0_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DKEYMGR0_CLK_LSB 0xd #define GC_PMU_PERIGATEONSLEEPSET0_DKEYMGR0_CLK_MASK 0x2000 #define GC_PMU_PERIGATEONSLEEPSET0_DKEYMGR0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DKEYMGR0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DKEYMGR0_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB0_CLK_LSB 0xe #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB0_CLK_MASK 0x4000 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB0_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB1_CLK_LSB 0xf #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB1_CLK_MASK 0x8000 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB1_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB1_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB1_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_LSB 0x10 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_MASK 0x10000 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_TIMER_LSB 0x11 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_TIMER_MASK 0x20000 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB2_CLK_TIMER_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_LSB 0x12 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_MASK 0x40000 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_HS_LSB 0x13 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_HS_MASK 0x80000 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DPERI_APB3_CLK_HS_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DPINMUX_CLK_LSB 0x14 #define GC_PMU_PERIGATEONSLEEPSET0_DPINMUX_CLK_MASK 0x100000 #define GC_PMU_PERIGATEONSLEEPSET0_DPINMUX_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DPINMUX_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DPINMUX_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DPMU_CLK_LSB 0x15 #define GC_PMU_PERIGATEONSLEEPSET0_DPMU_CLK_MASK 0x200000 #define GC_PMU_PERIGATEONSLEEPSET0_DPMU_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DPMU_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DPMU_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DRBOX0_CLK_LSB 0x16 #define GC_PMU_PERIGATEONSLEEPSET0_DRBOX0_CLK_MASK 0x400000 #define GC_PMU_PERIGATEONSLEEPSET0_DRBOX0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DRBOX0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DRBOX0_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DRDD0_CLK_LSB 0x17 #define GC_PMU_PERIGATEONSLEEPSET0_DRDD0_CLK_MASK 0x800000 #define GC_PMU_PERIGATEONSLEEPSET0_DRDD0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DRDD0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DRDD0_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_LSB 0x18 #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_MASK 0x1000000 #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_TIMER_LSB 0x19 #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_TIMER_MASK 0x2000000 #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DRTC0_CLK_TIMER_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DSPI0_CLK_HS_LSB 0x1a #define GC_PMU_PERIGATEONSLEEPSET0_DSPI0_CLK_HS_MASK 0x4000000 #define GC_PMU_PERIGATEONSLEEPSET0_DSPI0_CLK_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DSPI0_CLK_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DSPI0_CLK_HS_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DSPI1_CLK_HS_LSB 0x1b #define GC_PMU_PERIGATEONSLEEPSET0_DSPI1_CLK_HS_MASK 0x8000000 #define GC_PMU_PERIGATEONSLEEPSET0_DSPI1_CLK_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DSPI1_CLK_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DSPI1_CLK_HS_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_LSB 0x1c #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_MASK 0x10000000 #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_TIMER_HS_LSB 0x1d #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_TIMER_HS_MASK 0x20000000 #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_TIMER_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DSPS0_CLK_TIMER_HS_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DSWDP0_CLK_LSB 0x1e #define GC_PMU_PERIGATEONSLEEPSET0_DSWDP0_CLK_MASK 0x40000000 #define GC_PMU_PERIGATEONSLEEPSET0_DSWDP0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DSWDP0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DSWDP0_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPSET0_DTEMP0_CLK_LSB 0x1f #define GC_PMU_PERIGATEONSLEEPSET0_DTEMP0_CLK_MASK 0x80000000 #define GC_PMU_PERIGATEONSLEEPSET0_DTEMP0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET0_DTEMP0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET0_DTEMP0_CLK_OFFSET 0x7c #define GC_PMU_PERIGATEONSLEEPCLR0_DCAMO0_CLK_LSB 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DCAMO0_CLK_MASK 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DCAMO0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DCAMO0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DCAMO0_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DCRYPTO0_CLK_LSB 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DCRYPTO0_CLK_MASK 0x2 #define GC_PMU_PERIGATEONSLEEPCLR0_DCRYPTO0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DCRYPTO0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DCRYPTO0_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DDMA0_CLK_LSB 0x2 #define GC_PMU_PERIGATEONSLEEPCLR0_DDMA0_CLK_MASK 0x4 #define GC_PMU_PERIGATEONSLEEPCLR0_DDMA0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DDMA0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DDMA0_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DFLASH0_CLK_LSB 0x3 #define GC_PMU_PERIGATEONSLEEPCLR0_DFLASH0_CLK_MASK 0x8 #define GC_PMU_PERIGATEONSLEEPCLR0_DFLASH0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DFLASH0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DFLASH0_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DFUSE0_CLK_LSB 0x4 #define GC_PMU_PERIGATEONSLEEPCLR0_DFUSE0_CLK_MASK 0x10 #define GC_PMU_PERIGATEONSLEEPCLR0_DFUSE0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DFUSE0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DFUSE0_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_LSB 0x5 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_MASK 0x20 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_TIMER_LSB 0x6 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_TIMER_MASK 0x40 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_TIMER_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_HS_LSB 0x7 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_HS_MASK 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DGLOBALSEC_CLK_HS_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO0_CLK_LSB 0x8 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO0_CLK_MASK 0x100 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO0_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO1_CLK_LSB 0x9 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO1_CLK_MASK 0x200 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO1_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO1_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DGPIO1_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C0_CLK_TIMER_LSB 0xa #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C0_CLK_TIMER_MASK 0x400 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C0_CLK_TIMER_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C1_CLK_TIMER_LSB 0xb #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C1_CLK_TIMER_MASK 0x800 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2C1_CLK_TIMER_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2CS0_CLK_LSB 0xc #define GC_PMU_PERIGATEONSLEEPCLR0_DI2CS0_CLK_MASK 0x1000 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2CS0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2CS0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DI2CS0_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DKEYMGR0_CLK_LSB 0xd #define GC_PMU_PERIGATEONSLEEPCLR0_DKEYMGR0_CLK_MASK 0x2000 #define GC_PMU_PERIGATEONSLEEPCLR0_DKEYMGR0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DKEYMGR0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DKEYMGR0_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB0_CLK_LSB 0xe #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB0_CLK_MASK 0x4000 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB0_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB1_CLK_LSB 0xf #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB1_CLK_MASK 0x8000 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB1_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB1_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB1_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_LSB 0x10 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_MASK 0x10000 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_TIMER_LSB 0x11 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_TIMER_MASK 0x20000 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB2_CLK_TIMER_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_LSB 0x12 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_MASK 0x40000 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_HS_LSB 0x13 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_HS_MASK 0x80000 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DPERI_APB3_CLK_HS_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DPINMUX_CLK_LSB 0x14 #define GC_PMU_PERIGATEONSLEEPCLR0_DPINMUX_CLK_MASK 0x100000 #define GC_PMU_PERIGATEONSLEEPCLR0_DPINMUX_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DPINMUX_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DPINMUX_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DPMU_CLK_LSB 0x15 #define GC_PMU_PERIGATEONSLEEPCLR0_DPMU_CLK_MASK 0x200000 #define GC_PMU_PERIGATEONSLEEPCLR0_DPMU_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DPMU_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DPMU_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DRBOX0_CLK_LSB 0x16 #define GC_PMU_PERIGATEONSLEEPCLR0_DRBOX0_CLK_MASK 0x400000 #define GC_PMU_PERIGATEONSLEEPCLR0_DRBOX0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DRBOX0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DRBOX0_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DRDD0_CLK_LSB 0x17 #define GC_PMU_PERIGATEONSLEEPCLR0_DRDD0_CLK_MASK 0x800000 #define GC_PMU_PERIGATEONSLEEPCLR0_DRDD0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DRDD0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DRDD0_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_LSB 0x18 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_MASK 0x1000000 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_TIMER_LSB 0x19 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_TIMER_MASK 0x2000000 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DRTC0_CLK_TIMER_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPI0_CLK_HS_LSB 0x1a #define GC_PMU_PERIGATEONSLEEPCLR0_DSPI0_CLK_HS_MASK 0x4000000 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPI0_CLK_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPI0_CLK_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPI0_CLK_HS_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPI1_CLK_HS_LSB 0x1b #define GC_PMU_PERIGATEONSLEEPCLR0_DSPI1_CLK_HS_MASK 0x8000000 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPI1_CLK_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPI1_CLK_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPI1_CLK_HS_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_LSB 0x1c #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_MASK 0x10000000 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_TIMER_HS_LSB 0x1d #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_TIMER_HS_MASK 0x20000000 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_TIMER_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DSPS0_CLK_TIMER_HS_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DSWDP0_CLK_LSB 0x1e #define GC_PMU_PERIGATEONSLEEPCLR0_DSWDP0_CLK_MASK 0x40000000 #define GC_PMU_PERIGATEONSLEEPCLR0_DSWDP0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DSWDP0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DSWDP0_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPCLR0_DTEMP0_CLK_LSB 0x1f #define GC_PMU_PERIGATEONSLEEPCLR0_DTEMP0_CLK_MASK 0x80000000 #define GC_PMU_PERIGATEONSLEEPCLR0_DTEMP0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR0_DTEMP0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR0_DTEMP0_CLK_OFFSET 0x80 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS0_CLK_TIMER_LSB 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS0_CLK_TIMER_MASK 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS0_CLK_TIMER_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS1_CLK_TIMER_LSB 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS1_CLK_TIMER_MASK 0x2 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEHS1_CLK_TIMER_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMELS0_CLK_LSB 0x2 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMELS0_CLK_MASK 0x4 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMELS0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMELS0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMELS0_CLK_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEUS0_CLK_TIMER_LSB 0x3 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEUS0_CLK_TIMER_MASK 0x8 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEUS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEUS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DTIMEUS0_CLK_TIMER_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_DTRNG0_CLK_LSB 0x4 #define GC_PMU_PERIGATEONSLEEPSET1_DTRNG0_CLK_MASK 0x10 #define GC_PMU_PERIGATEONSLEEPSET1_DTRNG0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DTRNG0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DTRNG0_CLK_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_DUART0_CLK_TIMER_LSB 0x5 #define GC_PMU_PERIGATEONSLEEPSET1_DUART0_CLK_TIMER_MASK 0x20 #define GC_PMU_PERIGATEONSLEEPSET1_DUART0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DUART0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DUART0_CLK_TIMER_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_DUART1_CLK_TIMER_LSB 0x6 #define GC_PMU_PERIGATEONSLEEPSET1_DUART1_CLK_TIMER_MASK 0x40 #define GC_PMU_PERIGATEONSLEEPSET1_DUART1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DUART1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DUART1_CLK_TIMER_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_DUART2_CLK_TIMER_LSB 0x7 #define GC_PMU_PERIGATEONSLEEPSET1_DUART2_CLK_TIMER_MASK 0x80 #define GC_PMU_PERIGATEONSLEEPSET1_DUART2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DUART2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DUART2_CLK_TIMER_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_LSB 0x8 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_MASK 0x100 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_TIMER_HS_LSB 0x9 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_TIMER_HS_MASK 0x200 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_TIMER_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DUSB0_CLK_TIMER_HS_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_DVOLT0_CLK_LSB 0xa #define GC_PMU_PERIGATEONSLEEPSET1_DVOLT0_CLK_MASK 0x400 #define GC_PMU_PERIGATEONSLEEPSET1_DVOLT0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DVOLT0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DVOLT0_CLK_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_DWATCHDOG0_CLK_LSB 0xb #define GC_PMU_PERIGATEONSLEEPSET1_DWATCHDOG0_CLK_MASK 0x800 #define GC_PMU_PERIGATEONSLEEPSET1_DWATCHDOG0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DWATCHDOG0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DWATCHDOG0_CLK_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_LSB 0xc #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_MASK 0x1000 #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_TIMER_LSB 0xd #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_TIMER_MASK 0x2000 #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_DXO0_CLK_TIMER_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MASTER_MATRIX_CLK_LSB 0xe #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MASTER_MATRIX_CLK_MASK 0x4000 #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MASTER_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MASTER_MATRIX_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MASTER_MATRIX_CLK_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MATRIX_CLK_LSB 0xf #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MATRIX_CLK_MASK 0x8000 #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MATRIX_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPSET1_PERI_MATRIX_CLK_OFFSET 0x84 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS0_CLK_TIMER_LSB 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS0_CLK_TIMER_MASK 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS0_CLK_TIMER_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS1_CLK_TIMER_LSB 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS1_CLK_TIMER_MASK 0x2 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEHS1_CLK_TIMER_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMELS0_CLK_LSB 0x2 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMELS0_CLK_MASK 0x4 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMELS0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMELS0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMELS0_CLK_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEUS0_CLK_TIMER_LSB 0x3 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEUS0_CLK_TIMER_MASK 0x8 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEUS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEUS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DTIMEUS0_CLK_TIMER_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_DTRNG0_CLK_LSB 0x4 #define GC_PMU_PERIGATEONSLEEPCLR1_DTRNG0_CLK_MASK 0x10 #define GC_PMU_PERIGATEONSLEEPCLR1_DTRNG0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DTRNG0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DTRNG0_CLK_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART0_CLK_TIMER_LSB 0x5 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART0_CLK_TIMER_MASK 0x20 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART0_CLK_TIMER_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART1_CLK_TIMER_LSB 0x6 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART1_CLK_TIMER_MASK 0x40 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART1_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART1_CLK_TIMER_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART2_CLK_TIMER_LSB 0x7 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART2_CLK_TIMER_MASK 0x80 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART2_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DUART2_CLK_TIMER_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_LSB 0x8 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_MASK 0x100 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_TIMER_HS_LSB 0x9 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_TIMER_HS_MASK 0x200 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_TIMER_HS_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DUSB0_CLK_TIMER_HS_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_DVOLT0_CLK_LSB 0xa #define GC_PMU_PERIGATEONSLEEPCLR1_DVOLT0_CLK_MASK 0x400 #define GC_PMU_PERIGATEONSLEEPCLR1_DVOLT0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DVOLT0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DVOLT0_CLK_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_DWATCHDOG0_CLK_LSB 0xb #define GC_PMU_PERIGATEONSLEEPCLR1_DWATCHDOG0_CLK_MASK 0x800 #define GC_PMU_PERIGATEONSLEEPCLR1_DWATCHDOG0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DWATCHDOG0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DWATCHDOG0_CLK_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_LSB 0xc #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_MASK 0x1000 #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_TIMER_LSB 0xd #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_TIMER_MASK 0x2000 #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_TIMER_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_DXO0_CLK_TIMER_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MASTER_MATRIX_CLK_LSB 0xe #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MASTER_MATRIX_CLK_MASK 0x4000 #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MASTER_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MASTER_MATRIX_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MASTER_MATRIX_CLK_OFFSET 0x88 #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MATRIX_CLK_LSB 0xf #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MATRIX_CLK_MASK 0x8000 #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MATRIX_CLK_SIZE 0x1 #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MATRIX_CLK_DEFAULT 0x0 #define GC_PMU_PERIGATEONSLEEPCLR1_PERI_MATRIX_CLK_OFFSET 0x88 #define GC_PMU_CLK0_HCLKGATEEN_LSB 0x0 #define GC_PMU_CLK0_HCLKGATEEN_MASK 0x1 #define GC_PMU_CLK0_HCLKGATEEN_SIZE 0x1 #define GC_PMU_CLK0_HCLKGATEEN_DEFAULT 0x1 #define GC_PMU_CLK0_HCLKGATEEN_OFFSET 0x8c #define GC_PMU_CLK0_DAPCLKGATEEN_LSB 0x1 #define GC_PMU_CLK0_DAPCLKGATEEN_MASK 0x2 #define GC_PMU_CLK0_DAPCLKGATEEN_SIZE 0x1 #define GC_PMU_CLK0_DAPCLKGATEEN_DEFAULT 0x1 #define GC_PMU_CLK0_DAPCLKGATEEN_OFFSET 0x8c #define GC_PMU_CLK0_TPIUGATEEN_LSB 0x2 #define GC_PMU_CLK0_TPIUGATEEN_MASK 0x4 #define GC_PMU_CLK0_TPIUGATEEN_SIZE 0x1 #define GC_PMU_CLK0_TPIUGATEEN_DEFAULT 0x1 #define GC_PMU_CLK0_TPIUGATEEN_OFFSET 0x8c #define GC_PMU_CLK0_FCLKEN_LSB 0x3 #define GC_PMU_CLK0_FCLKEN_MASK 0x8 #define GC_PMU_CLK0_FCLKEN_SIZE 0x1 #define GC_PMU_CLK0_FCLKEN_DEFAULT 0x1 #define GC_PMU_CLK0_FCLKEN_OFFSET 0x8c #define GC_PMU_CLK0_DAPCLKEN_LSB 0x4 #define GC_PMU_CLK0_DAPCLKEN_MASK 0x10 #define GC_PMU_CLK0_DAPCLKEN_SIZE 0x1 #define GC_PMU_CLK0_DAPCLKEN_DEFAULT 0x1 #define GC_PMU_CLK0_DAPCLKEN_OFFSET 0x8c #define GC_PMU_CLK0_TPIUCLKEN_LSB 0x5 #define GC_PMU_CLK0_TPIUCLKEN_MASK 0x20 #define GC_PMU_CLK0_TPIUCLKEN_SIZE 0x1 #define GC_PMU_CLK0_TPIUCLKEN_DEFAULT 0x0 #define GC_PMU_CLK0_TPIUCLKEN_OFFSET 0x8c #define GC_PMU_CLK0_TRACECLKEN_LSB 0x6 #define GC_PMU_CLK0_TRACECLKEN_MASK 0x40 #define GC_PMU_CLK0_TRACECLKEN_SIZE 0x1 #define GC_PMU_CLK0_TRACECLKEN_DEFAULT 0x0 #define GC_PMU_CLK0_TRACECLKEN_OFFSET 0x8c #define GC_PMU_RST0_DCAMO0_AON_LSB 0x0 #define GC_PMU_RST0_DCAMO0_AON_MASK 0x1 #define GC_PMU_RST0_DCAMO0_AON_SIZE 0x1 #define GC_PMU_RST0_DCAMO0_AON_DEFAULT 0x0 #define GC_PMU_RST0_DCAMO0_AON_OFFSET 0x94 #define GC_PMU_RST0_DCRYPTO0_LSB 0x1 #define GC_PMU_RST0_DCRYPTO0_MASK 0x2 #define GC_PMU_RST0_DCRYPTO0_SIZE 0x1 #define GC_PMU_RST0_DCRYPTO0_DEFAULT 0x0 #define GC_PMU_RST0_DCRYPTO0_OFFSET 0x94 #define GC_PMU_RST0_DDMA0_LSB 0x2 #define GC_PMU_RST0_DDMA0_MASK 0x4 #define GC_PMU_RST0_DDMA0_SIZE 0x1 #define GC_PMU_RST0_DDMA0_DEFAULT 0x0 #define GC_PMU_RST0_DDMA0_OFFSET 0x94 #define GC_PMU_RST0_DFLASH0_LSB 0x3 #define GC_PMU_RST0_DFLASH0_MASK 0x8 #define GC_PMU_RST0_DFLASH0_SIZE 0x1 #define GC_PMU_RST0_DFLASH0_DEFAULT 0x0 #define GC_PMU_RST0_DFLASH0_OFFSET 0x94 #define GC_PMU_RST0_DFUSE0_LSB 0x4 #define GC_PMU_RST0_DFUSE0_MASK 0x10 #define GC_PMU_RST0_DFUSE0_SIZE 0x1 #define GC_PMU_RST0_DFUSE0_DEFAULT 0x0 #define GC_PMU_RST0_DFUSE0_OFFSET 0x94 #define GC_PMU_RST0_DGLOBALSEC_LSB 0x5 #define GC_PMU_RST0_DGLOBALSEC_MASK 0x20 #define GC_PMU_RST0_DGLOBALSEC_SIZE 0x1 #define GC_PMU_RST0_DGLOBALSEC_DEFAULT 0x0 #define GC_PMU_RST0_DGLOBALSEC_OFFSET 0x94 #define GC_PMU_RST0_DGLOBALSEC_CLK_TIMER_LSB 0x6 #define GC_PMU_RST0_DGLOBALSEC_CLK_TIMER_MASK 0x40 #define GC_PMU_RST0_DGLOBALSEC_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST0_DGLOBALSEC_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST0_DGLOBALSEC_CLK_TIMER_OFFSET 0x94 #define GC_PMU_RST0_DGLOBALSEC_CLK_HS_LSB 0x7 #define GC_PMU_RST0_DGLOBALSEC_CLK_HS_MASK 0x80 #define GC_PMU_RST0_DGLOBALSEC_CLK_HS_SIZE 0x1 #define GC_PMU_RST0_DGLOBALSEC_CLK_HS_DEFAULT 0x0 #define GC_PMU_RST0_DGLOBALSEC_CLK_HS_OFFSET 0x94 #define GC_PMU_RST0_DGPIO0_LSB 0x8 #define GC_PMU_RST0_DGPIO0_MASK 0x100 #define GC_PMU_RST0_DGPIO0_SIZE 0x1 #define GC_PMU_RST0_DGPIO0_DEFAULT 0x0 #define GC_PMU_RST0_DGPIO0_OFFSET 0x94 #define GC_PMU_RST0_DGPIO1_LSB 0x9 #define GC_PMU_RST0_DGPIO1_MASK 0x200 #define GC_PMU_RST0_DGPIO1_SIZE 0x1 #define GC_PMU_RST0_DGPIO1_DEFAULT 0x0 #define GC_PMU_RST0_DGPIO1_OFFSET 0x94 #define GC_PMU_RST0_DI2C0_CLK_TIMER_LSB 0xa #define GC_PMU_RST0_DI2C0_CLK_TIMER_MASK 0x400 #define GC_PMU_RST0_DI2C0_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST0_DI2C0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST0_DI2C0_CLK_TIMER_OFFSET 0x94 #define GC_PMU_RST0_DI2C1_CLK_TIMER_LSB 0xb #define GC_PMU_RST0_DI2C1_CLK_TIMER_MASK 0x800 #define GC_PMU_RST0_DI2C1_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST0_DI2C1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST0_DI2C1_CLK_TIMER_OFFSET 0x94 #define GC_PMU_RST0_DI2CS0_LSB 0xc #define GC_PMU_RST0_DI2CS0_MASK 0x1000 #define GC_PMU_RST0_DI2CS0_SIZE 0x1 #define GC_PMU_RST0_DI2CS0_DEFAULT 0x0 #define GC_PMU_RST0_DI2CS0_OFFSET 0x94 #define GC_PMU_RST0_DKEYMGR0_LSB 0xd #define GC_PMU_RST0_DKEYMGR0_MASK 0x2000 #define GC_PMU_RST0_DKEYMGR0_SIZE 0x1 #define GC_PMU_RST0_DKEYMGR0_DEFAULT 0x0 #define GC_PMU_RST0_DKEYMGR0_OFFSET 0x94 #define GC_PMU_RST0_DPERI_APB0_LSB 0xe #define GC_PMU_RST0_DPERI_APB0_MASK 0x4000 #define GC_PMU_RST0_DPERI_APB0_SIZE 0x1 #define GC_PMU_RST0_DPERI_APB0_DEFAULT 0x0 #define GC_PMU_RST0_DPERI_APB0_OFFSET 0x94 #define GC_PMU_RST0_DPERI_APB1_LSB 0xf #define GC_PMU_RST0_DPERI_APB1_MASK 0x8000 #define GC_PMU_RST0_DPERI_APB1_SIZE 0x1 #define GC_PMU_RST0_DPERI_APB1_DEFAULT 0x0 #define GC_PMU_RST0_DPERI_APB1_OFFSET 0x94 #define GC_PMU_RST0_DPERI_APB2_LSB 0x10 #define GC_PMU_RST0_DPERI_APB2_MASK 0x10000 #define GC_PMU_RST0_DPERI_APB2_SIZE 0x1 #define GC_PMU_RST0_DPERI_APB2_DEFAULT 0x0 #define GC_PMU_RST0_DPERI_APB2_OFFSET 0x94 #define GC_PMU_RST0_DPERI_APB2_CLK_TIMER_LSB 0x11 #define GC_PMU_RST0_DPERI_APB2_CLK_TIMER_MASK 0x20000 #define GC_PMU_RST0_DPERI_APB2_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST0_DPERI_APB2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST0_DPERI_APB2_CLK_TIMER_OFFSET 0x94 #define GC_PMU_RST0_DPERI_APB3_LSB 0x12 #define GC_PMU_RST0_DPERI_APB3_MASK 0x40000 #define GC_PMU_RST0_DPERI_APB3_SIZE 0x1 #define GC_PMU_RST0_DPERI_APB3_DEFAULT 0x0 #define GC_PMU_RST0_DPERI_APB3_OFFSET 0x94 #define GC_PMU_RST0_DPERI_APB3_CLK_HS_LSB 0x13 #define GC_PMU_RST0_DPERI_APB3_CLK_HS_MASK 0x80000 #define GC_PMU_RST0_DPERI_APB3_CLK_HS_SIZE 0x1 #define GC_PMU_RST0_DPERI_APB3_CLK_HS_DEFAULT 0x0 #define GC_PMU_RST0_DPERI_APB3_CLK_HS_OFFSET 0x94 #define GC_PMU_RST0_DPINMUX_AON_LSB 0x14 #define GC_PMU_RST0_DPINMUX_AON_MASK 0x100000 #define GC_PMU_RST0_DPINMUX_AON_SIZE 0x1 #define GC_PMU_RST0_DPINMUX_AON_DEFAULT 0x0 #define GC_PMU_RST0_DPINMUX_AON_OFFSET 0x94 #define GC_PMU_RST0_DPMU_AON_LSB 0x15 #define GC_PMU_RST0_DPMU_AON_MASK 0x200000 #define GC_PMU_RST0_DPMU_AON_SIZE 0x1 #define GC_PMU_RST0_DPMU_AON_DEFAULT 0x0 #define GC_PMU_RST0_DPMU_AON_OFFSET 0x94 #define GC_PMU_RST0_DRBOX0_AON_LSB 0x16 #define GC_PMU_RST0_DRBOX0_AON_MASK 0x400000 #define GC_PMU_RST0_DRBOX0_AON_SIZE 0x1 #define GC_PMU_RST0_DRBOX0_AON_DEFAULT 0x0 #define GC_PMU_RST0_DRBOX0_AON_OFFSET 0x94 #define GC_PMU_RST0_DRDD0_AON_LSB 0x17 #define GC_PMU_RST0_DRDD0_AON_MASK 0x800000 #define GC_PMU_RST0_DRDD0_AON_SIZE 0x1 #define GC_PMU_RST0_DRDD0_AON_DEFAULT 0x0 #define GC_PMU_RST0_DRDD0_AON_OFFSET 0x94 #define GC_PMU_RST0_DRTC0_AON_LSB 0x18 #define GC_PMU_RST0_DRTC0_AON_MASK 0x1000000 #define GC_PMU_RST0_DRTC0_AON_SIZE 0x1 #define GC_PMU_RST0_DRTC0_AON_DEFAULT 0x0 #define GC_PMU_RST0_DRTC0_AON_OFFSET 0x94 #define GC_PMU_RST0_DRTC0_CLK_TIMER_AON_LSB 0x19 #define GC_PMU_RST0_DRTC0_CLK_TIMER_AON_MASK 0x2000000 #define GC_PMU_RST0_DRTC0_CLK_TIMER_AON_SIZE 0x1 #define GC_PMU_RST0_DRTC0_CLK_TIMER_AON_DEFAULT 0x0 #define GC_PMU_RST0_DRTC0_CLK_TIMER_AON_OFFSET 0x94 #define GC_PMU_RST0_DSPI0_CLK_HS_LSB 0x1a #define GC_PMU_RST0_DSPI0_CLK_HS_MASK 0x4000000 #define GC_PMU_RST0_DSPI0_CLK_HS_SIZE 0x1 #define GC_PMU_RST0_DSPI0_CLK_HS_DEFAULT 0x0 #define GC_PMU_RST0_DSPI0_CLK_HS_OFFSET 0x94 #define GC_PMU_RST0_DSPI1_CLK_HS_LSB 0x1b #define GC_PMU_RST0_DSPI1_CLK_HS_MASK 0x8000000 #define GC_PMU_RST0_DSPI1_CLK_HS_SIZE 0x1 #define GC_PMU_RST0_DSPI1_CLK_HS_DEFAULT 0x0 #define GC_PMU_RST0_DSPI1_CLK_HS_OFFSET 0x94 #define GC_PMU_RST0_DSPS0_LSB 0x1c #define GC_PMU_RST0_DSPS0_MASK 0x10000000 #define GC_PMU_RST0_DSPS0_SIZE 0x1 #define GC_PMU_RST0_DSPS0_DEFAULT 0x0 #define GC_PMU_RST0_DSPS0_OFFSET 0x94 #define GC_PMU_RST0_DSPS0_CLK_TIMER_HS_LSB 0x1d #define GC_PMU_RST0_DSPS0_CLK_TIMER_HS_MASK 0x20000000 #define GC_PMU_RST0_DSPS0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_RST0_DSPS0_CLK_TIMER_HS_DEFAULT 0x0 #define GC_PMU_RST0_DSPS0_CLK_TIMER_HS_OFFSET 0x94 #define GC_PMU_RST0_DSWDP0_LSB 0x1e #define GC_PMU_RST0_DSWDP0_MASK 0x40000000 #define GC_PMU_RST0_DSWDP0_SIZE 0x1 #define GC_PMU_RST0_DSWDP0_DEFAULT 0x0 #define GC_PMU_RST0_DSWDP0_OFFSET 0x94 #define GC_PMU_RST0_DTEMP0_LSB 0x1f #define GC_PMU_RST0_DTEMP0_MASK 0x80000000 #define GC_PMU_RST0_DTEMP0_SIZE 0x1 #define GC_PMU_RST0_DTEMP0_DEFAULT 0x0 #define GC_PMU_RST0_DTEMP0_OFFSET 0x94 #define GC_PMU_RST1_DTIMEHS0_CLK_TIMER_LSB 0x0 #define GC_PMU_RST1_DTIMEHS0_CLK_TIMER_MASK 0x1 #define GC_PMU_RST1_DTIMEHS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST1_DTIMEHS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST1_DTIMEHS0_CLK_TIMER_OFFSET 0x9c #define GC_PMU_RST1_DTIMEHS1_CLK_TIMER_LSB 0x1 #define GC_PMU_RST1_DTIMEHS1_CLK_TIMER_MASK 0x2 #define GC_PMU_RST1_DTIMEHS1_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST1_DTIMEHS1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST1_DTIMEHS1_CLK_TIMER_OFFSET 0x9c #define GC_PMU_RST1_DTIMELS0_AON_LSB 0x2 #define GC_PMU_RST1_DTIMELS0_AON_MASK 0x4 #define GC_PMU_RST1_DTIMELS0_AON_SIZE 0x1 #define GC_PMU_RST1_DTIMELS0_AON_DEFAULT 0x0 #define GC_PMU_RST1_DTIMELS0_AON_OFFSET 0x9c #define GC_PMU_RST1_DTIMEUS0_CLK_TIMER_LSB 0x3 #define GC_PMU_RST1_DTIMEUS0_CLK_TIMER_MASK 0x8 #define GC_PMU_RST1_DTIMEUS0_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST1_DTIMEUS0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST1_DTIMEUS0_CLK_TIMER_OFFSET 0x9c #define GC_PMU_RST1_DTRNG0_LSB 0x4 #define GC_PMU_RST1_DTRNG0_MASK 0x10 #define GC_PMU_RST1_DTRNG0_SIZE 0x1 #define GC_PMU_RST1_DTRNG0_DEFAULT 0x0 #define GC_PMU_RST1_DTRNG0_OFFSET 0x9c #define GC_PMU_RST1_DUART0_CLK_TIMER_LSB 0x5 #define GC_PMU_RST1_DUART0_CLK_TIMER_MASK 0x20 #define GC_PMU_RST1_DUART0_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST1_DUART0_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST1_DUART0_CLK_TIMER_OFFSET 0x9c #define GC_PMU_RST1_DUART1_CLK_TIMER_LSB 0x6 #define GC_PMU_RST1_DUART1_CLK_TIMER_MASK 0x40 #define GC_PMU_RST1_DUART1_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST1_DUART1_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST1_DUART1_CLK_TIMER_OFFSET 0x9c #define GC_PMU_RST1_DUART2_CLK_TIMER_LSB 0x7 #define GC_PMU_RST1_DUART2_CLK_TIMER_MASK 0x80 #define GC_PMU_RST1_DUART2_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST1_DUART2_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST1_DUART2_CLK_TIMER_OFFSET 0x9c #define GC_PMU_RST1_DUSB0_LSB 0x8 #define GC_PMU_RST1_DUSB0_MASK 0x100 #define GC_PMU_RST1_DUSB0_SIZE 0x1 #define GC_PMU_RST1_DUSB0_DEFAULT 0x0 #define GC_PMU_RST1_DUSB0_OFFSET 0x9c #define GC_PMU_RST1_DUSB0_AON_LSB 0x9 #define GC_PMU_RST1_DUSB0_AON_MASK 0x200 #define GC_PMU_RST1_DUSB0_AON_SIZE 0x1 #define GC_PMU_RST1_DUSB0_AON_DEFAULT 0x0 #define GC_PMU_RST1_DUSB0_AON_OFFSET 0x9c #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_LSB 0xa #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_MASK 0x400 #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_SIZE 0x1 #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_DEFAULT 0x0 #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_OFFSET 0x9c #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_AON_LSB 0xb #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_AON_MASK 0x800 #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_AON_SIZE 0x1 #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_AON_DEFAULT 0x0 #define GC_PMU_RST1_DUSB0_CLK_TIMER_HS_AON_OFFSET 0x9c #define GC_PMU_RST1_DVOLT0_LSB 0xc #define GC_PMU_RST1_DVOLT0_MASK 0x1000 #define GC_PMU_RST1_DVOLT0_SIZE 0x1 #define GC_PMU_RST1_DVOLT0_DEFAULT 0x0 #define GC_PMU_RST1_DVOLT0_OFFSET 0x9c #define GC_PMU_RST1_DWATCHDOG0_LSB 0xd #define GC_PMU_RST1_DWATCHDOG0_MASK 0x2000 #define GC_PMU_RST1_DWATCHDOG0_SIZE 0x1 #define GC_PMU_RST1_DWATCHDOG0_DEFAULT 0x0 #define GC_PMU_RST1_DWATCHDOG0_OFFSET 0x9c #define GC_PMU_RST1_DXO0_AON_LSB 0xe #define GC_PMU_RST1_DXO0_AON_MASK 0x4000 #define GC_PMU_RST1_DXO0_AON_SIZE 0x1 #define GC_PMU_RST1_DXO0_AON_DEFAULT 0x0 #define GC_PMU_RST1_DXO0_AON_OFFSET 0x9c #define GC_PMU_RST1_DXO0_CLK_TIMER_AON_LSB 0xf #define GC_PMU_RST1_DXO0_CLK_TIMER_AON_MASK 0x8000 #define GC_PMU_RST1_DXO0_CLK_TIMER_AON_SIZE 0x1 #define GC_PMU_RST1_DXO0_CLK_TIMER_AON_DEFAULT 0x0 #define GC_PMU_RST1_DXO0_CLK_TIMER_AON_OFFSET 0x9c #define GC_PMU_RST1_PERI_MASTER_MATRIX_LSB 0x10 #define GC_PMU_RST1_PERI_MASTER_MATRIX_MASK 0x10000 #define GC_PMU_RST1_PERI_MASTER_MATRIX_SIZE 0x1 #define GC_PMU_RST1_PERI_MASTER_MATRIX_DEFAULT 0x0 #define GC_PMU_RST1_PERI_MASTER_MATRIX_OFFSET 0x9c #define GC_PMU_RST1_PERI_MATRIX_LSB 0x11 #define GC_PMU_RST1_PERI_MATRIX_MASK 0x20000 #define GC_PMU_RST1_PERI_MATRIX_SIZE 0x1 #define GC_PMU_RST1_PERI_MATRIX_DEFAULT 0x0 #define GC_PMU_RST1_PERI_MATRIX_OFFSET 0x9c #define GC_PMU_RST1_SEC_FABRIC_LSB 0x12 #define GC_PMU_RST1_SEC_FABRIC_MASK 0x40000 #define GC_PMU_RST1_SEC_FABRIC_SIZE 0x1 #define GC_PMU_RST1_SEC_FABRIC_DEFAULT 0x0 #define GC_PMU_RST1_SEC_FABRIC_OFFSET 0x9c #define GC_PMU_RST1_SEC_FABRIC_CLK_TIMER_LSB 0x13 #define GC_PMU_RST1_SEC_FABRIC_CLK_TIMER_MASK 0x80000 #define GC_PMU_RST1_SEC_FABRIC_CLK_TIMER_SIZE 0x1 #define GC_PMU_RST1_SEC_FABRIC_CLK_TIMER_DEFAULT 0x0 #define GC_PMU_RST1_SEC_FABRIC_CLK_TIMER_OFFSET 0x9c #define GC_PMU_RST1_SEC_FABRIC_CLK_HS_LSB 0x14 #define GC_PMU_RST1_SEC_FABRIC_CLK_HS_MASK 0x100000 #define GC_PMU_RST1_SEC_FABRIC_CLK_HS_SIZE 0x1 #define GC_PMU_RST1_SEC_FABRIC_CLK_HS_DEFAULT 0x0 #define GC_PMU_RST1_SEC_FABRIC_CLK_HS_OFFSET 0x9c #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG0_LSB 0x0 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG0_MASK 0x1 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG0_SIZE 0x1 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG0_DEFAULT 0x0 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG0_OFFSET 0x128 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG1_LSB 0x1 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG1_MASK 0x2 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG1_SIZE 0x1 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG1_DEFAULT 0x0 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG1_OFFSET 0x128 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG2_LSB 0x2 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG2_MASK 0x4 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG2_SIZE 0x1 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG2_DEFAULT 0x0 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG2_OFFSET 0x128 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG3_LSB 0x3 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG3_MASK 0x8 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG3_SIZE 0x1 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG3_DEFAULT 0x0 #define GC_PMU_LONG_LIFE_SCRATCH_WR_EN_REG3_OFFSET 0x128 #define GC_PMU_INT_ENABLE_INTR_WAKEUP_LSB 0x0 #define GC_PMU_INT_ENABLE_INTR_WAKEUP_MASK 0x1 #define GC_PMU_INT_ENABLE_INTR_WAKEUP_SIZE 0x1 #define GC_PMU_INT_ENABLE_INTR_WAKEUP_DEFAULT 0x0 #define GC_PMU_INT_ENABLE_INTR_WAKEUP_OFFSET 0x13c #define GC_PMU_INT_STATE_INTR_WAKEUP_LSB 0x0 #define GC_PMU_INT_STATE_INTR_WAKEUP_MASK 0x1 #define GC_PMU_INT_STATE_INTR_WAKEUP_SIZE 0x1 #define GC_PMU_INT_STATE_INTR_WAKEUP_DEFAULT 0x0 #define GC_PMU_INT_STATE_INTR_WAKEUP_OFFSET 0x140 #define GC_PMU_INT_TEST_INTR_WAKEUP_LSB 0x0 #define GC_PMU_INT_TEST_INTR_WAKEUP_MASK 0x1 #define GC_PMU_INT_TEST_INTR_WAKEUP_SIZE 0x1 #define GC_PMU_INT_TEST_INTR_WAKEUP_DEFAULT 0x0 #define GC_PMU_INT_TEST_INTR_WAKEUP_OFFSET 0x144 #define GC_PMU_ANTEST_TOP_CTRL_ATEST_PAD_ENB_LSB 0x0 #define GC_PMU_ANTEST_TOP_CTRL_ATEST_PAD_ENB_MASK 0x1 #define GC_PMU_ANTEST_TOP_CTRL_ATEST_PAD_ENB_SIZE 0x1 #define GC_PMU_ANTEST_TOP_CTRL_ATEST_PAD_ENB_DEFAULT 0x1 #define GC_PMU_ANTEST_TOP_CTRL_ATEST_PAD_ENB_OFFSET 0x1008 #define GC_PMU_ANTEST_TOP_CTRL_ATEST_CLAMP_EN_LSB 0x1 #define GC_PMU_ANTEST_TOP_CTRL_ATEST_CLAMP_EN_MASK 0x2 #define GC_PMU_ANTEST_TOP_CTRL_ATEST_CLAMP_EN_SIZE 0x1 #define GC_PMU_ANTEST_TOP_CTRL_ATEST_CLAMP_EN_DEFAULT 0x1 #define GC_PMU_ANTEST_TOP_CTRL_ATEST_CLAMP_EN_OFFSET 0x1008 #define GC_PMU_CHIP_ID_JTAG_STANDARD_LSB 0x0 #define GC_PMU_CHIP_ID_JTAG_STANDARD_MASK 0x1 #define GC_PMU_CHIP_ID_JTAG_STANDARD_SIZE 0x1 #define GC_PMU_CHIP_ID_JTAG_STANDARD_DEFAULT 0x1 #define GC_PMU_CHIP_ID_JTAG_STANDARD_OFFSET 0x1fff8 #define GC_PMU_CHIP_ID_MFG_ID_LSB 0x1 #define GC_PMU_CHIP_ID_MFG_ID_MASK 0xffe #define GC_PMU_CHIP_ID_MFG_ID_SIZE 0xb #define GC_PMU_CHIP_ID_MFG_ID_DEFAULT 0x4a6 #define GC_PMU_CHIP_ID_MFG_ID_OFFSET 0x1fff8 #define GC_PMU_CHIP_ID_PART_NUM_LSB 0xc #define GC_PMU_CHIP_ID_PART_NUM_MASK 0xffff000 #define GC_PMU_CHIP_ID_PART_NUM_SIZE 0x10 #define GC_PMU_CHIP_ID_PART_NUM_DEFAULT 0x4856 #define GC_PMU_CHIP_ID_PART_NUM_OFFSET 0x1fff8 #define GC_PMU_CHIP_ID_REVISION_LSB 0x1c #define GC_PMU_CHIP_ID_REVISION_MASK 0xf0000000 #define GC_PMU_CHIP_ID_REVISION_SIZE 0x4 #define GC_PMU_CHIP_ID_REVISION_DEFAULT 0x1 #define GC_PMU_CHIP_ID_REVISION_OFFSET 0x1fff8 #define GC_PMU_VERSION_CHANGE_LSB 0x0 #define GC_PMU_VERSION_CHANGE_MASK 0xffffff #define GC_PMU_VERSION_CHANGE_SIZE 0x18 #define GC_PMU_VERSION_CHANGE_DEFAULT 0x11f6d #define GC_PMU_VERSION_CHANGE_OFFSET 0x1fffc #define GC_PMU_VERSION_REVISION_LSB 0x18 #define GC_PMU_VERSION_REVISION_MASK 0xff000000 #define GC_PMU_VERSION_REVISION_SIZE 0x8 #define GC_PMU_VERSION_REVISION_DEFAULT 0x24 #define GC_PMU_VERSION_REVISION_OFFSET 0x1fffc #define GC_RBOX_INT_ENABLE_INTR_AC_PRESENT_RED_LSB 0x0 #define GC_RBOX_INT_ENABLE_INTR_AC_PRESENT_RED_MASK 0x1 #define GC_RBOX_INT_ENABLE_INTR_AC_PRESENT_RED_SIZE 0x1 #define GC_RBOX_INT_ENABLE_INTR_AC_PRESENT_RED_DEFAULT 0x0 #define GC_RBOX_INT_ENABLE_INTR_AC_PRESENT_RED_OFFSET 0x0 #define GC_RBOX_INT_ENABLE_INTR_AC_PRESENT_FED_LSB 0x1 #define GC_RBOX_INT_ENABLE_INTR_AC_PRESENT_FED_MASK 0x2 #define GC_RBOX_INT_ENABLE_INTR_AC_PRESENT_FED_SIZE 0x1 #define GC_RBOX_INT_ENABLE_INTR_AC_PRESENT_FED_DEFAULT 0x0 #define GC_RBOX_INT_ENABLE_INTR_AC_PRESENT_FED_OFFSET 0x0 #define GC_RBOX_INT_ENABLE_INTR_ENTERING_RW_RED_LSB 0x2 #define GC_RBOX_INT_ENABLE_INTR_ENTERING_RW_RED_MASK 0x4 #define GC_RBOX_INT_ENABLE_INTR_ENTERING_RW_RED_SIZE 0x1 #define GC_RBOX_INT_ENABLE_INTR_ENTERING_RW_RED_DEFAULT 0x0 #define GC_RBOX_INT_ENABLE_INTR_ENTERING_RW_RED_OFFSET 0x0 #define GC_RBOX_INT_ENABLE_INTR_ENTERING_RW_FED_LSB 0x3 #define GC_RBOX_INT_ENABLE_INTR_ENTERING_RW_FED_MASK 0x8 #define GC_RBOX_INT_ENABLE_INTR_ENTERING_RW_FED_SIZE 0x1 #define GC_RBOX_INT_ENABLE_INTR_ENTERING_RW_FED_DEFAULT 0x0 #define GC_RBOX_INT_ENABLE_INTR_ENTERING_RW_FED_OFFSET 0x0 #define GC_RBOX_INT_ENABLE_INTR_PWRB_IN_RED_LSB 0x4 #define GC_RBOX_INT_ENABLE_INTR_PWRB_IN_RED_MASK 0x10 #define GC_RBOX_INT_ENABLE_INTR_PWRB_IN_RED_SIZE 0x1 #define GC_RBOX_INT_ENABLE_INTR_PWRB_IN_RED_DEFAULT 0x0 #define GC_RBOX_INT_ENABLE_INTR_PWRB_IN_RED_OFFSET 0x0 #define GC_RBOX_INT_ENABLE_INTR_PWRB_IN_FED_LSB 0x5 #define GC_RBOX_INT_ENABLE_INTR_PWRB_IN_FED_MASK 0x20 #define GC_RBOX_INT_ENABLE_INTR_PWRB_IN_FED_SIZE 0x1 #define GC_RBOX_INT_ENABLE_INTR_PWRB_IN_FED_DEFAULT 0x0 #define GC_RBOX_INT_ENABLE_INTR_PWRB_IN_FED_OFFSET 0x0 #define GC_RBOX_INT_ENABLE_INTR_KEY0_IN_RED_LSB 0x6 #define GC_RBOX_INT_ENABLE_INTR_KEY0_IN_RED_MASK 0x40 #define GC_RBOX_INT_ENABLE_INTR_KEY0_IN_RED_SIZE 0x1 #define GC_RBOX_INT_ENABLE_INTR_KEY0_IN_RED_DEFAULT 0x0 #define GC_RBOX_INT_ENABLE_INTR_KEY0_IN_RED_OFFSET 0x0 #define GC_RBOX_INT_ENABLE_INTR_KEY0_IN_FED_LSB 0x7 #define GC_RBOX_INT_ENABLE_INTR_KEY0_IN_FED_MASK 0x80 #define GC_RBOX_INT_ENABLE_INTR_KEY0_IN_FED_SIZE 0x1 #define GC_RBOX_INT_ENABLE_INTR_KEY0_IN_FED_DEFAULT 0x0 #define GC_RBOX_INT_ENABLE_INTR_KEY0_IN_FED_OFFSET 0x0 #define GC_RBOX_INT_ENABLE_INTR_KEY1_IN_RED_LSB 0x8 #define GC_RBOX_INT_ENABLE_INTR_KEY1_IN_RED_MASK 0x100 #define GC_RBOX_INT_ENABLE_INTR_KEY1_IN_RED_SIZE 0x1 #define GC_RBOX_INT_ENABLE_INTR_KEY1_IN_RED_DEFAULT 0x0 #define GC_RBOX_INT_ENABLE_INTR_KEY1_IN_RED_OFFSET 0x0 #define GC_RBOX_INT_ENABLE_INTR_KEY1_IN_FED_LSB 0x9 #define GC_RBOX_INT_ENABLE_INTR_KEY1_IN_FED_MASK 0x200 #define GC_RBOX_INT_ENABLE_INTR_KEY1_IN_FED_SIZE 0x1 #define GC_RBOX_INT_ENABLE_INTR_KEY1_IN_FED_DEFAULT 0x0 #define GC_RBOX_INT_ENABLE_INTR_KEY1_IN_FED_OFFSET 0x0 #define GC_RBOX_INT_ENABLE_INTR_EC_RST_RED_LSB 0xa #define GC_RBOX_INT_ENABLE_INTR_EC_RST_RED_MASK 0x400 #define GC_RBOX_INT_ENABLE_INTR_EC_RST_RED_SIZE 0x1 #define GC_RBOX_INT_ENABLE_INTR_EC_RST_RED_DEFAULT 0x0 #define GC_RBOX_INT_ENABLE_INTR_EC_RST_RED_OFFSET 0x0 #define GC_RBOX_INT_ENABLE_INTR_EC_RST_FED_LSB 0xb #define GC_RBOX_INT_ENABLE_INTR_EC_RST_FED_MASK 0x800 #define GC_RBOX_INT_ENABLE_INTR_EC_RST_FED_SIZE 0x1 #define GC_RBOX_INT_ENABLE_INTR_EC_RST_FED_DEFAULT 0x0 #define GC_RBOX_INT_ENABLE_INTR_EC_RST_FED_OFFSET 0x0 #define GC_RBOX_INT_ENABLE_INTR_BUTTON_COMBO0_RDY_LSB 0xc #define GC_RBOX_INT_ENABLE_INTR_BUTTON_COMBO0_RDY_MASK 0x1000 #define GC_RBOX_INT_ENABLE_INTR_BUTTON_COMBO0_RDY_SIZE 0x1 #define GC_RBOX_INT_ENABLE_INTR_BUTTON_COMBO0_RDY_DEFAULT 0x0 #define GC_RBOX_INT_ENABLE_INTR_BUTTON_COMBO0_RDY_OFFSET 0x0 #define GC_RBOX_INT_ENABLE_INTR_BUTTON_COMBO1_RDY_LSB 0xd #define GC_RBOX_INT_ENABLE_INTR_BUTTON_COMBO1_RDY_MASK 0x2000 #define GC_RBOX_INT_ENABLE_INTR_BUTTON_COMBO1_RDY_SIZE 0x1 #define GC_RBOX_INT_ENABLE_INTR_BUTTON_COMBO1_RDY_DEFAULT 0x0 #define GC_RBOX_INT_ENABLE_INTR_BUTTON_COMBO1_RDY_OFFSET 0x0 #define GC_RBOX_INT_ENABLE_INTR_BUTTON_COMBO2_RDY_LSB 0xe #define GC_RBOX_INT_ENABLE_INTR_BUTTON_COMBO2_RDY_MASK 0x4000 #define GC_RBOX_INT_ENABLE_INTR_BUTTON_COMBO2_RDY_SIZE 0x1 #define GC_RBOX_INT_ENABLE_INTR_BUTTON_COMBO2_RDY_DEFAULT 0x0 #define GC_RBOX_INT_ENABLE_INTR_BUTTON_COMBO2_RDY_OFFSET 0x0 #define GC_RBOX_INT_STATE_INTR_AC_PRESENT_RED_LSB 0x0 #define GC_RBOX_INT_STATE_INTR_AC_PRESENT_RED_MASK 0x1 #define GC_RBOX_INT_STATE_INTR_AC_PRESENT_RED_SIZE 0x1 #define GC_RBOX_INT_STATE_INTR_AC_PRESENT_RED_DEFAULT 0x0 #define GC_RBOX_INT_STATE_INTR_AC_PRESENT_RED_OFFSET 0x4 #define GC_RBOX_INT_STATE_INTR_AC_PRESENT_FED_LSB 0x1 #define GC_RBOX_INT_STATE_INTR_AC_PRESENT_FED_MASK 0x2 #define GC_RBOX_INT_STATE_INTR_AC_PRESENT_FED_SIZE 0x1 #define GC_RBOX_INT_STATE_INTR_AC_PRESENT_FED_DEFAULT 0x0 #define GC_RBOX_INT_STATE_INTR_AC_PRESENT_FED_OFFSET 0x4 #define GC_RBOX_INT_STATE_INTR_ENTERING_RW_RED_LSB 0x2 #define GC_RBOX_INT_STATE_INTR_ENTERING_RW_RED_MASK 0x4 #define GC_RBOX_INT_STATE_INTR_ENTERING_RW_RED_SIZE 0x1 #define GC_RBOX_INT_STATE_INTR_ENTERING_RW_RED_DEFAULT 0x0 #define GC_RBOX_INT_STATE_INTR_ENTERING_RW_RED_OFFSET 0x4 #define GC_RBOX_INT_STATE_INTR_ENTERING_RW_FED_LSB 0x3 #define GC_RBOX_INT_STATE_INTR_ENTERING_RW_FED_MASK 0x8 #define GC_RBOX_INT_STATE_INTR_ENTERING_RW_FED_SIZE 0x1 #define GC_RBOX_INT_STATE_INTR_ENTERING_RW_FED_DEFAULT 0x0 #define GC_RBOX_INT_STATE_INTR_ENTERING_RW_FED_OFFSET 0x4 #define GC_RBOX_INT_STATE_INTR_PWRB_IN_RED_LSB 0x4 #define GC_RBOX_INT_STATE_INTR_PWRB_IN_RED_MASK 0x10 #define GC_RBOX_INT_STATE_INTR_PWRB_IN_RED_SIZE 0x1 #define GC_RBOX_INT_STATE_INTR_PWRB_IN_RED_DEFAULT 0x0 #define GC_RBOX_INT_STATE_INTR_PWRB_IN_RED_OFFSET 0x4 #define GC_RBOX_INT_STATE_INTR_PWRB_IN_FED_LSB 0x5 #define GC_RBOX_INT_STATE_INTR_PWRB_IN_FED_MASK 0x20 #define GC_RBOX_INT_STATE_INTR_PWRB_IN_FED_SIZE 0x1 #define GC_RBOX_INT_STATE_INTR_PWRB_IN_FED_DEFAULT 0x0 #define GC_RBOX_INT_STATE_INTR_PWRB_IN_FED_OFFSET 0x4 #define GC_RBOX_INT_STATE_INTR_KEY0_IN_RED_LSB 0x6 #define GC_RBOX_INT_STATE_INTR_KEY0_IN_RED_MASK 0x40 #define GC_RBOX_INT_STATE_INTR_KEY0_IN_RED_SIZE 0x1 #define GC_RBOX_INT_STATE_INTR_KEY0_IN_RED_DEFAULT 0x0 #define GC_RBOX_INT_STATE_INTR_KEY0_IN_RED_OFFSET 0x4 #define GC_RBOX_INT_STATE_INTR_KEY0_IN_FED_LSB 0x7 #define GC_RBOX_INT_STATE_INTR_KEY0_IN_FED_MASK 0x80 #define GC_RBOX_INT_STATE_INTR_KEY0_IN_FED_SIZE 0x1 #define GC_RBOX_INT_STATE_INTR_KEY0_IN_FED_DEFAULT 0x0 #define GC_RBOX_INT_STATE_INTR_KEY0_IN_FED_OFFSET 0x4 #define GC_RBOX_INT_STATE_INTR_KEY1_IN_RED_LSB 0x8 #define GC_RBOX_INT_STATE_INTR_KEY1_IN_RED_MASK 0x100 #define GC_RBOX_INT_STATE_INTR_KEY1_IN_RED_SIZE 0x1 #define GC_RBOX_INT_STATE_INTR_KEY1_IN_RED_DEFAULT 0x0 #define GC_RBOX_INT_STATE_INTR_KEY1_IN_RED_OFFSET 0x4 #define GC_RBOX_INT_STATE_INTR_KEY1_IN_FED_LSB 0x9 #define GC_RBOX_INT_STATE_INTR_KEY1_IN_FED_MASK 0x200 #define GC_RBOX_INT_STATE_INTR_KEY1_IN_FED_SIZE 0x1 #define GC_RBOX_INT_STATE_INTR_KEY1_IN_FED_DEFAULT 0x0 #define GC_RBOX_INT_STATE_INTR_KEY1_IN_FED_OFFSET 0x4 #define GC_RBOX_INT_STATE_INTR_EC_RST_RED_LSB 0xa #define GC_RBOX_INT_STATE_INTR_EC_RST_RED_MASK 0x400 #define GC_RBOX_INT_STATE_INTR_EC_RST_RED_SIZE 0x1 #define GC_RBOX_INT_STATE_INTR_EC_RST_RED_DEFAULT 0x0 #define GC_RBOX_INT_STATE_INTR_EC_RST_RED_OFFSET 0x4 #define GC_RBOX_INT_STATE_INTR_EC_RST_FED_LSB 0xb #define GC_RBOX_INT_STATE_INTR_EC_RST_FED_MASK 0x800 #define GC_RBOX_INT_STATE_INTR_EC_RST_FED_SIZE 0x1 #define GC_RBOX_INT_STATE_INTR_EC_RST_FED_DEFAULT 0x0 #define GC_RBOX_INT_STATE_INTR_EC_RST_FED_OFFSET 0x4 #define GC_RBOX_INT_STATE_INTR_BUTTON_COMBO0_RDY_LSB 0xc #define GC_RBOX_INT_STATE_INTR_BUTTON_COMBO0_RDY_MASK 0x1000 #define GC_RBOX_INT_STATE_INTR_BUTTON_COMBO0_RDY_SIZE 0x1 #define GC_RBOX_INT_STATE_INTR_BUTTON_COMBO0_RDY_DEFAULT 0x0 #define GC_RBOX_INT_STATE_INTR_BUTTON_COMBO0_RDY_OFFSET 0x4 #define GC_RBOX_INT_STATE_INTR_BUTTON_COMBO1_RDY_LSB 0xd #define GC_RBOX_INT_STATE_INTR_BUTTON_COMBO1_RDY_MASK 0x2000 #define GC_RBOX_INT_STATE_INTR_BUTTON_COMBO1_RDY_SIZE 0x1 #define GC_RBOX_INT_STATE_INTR_BUTTON_COMBO1_RDY_DEFAULT 0x0 #define GC_RBOX_INT_STATE_INTR_BUTTON_COMBO1_RDY_OFFSET 0x4 #define GC_RBOX_INT_STATE_INTR_BUTTON_COMBO2_RDY_LSB 0xe #define GC_RBOX_INT_STATE_INTR_BUTTON_COMBO2_RDY_MASK 0x4000 #define GC_RBOX_INT_STATE_INTR_BUTTON_COMBO2_RDY_SIZE 0x1 #define GC_RBOX_INT_STATE_INTR_BUTTON_COMBO2_RDY_DEFAULT 0x0 #define GC_RBOX_INT_STATE_INTR_BUTTON_COMBO2_RDY_OFFSET 0x4 #define GC_RBOX_INT_TEST_INTR_AC_PRESENT_RED_LSB 0x0 #define GC_RBOX_INT_TEST_INTR_AC_PRESENT_RED_MASK 0x1 #define GC_RBOX_INT_TEST_INTR_AC_PRESENT_RED_SIZE 0x1 #define GC_RBOX_INT_TEST_INTR_AC_PRESENT_RED_DEFAULT 0x0 #define GC_RBOX_INT_TEST_INTR_AC_PRESENT_RED_OFFSET 0x8 #define GC_RBOX_INT_TEST_INTR_AC_PRESENT_FED_LSB 0x1 #define GC_RBOX_INT_TEST_INTR_AC_PRESENT_FED_MASK 0x2 #define GC_RBOX_INT_TEST_INTR_AC_PRESENT_FED_SIZE 0x1 #define GC_RBOX_INT_TEST_INTR_AC_PRESENT_FED_DEFAULT 0x0 #define GC_RBOX_INT_TEST_INTR_AC_PRESENT_FED_OFFSET 0x8 #define GC_RBOX_INT_TEST_INTR_ENTERING_RW_RED_LSB 0x2 #define GC_RBOX_INT_TEST_INTR_ENTERING_RW_RED_MASK 0x4 #define GC_RBOX_INT_TEST_INTR_ENTERING_RW_RED_SIZE 0x1 #define GC_RBOX_INT_TEST_INTR_ENTERING_RW_RED_DEFAULT 0x0 #define GC_RBOX_INT_TEST_INTR_ENTERING_RW_RED_OFFSET 0x8 #define GC_RBOX_INT_TEST_INTR_ENTERING_RW_FED_LSB 0x3 #define GC_RBOX_INT_TEST_INTR_ENTERING_RW_FED_MASK 0x8 #define GC_RBOX_INT_TEST_INTR_ENTERING_RW_FED_SIZE 0x1 #define GC_RBOX_INT_TEST_INTR_ENTERING_RW_FED_DEFAULT 0x0 #define GC_RBOX_INT_TEST_INTR_ENTERING_RW_FED_OFFSET 0x8 #define GC_RBOX_INT_TEST_INTR_PWRB_IN_RED_LSB 0x4 #define GC_RBOX_INT_TEST_INTR_PWRB_IN_RED_MASK 0x10 #define GC_RBOX_INT_TEST_INTR_PWRB_IN_RED_SIZE 0x1 #define GC_RBOX_INT_TEST_INTR_PWRB_IN_RED_DEFAULT 0x0 #define GC_RBOX_INT_TEST_INTR_PWRB_IN_RED_OFFSET 0x8 #define GC_RBOX_INT_TEST_INTR_PWRB_IN_FED_LSB 0x5 #define GC_RBOX_INT_TEST_INTR_PWRB_IN_FED_MASK 0x20 #define GC_RBOX_INT_TEST_INTR_PWRB_IN_FED_SIZE 0x1 #define GC_RBOX_INT_TEST_INTR_PWRB_IN_FED_DEFAULT 0x0 #define GC_RBOX_INT_TEST_INTR_PWRB_IN_FED_OFFSET 0x8 #define GC_RBOX_INT_TEST_INTR_KEY0_IN_RED_LSB 0x6 #define GC_RBOX_INT_TEST_INTR_KEY0_IN_RED_MASK 0x40 #define GC_RBOX_INT_TEST_INTR_KEY0_IN_RED_SIZE 0x1 #define GC_RBOX_INT_TEST_INTR_KEY0_IN_RED_DEFAULT 0x0 #define GC_RBOX_INT_TEST_INTR_KEY0_IN_RED_OFFSET 0x8 #define GC_RBOX_INT_TEST_INTR_KEY0_IN_FED_LSB 0x7 #define GC_RBOX_INT_TEST_INTR_KEY0_IN_FED_MASK 0x80 #define GC_RBOX_INT_TEST_INTR_KEY0_IN_FED_SIZE 0x1 #define GC_RBOX_INT_TEST_INTR_KEY0_IN_FED_DEFAULT 0x0 #define GC_RBOX_INT_TEST_INTR_KEY0_IN_FED_OFFSET 0x8 #define GC_RBOX_INT_TEST_INTR_KEY1_IN_RED_LSB 0x8 #define GC_RBOX_INT_TEST_INTR_KEY1_IN_RED_MASK 0x100 #define GC_RBOX_INT_TEST_INTR_KEY1_IN_RED_SIZE 0x1 #define GC_RBOX_INT_TEST_INTR_KEY1_IN_RED_DEFAULT 0x0 #define GC_RBOX_INT_TEST_INTR_KEY1_IN_RED_OFFSET 0x8 #define GC_RBOX_INT_TEST_INTR_KEY1_IN_FED_LSB 0x9 #define GC_RBOX_INT_TEST_INTR_KEY1_IN_FED_MASK 0x200 #define GC_RBOX_INT_TEST_INTR_KEY1_IN_FED_SIZE 0x1 #define GC_RBOX_INT_TEST_INTR_KEY1_IN_FED_DEFAULT 0x0 #define GC_RBOX_INT_TEST_INTR_KEY1_IN_FED_OFFSET 0x8 #define GC_RBOX_INT_TEST_INTR_EC_RST_RED_LSB 0xa #define GC_RBOX_INT_TEST_INTR_EC_RST_RED_MASK 0x400 #define GC_RBOX_INT_TEST_INTR_EC_RST_RED_SIZE 0x1 #define GC_RBOX_INT_TEST_INTR_EC_RST_RED_DEFAULT 0x0 #define GC_RBOX_INT_TEST_INTR_EC_RST_RED_OFFSET 0x8 #define GC_RBOX_INT_TEST_INTR_EC_RST_FED_LSB 0xb #define GC_RBOX_INT_TEST_INTR_EC_RST_FED_MASK 0x800 #define GC_RBOX_INT_TEST_INTR_EC_RST_FED_SIZE 0x1 #define GC_RBOX_INT_TEST_INTR_EC_RST_FED_DEFAULT 0x0 #define GC_RBOX_INT_TEST_INTR_EC_RST_FED_OFFSET 0x8 #define GC_RBOX_INT_TEST_INTR_BUTTON_COMBO0_RDY_LSB 0xc #define GC_RBOX_INT_TEST_INTR_BUTTON_COMBO0_RDY_MASK 0x1000 #define GC_RBOX_INT_TEST_INTR_BUTTON_COMBO0_RDY_SIZE 0x1 #define GC_RBOX_INT_TEST_INTR_BUTTON_COMBO0_RDY_DEFAULT 0x0 #define GC_RBOX_INT_TEST_INTR_BUTTON_COMBO0_RDY_OFFSET 0x8 #define GC_RBOX_INT_TEST_INTR_BUTTON_COMBO1_RDY_LSB 0xd #define GC_RBOX_INT_TEST_INTR_BUTTON_COMBO1_RDY_MASK 0x2000 #define GC_RBOX_INT_TEST_INTR_BUTTON_COMBO1_RDY_SIZE 0x1 #define GC_RBOX_INT_TEST_INTR_BUTTON_COMBO1_RDY_DEFAULT 0x0 #define GC_RBOX_INT_TEST_INTR_BUTTON_COMBO1_RDY_OFFSET 0x8 #define GC_RBOX_INT_TEST_INTR_BUTTON_COMBO2_RDY_LSB 0xe #define GC_RBOX_INT_TEST_INTR_BUTTON_COMBO2_RDY_MASK 0x4000 #define GC_RBOX_INT_TEST_INTR_BUTTON_COMBO2_RDY_SIZE 0x1 #define GC_RBOX_INT_TEST_INTR_BUTTON_COMBO2_RDY_DEFAULT 0x0 #define GC_RBOX_INT_TEST_INTR_BUTTON_COMBO2_RDY_OFFSET 0x8 #define GC_RBOX_OVERRIDE_OUTPUT_EN_LSB 0x0 #define GC_RBOX_OVERRIDE_OUTPUT_EN_MASK 0x7f #define GC_RBOX_OVERRIDE_OUTPUT_EN_SIZE 0x7 #define GC_RBOX_OVERRIDE_OUTPUT_EN_DEFAULT 0x0 #define GC_RBOX_OVERRIDE_OUTPUT_EN_OFFSET 0x14 #define GC_RBOX_OVERRIDE_OUTPUT_VAL_LSB 0x7 #define GC_RBOX_OVERRIDE_OUTPUT_VAL_MASK 0x3f80 #define GC_RBOX_OVERRIDE_OUTPUT_VAL_SIZE 0x7 #define GC_RBOX_OVERRIDE_OUTPUT_VAL_DEFAULT 0x5d #define GC_RBOX_OVERRIDE_OUTPUT_VAL_OFFSET 0x14 #define GC_RBOX_OVERRIDE_OUTPUT_OEN_LSB 0xe #define GC_RBOX_OVERRIDE_OUTPUT_OEN_MASK 0x1fc000 #define GC_RBOX_OVERRIDE_OUTPUT_OEN_SIZE 0x7 #define GC_RBOX_OVERRIDE_OUTPUT_OEN_DEFAULT 0x0 #define GC_RBOX_OVERRIDE_OUTPUT_OEN_OFFSET 0x14 #define GC_RBOX_CHECK_INPUT_AC_PRESENT_LSB 0x0 #define GC_RBOX_CHECK_INPUT_AC_PRESENT_MASK 0x1 #define GC_RBOX_CHECK_INPUT_AC_PRESENT_SIZE 0x1 #define GC_RBOX_CHECK_INPUT_AC_PRESENT_DEFAULT 0x0 #define GC_RBOX_CHECK_INPUT_AC_PRESENT_OFFSET 0x18 #define GC_RBOX_CHECK_INPUT_ENTERING_RW_LSB 0x1 #define GC_RBOX_CHECK_INPUT_ENTERING_RW_MASK 0x2 #define GC_RBOX_CHECK_INPUT_ENTERING_RW_SIZE 0x1 #define GC_RBOX_CHECK_INPUT_ENTERING_RW_DEFAULT 0x0 #define GC_RBOX_CHECK_INPUT_ENTERING_RW_OFFSET 0x18 #define GC_RBOX_CHECK_INPUT_PWRB_IN_LSB 0x2 #define GC_RBOX_CHECK_INPUT_PWRB_IN_MASK 0x4 #define GC_RBOX_CHECK_INPUT_PWRB_IN_SIZE 0x1 #define GC_RBOX_CHECK_INPUT_PWRB_IN_DEFAULT 0x0 #define GC_RBOX_CHECK_INPUT_PWRB_IN_OFFSET 0x18 #define GC_RBOX_CHECK_INPUT_KEY0_IN_LSB 0x3 #define GC_RBOX_CHECK_INPUT_KEY0_IN_MASK 0x8 #define GC_RBOX_CHECK_INPUT_KEY0_IN_SIZE 0x1 #define GC_RBOX_CHECK_INPUT_KEY0_IN_DEFAULT 0x0 #define GC_RBOX_CHECK_INPUT_KEY0_IN_OFFSET 0x18 #define GC_RBOX_CHECK_INPUT_KEY1_IN_LSB 0x4 #define GC_RBOX_CHECK_INPUT_KEY1_IN_MASK 0x10 #define GC_RBOX_CHECK_INPUT_KEY1_IN_SIZE 0x1 #define GC_RBOX_CHECK_INPUT_KEY1_IN_DEFAULT 0x0 #define GC_RBOX_CHECK_INPUT_KEY1_IN_OFFSET 0x18 #define GC_RBOX_CHECK_INPUT_EC_RST_LSB 0x5 #define GC_RBOX_CHECK_INPUT_EC_RST_MASK 0x20 #define GC_RBOX_CHECK_INPUT_EC_RST_SIZE 0x1 #define GC_RBOX_CHECK_INPUT_EC_RST_DEFAULT 0x0 #define GC_RBOX_CHECK_INPUT_EC_RST_OFFSET 0x18 #define GC_RBOX_CHECK_OUTPUT_BATT_DISABLE_LSB 0x0 #define GC_RBOX_CHECK_OUTPUT_BATT_DISABLE_MASK 0x1 #define GC_RBOX_CHECK_OUTPUT_BATT_DISABLE_SIZE 0x1 #define GC_RBOX_CHECK_OUTPUT_BATT_DISABLE_DEFAULT 0x0 #define GC_RBOX_CHECK_OUTPUT_BATT_DISABLE_OFFSET 0x1c #define GC_RBOX_CHECK_OUTPUT_EC_IN_RW_LSB 0x1 #define GC_RBOX_CHECK_OUTPUT_EC_IN_RW_MASK 0x2 #define GC_RBOX_CHECK_OUTPUT_EC_IN_RW_SIZE 0x1 #define GC_RBOX_CHECK_OUTPUT_EC_IN_RW_DEFAULT 0x0 #define GC_RBOX_CHECK_OUTPUT_EC_IN_RW_OFFSET 0x1c #define GC_RBOX_CHECK_OUTPUT_PWRB_OUT_LSB 0x2 #define GC_RBOX_CHECK_OUTPUT_PWRB_OUT_MASK 0x4 #define GC_RBOX_CHECK_OUTPUT_PWRB_OUT_SIZE 0x1 #define GC_RBOX_CHECK_OUTPUT_PWRB_OUT_DEFAULT 0x0 #define GC_RBOX_CHECK_OUTPUT_PWRB_OUT_OFFSET 0x1c #define GC_RBOX_CHECK_OUTPUT_KEY0_OUT_LSB 0x3 #define GC_RBOX_CHECK_OUTPUT_KEY0_OUT_MASK 0x8 #define GC_RBOX_CHECK_OUTPUT_KEY0_OUT_SIZE 0x1 #define GC_RBOX_CHECK_OUTPUT_KEY0_OUT_DEFAULT 0x0 #define GC_RBOX_CHECK_OUTPUT_KEY0_OUT_OFFSET 0x1c #define GC_RBOX_CHECK_OUTPUT_KEY1_OUT_LSB 0x4 #define GC_RBOX_CHECK_OUTPUT_KEY1_OUT_MASK 0x10 #define GC_RBOX_CHECK_OUTPUT_KEY1_OUT_SIZE 0x1 #define GC_RBOX_CHECK_OUTPUT_KEY1_OUT_DEFAULT 0x0 #define GC_RBOX_CHECK_OUTPUT_KEY1_OUT_OFFSET 0x1c #define GC_RBOX_CHECK_OUTPUT_EC_WP_L_LSB 0x5 #define GC_RBOX_CHECK_OUTPUT_EC_WP_L_MASK 0x20 #define GC_RBOX_CHECK_OUTPUT_EC_WP_L_SIZE 0x1 #define GC_RBOX_CHECK_OUTPUT_EC_WP_L_DEFAULT 0x0 #define GC_RBOX_CHECK_OUTPUT_EC_WP_L_OFFSET 0x1c #define GC_RBOX_CHECK_OUTPUT_EC_RST_LSB 0x6 #define GC_RBOX_CHECK_OUTPUT_EC_RST_MASK 0x40 #define GC_RBOX_CHECK_OUTPUT_EC_RST_SIZE 0x1 #define GC_RBOX_CHECK_OUTPUT_EC_RST_DEFAULT 0x0 #define GC_RBOX_CHECK_OUTPUT_EC_RST_OFFSET 0x1c #define GC_RBOX_CHECK_OEN_BATT_DISABLE_LSB 0x0 #define GC_RBOX_CHECK_OEN_BATT_DISABLE_MASK 0x1 #define GC_RBOX_CHECK_OEN_BATT_DISABLE_SIZE 0x1 #define GC_RBOX_CHECK_OEN_BATT_DISABLE_DEFAULT 0x0 #define GC_RBOX_CHECK_OEN_BATT_DISABLE_OFFSET 0x20 #define GC_RBOX_CHECK_OEN_EC_IN_RW_LSB 0x1 #define GC_RBOX_CHECK_OEN_EC_IN_RW_MASK 0x2 #define GC_RBOX_CHECK_OEN_EC_IN_RW_SIZE 0x1 #define GC_RBOX_CHECK_OEN_EC_IN_RW_DEFAULT 0x0 #define GC_RBOX_CHECK_OEN_EC_IN_RW_OFFSET 0x20 #define GC_RBOX_CHECK_OEN_PWRB_OUT_LSB 0x2 #define GC_RBOX_CHECK_OEN_PWRB_OUT_MASK 0x4 #define GC_RBOX_CHECK_OEN_PWRB_OUT_SIZE 0x1 #define GC_RBOX_CHECK_OEN_PWRB_OUT_DEFAULT 0x0 #define GC_RBOX_CHECK_OEN_PWRB_OUT_OFFSET 0x20 #define GC_RBOX_CHECK_OEN_KEY0_OUT_LSB 0x3 #define GC_RBOX_CHECK_OEN_KEY0_OUT_MASK 0x8 #define GC_RBOX_CHECK_OEN_KEY0_OUT_SIZE 0x1 #define GC_RBOX_CHECK_OEN_KEY0_OUT_DEFAULT 0x0 #define GC_RBOX_CHECK_OEN_KEY0_OUT_OFFSET 0x20 #define GC_RBOX_CHECK_OEN_KEY1_OUT_LSB 0x4 #define GC_RBOX_CHECK_OEN_KEY1_OUT_MASK 0x10 #define GC_RBOX_CHECK_OEN_KEY1_OUT_SIZE 0x1 #define GC_RBOX_CHECK_OEN_KEY1_OUT_DEFAULT 0x0 #define GC_RBOX_CHECK_OEN_KEY1_OUT_OFFSET 0x20 #define GC_RBOX_CHECK_OEN_EC_WP_L_LSB 0x5 #define GC_RBOX_CHECK_OEN_EC_WP_L_MASK 0x20 #define GC_RBOX_CHECK_OEN_EC_WP_L_SIZE 0x1 #define GC_RBOX_CHECK_OEN_EC_WP_L_DEFAULT 0x0 #define GC_RBOX_CHECK_OEN_EC_WP_L_OFFSET 0x20 #define GC_RBOX_CHECK_OEN_EC_RST_LSB 0x6 #define GC_RBOX_CHECK_OEN_EC_RST_MASK 0x40 #define GC_RBOX_CHECK_OEN_EC_RST_SIZE 0x1 #define GC_RBOX_CHECK_OEN_EC_RST_DEFAULT 0x0 #define GC_RBOX_CHECK_OEN_EC_RST_OFFSET 0x20 #define GC_RBOX_CHECK_TERM_PU_AC_PRESENT_LSB 0x0 #define GC_RBOX_CHECK_TERM_PU_AC_PRESENT_MASK 0x1 #define GC_RBOX_CHECK_TERM_PU_AC_PRESENT_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PU_AC_PRESENT_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PU_AC_PRESENT_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PD_AC_PRESENT_LSB 0x1 #define GC_RBOX_CHECK_TERM_PD_AC_PRESENT_MASK 0x2 #define GC_RBOX_CHECK_TERM_PD_AC_PRESENT_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PD_AC_PRESENT_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PD_AC_PRESENT_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PU_ENTERING_RW_LSB 0x2 #define GC_RBOX_CHECK_TERM_PU_ENTERING_RW_MASK 0x4 #define GC_RBOX_CHECK_TERM_PU_ENTERING_RW_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PU_ENTERING_RW_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PU_ENTERING_RW_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PD_ENTERING_RW_LSB 0x3 #define GC_RBOX_CHECK_TERM_PD_ENTERING_RW_MASK 0x8 #define GC_RBOX_CHECK_TERM_PD_ENTERING_RW_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PD_ENTERING_RW_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PD_ENTERING_RW_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PU_PWRB_IN_LSB 0x4 #define GC_RBOX_CHECK_TERM_PU_PWRB_IN_MASK 0x10 #define GC_RBOX_CHECK_TERM_PU_PWRB_IN_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PU_PWRB_IN_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PU_PWRB_IN_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PD_PWRB_IN_LSB 0x5 #define GC_RBOX_CHECK_TERM_PD_PWRB_IN_MASK 0x20 #define GC_RBOX_CHECK_TERM_PD_PWRB_IN_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PD_PWRB_IN_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PD_PWRB_IN_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PU_KEY0_IN_LSB 0x6 #define GC_RBOX_CHECK_TERM_PU_KEY0_IN_MASK 0x40 #define GC_RBOX_CHECK_TERM_PU_KEY0_IN_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PU_KEY0_IN_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PU_KEY0_IN_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PD_KEY0_IN_LSB 0x7 #define GC_RBOX_CHECK_TERM_PD_KEY0_IN_MASK 0x80 #define GC_RBOX_CHECK_TERM_PD_KEY0_IN_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PD_KEY0_IN_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PD_KEY0_IN_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PU_KEY1_IN_LSB 0x8 #define GC_RBOX_CHECK_TERM_PU_KEY1_IN_MASK 0x100 #define GC_RBOX_CHECK_TERM_PU_KEY1_IN_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PU_KEY1_IN_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PU_KEY1_IN_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PD_KEY1_IN_LSB 0x9 #define GC_RBOX_CHECK_TERM_PD_KEY1_IN_MASK 0x200 #define GC_RBOX_CHECK_TERM_PD_KEY1_IN_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PD_KEY1_IN_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PD_KEY1_IN_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PU_EC_RST_LSB 0xa #define GC_RBOX_CHECK_TERM_PU_EC_RST_MASK 0x400 #define GC_RBOX_CHECK_TERM_PU_EC_RST_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PU_EC_RST_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PU_EC_RST_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PD_EC_RST_LSB 0xb #define GC_RBOX_CHECK_TERM_PD_EC_RST_MASK 0x800 #define GC_RBOX_CHECK_TERM_PD_EC_RST_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PD_EC_RST_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PD_EC_RST_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PU_BATT_DISABLE_LSB 0xc #define GC_RBOX_CHECK_TERM_PU_BATT_DISABLE_MASK 0x1000 #define GC_RBOX_CHECK_TERM_PU_BATT_DISABLE_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PU_BATT_DISABLE_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PU_BATT_DISABLE_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PD_BATT_DISABLE_LSB 0xd #define GC_RBOX_CHECK_TERM_PD_BATT_DISABLE_MASK 0x2000 #define GC_RBOX_CHECK_TERM_PD_BATT_DISABLE_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PD_BATT_DISABLE_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PD_BATT_DISABLE_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PU_EC_IN_RW_LSB 0xe #define GC_RBOX_CHECK_TERM_PU_EC_IN_RW_MASK 0x4000 #define GC_RBOX_CHECK_TERM_PU_EC_IN_RW_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PU_EC_IN_RW_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PU_EC_IN_RW_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PD_EC_IN_RW_LSB 0xf #define GC_RBOX_CHECK_TERM_PD_EC_IN_RW_MASK 0x8000 #define GC_RBOX_CHECK_TERM_PD_EC_IN_RW_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PD_EC_IN_RW_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PD_EC_IN_RW_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PU_PWRB_OUT_LSB 0x10 #define GC_RBOX_CHECK_TERM_PU_PWRB_OUT_MASK 0x10000 #define GC_RBOX_CHECK_TERM_PU_PWRB_OUT_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PU_PWRB_OUT_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PU_PWRB_OUT_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PD_PWRB_OUT_LSB 0x11 #define GC_RBOX_CHECK_TERM_PD_PWRB_OUT_MASK 0x20000 #define GC_RBOX_CHECK_TERM_PD_PWRB_OUT_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PD_PWRB_OUT_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PD_PWRB_OUT_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PU_KEY0_OUT_LSB 0x12 #define GC_RBOX_CHECK_TERM_PU_KEY0_OUT_MASK 0x40000 #define GC_RBOX_CHECK_TERM_PU_KEY0_OUT_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PU_KEY0_OUT_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PU_KEY0_OUT_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PD_KEY0_OUT_LSB 0x13 #define GC_RBOX_CHECK_TERM_PD_KEY0_OUT_MASK 0x80000 #define GC_RBOX_CHECK_TERM_PD_KEY0_OUT_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PD_KEY0_OUT_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PD_KEY0_OUT_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PU_KEY1_OUT_LSB 0x14 #define GC_RBOX_CHECK_TERM_PU_KEY1_OUT_MASK 0x100000 #define GC_RBOX_CHECK_TERM_PU_KEY1_OUT_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PU_KEY1_OUT_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PU_KEY1_OUT_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PD_KEY1_OUT_LSB 0x15 #define GC_RBOX_CHECK_TERM_PD_KEY1_OUT_MASK 0x200000 #define GC_RBOX_CHECK_TERM_PD_KEY1_OUT_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PD_KEY1_OUT_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PD_KEY1_OUT_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PU_EC_WP_L_LSB 0x16 #define GC_RBOX_CHECK_TERM_PU_EC_WP_L_MASK 0x400000 #define GC_RBOX_CHECK_TERM_PU_EC_WP_L_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PU_EC_WP_L_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PU_EC_WP_L_OFFSET 0x24 #define GC_RBOX_CHECK_TERM_PD_EC_WP_L_LSB 0x17 #define GC_RBOX_CHECK_TERM_PD_EC_WP_L_MASK 0x800000 #define GC_RBOX_CHECK_TERM_PD_EC_WP_L_SIZE 0x1 #define GC_RBOX_CHECK_TERM_PD_EC_WP_L_DEFAULT 0x0 #define GC_RBOX_CHECK_TERM_PD_EC_WP_L_OFFSET 0x24 #define GC_RBOX_STATUS_FUSE_READY_LSB 0x0 #define GC_RBOX_STATUS_FUSE_READY_MASK 0x1 #define GC_RBOX_STATUS_FUSE_READY_SIZE 0x1 #define GC_RBOX_STATUS_FUSE_READY_DEFAULT 0x0 #define GC_RBOX_STATUS_FUSE_READY_OFFSET 0x28 #define GC_RBOX_STATUS_DISABLE_FUSE_OVERRIDE_LSB 0x1 #define GC_RBOX_STATUS_DISABLE_FUSE_OVERRIDE_MASK 0x2 #define GC_RBOX_STATUS_DISABLE_FUSE_OVERRIDE_SIZE 0x1 #define GC_RBOX_STATUS_DISABLE_FUSE_OVERRIDE_DEFAULT 0x0 #define GC_RBOX_STATUS_DISABLE_FUSE_OVERRIDE_OFFSET 0x28 #define GC_RBOX_STATUS_DISABLE_OUTPUT_OVERRIDE_LSB 0x2 #define GC_RBOX_STATUS_DISABLE_OUTPUT_OVERRIDE_MASK 0x1fc #define GC_RBOX_STATUS_DISABLE_OUTPUT_OVERRIDE_SIZE 0x7 #define GC_RBOX_STATUS_DISABLE_OUTPUT_OVERRIDE_DEFAULT 0x0 #define GC_RBOX_STATUS_DISABLE_OUTPUT_OVERRIDE_OFFSET 0x28 #define GC_RBOX_FUSE_CTRL_OVERRIDE_FUSE_LSB 0x0 #define GC_RBOX_FUSE_CTRL_OVERRIDE_FUSE_MASK 0x1 #define GC_RBOX_FUSE_CTRL_OVERRIDE_FUSE_SIZE 0x1 #define GC_RBOX_FUSE_CTRL_OVERRIDE_FUSE_DEFAULT 0x0 #define GC_RBOX_FUSE_CTRL_OVERRIDE_FUSE_OFFSET 0x2c #define GC_RBOX_FUSE_CTRL_OVERRIDE_FUSE_READY_LSB 0x1 #define GC_RBOX_FUSE_CTRL_OVERRIDE_FUSE_READY_MASK 0x2 #define GC_RBOX_FUSE_CTRL_OVERRIDE_FUSE_READY_SIZE 0x1 #define GC_RBOX_FUSE_CTRL_OVERRIDE_FUSE_READY_DEFAULT 0x0 #define GC_RBOX_FUSE_CTRL_OVERRIDE_FUSE_READY_OFFSET 0x2c #define GC_RBOX_FUSE_CTRL_USE_SILEGO_LSB 0x2 #define GC_RBOX_FUSE_CTRL_USE_SILEGO_MASK 0x4 #define GC_RBOX_FUSE_CTRL_USE_SILEGO_SIZE 0x1 #define GC_RBOX_FUSE_CTRL_USE_SILEGO_DEFAULT 0x0 #define GC_RBOX_FUSE_CTRL_USE_SILEGO_OFFSET 0x2c #define GC_RBOX_FUSE_CTRL_SILEGO_CHOICE_LSB 0x3 #define GC_RBOX_FUSE_CTRL_SILEGO_CHOICE_MASK 0x8 #define GC_RBOX_FUSE_CTRL_SILEGO_CHOICE_SIZE 0x1 #define GC_RBOX_FUSE_CTRL_SILEGO_CHOICE_DEFAULT 0x0 #define GC_RBOX_FUSE_CTRL_SILEGO_CHOICE_OFFSET 0x2c #define GC_RBOX_DEBUG_DEBOUNCE_PERIOD_LSB 0x0 #define GC_RBOX_DEBUG_DEBOUNCE_PERIOD_MASK 0xffff #define GC_RBOX_DEBUG_DEBOUNCE_PERIOD_SIZE 0x10 #define GC_RBOX_DEBUG_DEBOUNCE_PERIOD_DEFAULT 0x0 #define GC_RBOX_DEBUG_DEBOUNCE_PERIOD_OFFSET 0x30 #define GC_RBOX_DEBUG_DEBOUNCE_BYPASS_PWRB_LSB 0x10 #define GC_RBOX_DEBUG_DEBOUNCE_BYPASS_PWRB_MASK 0x10000 #define GC_RBOX_DEBUG_DEBOUNCE_BYPASS_PWRB_SIZE 0x1 #define GC_RBOX_DEBUG_DEBOUNCE_BYPASS_PWRB_DEFAULT 0x1 #define GC_RBOX_DEBUG_DEBOUNCE_BYPASS_PWRB_OFFSET 0x30 #define GC_RBOX_DEBUG_DEBOUNCE_BYPASS_KEY0_LSB 0x11 #define GC_RBOX_DEBUG_DEBOUNCE_BYPASS_KEY0_MASK 0x20000 #define GC_RBOX_DEBUG_DEBOUNCE_BYPASS_KEY0_SIZE 0x1 #define GC_RBOX_DEBUG_DEBOUNCE_BYPASS_KEY0_DEFAULT 0x1 #define GC_RBOX_DEBUG_DEBOUNCE_BYPASS_KEY0_OFFSET 0x30 #define GC_RBOX_DEBUG_DEBOUNCE_BYPASS_KEY1_LSB 0x12 #define GC_RBOX_DEBUG_DEBOUNCE_BYPASS_KEY1_MASK 0x40000 #define GC_RBOX_DEBUG_DEBOUNCE_BYPASS_KEY1_SIZE 0x1 #define GC_RBOX_DEBUG_DEBOUNCE_BYPASS_KEY1_DEFAULT 0x1 #define GC_RBOX_DEBUG_DEBOUNCE_BYPASS_KEY1_OFFSET 0x30 #define GC_RBOX_DEBUG_KEY_COMBO0_VAL_LSB 0x0 #define GC_RBOX_DEBUG_KEY_COMBO0_VAL_MASK 0xff #define GC_RBOX_DEBUG_KEY_COMBO0_VAL_SIZE 0x8 #define GC_RBOX_DEBUG_KEY_COMBO0_VAL_DEFAULT 0xc0 #define GC_RBOX_DEBUG_KEY_COMBO0_VAL_OFFSET 0x34 #define GC_RBOX_DEBUG_KEY_COMBO0_HOLD_LSB 0x8 #define GC_RBOX_DEBUG_KEY_COMBO0_HOLD_MASK 0xff00 #define GC_RBOX_DEBUG_KEY_COMBO0_HOLD_SIZE 0x8 #define GC_RBOX_DEBUG_KEY_COMBO0_HOLD_DEFAULT 0x0 #define GC_RBOX_DEBUG_KEY_COMBO0_HOLD_OFFSET 0x34 #define GC_RBOX_DEBUG_KEY_COMBO1_VAL_LSB 0x0 #define GC_RBOX_DEBUG_KEY_COMBO1_VAL_MASK 0xff #define GC_RBOX_DEBUG_KEY_COMBO1_VAL_SIZE 0x8 #define GC_RBOX_DEBUG_KEY_COMBO1_VAL_DEFAULT 0x0 #define GC_RBOX_DEBUG_KEY_COMBO1_VAL_OFFSET 0x38 #define GC_RBOX_DEBUG_KEY_COMBO1_HOLD_LSB 0x8 #define GC_RBOX_DEBUG_KEY_COMBO1_HOLD_MASK 0xff00 #define GC_RBOX_DEBUG_KEY_COMBO1_HOLD_SIZE 0x8 #define GC_RBOX_DEBUG_KEY_COMBO1_HOLD_DEFAULT 0x0 #define GC_RBOX_DEBUG_KEY_COMBO1_HOLD_OFFSET 0x38 #define GC_RBOX_DEBUG_KEY_COMBO2_VAL_LSB 0x0 #define GC_RBOX_DEBUG_KEY_COMBO2_VAL_MASK 0xff #define GC_RBOX_DEBUG_KEY_COMBO2_VAL_SIZE 0x8 #define GC_RBOX_DEBUG_KEY_COMBO2_VAL_DEFAULT 0x0 #define GC_RBOX_DEBUG_KEY_COMBO2_VAL_OFFSET 0x3c #define GC_RBOX_DEBUG_KEY_COMBO2_HOLD_LSB 0x8 #define GC_RBOX_DEBUG_KEY_COMBO2_HOLD_MASK 0xff00 #define GC_RBOX_DEBUG_KEY_COMBO2_HOLD_SIZE 0x8 #define GC_RBOX_DEBUG_KEY_COMBO2_HOLD_DEFAULT 0x0 #define GC_RBOX_DEBUG_KEY_COMBO2_HOLD_OFFSET 0x3c #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY0_SEL_LSB 0x0 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY0_SEL_MASK 0x1 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY0_SEL_SIZE 0x1 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY0_SEL_DEFAULT 0x0 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY0_SEL_OFFSET 0x40 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY1_SEL_LSB 0x1 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY1_SEL_MASK 0x2 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY1_SEL_SIZE 0x1 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY1_SEL_DEFAULT 0x0 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY1_SEL_OFFSET 0x40 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY0_VAL_LSB 0x2 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY0_VAL_MASK 0x4 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY0_VAL_SIZE 0x1 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY0_VAL_DEFAULT 0x0 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY0_VAL_OFFSET 0x40 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY1_VAL_LSB 0x3 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY1_VAL_MASK 0x8 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY1_VAL_SIZE 0x1 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY1_VAL_DEFAULT 0x0 #define GC_RBOX_DEBUG_BLOCK_OUTPUT_KEY1_VAL_OFFSET 0x40 #define GC_RBOX_DEBUG_POL_AC_PRESENT_LSB 0x0 #define GC_RBOX_DEBUG_POL_AC_PRESENT_MASK 0x1 #define GC_RBOX_DEBUG_POL_AC_PRESENT_SIZE 0x1 #define GC_RBOX_DEBUG_POL_AC_PRESENT_DEFAULT 0x1 #define GC_RBOX_DEBUG_POL_AC_PRESENT_OFFSET 0x44 #define GC_RBOX_DEBUG_POL_PWRB_IN_LSB 0x1 #define GC_RBOX_DEBUG_POL_PWRB_IN_MASK 0x2 #define GC_RBOX_DEBUG_POL_PWRB_IN_SIZE 0x1 #define GC_RBOX_DEBUG_POL_PWRB_IN_DEFAULT 0x0 #define GC_RBOX_DEBUG_POL_PWRB_IN_OFFSET 0x44 #define GC_RBOX_DEBUG_POL_PWRB_OUT_LSB 0x2 #define GC_RBOX_DEBUG_POL_PWRB_OUT_MASK 0x4 #define GC_RBOX_DEBUG_POL_PWRB_OUT_SIZE 0x1 #define GC_RBOX_DEBUG_POL_PWRB_OUT_DEFAULT 0x0 #define GC_RBOX_DEBUG_POL_PWRB_OUT_OFFSET 0x44 #define GC_RBOX_DEBUG_POL_KEY0_IN_LSB 0x3 #define GC_RBOX_DEBUG_POL_KEY0_IN_MASK 0x8 #define GC_RBOX_DEBUG_POL_KEY0_IN_SIZE 0x1 #define GC_RBOX_DEBUG_POL_KEY0_IN_DEFAULT 0x0 #define GC_RBOX_DEBUG_POL_KEY0_IN_OFFSET 0x44 #define GC_RBOX_DEBUG_POL_KEY0_OUT_LSB 0x4 #define GC_RBOX_DEBUG_POL_KEY0_OUT_MASK 0x10 #define GC_RBOX_DEBUG_POL_KEY0_OUT_SIZE 0x1 #define GC_RBOX_DEBUG_POL_KEY0_OUT_DEFAULT 0x0 #define GC_RBOX_DEBUG_POL_KEY0_OUT_OFFSET 0x44 #define GC_RBOX_DEBUG_POL_KEY1_IN_LSB 0x5 #define GC_RBOX_DEBUG_POL_KEY1_IN_MASK 0x20 #define GC_RBOX_DEBUG_POL_KEY1_IN_SIZE 0x1 #define GC_RBOX_DEBUG_POL_KEY1_IN_DEFAULT 0x0 #define GC_RBOX_DEBUG_POL_KEY1_IN_OFFSET 0x44 #define GC_RBOX_DEBUG_POL_KEY1_OUT_LSB 0x6 #define GC_RBOX_DEBUG_POL_KEY1_OUT_MASK 0x40 #define GC_RBOX_DEBUG_POL_KEY1_OUT_SIZE 0x1 #define GC_RBOX_DEBUG_POL_KEY1_OUT_DEFAULT 0x0 #define GC_RBOX_DEBUG_POL_KEY1_OUT_OFFSET 0x44 #define GC_RBOX_DEBUG_POL_EC_RST_LSB 0x7 #define GC_RBOX_DEBUG_POL_EC_RST_MASK 0x80 #define GC_RBOX_DEBUG_POL_EC_RST_SIZE 0x1 #define GC_RBOX_DEBUG_POL_EC_RST_DEFAULT 0x0 #define GC_RBOX_DEBUG_POL_EC_RST_OFFSET 0x44 #define GC_RBOX_DEBUG_POL_BATT_DISABLE_LSB 0x8 #define GC_RBOX_DEBUG_POL_BATT_DISABLE_MASK 0x100 #define GC_RBOX_DEBUG_POL_BATT_DISABLE_SIZE 0x1 #define GC_RBOX_DEBUG_POL_BATT_DISABLE_DEFAULT 0x0 #define GC_RBOX_DEBUG_POL_BATT_DISABLE_OFFSET 0x44 #define GC_RBOX_DEBUG_TERM_AC_PRESENT_LSB 0x0 #define GC_RBOX_DEBUG_TERM_AC_PRESENT_MASK 0x3 #define GC_RBOX_DEBUG_TERM_AC_PRESENT_SIZE 0x2 #define GC_RBOX_DEBUG_TERM_AC_PRESENT_DEFAULT 0x0 #define GC_RBOX_DEBUG_TERM_AC_PRESENT_OFFSET 0x48 #define GC_RBOX_DEBUG_TERM_ENTERING_RW_LSB 0x2 #define GC_RBOX_DEBUG_TERM_ENTERING_RW_MASK 0xc #define GC_RBOX_DEBUG_TERM_ENTERING_RW_SIZE 0x2 #define GC_RBOX_DEBUG_TERM_ENTERING_RW_DEFAULT 0x0 #define GC_RBOX_DEBUG_TERM_ENTERING_RW_OFFSET 0x48 #define GC_RBOX_DEBUG_TERM_PWRB_IN_LSB 0x4 #define GC_RBOX_DEBUG_TERM_PWRB_IN_MASK 0x30 #define GC_RBOX_DEBUG_TERM_PWRB_IN_SIZE 0x2 #define GC_RBOX_DEBUG_TERM_PWRB_IN_DEFAULT 0x0 #define GC_RBOX_DEBUG_TERM_PWRB_IN_OFFSET 0x48 #define GC_RBOX_DEBUG_TERM_PWRB_OUT_LSB 0x6 #define GC_RBOX_DEBUG_TERM_PWRB_OUT_MASK 0xc0 #define GC_RBOX_DEBUG_TERM_PWRB_OUT_SIZE 0x2 #define GC_RBOX_DEBUG_TERM_PWRB_OUT_DEFAULT 0x0 #define GC_RBOX_DEBUG_TERM_PWRB_OUT_OFFSET 0x48 #define GC_RBOX_DEBUG_TERM_KEY0_IN_LSB 0x8 #define GC_RBOX_DEBUG_TERM_KEY0_IN_MASK 0x300 #define GC_RBOX_DEBUG_TERM_KEY0_IN_SIZE 0x2 #define GC_RBOX_DEBUG_TERM_KEY0_IN_DEFAULT 0x0 #define GC_RBOX_DEBUG_TERM_KEY0_IN_OFFSET 0x48 #define GC_RBOX_DEBUG_TERM_KEY0_OUT_LSB 0xa #define GC_RBOX_DEBUG_TERM_KEY0_OUT_MASK 0xc00 #define GC_RBOX_DEBUG_TERM_KEY0_OUT_SIZE 0x2 #define GC_RBOX_DEBUG_TERM_KEY0_OUT_DEFAULT 0x0 #define GC_RBOX_DEBUG_TERM_KEY0_OUT_OFFSET 0x48 #define GC_RBOX_DEBUG_TERM_KEY1_IN_LSB 0xc #define GC_RBOX_DEBUG_TERM_KEY1_IN_MASK 0x3000 #define GC_RBOX_DEBUG_TERM_KEY1_IN_SIZE 0x2 #define GC_RBOX_DEBUG_TERM_KEY1_IN_DEFAULT 0x0 #define GC_RBOX_DEBUG_TERM_KEY1_IN_OFFSET 0x48 #define GC_RBOX_DEBUG_TERM_KEY1_OUT_LSB 0xe #define GC_RBOX_DEBUG_TERM_KEY1_OUT_MASK 0xc000 #define GC_RBOX_DEBUG_TERM_KEY1_OUT_SIZE 0x2 #define GC_RBOX_DEBUG_TERM_KEY1_OUT_DEFAULT 0x0 #define GC_RBOX_DEBUG_TERM_KEY1_OUT_OFFSET 0x48 #define GC_RBOX_DEBUG_DRIVE_PWRB_OUT_LSB 0x0 #define GC_RBOX_DEBUG_DRIVE_PWRB_OUT_MASK 0x3 #define GC_RBOX_DEBUG_DRIVE_PWRB_OUT_SIZE 0x2 #define GC_RBOX_DEBUG_DRIVE_PWRB_OUT_DEFAULT 0x3 #define GC_RBOX_DEBUG_DRIVE_PWRB_OUT_OFFSET 0x4c #define GC_RBOX_DEBUG_DRIVE_KEY0_OUT_LSB 0x2 #define GC_RBOX_DEBUG_DRIVE_KEY0_OUT_MASK 0xc #define GC_RBOX_DEBUG_DRIVE_KEY0_OUT_SIZE 0x2 #define GC_RBOX_DEBUG_DRIVE_KEY0_OUT_DEFAULT 0x3 #define GC_RBOX_DEBUG_DRIVE_KEY0_OUT_OFFSET 0x4c #define GC_RBOX_DEBUG_DRIVE_KEY1_OUT_LSB 0x4 #define GC_RBOX_DEBUG_DRIVE_KEY1_OUT_MASK 0x30 #define GC_RBOX_DEBUG_DRIVE_KEY1_OUT_SIZE 0x2 #define GC_RBOX_DEBUG_DRIVE_KEY1_OUT_DEFAULT 0x3 #define GC_RBOX_DEBUG_DRIVE_KEY1_OUT_OFFSET 0x4c #define GC_RBOX_DEBUG_DRIVE_EC_RST_LSB 0x6 #define GC_RBOX_DEBUG_DRIVE_EC_RST_MASK 0xc0 #define GC_RBOX_DEBUG_DRIVE_EC_RST_SIZE 0x2 #define GC_RBOX_DEBUG_DRIVE_EC_RST_DEFAULT 0x1 #define GC_RBOX_DEBUG_DRIVE_EC_RST_OFFSET 0x4c #define GC_RBOX_DEBUG_DRIVE_BATT_DISABLE_LSB 0x8 #define GC_RBOX_DEBUG_DRIVE_BATT_DISABLE_MASK 0x300 #define GC_RBOX_DEBUG_DRIVE_BATT_DISABLE_SIZE 0x2 #define GC_RBOX_DEBUG_DRIVE_BATT_DISABLE_DEFAULT 0x1 #define GC_RBOX_DEBUG_DRIVE_BATT_DISABLE_OFFSET 0x4c #define GC_RBOX_CONFIG_DEBOUNCE_PERIOD_LSB 0x0 #define GC_RBOX_CONFIG_DEBOUNCE_PERIOD_MASK 0xffff #define GC_RBOX_CONFIG_DEBOUNCE_PERIOD_SIZE 0x10 #define GC_RBOX_CONFIG_DEBOUNCE_PERIOD_DEFAULT 0x0 #define GC_RBOX_CONFIG_DEBOUNCE_PERIOD_OFFSET 0x6c #define GC_RBOX_CONFIG_DEBOUNCE_BYPASS_PWRB_LSB 0x10 #define GC_RBOX_CONFIG_DEBOUNCE_BYPASS_PWRB_MASK 0x10000 #define GC_RBOX_CONFIG_DEBOUNCE_BYPASS_PWRB_SIZE 0x1 #define GC_RBOX_CONFIG_DEBOUNCE_BYPASS_PWRB_DEFAULT 0x0 #define GC_RBOX_CONFIG_DEBOUNCE_BYPASS_PWRB_OFFSET 0x6c #define GC_RBOX_CONFIG_DEBOUNCE_BYPASS_KEY0_LSB 0x11 #define GC_RBOX_CONFIG_DEBOUNCE_BYPASS_KEY0_MASK 0x20000 #define GC_RBOX_CONFIG_DEBOUNCE_BYPASS_KEY0_SIZE 0x1 #define GC_RBOX_CONFIG_DEBOUNCE_BYPASS_KEY0_DEFAULT 0x0 #define GC_RBOX_CONFIG_DEBOUNCE_BYPASS_KEY0_OFFSET 0x6c #define GC_RBOX_CONFIG_DEBOUNCE_BYPASS_KEY1_LSB 0x12 #define GC_RBOX_CONFIG_DEBOUNCE_BYPASS_KEY1_MASK 0x40000 #define GC_RBOX_CONFIG_DEBOUNCE_BYPASS_KEY1_SIZE 0x1 #define GC_RBOX_CONFIG_DEBOUNCE_BYPASS_KEY1_DEFAULT 0x0 #define GC_RBOX_CONFIG_DEBOUNCE_BYPASS_KEY1_OFFSET 0x6c #define GC_RBOX_CONFIG_KEY_COMBO0_VAL_LSB 0x0 #define GC_RBOX_CONFIG_KEY_COMBO0_VAL_MASK 0xff #define GC_RBOX_CONFIG_KEY_COMBO0_VAL_SIZE 0x8 #define GC_RBOX_CONFIG_KEY_COMBO0_VAL_DEFAULT 0x0 #define GC_RBOX_CONFIG_KEY_COMBO0_VAL_OFFSET 0x70 #define GC_RBOX_CONFIG_KEY_COMBO0_HOLD_LSB 0x8 #define GC_RBOX_CONFIG_KEY_COMBO0_HOLD_MASK 0xff00 #define GC_RBOX_CONFIG_KEY_COMBO0_HOLD_SIZE 0x8 #define GC_RBOX_CONFIG_KEY_COMBO0_HOLD_DEFAULT 0x0 #define GC_RBOX_CONFIG_KEY_COMBO0_HOLD_OFFSET 0x70 #define GC_RBOX_CONFIG_KEY_COMBO1_VAL_LSB 0x0 #define GC_RBOX_CONFIG_KEY_COMBO1_VAL_MASK 0xff #define GC_RBOX_CONFIG_KEY_COMBO1_VAL_SIZE 0x8 #define GC_RBOX_CONFIG_KEY_COMBO1_VAL_DEFAULT 0x0 #define GC_RBOX_CONFIG_KEY_COMBO1_VAL_OFFSET 0x74 #define GC_RBOX_CONFIG_KEY_COMBO1_HOLD_LSB 0x8 #define GC_RBOX_CONFIG_KEY_COMBO1_HOLD_MASK 0xff00 #define GC_RBOX_CONFIG_KEY_COMBO1_HOLD_SIZE 0x8 #define GC_RBOX_CONFIG_KEY_COMBO1_HOLD_DEFAULT 0x0 #define GC_RBOX_CONFIG_KEY_COMBO1_HOLD_OFFSET 0x74 #define GC_RBOX_CONFIG_KEY_COMBO2_VAL_LSB 0x0 #define GC_RBOX_CONFIG_KEY_COMBO2_VAL_MASK 0xff #define GC_RBOX_CONFIG_KEY_COMBO2_VAL_SIZE 0x8 #define GC_RBOX_CONFIG_KEY_COMBO2_VAL_DEFAULT 0x0 #define GC_RBOX_CONFIG_KEY_COMBO2_VAL_OFFSET 0x78 #define GC_RBOX_CONFIG_KEY_COMBO2_HOLD_LSB 0x8 #define GC_RBOX_CONFIG_KEY_COMBO2_HOLD_MASK 0xff00 #define GC_RBOX_CONFIG_KEY_COMBO2_HOLD_SIZE 0x8 #define GC_RBOX_CONFIG_KEY_COMBO2_HOLD_DEFAULT 0x0 #define GC_RBOX_CONFIG_KEY_COMBO2_HOLD_OFFSET 0x78 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY0_SEL_LSB 0x0 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY0_SEL_MASK 0x1 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY0_SEL_SIZE 0x1 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY0_SEL_DEFAULT 0x0 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY0_SEL_OFFSET 0x7c #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY1_SEL_LSB 0x1 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY1_SEL_MASK 0x2 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY1_SEL_SIZE 0x1 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY1_SEL_DEFAULT 0x0 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY1_SEL_OFFSET 0x7c #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY0_VAL_LSB 0x2 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY0_VAL_MASK 0x4 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY0_VAL_SIZE 0x1 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY0_VAL_DEFAULT 0x0 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY0_VAL_OFFSET 0x7c #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY1_VAL_LSB 0x3 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY1_VAL_MASK 0x8 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY1_VAL_SIZE 0x1 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY1_VAL_DEFAULT 0x0 #define GC_RBOX_CONFIG_BLOCK_OUTPUT_KEY1_VAL_OFFSET 0x7c #define GC_RBOX_CONFIG_POL_AC_PRESENT_LSB 0x0 #define GC_RBOX_CONFIG_POL_AC_PRESENT_MASK 0x1 #define GC_RBOX_CONFIG_POL_AC_PRESENT_SIZE 0x1 #define GC_RBOX_CONFIG_POL_AC_PRESENT_DEFAULT 0x1 #define GC_RBOX_CONFIG_POL_AC_PRESENT_OFFSET 0x80 #define GC_RBOX_CONFIG_POL_PWRB_IN_LSB 0x1 #define GC_RBOX_CONFIG_POL_PWRB_IN_MASK 0x2 #define GC_RBOX_CONFIG_POL_PWRB_IN_SIZE 0x1 #define GC_RBOX_CONFIG_POL_PWRB_IN_DEFAULT 0x0 #define GC_RBOX_CONFIG_POL_PWRB_IN_OFFSET 0x80 #define GC_RBOX_CONFIG_POL_PWRB_OUT_LSB 0x2 #define GC_RBOX_CONFIG_POL_PWRB_OUT_MASK 0x4 #define GC_RBOX_CONFIG_POL_PWRB_OUT_SIZE 0x1 #define GC_RBOX_CONFIG_POL_PWRB_OUT_DEFAULT 0x0 #define GC_RBOX_CONFIG_POL_PWRB_OUT_OFFSET 0x80 #define GC_RBOX_CONFIG_POL_KEY0_IN_LSB 0x3 #define GC_RBOX_CONFIG_POL_KEY0_IN_MASK 0x8 #define GC_RBOX_CONFIG_POL_KEY0_IN_SIZE 0x1 #define GC_RBOX_CONFIG_POL_KEY0_IN_DEFAULT 0x0 #define GC_RBOX_CONFIG_POL_KEY0_IN_OFFSET 0x80 #define GC_RBOX_CONFIG_POL_KEY0_OUT_LSB 0x4 #define GC_RBOX_CONFIG_POL_KEY0_OUT_MASK 0x10 #define GC_RBOX_CONFIG_POL_KEY0_OUT_SIZE 0x1 #define GC_RBOX_CONFIG_POL_KEY0_OUT_DEFAULT 0x0 #define GC_RBOX_CONFIG_POL_KEY0_OUT_OFFSET 0x80 #define GC_RBOX_CONFIG_POL_KEY1_IN_LSB 0x5 #define GC_RBOX_CONFIG_POL_KEY1_IN_MASK 0x20 #define GC_RBOX_CONFIG_POL_KEY1_IN_SIZE 0x1 #define GC_RBOX_CONFIG_POL_KEY1_IN_DEFAULT 0x0 #define GC_RBOX_CONFIG_POL_KEY1_IN_OFFSET 0x80 #define GC_RBOX_CONFIG_POL_KEY1_OUT_LSB 0x6 #define GC_RBOX_CONFIG_POL_KEY1_OUT_MASK 0x40 #define GC_RBOX_CONFIG_POL_KEY1_OUT_SIZE 0x1 #define GC_RBOX_CONFIG_POL_KEY1_OUT_DEFAULT 0x0 #define GC_RBOX_CONFIG_POL_KEY1_OUT_OFFSET 0x80 #define GC_RBOX_CONFIG_POL_EC_RST_LSB 0x7 #define GC_RBOX_CONFIG_POL_EC_RST_MASK 0x80 #define GC_RBOX_CONFIG_POL_EC_RST_SIZE 0x1 #define GC_RBOX_CONFIG_POL_EC_RST_DEFAULT 0x0 #define GC_RBOX_CONFIG_POL_EC_RST_OFFSET 0x80 #define GC_RBOX_CONFIG_POL_BATT_DISABLE_LSB 0x8 #define GC_RBOX_CONFIG_POL_BATT_DISABLE_MASK 0x100 #define GC_RBOX_CONFIG_POL_BATT_DISABLE_SIZE 0x1 #define GC_RBOX_CONFIG_POL_BATT_DISABLE_DEFAULT 0x0 #define GC_RBOX_CONFIG_POL_BATT_DISABLE_OFFSET 0x80 #define GC_RBOX_CONFIG_TERM_AC_PRESENT_LSB 0x0 #define GC_RBOX_CONFIG_TERM_AC_PRESENT_MASK 0x3 #define GC_RBOX_CONFIG_TERM_AC_PRESENT_SIZE 0x2 #define GC_RBOX_CONFIG_TERM_AC_PRESENT_DEFAULT 0x0 #define GC_RBOX_CONFIG_TERM_AC_PRESENT_OFFSET 0x84 #define GC_RBOX_CONFIG_TERM_ENTERING_RW_LSB 0x2 #define GC_RBOX_CONFIG_TERM_ENTERING_RW_MASK 0xc #define GC_RBOX_CONFIG_TERM_ENTERING_RW_SIZE 0x2 #define GC_RBOX_CONFIG_TERM_ENTERING_RW_DEFAULT 0x0 #define GC_RBOX_CONFIG_TERM_ENTERING_RW_OFFSET 0x84 #define GC_RBOX_CONFIG_TERM_PWRB_IN_LSB 0x4 #define GC_RBOX_CONFIG_TERM_PWRB_IN_MASK 0x30 #define GC_RBOX_CONFIG_TERM_PWRB_IN_SIZE 0x2 #define GC_RBOX_CONFIG_TERM_PWRB_IN_DEFAULT 0x0 #define GC_RBOX_CONFIG_TERM_PWRB_IN_OFFSET 0x84 #define GC_RBOX_CONFIG_TERM_PWRB_OUT_LSB 0x6 #define GC_RBOX_CONFIG_TERM_PWRB_OUT_MASK 0xc0 #define GC_RBOX_CONFIG_TERM_PWRB_OUT_SIZE 0x2 #define GC_RBOX_CONFIG_TERM_PWRB_OUT_DEFAULT 0x0 #define GC_RBOX_CONFIG_TERM_PWRB_OUT_OFFSET 0x84 #define GC_RBOX_CONFIG_TERM_KEY0_IN_LSB 0x8 #define GC_RBOX_CONFIG_TERM_KEY0_IN_MASK 0x300 #define GC_RBOX_CONFIG_TERM_KEY0_IN_SIZE 0x2 #define GC_RBOX_CONFIG_TERM_KEY0_IN_DEFAULT 0x0 #define GC_RBOX_CONFIG_TERM_KEY0_IN_OFFSET 0x84 #define GC_RBOX_CONFIG_TERM_KEY0_OUT_LSB 0xa #define GC_RBOX_CONFIG_TERM_KEY0_OUT_MASK 0xc00 #define GC_RBOX_CONFIG_TERM_KEY0_OUT_SIZE 0x2 #define GC_RBOX_CONFIG_TERM_KEY0_OUT_DEFAULT 0x0 #define GC_RBOX_CONFIG_TERM_KEY0_OUT_OFFSET 0x84 #define GC_RBOX_CONFIG_TERM_KEY1_IN_LSB 0xc #define GC_RBOX_CONFIG_TERM_KEY1_IN_MASK 0x3000 #define GC_RBOX_CONFIG_TERM_KEY1_IN_SIZE 0x2 #define GC_RBOX_CONFIG_TERM_KEY1_IN_DEFAULT 0x0 #define GC_RBOX_CONFIG_TERM_KEY1_IN_OFFSET 0x84 #define GC_RBOX_CONFIG_TERM_KEY1_OUT_LSB 0xe #define GC_RBOX_CONFIG_TERM_KEY1_OUT_MASK 0xc000 #define GC_RBOX_CONFIG_TERM_KEY1_OUT_SIZE 0x2 #define GC_RBOX_CONFIG_TERM_KEY1_OUT_DEFAULT 0x0 #define GC_RBOX_CONFIG_TERM_KEY1_OUT_OFFSET 0x84 #define GC_RBOX_CONFIG_DRIVE_PWRB_OUT_LSB 0x0 #define GC_RBOX_CONFIG_DRIVE_PWRB_OUT_MASK 0x3 #define GC_RBOX_CONFIG_DRIVE_PWRB_OUT_SIZE 0x2 #define GC_RBOX_CONFIG_DRIVE_PWRB_OUT_DEFAULT 0x0 #define GC_RBOX_CONFIG_DRIVE_PWRB_OUT_OFFSET 0x88 #define GC_RBOX_CONFIG_DRIVE_KEY0_OUT_LSB 0x2 #define GC_RBOX_CONFIG_DRIVE_KEY0_OUT_MASK 0xc #define GC_RBOX_CONFIG_DRIVE_KEY0_OUT_SIZE 0x2 #define GC_RBOX_CONFIG_DRIVE_KEY0_OUT_DEFAULT 0x0 #define GC_RBOX_CONFIG_DRIVE_KEY0_OUT_OFFSET 0x88 #define GC_RBOX_CONFIG_DRIVE_KEY1_OUT_LSB 0x4 #define GC_RBOX_CONFIG_DRIVE_KEY1_OUT_MASK 0x30 #define GC_RBOX_CONFIG_DRIVE_KEY1_OUT_SIZE 0x2 #define GC_RBOX_CONFIG_DRIVE_KEY1_OUT_DEFAULT 0x0 #define GC_RBOX_CONFIG_DRIVE_KEY1_OUT_OFFSET 0x88 #define GC_RBOX_CONFIG_DRIVE_EC_RST_LSB 0x6 #define GC_RBOX_CONFIG_DRIVE_EC_RST_MASK 0xc0 #define GC_RBOX_CONFIG_DRIVE_EC_RST_SIZE 0x2 #define GC_RBOX_CONFIG_DRIVE_EC_RST_DEFAULT 0x0 #define GC_RBOX_CONFIG_DRIVE_EC_RST_OFFSET 0x88 #define GC_RBOX_CONFIG_DRIVE_BATT_DISABLE_LSB 0x8 #define GC_RBOX_CONFIG_DRIVE_BATT_DISABLE_MASK 0x300 #define GC_RBOX_CONFIG_DRIVE_BATT_DISABLE_SIZE 0x2 #define GC_RBOX_CONFIG_DRIVE_BATT_DISABLE_DEFAULT 0x0 #define GC_RBOX_CONFIG_DRIVE_BATT_DISABLE_OFFSET 0x88 #define GC_RBOX_WAKEUP_ENABLE_LSB 0x0 #define GC_RBOX_WAKEUP_ENABLE_MASK 0x1 #define GC_RBOX_WAKEUP_ENABLE_SIZE 0x1 #define GC_RBOX_WAKEUP_ENABLE_DEFAULT 0x0 #define GC_RBOX_WAKEUP_ENABLE_OFFSET 0x98 #define GC_RBOX_WAKEUP_CLEAR_LSB 0x1 #define GC_RBOX_WAKEUP_CLEAR_MASK 0x2 #define GC_RBOX_WAKEUP_CLEAR_SIZE 0x1 #define GC_RBOX_WAKEUP_CLEAR_DEFAULT 0x0 #define GC_RBOX_WAKEUP_CLEAR_OFFSET 0x98 #define GC_RBOX_WAKEUP_MASK_LSB 0x2 #define GC_RBOX_WAKEUP_MASK_MASK 0x4 #define GC_RBOX_WAKEUP_MASK_SIZE 0x1 #define GC_RBOX_WAKEUP_MASK_DEFAULT 0x0 #define GC_RBOX_WAKEUP_MASK_OFFSET 0x98 #define GC_RBOX_WAKEUP_INTR_AC_PRESENT_RED_LSB 0x0 #define GC_RBOX_WAKEUP_INTR_AC_PRESENT_RED_MASK 0x1 #define GC_RBOX_WAKEUP_INTR_AC_PRESENT_RED_SIZE 0x1 #define GC_RBOX_WAKEUP_INTR_AC_PRESENT_RED_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_AC_PRESENT_RED_OFFSET 0x9c #define GC_RBOX_WAKEUP_INTR_AC_PRESENT_FED_LSB 0x1 #define GC_RBOX_WAKEUP_INTR_AC_PRESENT_FED_MASK 0x2 #define GC_RBOX_WAKEUP_INTR_AC_PRESENT_FED_SIZE 0x1 #define GC_RBOX_WAKEUP_INTR_AC_PRESENT_FED_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_AC_PRESENT_FED_OFFSET 0x9c #define GC_RBOX_WAKEUP_INTR_ENTERING_RW_RED_LSB 0x2 #define GC_RBOX_WAKEUP_INTR_ENTERING_RW_RED_MASK 0x4 #define GC_RBOX_WAKEUP_INTR_ENTERING_RW_RED_SIZE 0x1 #define GC_RBOX_WAKEUP_INTR_ENTERING_RW_RED_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_ENTERING_RW_RED_OFFSET 0x9c #define GC_RBOX_WAKEUP_INTR_ENTERING_RW_FED_LSB 0x3 #define GC_RBOX_WAKEUP_INTR_ENTERING_RW_FED_MASK 0x8 #define GC_RBOX_WAKEUP_INTR_ENTERING_RW_FED_SIZE 0x1 #define GC_RBOX_WAKEUP_INTR_ENTERING_RW_FED_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_ENTERING_RW_FED_OFFSET 0x9c #define GC_RBOX_WAKEUP_INTR_PWRB_IN_RED_LSB 0x4 #define GC_RBOX_WAKEUP_INTR_PWRB_IN_RED_MASK 0x10 #define GC_RBOX_WAKEUP_INTR_PWRB_IN_RED_SIZE 0x1 #define GC_RBOX_WAKEUP_INTR_PWRB_IN_RED_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_PWRB_IN_RED_OFFSET 0x9c #define GC_RBOX_WAKEUP_INTR_PWRB_IN_FED_LSB 0x5 #define GC_RBOX_WAKEUP_INTR_PWRB_IN_FED_MASK 0x20 #define GC_RBOX_WAKEUP_INTR_PWRB_IN_FED_SIZE 0x1 #define GC_RBOX_WAKEUP_INTR_PWRB_IN_FED_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_PWRB_IN_FED_OFFSET 0x9c #define GC_RBOX_WAKEUP_INTR_KEY0_IN_RED_LSB 0x6 #define GC_RBOX_WAKEUP_INTR_KEY0_IN_RED_MASK 0x40 #define GC_RBOX_WAKEUP_INTR_KEY0_IN_RED_SIZE 0x1 #define GC_RBOX_WAKEUP_INTR_KEY0_IN_RED_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_KEY0_IN_RED_OFFSET 0x9c #define GC_RBOX_WAKEUP_INTR_KEY0_IN_FED_LSB 0x7 #define GC_RBOX_WAKEUP_INTR_KEY0_IN_FED_MASK 0x80 #define GC_RBOX_WAKEUP_INTR_KEY0_IN_FED_SIZE 0x1 #define GC_RBOX_WAKEUP_INTR_KEY0_IN_FED_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_KEY0_IN_FED_OFFSET 0x9c #define GC_RBOX_WAKEUP_INTR_KEY1_IN_RED_LSB 0x8 #define GC_RBOX_WAKEUP_INTR_KEY1_IN_RED_MASK 0x100 #define GC_RBOX_WAKEUP_INTR_KEY1_IN_RED_SIZE 0x1 #define GC_RBOX_WAKEUP_INTR_KEY1_IN_RED_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_KEY1_IN_RED_OFFSET 0x9c #define GC_RBOX_WAKEUP_INTR_KEY1_IN_FED_LSB 0x9 #define GC_RBOX_WAKEUP_INTR_KEY1_IN_FED_MASK 0x200 #define GC_RBOX_WAKEUP_INTR_KEY1_IN_FED_SIZE 0x1 #define GC_RBOX_WAKEUP_INTR_KEY1_IN_FED_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_KEY1_IN_FED_OFFSET 0x9c #define GC_RBOX_WAKEUP_INTR_EC_RST_RED_LSB 0xa #define GC_RBOX_WAKEUP_INTR_EC_RST_RED_MASK 0x400 #define GC_RBOX_WAKEUP_INTR_EC_RST_RED_SIZE 0x1 #define GC_RBOX_WAKEUP_INTR_EC_RST_RED_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_EC_RST_RED_OFFSET 0x9c #define GC_RBOX_WAKEUP_INTR_EC_RST_FED_LSB 0xb #define GC_RBOX_WAKEUP_INTR_EC_RST_FED_MASK 0x800 #define GC_RBOX_WAKEUP_INTR_EC_RST_FED_SIZE 0x1 #define GC_RBOX_WAKEUP_INTR_EC_RST_FED_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_EC_RST_FED_OFFSET 0x9c #define GC_RBOX_WAKEUP_INTR_BUTTON_COMBO0_RDY_LSB 0xc #define GC_RBOX_WAKEUP_INTR_BUTTON_COMBO0_RDY_MASK 0x1000 #define GC_RBOX_WAKEUP_INTR_BUTTON_COMBO0_RDY_SIZE 0x1 #define GC_RBOX_WAKEUP_INTR_BUTTON_COMBO0_RDY_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_BUTTON_COMBO0_RDY_OFFSET 0x9c #define GC_RBOX_WAKEUP_INTR_BUTTON_COMBO1_RDY_LSB 0xd #define GC_RBOX_WAKEUP_INTR_BUTTON_COMBO1_RDY_MASK 0x2000 #define GC_RBOX_WAKEUP_INTR_BUTTON_COMBO1_RDY_SIZE 0x1 #define GC_RBOX_WAKEUP_INTR_BUTTON_COMBO1_RDY_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_BUTTON_COMBO1_RDY_OFFSET 0x9c #define GC_RBOX_WAKEUP_INTR_BUTTON_COMBO2_RDY_LSB 0xe #define GC_RBOX_WAKEUP_INTR_BUTTON_COMBO2_RDY_MASK 0x4000 #define GC_RBOX_WAKEUP_INTR_BUTTON_COMBO2_RDY_SIZE 0x1 #define GC_RBOX_WAKEUP_INTR_BUTTON_COMBO2_RDY_DEFAULT 0x0 #define GC_RBOX_WAKEUP_INTR_BUTTON_COMBO2_RDY_OFFSET 0x9c #define GC_RBOX_VERSION_CHANGE_LSB 0x0 #define GC_RBOX_VERSION_CHANGE_MASK 0xffffff #define GC_RBOX_VERSION_CHANGE_SIZE 0x18 #define GC_RBOX_VERSION_CHANGE_DEFAULT 0x14125 #define GC_RBOX_VERSION_CHANGE_OFFSET 0xa0 #define GC_RBOX_VERSION_REVISION_LSB 0x18 #define GC_RBOX_VERSION_REVISION_MASK 0xff000000 #define GC_RBOX_VERSION_REVISION_SIZE 0x8 #define GC_RBOX_VERSION_REVISION_DEFAULT 0x1 #define GC_RBOX_VERSION_REVISION_OFFSET 0xa0 #define GC_RDD_VERSION_CHANGE_LSB 0x0 #define GC_RDD_VERSION_CHANGE_MASK 0xffffff #define GC_RDD_VERSION_CHANGE_SIZE 0x18 #define GC_RDD_VERSION_CHANGE_DEFAULT 0x11f09 #define GC_RDD_VERSION_CHANGE_OFFSET 0x0 #define GC_RDD_VERSION_REVISION_LSB 0x18 #define GC_RDD_VERSION_REVISION_MASK 0xff000000 #define GC_RDD_VERSION_REVISION_SIZE 0x8 #define GC_RDD_VERSION_REVISION_DEFAULT 0x24 #define GC_RDD_VERSION_REVISION_OFFSET 0x0 #define GC_RDD_INT_ENABLE_INTR_DEBUG_STATE_DETECTED_LSB 0x0 #define GC_RDD_INT_ENABLE_INTR_DEBUG_STATE_DETECTED_MASK 0x1 #define GC_RDD_INT_ENABLE_INTR_DEBUG_STATE_DETECTED_SIZE 0x1 #define GC_RDD_INT_ENABLE_INTR_DEBUG_STATE_DETECTED_DEFAULT 0x0 #define GC_RDD_INT_ENABLE_INTR_DEBUG_STATE_DETECTED_OFFSET 0x4 #define GC_RDD_INT_STATE_INTR_DEBUG_STATE_DETECTED_LSB 0x0 #define GC_RDD_INT_STATE_INTR_DEBUG_STATE_DETECTED_MASK 0x1 #define GC_RDD_INT_STATE_INTR_DEBUG_STATE_DETECTED_SIZE 0x1 #define GC_RDD_INT_STATE_INTR_DEBUG_STATE_DETECTED_DEFAULT 0x0 #define GC_RDD_INT_STATE_INTR_DEBUG_STATE_DETECTED_OFFSET 0x8 #define GC_RDD_INT_TEST_INTR_DEBUG_STATE_DETECTED_LSB 0x0 #define GC_RDD_INT_TEST_INTR_DEBUG_STATE_DETECTED_MASK 0x1 #define GC_RDD_INT_TEST_INTR_DEBUG_STATE_DETECTED_SIZE 0x1 #define GC_RDD_INT_TEST_INTR_DEBUG_STATE_DETECTED_DEFAULT 0x0 #define GC_RDD_INT_TEST_INTR_DEBUG_STATE_DETECTED_OFFSET 0xc #define GC_RDD_ANTEST_EN_LSB 0x0 #define GC_RDD_ANTEST_EN_MASK 0x1 #define GC_RDD_ANTEST_EN_SIZE 0x1 #define GC_RDD_ANTEST_EN_DEFAULT 0x0 #define GC_RDD_ANTEST_EN_OFFSET 0x14 #define GC_RDD_REF_ADJ_LVL0P2V_LSB 0x0 #define GC_RDD_REF_ADJ_LVL0P2V_MASK 0x3 #define GC_RDD_REF_ADJ_LVL0P2V_SIZE 0x2 #define GC_RDD_REF_ADJ_LVL0P2V_DEFAULT 0x1 #define GC_RDD_REF_ADJ_LVL0P2V_OFFSET 0x20 #define GC_RDD_REF_ADJ_LVL0P4V_LSB 0x2 #define GC_RDD_REF_ADJ_LVL0P4V_MASK 0xc #define GC_RDD_REF_ADJ_LVL0P4V_SIZE 0x2 #define GC_RDD_REF_ADJ_LVL0P4V_DEFAULT 0x1 #define GC_RDD_REF_ADJ_LVL0P4V_OFFSET 0x20 #define GC_RDD_REF_ADJ_LVL2P0V_LSB 0x4 #define GC_RDD_REF_ADJ_LVL2P0V_MASK 0x30 #define GC_RDD_REF_ADJ_LVL2P0V_SIZE 0x2 #define GC_RDD_REF_ADJ_LVL2P0V_DEFAULT 0x1 #define GC_RDD_REF_ADJ_LVL2P0V_OFFSET 0x20 #define GC_RDD_INPUT_PIN_VALUES_CC1_LSB 0x0 #define GC_RDD_INPUT_PIN_VALUES_CC1_MASK 0x7 #define GC_RDD_INPUT_PIN_VALUES_CC1_SIZE 0x3 #define GC_RDD_INPUT_PIN_VALUES_CC1_DEFAULT 0x0 #define GC_RDD_INPUT_PIN_VALUES_CC1_OFFSET 0x24 #define GC_RDD_INPUT_PIN_VALUES_CC2_LSB 0x3 #define GC_RDD_INPUT_PIN_VALUES_CC2_MASK 0x38 #define GC_RDD_INPUT_PIN_VALUES_CC2_SIZE 0x3 #define GC_RDD_INPUT_PIN_VALUES_CC2_DEFAULT 0x3 #define GC_RDD_INPUT_PIN_VALUES_CC2_OFFSET 0x24 #define GC_RDD_CUR_STABLE_STATE_DEBUG_LSB 0x0 #define GC_RDD_CUR_STABLE_STATE_DEBUG_MASK 0x1 #define GC_RDD_CUR_STABLE_STATE_DEBUG_SIZE 0x1 #define GC_RDD_CUR_STABLE_STATE_DEBUG_DEFAULT 0x0 #define GC_RDD_CUR_STABLE_STATE_DEBUG_OFFSET 0x2c #define GC_RDD_CUR_STABLE_STATE_INVALID_LSB 0x1 #define GC_RDD_CUR_STABLE_STATE_INVALID_MASK 0x2 #define GC_RDD_CUR_STABLE_STATE_INVALID_SIZE 0x1 #define GC_RDD_CUR_STABLE_STATE_INVALID_DEFAULT 0x1 #define GC_RDD_CUR_STABLE_STATE_INVALID_OFFSET 0x2c #define GC_RTC_CTRL_X_RTC_RC_CTRL_LSB 0x0 #define GC_RTC_CTRL_X_RTC_RC_CTRL_MASK 0xff #define GC_RTC_CTRL_X_RTC_RC_CTRL_SIZE 0x8 #define GC_RTC_CTRL_X_RTC_RC_CTRL_DEFAULT 0x0 #define GC_RTC_CTRL_X_RTC_RC_CTRL_OFFSET 0x0 #define GC_RTC_PULSE_STRETCH_CNT_LSB 0x0 #define GC_RTC_PULSE_STRETCH_CNT_MASK 0xffff #define GC_RTC_PULSE_STRETCH_CNT_SIZE 0x10 #define GC_RTC_PULSE_STRETCH_CNT_DEFAULT 0x0 #define GC_RTC_PULSE_STRETCH_CNT_OFFSET 0x8 #define GC_RTC_PULSE_STRETCH_EN_LSB 0x10 #define GC_RTC_PULSE_STRETCH_EN_MASK 0x10000 #define GC_RTC_PULSE_STRETCH_EN_SIZE 0x1 #define GC_RTC_PULSE_STRETCH_EN_DEFAULT 0x0 #define GC_RTC_PULSE_STRETCH_EN_OFFSET 0x8 #define GC_RTC_SW_TRIM_COUNTER_VALUE_LSB 0x0 #define GC_RTC_SW_TRIM_COUNTER_VALUE_MASK 0xffffff #define GC_RTC_SW_TRIM_COUNTER_VALUE_SIZE 0x18 #define GC_RTC_SW_TRIM_COUNTER_VALUE_DEFAULT 0x0 #define GC_RTC_SW_TRIM_COUNTER_VALUE_OFFSET 0x10 #define GC_RTC_SW_TRIM_COUNTER_DONE_LSB 0x18 #define GC_RTC_SW_TRIM_COUNTER_DONE_MASK 0x1000000 #define GC_RTC_SW_TRIM_COUNTER_DONE_SIZE 0x1 #define GC_RTC_SW_TRIM_COUNTER_DONE_DEFAULT 0x0 #define GC_RTC_SW_TRIM_COUNTER_DONE_OFFSET 0x10 #define GC_SPI_CTRL_CPOL_LSB 0x0 #define GC_SPI_CTRL_CPOL_MASK 0x1 #define GC_SPI_CTRL_CPOL_SIZE 0x1 #define GC_SPI_CTRL_CPOL_DEFAULT 0x0 #define GC_SPI_CTRL_CPOL_OFFSET 0x0 #define GC_SPI_CTRL_CPHA_LSB 0x1 #define GC_SPI_CTRL_CPHA_MASK 0x2 #define GC_SPI_CTRL_CPHA_SIZE 0x1 #define GC_SPI_CTRL_CPHA_DEFAULT 0x0 #define GC_SPI_CTRL_CPHA_OFFSET 0x0 #define GC_SPI_CTRL_CSBSU_LSB 0x2 #define GC_SPI_CTRL_CSBSU_MASK 0x3c #define GC_SPI_CTRL_CSBSU_SIZE 0x4 #define GC_SPI_CTRL_CSBSU_DEFAULT 0x0 #define GC_SPI_CTRL_CSBSU_OFFSET 0x0 #define GC_SPI_CTRL_CSBHLD_LSB 0x6 #define GC_SPI_CTRL_CSBHLD_MASK 0x3c0 #define GC_SPI_CTRL_CSBHLD_SIZE 0x4 #define GC_SPI_CTRL_CSBHLD_DEFAULT 0x0 #define GC_SPI_CTRL_CSBHLD_OFFSET 0x0 #define GC_SPI_CTRL_IDIV_LSB 0xa #define GC_SPI_CTRL_IDIV_MASK 0x3ffc00 #define GC_SPI_CTRL_IDIV_SIZE 0xc #define GC_SPI_CTRL_IDIV_DEFAULT 0x2 #define GC_SPI_CTRL_IDIV_OFFSET 0x0 #define GC_SPI_CTRL_CSBPOL_LSB 0x16 #define GC_SPI_CTRL_CSBPOL_MASK 0x400000 #define GC_SPI_CTRL_CSBPOL_SIZE 0x1 #define GC_SPI_CTRL_CSBPOL_DEFAULT 0x0 #define GC_SPI_CTRL_CSBPOL_OFFSET 0x0 #define GC_SPI_CTRL_TXBITOR_LSB 0x17 #define GC_SPI_CTRL_TXBITOR_MASK 0x800000 #define GC_SPI_CTRL_TXBITOR_SIZE 0x1 #define GC_SPI_CTRL_TXBITOR_DEFAULT 0x1 #define GC_SPI_CTRL_TXBITOR_OFFSET 0x0 #define GC_SPI_CTRL_TXBYTOR_LSB 0x18 #define GC_SPI_CTRL_TXBYTOR_MASK 0x1000000 #define GC_SPI_CTRL_TXBYTOR_SIZE 0x1 #define GC_SPI_CTRL_TXBYTOR_DEFAULT 0x0 #define GC_SPI_CTRL_TXBYTOR_OFFSET 0x0 #define GC_SPI_CTRL_RXBITOR_LSB 0x19 #define GC_SPI_CTRL_RXBITOR_MASK 0x2000000 #define GC_SPI_CTRL_RXBITOR_SIZE 0x1 #define GC_SPI_CTRL_RXBITOR_DEFAULT 0x1 #define GC_SPI_CTRL_RXBITOR_OFFSET 0x0 #define GC_SPI_CTRL_RXBYTOR_LSB 0x1a #define GC_SPI_CTRL_RXBYTOR_MASK 0x4000000 #define GC_SPI_CTRL_RXBYTOR_SIZE 0x1 #define GC_SPI_CTRL_RXBYTOR_DEFAULT 0x0 #define GC_SPI_CTRL_RXBYTOR_OFFSET 0x0 #define GC_SPI_CTRL_ENPASSTHRU_LSB 0x1b #define GC_SPI_CTRL_ENPASSTHRU_MASK 0x8000000 #define GC_SPI_CTRL_ENPASSTHRU_SIZE 0x1 #define GC_SPI_CTRL_ENPASSTHRU_DEFAULT 0x0 #define GC_SPI_CTRL_ENPASSTHRU_OFFSET 0x0 #define GC_SPI_XACT_START_LSB 0x0 #define GC_SPI_XACT_START_MASK 0x1 #define GC_SPI_XACT_START_SIZE 0x1 #define GC_SPI_XACT_START_DEFAULT 0x0 #define GC_SPI_XACT_START_OFFSET 0x4 #define GC_SPI_XACT_BCNT_LSB 0x1 #define GC_SPI_XACT_BCNT_MASK 0xe #define GC_SPI_XACT_BCNT_SIZE 0x3 #define GC_SPI_XACT_BCNT_DEFAULT 0x7 #define GC_SPI_XACT_BCNT_OFFSET 0x4 #define GC_SPI_XACT_SIZE_LSB 0x4 #define GC_SPI_XACT_SIZE_MASK 0x7f0 #define GC_SPI_XACT_SIZE_SIZE 0x7 #define GC_SPI_XACT_SIZE_DEFAULT 0x0 #define GC_SPI_XACT_SIZE_OFFSET 0x4 #define GC_SPI_XACT_RDY_POLL_LSB 0xb #define GC_SPI_XACT_RDY_POLL_MASK 0x800 #define GC_SPI_XACT_RDY_POLL_SIZE 0x1 #define GC_SPI_XACT_RDY_POLL_DEFAULT 0x0 #define GC_SPI_XACT_RDY_POLL_OFFSET 0x4 #define GC_SPI_XACT_RDY_POLL_DLY_LSB 0xc #define GC_SPI_XACT_RDY_POLL_DLY_MASK 0x1f000 #define GC_SPI_XACT_RDY_POLL_DLY_SIZE 0x5 #define GC_SPI_XACT_RDY_POLL_DLY_DEFAULT 0x0 #define GC_SPI_XACT_RDY_POLL_DLY_OFFSET 0x4 #define GC_SPI_ICTRL_TXDONE_LSB 0x0 #define GC_SPI_ICTRL_TXDONE_MASK 0x1 #define GC_SPI_ICTRL_TXDONE_SIZE 0x1 #define GC_SPI_ICTRL_TXDONE_DEFAULT 0x0 #define GC_SPI_ICTRL_TXDONE_OFFSET 0x8 #define GC_SPI_ISTATE_TXDONE_LSB 0x0 #define GC_SPI_ISTATE_TXDONE_MASK 0x1 #define GC_SPI_ISTATE_TXDONE_SIZE 0x1 #define GC_SPI_ISTATE_TXDONE_DEFAULT 0x0 #define GC_SPI_ISTATE_TXDONE_OFFSET 0xc #define GC_SPI_ISTATE_CLR_TXDONE_LSB 0x0 #define GC_SPI_ISTATE_CLR_TXDONE_MASK 0x1 #define GC_SPI_ISTATE_CLR_TXDONE_SIZE 0x1 #define GC_SPI_ISTATE_CLR_TXDONE_DEFAULT 0x0 #define GC_SPI_ISTATE_CLR_TXDONE_OFFSET 0x10 #define GC_SPI_OVRD_SCKEN_LSB 0x0 #define GC_SPI_OVRD_SCKEN_MASK 0x1 #define GC_SPI_OVRD_SCKEN_SIZE 0x1 #define GC_SPI_OVRD_SCKEN_DEFAULT 0x0 #define GC_SPI_OVRD_SCKEN_OFFSET 0x14 #define GC_SPI_OVRD_SCKVAL_LSB 0x1 #define GC_SPI_OVRD_SCKVAL_MASK 0x2 #define GC_SPI_OVRD_SCKVAL_SIZE 0x1 #define GC_SPI_OVRD_SCKVAL_DEFAULT 0x0 #define GC_SPI_OVRD_SCKVAL_OFFSET 0x14 #define GC_SPI_OVRD_CSBEN_LSB 0x2 #define GC_SPI_OVRD_CSBEN_MASK 0x4 #define GC_SPI_OVRD_CSBEN_SIZE 0x1 #define GC_SPI_OVRD_CSBEN_DEFAULT 0x0 #define GC_SPI_OVRD_CSBEN_OFFSET 0x14 #define GC_SPI_OVRD_CSBVAL_LSB 0x3 #define GC_SPI_OVRD_CSBVAL_MASK 0x8 #define GC_SPI_OVRD_CSBVAL_SIZE 0x1 #define GC_SPI_OVRD_CSBVAL_DEFAULT 0x1 #define GC_SPI_OVRD_CSBVAL_OFFSET 0x14 #define GC_SPI_OVRD_MOSIEN_LSB 0x4 #define GC_SPI_OVRD_MOSIEN_MASK 0x10 #define GC_SPI_OVRD_MOSIEN_SIZE 0x1 #define GC_SPI_OVRD_MOSIEN_DEFAULT 0x0 #define GC_SPI_OVRD_MOSIEN_OFFSET 0x14 #define GC_SPI_OVRD_MOSIVAL_LSB 0x5 #define GC_SPI_OVRD_MOSIVAL_MASK 0x20 #define GC_SPI_OVRD_MOSIVAL_SIZE 0x1 #define GC_SPI_OVRD_MOSIVAL_DEFAULT 0x0 #define GC_SPI_OVRD_MOSIVAL_OFFSET 0x14 #define GC_SPI_VAL_MISO_LSB 0x0 #define GC_SPI_VAL_MISO_MASK 0x1 #define GC_SPI_VAL_MISO_SIZE 0x1 #define GC_SPI_VAL_MISO_DEFAULT 0x0 #define GC_SPI_VAL_MISO_OFFSET 0x18 #define GC_SPI_VAL_MOSI_LSB 0x1 #define GC_SPI_VAL_MOSI_MASK 0x2 #define GC_SPI_VAL_MOSI_SIZE 0x1 #define GC_SPI_VAL_MOSI_DEFAULT 0x0 #define GC_SPI_VAL_MOSI_OFFSET 0x18 #define GC_SPI_VAL_CSB_LSB 0x2 #define GC_SPI_VAL_CSB_MASK 0x4 #define GC_SPI_VAL_CSB_SIZE 0x1 #define GC_SPI_VAL_CSB_DEFAULT 0x0 #define GC_SPI_VAL_CSB_OFFSET 0x18 #define GC_SPI_VAL_SCK_LSB 0x3 #define GC_SPI_VAL_SCK_MASK 0x8 #define GC_SPI_VAL_SCK_SIZE 0x1 #define GC_SPI_VAL_SCK_DEFAULT 0x0 #define GC_SPI_VAL_SCK_OFFSET 0x18 #define GC_SPI_ITOP_TXDONE_LSB 0x0 #define GC_SPI_ITOP_TXDONE_MASK 0x1 #define GC_SPI_ITOP_TXDONE_SIZE 0x1 #define GC_SPI_ITOP_TXDONE_DEFAULT 0x0 #define GC_SPI_ITOP_TXDONE_OFFSET 0xf04 #define GC_SPS_CTRL_MODE_LSB 0x0 #define GC_SPS_CTRL_MODE_MASK 0x3 #define GC_SPS_CTRL_MODE_SIZE 0x2 #define GC_SPS_CTRL_MODE_DEFAULT 0x1 #define GC_SPS_CTRL_MODE_OFFSET 0x0 #define GC_SPS_CTRL_CPHA_LSB 0x2 #define GC_SPS_CTRL_CPHA_MASK 0x4 #define GC_SPS_CTRL_CPHA_SIZE 0x1 #define GC_SPS_CTRL_CPHA_DEFAULT 0x0 #define GC_SPS_CTRL_CPHA_OFFSET 0x0 #define GC_SPS_CTRL_CPOL_LSB 0x3 #define GC_SPS_CTRL_CPOL_MASK 0x8 #define GC_SPS_CTRL_CPOL_SIZE 0x1 #define GC_SPS_CTRL_CPOL_DEFAULT 0x0 #define GC_SPS_CTRL_CPOL_OFFSET 0x0 #define GC_SPS_CTRL_IDLE_LVL_LSB 0x4 #define GC_SPS_CTRL_IDLE_LVL_MASK 0x10 #define GC_SPS_CTRL_IDLE_LVL_SIZE 0x1 #define GC_SPS_CTRL_IDLE_LVL_DEFAULT 0x0 #define GC_SPS_CTRL_IDLE_LVL_OFFSET 0x0 #define GC_SPS_CTRL_TXBITOR_LSB 0x5 #define GC_SPS_CTRL_TXBITOR_MASK 0x20 #define GC_SPS_CTRL_TXBITOR_SIZE 0x1 #define GC_SPS_CTRL_TXBITOR_DEFAULT 0x0 #define GC_SPS_CTRL_TXBITOR_OFFSET 0x0 #define GC_SPS_CTRL_RXBITOR_LSB 0x6 #define GC_SPS_CTRL_RXBITOR_MASK 0x40 #define GC_SPS_CTRL_RXBITOR_SIZE 0x1 #define GC_SPS_CTRL_RXBITOR_DEFAULT 0x0 #define GC_SPS_CTRL_RXBITOR_OFFSET 0x0 #define GC_SPS_STATUS01_STATUS0L_LSB 0x0 #define GC_SPS_STATUS01_STATUS0L_MASK 0xff #define GC_SPS_STATUS01_STATUS0L_SIZE 0x8 #define GC_SPS_STATUS01_STATUS0L_DEFAULT 0x0 #define GC_SPS_STATUS01_STATUS0L_OFFSET 0x8 #define GC_SPS_STATUS01_STATUS0H_LSB 0x8 #define GC_SPS_STATUS01_STATUS0H_MASK 0xff00 #define GC_SPS_STATUS01_STATUS0H_SIZE 0x8 #define GC_SPS_STATUS01_STATUS0H_DEFAULT 0x0 #define GC_SPS_STATUS01_STATUS0H_OFFSET 0x8 #define GC_SPS_STATUS01_STATUS1_LSB 0x10 #define GC_SPS_STATUS01_STATUS1_MASK 0xffff0000 #define GC_SPS_STATUS01_STATUS1_SIZE 0x10 #define GC_SPS_STATUS01_STATUS1_DEFAULT 0x0 #define GC_SPS_STATUS01_STATUS1_OFFSET 0x8 #define GC_SPS_STATUS23_STATUS2_LSB 0x0 #define GC_SPS_STATUS23_STATUS2_MASK 0xffff #define GC_SPS_STATUS23_STATUS2_SIZE 0x10 #define GC_SPS_STATUS23_STATUS2_DEFAULT 0x0 #define GC_SPS_STATUS23_STATUS2_OFFSET 0xc #define GC_SPS_STATUS23_STATUS3_LSB 0x10 #define GC_SPS_STATUS23_STATUS3_MASK 0xffff0000 #define GC_SPS_STATUS23_STATUS3_SIZE 0x10 #define GC_SPS_STATUS23_STATUS3_DEFAULT 0x0 #define GC_SPS_STATUS23_STATUS3_OFFSET 0xc #define GC_SPS_STATUS45_STATUS4_LSB 0x0 #define GC_SPS_STATUS45_STATUS4_MASK 0xffff #define GC_SPS_STATUS45_STATUS4_SIZE 0x10 #define GC_SPS_STATUS45_STATUS4_DEFAULT 0x0 #define GC_SPS_STATUS45_STATUS4_OFFSET 0x10 #define GC_SPS_STATUS45_STATUS5_LSB 0x10 #define GC_SPS_STATUS45_STATUS5_MASK 0xffff0000 #define GC_SPS_STATUS45_STATUS5_SIZE 0x10 #define GC_SPS_STATUS45_STATUS5_DEFAULT 0x0 #define GC_SPS_STATUS45_STATUS5_OFFSET 0x10 #define GC_SPS_STATUS67_STATUS6_LSB 0x0 #define GC_SPS_STATUS67_STATUS6_MASK 0xffff #define GC_SPS_STATUS67_STATUS6_SIZE 0x10 #define GC_SPS_STATUS67_STATUS6_DEFAULT 0x0 #define GC_SPS_STATUS67_STATUS6_OFFSET 0x14 #define GC_SPS_STATUS67_STATUS7_LSB 0x10 #define GC_SPS_STATUS67_STATUS7_MASK 0xffff0000 #define GC_SPS_STATUS67_STATUS7_SIZE 0x10 #define GC_SPS_STATUS67_STATUS7_DEFAULT 0x0 #define GC_SPS_STATUS67_STATUS7_OFFSET 0x14 #define GC_SPS_CTRL01_CTRL0_LSB 0x0 #define GC_SPS_CTRL01_CTRL0_MASK 0xffff #define GC_SPS_CTRL01_CTRL0_SIZE 0x10 #define GC_SPS_CTRL01_CTRL0_DEFAULT 0x0 #define GC_SPS_CTRL01_CTRL0_OFFSET 0x18 #define GC_SPS_CTRL01_CTRL1_LSB 0x10 #define GC_SPS_CTRL01_CTRL1_MASK 0xffff0000 #define GC_SPS_CTRL01_CTRL1_SIZE 0x10 #define GC_SPS_CTRL01_CTRL1_DEFAULT 0x0 #define GC_SPS_CTRL01_CTRL1_OFFSET 0x18 #define GC_SPS_CTRL23_CTRL2_LSB 0x0 #define GC_SPS_CTRL23_CTRL2_MASK 0xffff #define GC_SPS_CTRL23_CTRL2_SIZE 0x10 #define GC_SPS_CTRL23_CTRL2_DEFAULT 0x0 #define GC_SPS_CTRL23_CTRL2_OFFSET 0x1c #define GC_SPS_CTRL23_CTRL3_LSB 0x10 #define GC_SPS_CTRL23_CTRL3_MASK 0xffff0000 #define GC_SPS_CTRL23_CTRL3_SIZE 0x10 #define GC_SPS_CTRL23_CTRL3_DEFAULT 0x0 #define GC_SPS_CTRL23_CTRL3_OFFSET 0x1c #define GC_SPS_CTRL45_CTRL4_LSB 0x0 #define GC_SPS_CTRL45_CTRL4_MASK 0xffff #define GC_SPS_CTRL45_CTRL4_SIZE 0x10 #define GC_SPS_CTRL45_CTRL4_DEFAULT 0x0 #define GC_SPS_CTRL45_CTRL4_OFFSET 0x20 #define GC_SPS_CTRL45_CTRL5_LSB 0x10 #define GC_SPS_CTRL45_CTRL5_MASK 0xffff0000 #define GC_SPS_CTRL45_CTRL5_SIZE 0x10 #define GC_SPS_CTRL45_CTRL5_DEFAULT 0x0 #define GC_SPS_CTRL45_CTRL5_OFFSET 0x20 #define GC_SPS_CTRL67_CTRL6_LSB 0x0 #define GC_SPS_CTRL67_CTRL6_MASK 0xffff #define GC_SPS_CTRL67_CTRL6_SIZE 0x10 #define GC_SPS_CTRL67_CTRL6_DEFAULT 0x0 #define GC_SPS_CTRL67_CTRL6_OFFSET 0x24 #define GC_SPS_CTRL67_CTRL7_LSB 0x10 #define GC_SPS_CTRL67_CTRL7_MASK 0xffff0000 #define GC_SPS_CTRL67_CTRL7_SIZE 0x10 #define GC_SPS_CTRL67_CTRL7_DEFAULT 0x0 #define GC_SPS_CTRL67_CTRL7_OFFSET 0x24 #define GC_SPS_FIFO_CTRL_TXFIFO_RST_LSB 0x0 #define GC_SPS_FIFO_CTRL_TXFIFO_RST_MASK 0x1 #define GC_SPS_FIFO_CTRL_TXFIFO_RST_SIZE 0x1 #define GC_SPS_FIFO_CTRL_TXFIFO_RST_DEFAULT 0x0 #define GC_SPS_FIFO_CTRL_TXFIFO_RST_OFFSET 0x28 #define GC_SPS_FIFO_CTRL_TXFIFO_EN_LSB 0x1 #define GC_SPS_FIFO_CTRL_TXFIFO_EN_MASK 0x2 #define GC_SPS_FIFO_CTRL_TXFIFO_EN_SIZE 0x1 #define GC_SPS_FIFO_CTRL_TXFIFO_EN_DEFAULT 0x0 #define GC_SPS_FIFO_CTRL_TXFIFO_EN_OFFSET 0x28 #define GC_SPS_FIFO_CTRL_TXFIFO_AUTO_DIS_LSB 0x2 #define GC_SPS_FIFO_CTRL_TXFIFO_AUTO_DIS_MASK 0x4 #define GC_SPS_FIFO_CTRL_TXFIFO_AUTO_DIS_SIZE 0x1 #define GC_SPS_FIFO_CTRL_TXFIFO_AUTO_DIS_DEFAULT 0x0 #define GC_SPS_FIFO_CTRL_TXFIFO_AUTO_DIS_OFFSET 0x28 #define GC_SPS_FIFO_CTRL_RXFIFO_RST_LSB 0x3 #define GC_SPS_FIFO_CTRL_RXFIFO_RST_MASK 0x8 #define GC_SPS_FIFO_CTRL_RXFIFO_RST_SIZE 0x1 #define GC_SPS_FIFO_CTRL_RXFIFO_RST_DEFAULT 0x0 #define GC_SPS_FIFO_CTRL_RXFIFO_RST_OFFSET 0x28 #define GC_SPS_FIFO_CTRL_RXFIFO_EN_LSB 0x4 #define GC_SPS_FIFO_CTRL_RXFIFO_EN_MASK 0x10 #define GC_SPS_FIFO_CTRL_RXFIFO_EN_SIZE 0x1 #define GC_SPS_FIFO_CTRL_RXFIFO_EN_DEFAULT 0x0 #define GC_SPS_FIFO_CTRL_RXFIFO_EN_OFFSET 0x28 #define GC_SPS_FIFO_CTRL_RXFIFO_AUTO_DIS_LSB 0x5 #define GC_SPS_FIFO_CTRL_RXFIFO_AUTO_DIS_MASK 0x20 #define GC_SPS_FIFO_CTRL_RXFIFO_AUTO_DIS_SIZE 0x1 #define GC_SPS_FIFO_CTRL_RXFIFO_AUTO_DIS_DEFAULT 0x0 #define GC_SPS_FIFO_CTRL_RXFIFO_AUTO_DIS_OFFSET 0x28 #define GC_SPS_OVRD_MISOEN_LSB 0x0 #define GC_SPS_OVRD_MISOEN_MASK 0x1 #define GC_SPS_OVRD_MISOEN_SIZE 0x1 #define GC_SPS_OVRD_MISOEN_DEFAULT 0x0 #define GC_SPS_OVRD_MISOEN_OFFSET 0x4c #define GC_SPS_OVRD_MISOVAL_LSB 0x1 #define GC_SPS_OVRD_MISOVAL_MASK 0x2 #define GC_SPS_OVRD_MISOVAL_SIZE 0x1 #define GC_SPS_OVRD_MISOVAL_DEFAULT 0x0 #define GC_SPS_OVRD_MISOVAL_OFFSET 0x4c #define GC_SPS_VAL_MISO_LSB 0x0 #define GC_SPS_VAL_MISO_MASK 0x1 #define GC_SPS_VAL_MISO_SIZE 0x1 #define GC_SPS_VAL_MISO_DEFAULT 0x0 #define GC_SPS_VAL_MISO_OFFSET 0x50 #define GC_SPS_VAL_MOSI_LSB 0x1 #define GC_SPS_VAL_MOSI_MASK 0x2 #define GC_SPS_VAL_MOSI_SIZE 0x1 #define GC_SPS_VAL_MOSI_DEFAULT 0x0 #define GC_SPS_VAL_MOSI_OFFSET 0x50 #define GC_SPS_VAL_CSB_LSB 0x2 #define GC_SPS_VAL_CSB_MASK 0x4 #define GC_SPS_VAL_CSB_SIZE 0x1 #define GC_SPS_VAL_CSB_DEFAULT 0x0 #define GC_SPS_VAL_CSB_OFFSET 0x50 #define GC_SPS_VAL_SCK_LSB 0x3 #define GC_SPS_VAL_SCK_MASK 0x8 #define GC_SPS_VAL_SCK_SIZE 0x1 #define GC_SPS_VAL_SCK_DEFAULT 0x0 #define GC_SPS_VAL_SCK_OFFSET 0x50 #define GC_SPS_ISTATE_CTLWR0_LSB 0x0 #define GC_SPS_ISTATE_CTLWR0_MASK 0x1 #define GC_SPS_ISTATE_CTLWR0_SIZE 0x1 #define GC_SPS_ISTATE_CTLWR0_DEFAULT 0x0 #define GC_SPS_ISTATE_CTLWR0_OFFSET 0x54 #define GC_SPS_ISTATE_CTLWR1_LSB 0x1 #define GC_SPS_ISTATE_CTLWR1_MASK 0x2 #define GC_SPS_ISTATE_CTLWR1_SIZE 0x1 #define GC_SPS_ISTATE_CTLWR1_DEFAULT 0x0 #define GC_SPS_ISTATE_CTLWR1_OFFSET 0x54 #define GC_SPS_ISTATE_CTLWR2_LSB 0x2 #define GC_SPS_ISTATE_CTLWR2_MASK 0x4 #define GC_SPS_ISTATE_CTLWR2_SIZE 0x1 #define GC_SPS_ISTATE_CTLWR2_DEFAULT 0x0 #define GC_SPS_ISTATE_CTLWR2_OFFSET 0x54 #define GC_SPS_ISTATE_CTLWR3_LSB 0x3 #define GC_SPS_ISTATE_CTLWR3_MASK 0x8 #define GC_SPS_ISTATE_CTLWR3_SIZE 0x1 #define GC_SPS_ISTATE_CTLWR3_DEFAULT 0x0 #define GC_SPS_ISTATE_CTLWR3_OFFSET 0x54 #define GC_SPS_ISTATE_CTLWR4_LSB 0x4 #define GC_SPS_ISTATE_CTLWR4_MASK 0x10 #define GC_SPS_ISTATE_CTLWR4_SIZE 0x1 #define GC_SPS_ISTATE_CTLWR4_DEFAULT 0x0 #define GC_SPS_ISTATE_CTLWR4_OFFSET 0x54 #define GC_SPS_ISTATE_CTLWR5_LSB 0x5 #define GC_SPS_ISTATE_CTLWR5_MASK 0x20 #define GC_SPS_ISTATE_CTLWR5_SIZE 0x1 #define GC_SPS_ISTATE_CTLWR5_DEFAULT 0x0 #define GC_SPS_ISTATE_CTLWR5_OFFSET 0x54 #define GC_SPS_ISTATE_CTLWR6_LSB 0x6 #define GC_SPS_ISTATE_CTLWR6_MASK 0x40 #define GC_SPS_ISTATE_CTLWR6_SIZE 0x1 #define GC_SPS_ISTATE_CTLWR6_DEFAULT 0x0 #define GC_SPS_ISTATE_CTLWR6_OFFSET 0x54 #define GC_SPS_ISTATE_CTLWR7_LSB 0x7 #define GC_SPS_ISTATE_CTLWR7_MASK 0x80 #define GC_SPS_ISTATE_CTLWR7_SIZE 0x1 #define GC_SPS_ISTATE_CTLWR7_DEFAULT 0x0 #define GC_SPS_ISTATE_CTLWR7_OFFSET 0x54 #define GC_SPS_ISTATE_CS_ASSERT_LSB 0x8 #define GC_SPS_ISTATE_CS_ASSERT_MASK 0x100 #define GC_SPS_ISTATE_CS_ASSERT_SIZE 0x1 #define GC_SPS_ISTATE_CS_ASSERT_DEFAULT 0x0 #define GC_SPS_ISTATE_CS_ASSERT_OFFSET 0x54 #define GC_SPS_ISTATE_CS_DEASSERT_LSB 0x9 #define GC_SPS_ISTATE_CS_DEASSERT_MASK 0x200 #define GC_SPS_ISTATE_CS_DEASSERT_SIZE 0x1 #define GC_SPS_ISTATE_CS_DEASSERT_DEFAULT 0x0 #define GC_SPS_ISTATE_CS_DEASSERT_OFFSET 0x54 #define GC_SPS_ISTATE_RXFIFO_OVERFLOW_LSB 0xa #define GC_SPS_ISTATE_RXFIFO_OVERFLOW_MASK 0x400 #define GC_SPS_ISTATE_RXFIFO_OVERFLOW_SIZE 0x1 #define GC_SPS_ISTATE_RXFIFO_OVERFLOW_DEFAULT 0x0 #define GC_SPS_ISTATE_RXFIFO_OVERFLOW_OFFSET 0x54 #define GC_SPS_ISTATE_TXFIFO_EMPTY_LSB 0xb #define GC_SPS_ISTATE_TXFIFO_EMPTY_MASK 0x800 #define GC_SPS_ISTATE_TXFIFO_EMPTY_SIZE 0x1 #define GC_SPS_ISTATE_TXFIFO_EMPTY_DEFAULT 0x0 #define GC_SPS_ISTATE_TXFIFO_EMPTY_OFFSET 0x54 #define GC_SPS_ISTATE_TXFIFO_FULL_LSB 0xc #define GC_SPS_ISTATE_TXFIFO_FULL_MASK 0x1000 #define GC_SPS_ISTATE_TXFIFO_FULL_SIZE 0x1 #define GC_SPS_ISTATE_TXFIFO_FULL_DEFAULT 0x0 #define GC_SPS_ISTATE_TXFIFO_FULL_OFFSET 0x54 #define GC_SPS_ISTATE_TXFIFO_LVL_LSB 0xd #define GC_SPS_ISTATE_TXFIFO_LVL_MASK 0x2000 #define GC_SPS_ISTATE_TXFIFO_LVL_SIZE 0x1 #define GC_SPS_ISTATE_TXFIFO_LVL_DEFAULT 0x0 #define GC_SPS_ISTATE_TXFIFO_LVL_OFFSET 0x54 #define GC_SPS_ISTATE_RXFIFO_LVL_LSB 0xe #define GC_SPS_ISTATE_RXFIFO_LVL_MASK 0x4000 #define GC_SPS_ISTATE_RXFIFO_LVL_SIZE 0x1 #define GC_SPS_ISTATE_RXFIFO_LVL_DEFAULT 0x0 #define GC_SPS_ISTATE_RXFIFO_LVL_OFFSET 0x54 #define GC_SPS_ISTATE_CLR_CTLWR0_LSB 0x0 #define GC_SPS_ISTATE_CLR_CTLWR0_MASK 0x1 #define GC_SPS_ISTATE_CLR_CTLWR0_SIZE 0x1 #define GC_SPS_ISTATE_CLR_CTLWR0_DEFAULT 0x0 #define GC_SPS_ISTATE_CLR_CTLWR0_OFFSET 0x58 #define GC_SPS_ISTATE_CLR_CTLWR1_LSB 0x1 #define GC_SPS_ISTATE_CLR_CTLWR1_MASK 0x2 #define GC_SPS_ISTATE_CLR_CTLWR1_SIZE 0x1 #define GC_SPS_ISTATE_CLR_CTLWR1_DEFAULT 0x0 #define GC_SPS_ISTATE_CLR_CTLWR1_OFFSET 0x58 #define GC_SPS_ISTATE_CLR_CTLWR2_LSB 0x2 #define GC_SPS_ISTATE_CLR_CTLWR2_MASK 0x4 #define GC_SPS_ISTATE_CLR_CTLWR2_SIZE 0x1 #define GC_SPS_ISTATE_CLR_CTLWR2_DEFAULT 0x0 #define GC_SPS_ISTATE_CLR_CTLWR2_OFFSET 0x58 #define GC_SPS_ISTATE_CLR_CTLWR3_LSB 0x3 #define GC_SPS_ISTATE_CLR_CTLWR3_MASK 0x8 #define GC_SPS_ISTATE_CLR_CTLWR3_SIZE 0x1 #define GC_SPS_ISTATE_CLR_CTLWR3_DEFAULT 0x0 #define GC_SPS_ISTATE_CLR_CTLWR3_OFFSET 0x58 #define GC_SPS_ISTATE_CLR_CTLWR4_LSB 0x4 #define GC_SPS_ISTATE_CLR_CTLWR4_MASK 0x10 #define GC_SPS_ISTATE_CLR_CTLWR4_SIZE 0x1 #define GC_SPS_ISTATE_CLR_CTLWR4_DEFAULT 0x0 #define GC_SPS_ISTATE_CLR_CTLWR4_OFFSET 0x58 #define GC_SPS_ISTATE_CLR_CTLWR5_LSB 0x5 #define GC_SPS_ISTATE_CLR_CTLWR5_MASK 0x20 #define GC_SPS_ISTATE_CLR_CTLWR5_SIZE 0x1 #define GC_SPS_ISTATE_CLR_CTLWR5_DEFAULT 0x0 #define GC_SPS_ISTATE_CLR_CTLWR5_OFFSET 0x58 #define GC_SPS_ISTATE_CLR_CTLWR6_LSB 0x6 #define GC_SPS_ISTATE_CLR_CTLWR6_MASK 0x40 #define GC_SPS_ISTATE_CLR_CTLWR6_SIZE 0x1 #define GC_SPS_ISTATE_CLR_CTLWR6_DEFAULT 0x0 #define GC_SPS_ISTATE_CLR_CTLWR6_OFFSET 0x58 #define GC_SPS_ISTATE_CLR_CTLWR7_LSB 0x7 #define GC_SPS_ISTATE_CLR_CTLWR7_MASK 0x80 #define GC_SPS_ISTATE_CLR_CTLWR7_SIZE 0x1 #define GC_SPS_ISTATE_CLR_CTLWR7_DEFAULT 0x0 #define GC_SPS_ISTATE_CLR_CTLWR7_OFFSET 0x58 #define GC_SPS_ISTATE_CLR_CS_ASSERT_LSB 0x8 #define GC_SPS_ISTATE_CLR_CS_ASSERT_MASK 0x100 #define GC_SPS_ISTATE_CLR_CS_ASSERT_SIZE 0x1 #define GC_SPS_ISTATE_CLR_CS_ASSERT_DEFAULT 0x0 #define GC_SPS_ISTATE_CLR_CS_ASSERT_OFFSET 0x58 #define GC_SPS_ISTATE_CLR_CS_DEASSERT_LSB 0x9 #define GC_SPS_ISTATE_CLR_CS_DEASSERT_MASK 0x200 #define GC_SPS_ISTATE_CLR_CS_DEASSERT_SIZE 0x1 #define GC_SPS_ISTATE_CLR_CS_DEASSERT_DEFAULT 0x0 #define GC_SPS_ISTATE_CLR_CS_DEASSERT_OFFSET 0x58 #define GC_SPS_ISTATE_CLR_RXFIFO_OVERFLOW_LSB 0xa #define GC_SPS_ISTATE_CLR_RXFIFO_OVERFLOW_MASK 0x400 #define GC_SPS_ISTATE_CLR_RXFIFO_OVERFLOW_SIZE 0x1 #define GC_SPS_ISTATE_CLR_RXFIFO_OVERFLOW_DEFAULT 0x0 #define GC_SPS_ISTATE_CLR_RXFIFO_OVERFLOW_OFFSET 0x58 #define GC_SPS_ITOP_CTRLINT0_LSB 0x0 #define GC_SPS_ITOP_CTRLINT0_MASK 0x1 #define GC_SPS_ITOP_CTRLINT0_SIZE 0x1 #define GC_SPS_ITOP_CTRLINT0_DEFAULT 0x0 #define GC_SPS_ITOP_CTRLINT0_OFFSET 0x60 #define GC_SPS_ITOP_CTRLINT1_LSB 0x1 #define GC_SPS_ITOP_CTRLINT1_MASK 0x2 #define GC_SPS_ITOP_CTRLINT1_SIZE 0x1 #define GC_SPS_ITOP_CTRLINT1_DEFAULT 0x0 #define GC_SPS_ITOP_CTRLINT1_OFFSET 0x60 #define GC_SPS_ITOP_CTRLINT2_LSB 0x2 #define GC_SPS_ITOP_CTRLINT2_MASK 0x4 #define GC_SPS_ITOP_CTRLINT2_SIZE 0x1 #define GC_SPS_ITOP_CTRLINT2_DEFAULT 0x0 #define GC_SPS_ITOP_CTRLINT2_OFFSET 0x60 #define GC_SPS_ITOP_CTRLINT3_LSB 0x3 #define GC_SPS_ITOP_CTRLINT3_MASK 0x8 #define GC_SPS_ITOP_CTRLINT3_SIZE 0x1 #define GC_SPS_ITOP_CTRLINT3_DEFAULT 0x0 #define GC_SPS_ITOP_CTRLINT3_OFFSET 0x60 #define GC_SPS_ITOP_CTRLINT4_LSB 0x4 #define GC_SPS_ITOP_CTRLINT4_MASK 0x10 #define GC_SPS_ITOP_CTRLINT4_SIZE 0x1 #define GC_SPS_ITOP_CTRLINT4_DEFAULT 0x0 #define GC_SPS_ITOP_CTRLINT4_OFFSET 0x60 #define GC_SPS_ITOP_CTRLINT5_LSB 0x5 #define GC_SPS_ITOP_CTRLINT5_MASK 0x20 #define GC_SPS_ITOP_CTRLINT5_SIZE 0x1 #define GC_SPS_ITOP_CTRLINT5_DEFAULT 0x0 #define GC_SPS_ITOP_CTRLINT5_OFFSET 0x60 #define GC_SPS_ITOP_CTRLINT6_LSB 0x6 #define GC_SPS_ITOP_CTRLINT6_MASK 0x40 #define GC_SPS_ITOP_CTRLINT6_SIZE 0x1 #define GC_SPS_ITOP_CTRLINT6_DEFAULT 0x0 #define GC_SPS_ITOP_CTRLINT6_OFFSET 0x60 #define GC_SPS_ITOP_CTRLINT7_LSB 0x7 #define GC_SPS_ITOP_CTRLINT7_MASK 0x80 #define GC_SPS_ITOP_CTRLINT7_SIZE 0x1 #define GC_SPS_ITOP_CTRLINT7_DEFAULT 0x0 #define GC_SPS_ITOP_CTRLINT7_OFFSET 0x60 #define GC_SPS_ITOP_CS_ASSERT_LSB 0x8 #define GC_SPS_ITOP_CS_ASSERT_MASK 0x100 #define GC_SPS_ITOP_CS_ASSERT_SIZE 0x1 #define GC_SPS_ITOP_CS_ASSERT_DEFAULT 0x0 #define GC_SPS_ITOP_CS_ASSERT_OFFSET 0x60 #define GC_SPS_ITOP_CS_DEASSERT_LSB 0x9 #define GC_SPS_ITOP_CS_DEASSERT_MASK 0x200 #define GC_SPS_ITOP_CS_DEASSERT_SIZE 0x1 #define GC_SPS_ITOP_CS_DEASSERT_DEFAULT 0x0 #define GC_SPS_ITOP_CS_DEASSERT_OFFSET 0x60 #define GC_SPS_ITOP_RXFIFO_OVERFLOW_LSB 0xa #define GC_SPS_ITOP_RXFIFO_OVERFLOW_MASK 0x400 #define GC_SPS_ITOP_RXFIFO_OVERFLOW_SIZE 0x1 #define GC_SPS_ITOP_RXFIFO_OVERFLOW_DEFAULT 0x0 #define GC_SPS_ITOP_RXFIFO_OVERFLOW_OFFSET 0x60 #define GC_SPS_ITOP_TXFIFO_EMPTY_LSB 0xb #define GC_SPS_ITOP_TXFIFO_EMPTY_MASK 0x800 #define GC_SPS_ITOP_TXFIFO_EMPTY_SIZE 0x1 #define GC_SPS_ITOP_TXFIFO_EMPTY_DEFAULT 0x0 #define GC_SPS_ITOP_TXFIFO_EMPTY_OFFSET 0x60 #define GC_SPS_ITOP_TXFIFO_FULL_LSB 0xc #define GC_SPS_ITOP_TXFIFO_FULL_MASK 0x1000 #define GC_SPS_ITOP_TXFIFO_FULL_SIZE 0x1 #define GC_SPS_ITOP_TXFIFO_FULL_DEFAULT 0x0 #define GC_SPS_ITOP_TXFIFO_FULL_OFFSET 0x60 #define GC_SPS_ITOP_TXFIFO_LVL_LSB 0xd #define GC_SPS_ITOP_TXFIFO_LVL_MASK 0x2000 #define GC_SPS_ITOP_TXFIFO_LVL_SIZE 0x1 #define GC_SPS_ITOP_TXFIFO_LVL_DEFAULT 0x0 #define GC_SPS_ITOP_TXFIFO_LVL_OFFSET 0x60 #define GC_SPS_ITOP_RXFIFO_LVL_LSB 0xe #define GC_SPS_ITOP_RXFIFO_LVL_MASK 0x4000 #define GC_SPS_ITOP_RXFIFO_LVL_SIZE 0x1 #define GC_SPS_ITOP_RXFIFO_LVL_DEFAULT 0x0 #define GC_SPS_ITOP_RXFIFO_LVL_OFFSET 0x60 #define GC_SPS_ICTRL_CTLWR0_LSB 0x0 #define GC_SPS_ICTRL_CTLWR0_MASK 0x1 #define GC_SPS_ICTRL_CTLWR0_SIZE 0x1 #define GC_SPS_ICTRL_CTLWR0_DEFAULT 0x0 #define GC_SPS_ICTRL_CTLWR0_OFFSET 0x64 #define GC_SPS_ICTRL_CTLWR1_LSB 0x1 #define GC_SPS_ICTRL_CTLWR1_MASK 0x2 #define GC_SPS_ICTRL_CTLWR1_SIZE 0x1 #define GC_SPS_ICTRL_CTLWR1_DEFAULT 0x0 #define GC_SPS_ICTRL_CTLWR1_OFFSET 0x64 #define GC_SPS_ICTRL_CTLWR2_LSB 0x2 #define GC_SPS_ICTRL_CTLWR2_MASK 0x4 #define GC_SPS_ICTRL_CTLWR2_SIZE 0x1 #define GC_SPS_ICTRL_CTLWR2_DEFAULT 0x0 #define GC_SPS_ICTRL_CTLWR2_OFFSET 0x64 #define GC_SPS_ICTRL_CTLWR3_LSB 0x3 #define GC_SPS_ICTRL_CTLWR3_MASK 0x8 #define GC_SPS_ICTRL_CTLWR3_SIZE 0x1 #define GC_SPS_ICTRL_CTLWR3_DEFAULT 0x0 #define GC_SPS_ICTRL_CTLWR3_OFFSET 0x64 #define GC_SPS_ICTRL_CTLWR4_LSB 0x4 #define GC_SPS_ICTRL_CTLWR4_MASK 0x10 #define GC_SPS_ICTRL_CTLWR4_SIZE 0x1 #define GC_SPS_ICTRL_CTLWR4_DEFAULT 0x0 #define GC_SPS_ICTRL_CTLWR4_OFFSET 0x64 #define GC_SPS_ICTRL_CTLWR5_LSB 0x5 #define GC_SPS_ICTRL_CTLWR5_MASK 0x20 #define GC_SPS_ICTRL_CTLWR5_SIZE 0x1 #define GC_SPS_ICTRL_CTLWR5_DEFAULT 0x0 #define GC_SPS_ICTRL_CTLWR5_OFFSET 0x64 #define GC_SPS_ICTRL_CTLWR6_LSB 0x6 #define GC_SPS_ICTRL_CTLWR6_MASK 0x40 #define GC_SPS_ICTRL_CTLWR6_SIZE 0x1 #define GC_SPS_ICTRL_CTLWR6_DEFAULT 0x0 #define GC_SPS_ICTRL_CTLWR6_OFFSET 0x64 #define GC_SPS_ICTRL_CTLWR7_LSB 0x7 #define GC_SPS_ICTRL_CTLWR7_MASK 0x80 #define GC_SPS_ICTRL_CTLWR7_SIZE 0x1 #define GC_SPS_ICTRL_CTLWR7_DEFAULT 0x0 #define GC_SPS_ICTRL_CTLWR7_OFFSET 0x64 #define GC_SPS_ICTRL_CS_ASSERT_LSB 0x8 #define GC_SPS_ICTRL_CS_ASSERT_MASK 0x100 #define GC_SPS_ICTRL_CS_ASSERT_SIZE 0x1 #define GC_SPS_ICTRL_CS_ASSERT_DEFAULT 0x0 #define GC_SPS_ICTRL_CS_ASSERT_OFFSET 0x64 #define GC_SPS_ICTRL_CS_DEASSERT_LSB 0x9 #define GC_SPS_ICTRL_CS_DEASSERT_MASK 0x200 #define GC_SPS_ICTRL_CS_DEASSERT_SIZE 0x1 #define GC_SPS_ICTRL_CS_DEASSERT_DEFAULT 0x0 #define GC_SPS_ICTRL_CS_DEASSERT_OFFSET 0x64 #define GC_SPS_ICTRL_RXFIFO_OVERFLOW_LSB 0xa #define GC_SPS_ICTRL_RXFIFO_OVERFLOW_MASK 0x400 #define GC_SPS_ICTRL_RXFIFO_OVERFLOW_SIZE 0x1 #define GC_SPS_ICTRL_RXFIFO_OVERFLOW_DEFAULT 0x0 #define GC_SPS_ICTRL_RXFIFO_OVERFLOW_OFFSET 0x64 #define GC_SPS_ICTRL_TXFIFO_EMPTY_LSB 0xb #define GC_SPS_ICTRL_TXFIFO_EMPTY_MASK 0x800 #define GC_SPS_ICTRL_TXFIFO_EMPTY_SIZE 0x1 #define GC_SPS_ICTRL_TXFIFO_EMPTY_DEFAULT 0x0 #define GC_SPS_ICTRL_TXFIFO_EMPTY_OFFSET 0x64 #define GC_SPS_ICTRL_TXFIFO_FULL_LSB 0xc #define GC_SPS_ICTRL_TXFIFO_FULL_MASK 0x1000 #define GC_SPS_ICTRL_TXFIFO_FULL_SIZE 0x1 #define GC_SPS_ICTRL_TXFIFO_FULL_DEFAULT 0x0 #define GC_SPS_ICTRL_TXFIFO_FULL_OFFSET 0x64 #define GC_SPS_ICTRL_TXFIFO_LVL_LSB 0xd #define GC_SPS_ICTRL_TXFIFO_LVL_MASK 0x2000 #define GC_SPS_ICTRL_TXFIFO_LVL_SIZE 0x1 #define GC_SPS_ICTRL_TXFIFO_LVL_DEFAULT 0x0 #define GC_SPS_ICTRL_TXFIFO_LVL_OFFSET 0x64 #define GC_SPS_ICTRL_RXFIFO_LVL_LSB 0xe #define GC_SPS_ICTRL_RXFIFO_LVL_MASK 0x4000 #define GC_SPS_ICTRL_RXFIFO_LVL_SIZE 0x1 #define GC_SPS_ICTRL_RXFIFO_LVL_DEFAULT 0x0 #define GC_SPS_ICTRL_RXFIFO_LVL_OFFSET 0x64 #define GC_SPS_EEPROM_CTRL_ADDR_MODE_LSB 0x0 #define GC_SPS_EEPROM_CTRL_ADDR_MODE_MASK 0x1 #define GC_SPS_EEPROM_CTRL_ADDR_MODE_SIZE 0x1 #define GC_SPS_EEPROM_CTRL_ADDR_MODE_DEFAULT 0x0 #define GC_SPS_EEPROM_CTRL_ADDR_MODE_OFFSET 0x400 #define GC_SPS_EEPROM_CTRL_PASSTHRU_DIS_LSB 0x1 #define GC_SPS_EEPROM_CTRL_PASSTHRU_DIS_MASK 0x2 #define GC_SPS_EEPROM_CTRL_PASSTHRU_DIS_SIZE 0x1 #define GC_SPS_EEPROM_CTRL_PASSTHRU_DIS_DEFAULT 0x0 #define GC_SPS_EEPROM_CTRL_PASSTHRU_DIS_OFFSET 0x400 #define GC_SPS_EEPROM_CTRL_EXT_FLASH_DIS_LSB 0x2 #define GC_SPS_EEPROM_CTRL_EXT_FLASH_DIS_MASK 0x4 #define GC_SPS_EEPROM_CTRL_EXT_FLASH_DIS_SIZE 0x1 #define GC_SPS_EEPROM_CTRL_EXT_FLASH_DIS_DEFAULT 0x0 #define GC_SPS_EEPROM_CTRL_EXT_FLASH_DIS_OFFSET 0x400 #define GC_SPS_EEPROM_CTRL_INT_FLASH_DIS_LSB 0x3 #define GC_SPS_EEPROM_CTRL_INT_FLASH_DIS_MASK 0x8 #define GC_SPS_EEPROM_CTRL_INT_FLASH_DIS_SIZE 0x1 #define GC_SPS_EEPROM_CTRL_INT_FLASH_DIS_DEFAULT 0x0 #define GC_SPS_EEPROM_CTRL_INT_FLASH_DIS_OFFSET 0x400 #define GC_SPS_EEPROM_CTRL_RAM_DIS_LSB 0x4 #define GC_SPS_EEPROM_CTRL_RAM_DIS_MASK 0x10 #define GC_SPS_EEPROM_CTRL_RAM_DIS_SIZE 0x1 #define GC_SPS_EEPROM_CTRL_RAM_DIS_DEFAULT 0x0 #define GC_SPS_EEPROM_CTRL_RAM_DIS_OFFSET 0x400 #define GC_SPS_EEPROM_CTRL_MAILBOX_EN_LSB 0x5 #define GC_SPS_EEPROM_CTRL_MAILBOX_EN_MASK 0x20 #define GC_SPS_EEPROM_CTRL_MAILBOX_EN_SIZE 0x1 #define GC_SPS_EEPROM_CTRL_MAILBOX_EN_DEFAULT 0x0 #define GC_SPS_EEPROM_CTRL_MAILBOX_EN_OFFSET 0x400 #define GC_SPS_EEPROM_CTRL_FIFO_PREFETCH_LIMIT_LSB 0x6 #define GC_SPS_EEPROM_CTRL_FIFO_PREFETCH_LIMIT_MASK 0x3c0 #define GC_SPS_EEPROM_CTRL_FIFO_PREFETCH_LIMIT_SIZE 0x4 #define GC_SPS_EEPROM_CTRL_FIFO_PREFETCH_LIMIT_DEFAULT 0x2 #define GC_SPS_EEPROM_CTRL_FIFO_PREFETCH_LIMIT_OFFSET 0x400 #define GC_SPS_EEPROM_CTRL_FAST_DUAL_RD_EN_LSB 0xa #define GC_SPS_EEPROM_CTRL_FAST_DUAL_RD_EN_MASK 0x400 #define GC_SPS_EEPROM_CTRL_FAST_DUAL_RD_EN_SIZE 0x1 #define GC_SPS_EEPROM_CTRL_FAST_DUAL_RD_EN_DEFAULT 0x1 #define GC_SPS_EEPROM_CTRL_FAST_DUAL_RD_EN_OFFSET 0x400 #define GC_SPS_EEPROM_CTRL_VIRTUAL_ADDR_FILTER_EN_LSB 0xb #define GC_SPS_EEPROM_CTRL_VIRTUAL_ADDR_FILTER_EN_MASK 0x800 #define GC_SPS_EEPROM_CTRL_VIRTUAL_ADDR_FILTER_EN_SIZE 0x1 #define GC_SPS_EEPROM_CTRL_VIRTUAL_ADDR_FILTER_EN_DEFAULT 0x0 #define GC_SPS_EEPROM_CTRL_VIRTUAL_ADDR_FILTER_EN_OFFSET 0x400 #define GC_SPS_BUSY_OPCODE0_EN_LSB 0x0 #define GC_SPS_BUSY_OPCODE0_EN_MASK 0x1 #define GC_SPS_BUSY_OPCODE0_EN_SIZE 0x1 #define GC_SPS_BUSY_OPCODE0_EN_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE0_EN_OFFSET 0x40c #define GC_SPS_BUSY_OPCODE0_VALUE_LSB 0x1 #define GC_SPS_BUSY_OPCODE0_VALUE_MASK 0x1fe #define GC_SPS_BUSY_OPCODE0_VALUE_SIZE 0x8 #define GC_SPS_BUSY_OPCODE0_VALUE_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE0_VALUE_OFFSET 0x40c #define GC_SPS_BUSY_OPCODE1_EN_LSB 0x0 #define GC_SPS_BUSY_OPCODE1_EN_MASK 0x1 #define GC_SPS_BUSY_OPCODE1_EN_SIZE 0x1 #define GC_SPS_BUSY_OPCODE1_EN_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE1_EN_OFFSET 0x410 #define GC_SPS_BUSY_OPCODE1_VALUE_LSB 0x1 #define GC_SPS_BUSY_OPCODE1_VALUE_MASK 0x1fe #define GC_SPS_BUSY_OPCODE1_VALUE_SIZE 0x8 #define GC_SPS_BUSY_OPCODE1_VALUE_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE1_VALUE_OFFSET 0x410 #define GC_SPS_BUSY_OPCODE2_EN_LSB 0x0 #define GC_SPS_BUSY_OPCODE2_EN_MASK 0x1 #define GC_SPS_BUSY_OPCODE2_EN_SIZE 0x1 #define GC_SPS_BUSY_OPCODE2_EN_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE2_EN_OFFSET 0x414 #define GC_SPS_BUSY_OPCODE2_VALUE_LSB 0x1 #define GC_SPS_BUSY_OPCODE2_VALUE_MASK 0x1fe #define GC_SPS_BUSY_OPCODE2_VALUE_SIZE 0x8 #define GC_SPS_BUSY_OPCODE2_VALUE_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE2_VALUE_OFFSET 0x414 #define GC_SPS_BUSY_OPCODE3_EN_LSB 0x0 #define GC_SPS_BUSY_OPCODE3_EN_MASK 0x1 #define GC_SPS_BUSY_OPCODE3_EN_SIZE 0x1 #define GC_SPS_BUSY_OPCODE3_EN_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE3_EN_OFFSET 0x418 #define GC_SPS_BUSY_OPCODE3_VALUE_LSB 0x1 #define GC_SPS_BUSY_OPCODE3_VALUE_MASK 0x1fe #define GC_SPS_BUSY_OPCODE3_VALUE_SIZE 0x8 #define GC_SPS_BUSY_OPCODE3_VALUE_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE3_VALUE_OFFSET 0x418 #define GC_SPS_BUSY_OPCODE4_EN_LSB 0x0 #define GC_SPS_BUSY_OPCODE4_EN_MASK 0x1 #define GC_SPS_BUSY_OPCODE4_EN_SIZE 0x1 #define GC_SPS_BUSY_OPCODE4_EN_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE4_EN_OFFSET 0x41c #define GC_SPS_BUSY_OPCODE4_VALUE_LSB 0x1 #define GC_SPS_BUSY_OPCODE4_VALUE_MASK 0x1fe #define GC_SPS_BUSY_OPCODE4_VALUE_SIZE 0x8 #define GC_SPS_BUSY_OPCODE4_VALUE_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE4_VALUE_OFFSET 0x41c #define GC_SPS_BUSY_OPCODE5_EN_LSB 0x0 #define GC_SPS_BUSY_OPCODE5_EN_MASK 0x1 #define GC_SPS_BUSY_OPCODE5_EN_SIZE 0x1 #define GC_SPS_BUSY_OPCODE5_EN_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE5_EN_OFFSET 0x420 #define GC_SPS_BUSY_OPCODE5_VALUE_LSB 0x1 #define GC_SPS_BUSY_OPCODE5_VALUE_MASK 0x1fe #define GC_SPS_BUSY_OPCODE5_VALUE_SIZE 0x8 #define GC_SPS_BUSY_OPCODE5_VALUE_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE5_VALUE_OFFSET 0x420 #define GC_SPS_BUSY_OPCODE6_EN_LSB 0x0 #define GC_SPS_BUSY_OPCODE6_EN_MASK 0x1 #define GC_SPS_BUSY_OPCODE6_EN_SIZE 0x1 #define GC_SPS_BUSY_OPCODE6_EN_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE6_EN_OFFSET 0x424 #define GC_SPS_BUSY_OPCODE6_VALUE_LSB 0x1 #define GC_SPS_BUSY_OPCODE6_VALUE_MASK 0x1fe #define GC_SPS_BUSY_OPCODE6_VALUE_SIZE 0x8 #define GC_SPS_BUSY_OPCODE6_VALUE_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE6_VALUE_OFFSET 0x424 #define GC_SPS_BUSY_OPCODE7_EN_LSB 0x0 #define GC_SPS_BUSY_OPCODE7_EN_MASK 0x1 #define GC_SPS_BUSY_OPCODE7_EN_SIZE 0x1 #define GC_SPS_BUSY_OPCODE7_EN_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE7_EN_OFFSET 0x428 #define GC_SPS_BUSY_OPCODE7_VALUE_LSB 0x1 #define GC_SPS_BUSY_OPCODE7_VALUE_MASK 0x1fe #define GC_SPS_BUSY_OPCODE7_VALUE_SIZE 0x8 #define GC_SPS_BUSY_OPCODE7_VALUE_DEFAULT 0x0 #define GC_SPS_BUSY_OPCODE7_VALUE_OFFSET 0x428 #define GC_SPS_RAM_CTRL_PAGE0_WRAP_MODE_LSB 0x0 #define GC_SPS_RAM_CTRL_PAGE0_WRAP_MODE_MASK 0x1 #define GC_SPS_RAM_CTRL_PAGE0_WRAP_MODE_SIZE 0x1 #define GC_SPS_RAM_CTRL_PAGE0_WRAP_MODE_DEFAULT 0x0 #define GC_SPS_RAM_CTRL_PAGE0_WRAP_MODE_OFFSET 0x4dc #define GC_SPS_RAM_CTRL_PAGE0_INT_LVL_LSB 0x1 #define GC_SPS_RAM_CTRL_PAGE0_INT_LVL_MASK 0x3fe #define GC_SPS_RAM_CTRL_PAGE0_INT_LVL_SIZE 0x9 #define GC_SPS_RAM_CTRL_PAGE0_INT_LVL_DEFAULT 0x0 #define GC_SPS_RAM_CTRL_PAGE0_INT_LVL_OFFSET 0x4dc #define GC_SPS_RAM_CTRL_PAGE1_WRAP_MODE_LSB 0x0 #define GC_SPS_RAM_CTRL_PAGE1_WRAP_MODE_MASK 0x1 #define GC_SPS_RAM_CTRL_PAGE1_WRAP_MODE_SIZE 0x1 #define GC_SPS_RAM_CTRL_PAGE1_WRAP_MODE_DEFAULT 0x0 #define GC_SPS_RAM_CTRL_PAGE1_WRAP_MODE_OFFSET 0x4e0 #define GC_SPS_RAM_CTRL_PAGE1_INT_LVL_LSB 0x1 #define GC_SPS_RAM_CTRL_PAGE1_INT_LVL_MASK 0x3fe #define GC_SPS_RAM_CTRL_PAGE1_INT_LVL_SIZE 0x9 #define GC_SPS_RAM_CTRL_PAGE1_INT_LVL_DEFAULT 0x0 #define GC_SPS_RAM_CTRL_PAGE1_INT_LVL_OFFSET 0x4e0 #define GC_SPS_RAM_CTRL_PAGE2_WRAP_MODE_LSB 0x0 #define GC_SPS_RAM_CTRL_PAGE2_WRAP_MODE_MASK 0x1 #define GC_SPS_RAM_CTRL_PAGE2_WRAP_MODE_SIZE 0x1 #define GC_SPS_RAM_CTRL_PAGE2_WRAP_MODE_DEFAULT 0x0 #define GC_SPS_RAM_CTRL_PAGE2_WRAP_MODE_OFFSET 0x4e4 #define GC_SPS_RAM_CTRL_PAGE2_INT_LVL_LSB 0x1 #define GC_SPS_RAM_CTRL_PAGE2_INT_LVL_MASK 0x3fe #define GC_SPS_RAM_CTRL_PAGE2_INT_LVL_SIZE 0x9 #define GC_SPS_RAM_CTRL_PAGE2_INT_LVL_DEFAULT 0x0 #define GC_SPS_RAM_CTRL_PAGE2_INT_LVL_OFFSET 0x4e4 #define GC_SPS_RAM_CTRL_PAGE3_WRAP_MODE_LSB 0x0 #define GC_SPS_RAM_CTRL_PAGE3_WRAP_MODE_MASK 0x1 #define GC_SPS_RAM_CTRL_PAGE3_WRAP_MODE_SIZE 0x1 #define GC_SPS_RAM_CTRL_PAGE3_WRAP_MODE_DEFAULT 0x0 #define GC_SPS_RAM_CTRL_PAGE3_WRAP_MODE_OFFSET 0x4e8 #define GC_SPS_RAM_CTRL_PAGE3_INT_LVL_LSB 0x1 #define GC_SPS_RAM_CTRL_PAGE3_INT_LVL_MASK 0x3fe #define GC_SPS_RAM_CTRL_PAGE3_INT_LVL_SIZE 0x9 #define GC_SPS_RAM_CTRL_PAGE3_INT_LVL_DEFAULT 0x0 #define GC_SPS_RAM_CTRL_PAGE3_INT_LVL_OFFSET 0x4e8 #define GC_SPS_EEPROM_INT_ENABLE_INTR_CMD_ADDR_FIFO_NOT_EMPTY_LSB 0x0 #define GC_SPS_EEPROM_INT_ENABLE_INTR_CMD_ADDR_FIFO_NOT_EMPTY_MASK 0x1 #define GC_SPS_EEPROM_INT_ENABLE_INTR_CMD_ADDR_FIFO_NOT_EMPTY_SIZE 0x1 #define GC_SPS_EEPROM_INT_ENABLE_INTR_CMD_ADDR_FIFO_NOT_EMPTY_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_ENABLE_INTR_CMD_ADDR_FIFO_NOT_EMPTY_OFFSET 0x578 #define GC_SPS_EEPROM_INT_ENABLE_INTR_CMD_ADDR_FIFO_OVFL_LSB 0x1 #define GC_SPS_EEPROM_INT_ENABLE_INTR_CMD_ADDR_FIFO_OVFL_MASK 0x2 #define GC_SPS_EEPROM_INT_ENABLE_INTR_CMD_ADDR_FIFO_OVFL_SIZE 0x1 #define GC_SPS_EEPROM_INT_ENABLE_INTR_CMD_ADDR_FIFO_OVFL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_ENABLE_INTR_CMD_ADDR_FIFO_OVFL_OFFSET 0x578 #define GC_SPS_EEPROM_INT_ENABLE_INTR_CMD_MEM_OVFL_LSB 0x2 #define GC_SPS_EEPROM_INT_ENABLE_INTR_CMD_MEM_OVFL_MASK 0x4 #define GC_SPS_EEPROM_INT_ENABLE_INTR_CMD_MEM_OVFL_SIZE 0x1 #define GC_SPS_EEPROM_INT_ENABLE_INTR_CMD_MEM_OVFL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_ENABLE_INTR_CMD_MEM_OVFL_OFFSET 0x578 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE0_LVL_LSB 0x3 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE0_LVL_MASK 0x8 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE0_LVL_SIZE 0x1 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE0_LVL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE0_LVL_OFFSET 0x578 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE1_LVL_LSB 0x4 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE1_LVL_MASK 0x10 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE1_LVL_SIZE 0x1 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE1_LVL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE1_LVL_OFFSET 0x578 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE2_LVL_LSB 0x5 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE2_LVL_MASK 0x20 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE2_LVL_SIZE 0x1 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE2_LVL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE2_LVL_OFFSET 0x578 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE3_LVL_LSB 0x6 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE3_LVL_MASK 0x40 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE3_LVL_SIZE 0x1 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE3_LVL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_ENABLE_INTR_RAM_PAGE3_LVL_OFFSET 0x578 #define GC_SPS_EEPROM_INT_STATE_INTR_CMD_ADDR_FIFO_NOT_EMPTY_LSB 0x0 #define GC_SPS_EEPROM_INT_STATE_INTR_CMD_ADDR_FIFO_NOT_EMPTY_MASK 0x1 #define GC_SPS_EEPROM_INT_STATE_INTR_CMD_ADDR_FIFO_NOT_EMPTY_SIZE 0x1 #define GC_SPS_EEPROM_INT_STATE_INTR_CMD_ADDR_FIFO_NOT_EMPTY_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_STATE_INTR_CMD_ADDR_FIFO_NOT_EMPTY_OFFSET 0x57c #define GC_SPS_EEPROM_INT_STATE_INTR_CMD_ADDR_FIFO_OVFL_LSB 0x1 #define GC_SPS_EEPROM_INT_STATE_INTR_CMD_ADDR_FIFO_OVFL_MASK 0x2 #define GC_SPS_EEPROM_INT_STATE_INTR_CMD_ADDR_FIFO_OVFL_SIZE 0x1 #define GC_SPS_EEPROM_INT_STATE_INTR_CMD_ADDR_FIFO_OVFL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_STATE_INTR_CMD_ADDR_FIFO_OVFL_OFFSET 0x57c #define GC_SPS_EEPROM_INT_STATE_INTR_CMD_MEM_OVFL_LSB 0x2 #define GC_SPS_EEPROM_INT_STATE_INTR_CMD_MEM_OVFL_MASK 0x4 #define GC_SPS_EEPROM_INT_STATE_INTR_CMD_MEM_OVFL_SIZE 0x1 #define GC_SPS_EEPROM_INT_STATE_INTR_CMD_MEM_OVFL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_STATE_INTR_CMD_MEM_OVFL_OFFSET 0x57c #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE0_LVL_LSB 0x3 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE0_LVL_MASK 0x8 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE0_LVL_SIZE 0x1 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE0_LVL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE0_LVL_OFFSET 0x57c #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE1_LVL_LSB 0x4 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE1_LVL_MASK 0x10 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE1_LVL_SIZE 0x1 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE1_LVL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE1_LVL_OFFSET 0x57c #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE2_LVL_LSB 0x5 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE2_LVL_MASK 0x20 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE2_LVL_SIZE 0x1 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE2_LVL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE2_LVL_OFFSET 0x57c #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE3_LVL_LSB 0x6 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE3_LVL_MASK 0x40 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE3_LVL_SIZE 0x1 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE3_LVL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_STATE_INTR_RAM_PAGE3_LVL_OFFSET 0x57c #define GC_SPS_EEPROM_INT_TEST_INTR_CMD_ADDR_FIFO_NOT_EMPTY_LSB 0x0 #define GC_SPS_EEPROM_INT_TEST_INTR_CMD_ADDR_FIFO_NOT_EMPTY_MASK 0x1 #define GC_SPS_EEPROM_INT_TEST_INTR_CMD_ADDR_FIFO_NOT_EMPTY_SIZE 0x1 #define GC_SPS_EEPROM_INT_TEST_INTR_CMD_ADDR_FIFO_NOT_EMPTY_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_TEST_INTR_CMD_ADDR_FIFO_NOT_EMPTY_OFFSET 0x580 #define GC_SPS_EEPROM_INT_TEST_INTR_CMD_ADDR_FIFO_OVFL_LSB 0x1 #define GC_SPS_EEPROM_INT_TEST_INTR_CMD_ADDR_FIFO_OVFL_MASK 0x2 #define GC_SPS_EEPROM_INT_TEST_INTR_CMD_ADDR_FIFO_OVFL_SIZE 0x1 #define GC_SPS_EEPROM_INT_TEST_INTR_CMD_ADDR_FIFO_OVFL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_TEST_INTR_CMD_ADDR_FIFO_OVFL_OFFSET 0x580 #define GC_SPS_EEPROM_INT_TEST_INTR_CMD_MEM_OVFL_LSB 0x2 #define GC_SPS_EEPROM_INT_TEST_INTR_CMD_MEM_OVFL_MASK 0x4 #define GC_SPS_EEPROM_INT_TEST_INTR_CMD_MEM_OVFL_SIZE 0x1 #define GC_SPS_EEPROM_INT_TEST_INTR_CMD_MEM_OVFL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_TEST_INTR_CMD_MEM_OVFL_OFFSET 0x580 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE0_LVL_LSB 0x3 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE0_LVL_MASK 0x8 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE0_LVL_SIZE 0x1 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE0_LVL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE0_LVL_OFFSET 0x580 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE1_LVL_LSB 0x4 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE1_LVL_MASK 0x10 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE1_LVL_SIZE 0x1 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE1_LVL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE1_LVL_OFFSET 0x580 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE2_LVL_LSB 0x5 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE2_LVL_MASK 0x20 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE2_LVL_SIZE 0x1 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE2_LVL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE2_LVL_OFFSET 0x580 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE3_LVL_LSB 0x6 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE3_LVL_MASK 0x40 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE3_LVL_SIZE 0x1 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE3_LVL_DEFAULT 0x0 #define GC_SPS_EEPROM_INT_TEST_INTR_RAM_PAGE3_LVL_OFFSET 0x580 #define GC_SWDP_TEST_PORT_DISABLE_SWD_LSB 0x0 #define GC_SWDP_TEST_PORT_DISABLE_SWD_MASK 0x1 #define GC_SWDP_TEST_PORT_DISABLE_SWD_SIZE 0x1 #define GC_SWDP_TEST_PORT_DISABLE_SWD_DEFAULT 0x0 #define GC_SWDP_TEST_PORT_DISABLE_SWD_OFFSET 0x38 #define GC_SWDP_TEST_PORT_DISABLE_TAP_LSB 0x1 #define GC_SWDP_TEST_PORT_DISABLE_TAP_MASK 0x2 #define GC_SWDP_TEST_PORT_DISABLE_TAP_SIZE 0x1 #define GC_SWDP_TEST_PORT_DISABLE_TAP_DEFAULT 0x0 #define GC_SWDP_TEST_PORT_DISABLE_TAP_OFFSET 0x38 #define GC_TEMP_VERSION_CHANGE_LSB 0x0 #define GC_TEMP_VERSION_CHANGE_MASK 0xffffff #define GC_TEMP_VERSION_CHANGE_SIZE 0x18 #define GC_TEMP_VERSION_CHANGE_DEFAULT 0x14125 #define GC_TEMP_VERSION_CHANGE_OFFSET 0x0 #define GC_TEMP_VERSION_REVISION_LSB 0x18 #define GC_TEMP_VERSION_REVISION_MASK 0xff000000 #define GC_TEMP_VERSION_REVISION_SIZE 0x8 #define GC_TEMP_VERSION_REVISION_DEFAULT 0x1 #define GC_TEMP_VERSION_REVISION_OFFSET 0x0 #define GC_TEMP_ADC_INT_ENABLE_ADC_ICLKDV_LSB 0x0 #define GC_TEMP_ADC_INT_ENABLE_ADC_ICLKDV_MASK 0x1 #define GC_TEMP_ADC_INT_ENABLE_ADC_ICLKDV_SIZE 0x1 #define GC_TEMP_ADC_INT_ENABLE_ADC_ICLKDV_DEFAULT 0x0 #define GC_TEMP_ADC_INT_ENABLE_ADC_ICLKDV_OFFSET 0x4 #define GC_TEMP_ADC_INT_ENABLE_COMP_OVERFLOW_LSB 0x1 #define GC_TEMP_ADC_INT_ENABLE_COMP_OVERFLOW_MASK 0x2 #define GC_TEMP_ADC_INT_ENABLE_COMP_OVERFLOW_SIZE 0x1 #define GC_TEMP_ADC_INT_ENABLE_COMP_OVERFLOW_DEFAULT 0x0 #define GC_TEMP_ADC_INT_ENABLE_COMP_OVERFLOW_OFFSET 0x4 #define GC_TEMP_ADC_INT_STATE_ADC_ICLKDV_LSB 0x0 #define GC_TEMP_ADC_INT_STATE_ADC_ICLKDV_MASK 0x1 #define GC_TEMP_ADC_INT_STATE_ADC_ICLKDV_SIZE 0x1 #define GC_TEMP_ADC_INT_STATE_ADC_ICLKDV_DEFAULT 0x0 #define GC_TEMP_ADC_INT_STATE_ADC_ICLKDV_OFFSET 0x8 #define GC_TEMP_ADC_INT_STATE_COMP_OVERFLOW_LSB 0x1 #define GC_TEMP_ADC_INT_STATE_COMP_OVERFLOW_MASK 0x2 #define GC_TEMP_ADC_INT_STATE_COMP_OVERFLOW_SIZE 0x1 #define GC_TEMP_ADC_INT_STATE_COMP_OVERFLOW_DEFAULT 0x0 #define GC_TEMP_ADC_INT_STATE_COMP_OVERFLOW_OFFSET 0x8 #define GC_TEMP_ADC_INT_TEST_ADC_ICLKDV_LSB 0x0 #define GC_TEMP_ADC_INT_TEST_ADC_ICLKDV_MASK 0x1 #define GC_TEMP_ADC_INT_TEST_ADC_ICLKDV_SIZE 0x1 #define GC_TEMP_ADC_INT_TEST_ADC_ICLKDV_DEFAULT 0x0 #define GC_TEMP_ADC_INT_TEST_ADC_ICLKDV_OFFSET 0xc #define GC_TEMP_ADC_INT_TEST_COMP_OVERFLOW_LSB 0x1 #define GC_TEMP_ADC_INT_TEST_COMP_OVERFLOW_MASK 0x2 #define GC_TEMP_ADC_INT_TEST_COMP_OVERFLOW_SIZE 0x1 #define GC_TEMP_ADC_INT_TEST_COMP_OVERFLOW_DEFAULT 0x0 #define GC_TEMP_ADC_INT_TEST_COMP_OVERFLOW_OFFSET 0xc #define GC_TEMP_ADC_ANALOG_CTRL_REFERENCE_LSB 0x0 #define GC_TEMP_ADC_ANALOG_CTRL_REFERENCE_MASK 0x7 #define GC_TEMP_ADC_ANALOG_CTRL_REFERENCE_SIZE 0x3 #define GC_TEMP_ADC_ANALOG_CTRL_REFERENCE_DEFAULT 0x5 #define GC_TEMP_ADC_ANALOG_CTRL_REFERENCE_OFFSET 0x14 #define GC_TEMP_ADC_ANALOG_CTRL_REFERENCE_0P906V 0x3 #define GC_TEMP_ADC_ANALOG_CTRL_REFERENCE_1P120V 0x6 #define GC_TEMP_ADC_ANALOG_CTRL_REFERENCE_0P763V 0x1 #define GC_TEMP_ADC_ANALOG_CTRL_REFERENCE_0P691V 0x0 #define GC_TEMP_ADC_ANALOG_CTRL_REFERENCE_1P192V 0x7 #define GC_TEMP_ADC_ANALOG_CTRL_REFERENCE_0P977V 0x4 #define GC_TEMP_ADC_ANALOG_CTRL_REFERENCE_1P049V 0x5 #define GC_TEMP_ADC_ANALOG_CTRL_REFERENCE_0P834V 0x2 #define GC_TEMP_ADC_ANALOG_CTRL_COMMON_MODE_LSB 0x4 #define GC_TEMP_ADC_ANALOG_CTRL_COMMON_MODE_MASK 0x70 #define GC_TEMP_ADC_ANALOG_CTRL_COMMON_MODE_SIZE 0x3 #define GC_TEMP_ADC_ANALOG_CTRL_COMMON_MODE_DEFAULT 0x3 #define GC_TEMP_ADC_ANALOG_CTRL_COMMON_MODE_OFFSET 0x14 #define GC_TEMP_ADC_ANALOG_CTRL_COMMON_MODE_0P429V 0x2 #define GC_TEMP_ADC_ANALOG_CTRL_COMMON_MODE_0P477V 0x3 #define GC_TEMP_ADC_ANALOG_CTRL_COMMON_MODE_0P382V 0x1 #define GC_TEMP_ADC_ANALOG_CTRL_COMMON_MODE_0P572V 0x5 #define GC_TEMP_ADC_ANALOG_CTRL_COMMON_MODE_0P524V 0x4 #define GC_TEMP_ADC_FSM_CTRL_SYNC_IQ_LSB 0x0 #define GC_TEMP_ADC_FSM_CTRL_SYNC_IQ_MASK 0x1 #define GC_TEMP_ADC_FSM_CTRL_SYNC_IQ_SIZE 0x1 #define GC_TEMP_ADC_FSM_CTRL_SYNC_IQ_DEFAULT 0x0 #define GC_TEMP_ADC_FSM_CTRL_SYNC_IQ_OFFSET 0x18 #define GC_TEMP_ADC_FSM_CTRL_ONESHOT_MODE_LSB 0x1 #define GC_TEMP_ADC_FSM_CTRL_ONESHOT_MODE_MASK 0x2 #define GC_TEMP_ADC_FSM_CTRL_ONESHOT_MODE_SIZE 0x1 #define GC_TEMP_ADC_FSM_CTRL_ONESHOT_MODE_DEFAULT 0x0 #define GC_TEMP_ADC_FSM_CTRL_ONESHOT_MODE_OFFSET 0x18 #define GC_TEMP_ADC_FSM_CTRL_SINGLE_MODE_LSB 0x2 #define GC_TEMP_ADC_FSM_CTRL_SINGLE_MODE_MASK 0x4 #define GC_TEMP_ADC_FSM_CTRL_SINGLE_MODE_SIZE 0x1 #define GC_TEMP_ADC_FSM_CTRL_SINGLE_MODE_DEFAULT 0x1 #define GC_TEMP_ADC_FSM_CTRL_SINGLE_MODE_OFFSET 0x18 #define GC_TEMP_ADC_FSM_CTRL_SINGLE_SIDE_LSB 0x3 #define GC_TEMP_ADC_FSM_CTRL_SINGLE_SIDE_MASK 0x8 #define GC_TEMP_ADC_FSM_CTRL_SINGLE_SIDE_SIZE 0x1 #define GC_TEMP_ADC_FSM_CTRL_SINGLE_SIDE_DEFAULT 0x0 #define GC_TEMP_ADC_FSM_CTRL_SINGLE_SIDE_OFFSET 0x18 #define GC_TEMP_ADC_FSM_CTRL_MUX_CTRL_LSB 0x4 #define GC_TEMP_ADC_FSM_CTRL_MUX_CTRL_MASK 0x70 #define GC_TEMP_ADC_FSM_CTRL_MUX_CTRL_SIZE 0x3 #define GC_TEMP_ADC_FSM_CTRL_MUX_CTRL_DEFAULT 0x6 #define GC_TEMP_ADC_FSM_CTRL_MUX_CTRL_OFFSET 0x18 #define GC_TEMP_ADC_FSM_CTRL_MUX_CTRL_ADC_INP_N5 0x5 #define GC_TEMP_ADC_FSM_CTRL_MUX_CTRL_ADC_INP_N4 0x4 #define GC_TEMP_ADC_FSM_CTRL_MUX_CTRL_ADC_INP_N3 0x3 #define GC_TEMP_ADC_FSM_CTRL_MUX_CTRL_ADC_INP_N2 0x2 #define GC_TEMP_ADC_FSM_CTRL_MUX_CTRL_ADC_INP_N1 0x1 #define GC_TEMP_ADC_FSM_CTRL_MUX_CTRL_ADC_INP_N0 0x0 #define GC_TEMP_ADC_FSM_CTRL_MUX_CTRL_VPTAT_CORE 0x6 #define GC_TEMP_ADC_FSM_CTRL_MUX_CTRL_ANALOG_TEST_BUS 0x7 #define GC_TEMP_ADC_FSM_CTRL_SMPL_DUR_FINE_LSB 0x7 #define GC_TEMP_ADC_FSM_CTRL_SMPL_DUR_FINE_MASK 0x780 #define GC_TEMP_ADC_FSM_CTRL_SMPL_DUR_FINE_SIZE 0x4 #define GC_TEMP_ADC_FSM_CTRL_SMPL_DUR_FINE_DEFAULT 0x0 #define GC_TEMP_ADC_FSM_CTRL_SMPL_DUR_FINE_OFFSET 0x18 #define GC_TEMP_ADC_FSM_CTRL_SMPL_DUR_COARSE_LSB 0xb #define GC_TEMP_ADC_FSM_CTRL_SMPL_DUR_COARSE_MASK 0x7800 #define GC_TEMP_ADC_FSM_CTRL_SMPL_DUR_COARSE_SIZE 0x4 #define GC_TEMP_ADC_FSM_CTRL_SMPL_DUR_COARSE_DEFAULT 0x1 #define GC_TEMP_ADC_FSM_CTRL_SMPL_DUR_COARSE_OFFSET 0x18 #define GC_TEMP_ADC_FSM_CTRL_CHOP_REFBUF_AMP_LSB 0xf #define GC_TEMP_ADC_FSM_CTRL_CHOP_REFBUF_AMP_MASK 0x8000 #define GC_TEMP_ADC_FSM_CTRL_CHOP_REFBUF_AMP_SIZE 0x1 #define GC_TEMP_ADC_FSM_CTRL_CHOP_REFBUF_AMP_DEFAULT 0x1 #define GC_TEMP_ADC_FSM_CTRL_CHOP_REFBUF_AMP_OFFSET 0x18 #define GC_TEMP_ADC_FSM_CTRL_CHOP_CURRENT_MIRROR_LSB 0x10 #define GC_TEMP_ADC_FSM_CTRL_CHOP_CURRENT_MIRROR_MASK 0x10000 #define GC_TEMP_ADC_FSM_CTRL_CHOP_CURRENT_MIRROR_SIZE 0x1 #define GC_TEMP_ADC_FSM_CTRL_CHOP_CURRENT_MIRROR_DEFAULT 0x1 #define GC_TEMP_ADC_FSM_CTRL_CHOP_CURRENT_MIRROR_OFFSET 0x18 #define GC_TEMP_ADC_FSM_CTRL_CHOP_FEEDBACK_AMP_LSB 0x11 #define GC_TEMP_ADC_FSM_CTRL_CHOP_FEEDBACK_AMP_MASK 0x20000 #define GC_TEMP_ADC_FSM_CTRL_CHOP_FEEDBACK_AMP_SIZE 0x1 #define GC_TEMP_ADC_FSM_CTRL_CHOP_FEEDBACK_AMP_DEFAULT 0x1 #define GC_TEMP_ADC_FSM_CTRL_CHOP_FEEDBACK_AMP_OFFSET 0x18 #define GC_TEMP_ADC_OPERATION_RESET_B_LSB 0x0 #define GC_TEMP_ADC_OPERATION_RESET_B_MASK 0x1 #define GC_TEMP_ADC_OPERATION_RESET_B_SIZE 0x1 #define GC_TEMP_ADC_OPERATION_RESET_B_DEFAULT 0x0 #define GC_TEMP_ADC_OPERATION_RESET_B_OFFSET 0x28 #define GC_TEMP_ADC_OPERATION_ENABLE_LSB 0x1 #define GC_TEMP_ADC_OPERATION_ENABLE_MASK 0x2 #define GC_TEMP_ADC_OPERATION_ENABLE_SIZE 0x1 #define GC_TEMP_ADC_OPERATION_ENABLE_DEFAULT 0x0 #define GC_TEMP_ADC_OPERATION_ENABLE_OFFSET 0x28 #define GC_TEMP_ADC_CONFIG_SAMPLE_SELECT_LSB 0x0 #define GC_TEMP_ADC_CONFIG_SAMPLE_SELECT_MASK 0x3 #define GC_TEMP_ADC_CONFIG_SAMPLE_SELECT_SIZE 0x2 #define GC_TEMP_ADC_CONFIG_SAMPLE_SELECT_DEFAULT 0x0 #define GC_TEMP_ADC_CONFIG_SAMPLE_SELECT_OFFSET 0x40 #define GC_TEMP_ADC_CONFIG_SAMPLE_SELECT_ADC_SUM2 0x1 #define GC_TEMP_ADC_CONFIG_SAMPLE_SELECT_ADC_IOUT 0x0 #define GC_TEMP_ADC_CONFIG_SAMPLE_SELECT_ADC_SUM8 0x3 #define GC_TEMP_ADC_CONFIG_SAMPLE_SELECT_ADC_SUM4 0x2 #define GC_TEMP_ABS_LIMIT_MIN_LSB 0x0 #define GC_TEMP_ABS_LIMIT_MIN_MASK 0xfff #define GC_TEMP_ABS_LIMIT_MIN_SIZE 0xc #define GC_TEMP_ABS_LIMIT_MIN_DEFAULT 0x0 #define GC_TEMP_ABS_LIMIT_MIN_OFFSET 0x44 #define GC_TEMP_ABS_LIMIT_MAX_LSB 0xc #define GC_TEMP_ABS_LIMIT_MAX_MASK 0xfff000 #define GC_TEMP_ABS_LIMIT_MAX_SIZE 0xc #define GC_TEMP_ABS_LIMIT_MAX_DEFAULT 0x0 #define GC_TEMP_ABS_LIMIT_MAX_OFFSET 0x44 #define GC_TEMP_DIFF_PARAM_MAX_LSB 0x0 #define GC_TEMP_DIFF_PARAM_MAX_MASK 0xfff #define GC_TEMP_DIFF_PARAM_MAX_SIZE 0xc #define GC_TEMP_DIFF_PARAM_MAX_DEFAULT 0x0 #define GC_TEMP_DIFF_PARAM_MAX_OFFSET 0x48 #define GC_TEMP_DIFF_PARAM_PERIOD_LSB 0xc #define GC_TEMP_DIFF_PARAM_PERIOD_MASK 0xfffff000 #define GC_TEMP_DIFF_PARAM_PERIOD_SIZE 0x14 #define GC_TEMP_DIFF_PARAM_PERIOD_DEFAULT 0x0 #define GC_TEMP_DIFF_PARAM_PERIOD_OFFSET 0x48 #define GC_TEMP_METRIC_DIFF_LSB 0x0 #define GC_TEMP_METRIC_DIFF_MASK 0xfff #define GC_TEMP_METRIC_DIFF_SIZE 0xc #define GC_TEMP_METRIC_DIFF_DEFAULT 0x0 #define GC_TEMP_METRIC_DIFF_OFFSET 0x4c #define GC_TEMP_METRIC_CTR_LSB 0xc #define GC_TEMP_METRIC_CTR_MASK 0xfffff000 #define GC_TEMP_METRIC_CTR_SIZE 0x14 #define GC_TEMP_METRIC_CTR_DEFAULT 0x0 #define GC_TEMP_METRIC_CTR_OFFSET 0x4c #define GC_TEMP_ANTEST_EN_INPUTS_LSB 0x0 #define GC_TEMP_ANTEST_EN_INPUTS_MASK 0x1 #define GC_TEMP_ANTEST_EN_INPUTS_SIZE 0x1 #define GC_TEMP_ANTEST_EN_INPUTS_DEFAULT 0x0 #define GC_TEMP_ANTEST_EN_INPUTS_OFFSET 0x54 #define GC_TEMP_ANTEST_EN_REF_LSB 0x1 #define GC_TEMP_ANTEST_EN_REF_MASK 0x2 #define GC_TEMP_ANTEST_EN_REF_SIZE 0x1 #define GC_TEMP_ANTEST_EN_REF_DEFAULT 0x0 #define GC_TEMP_ANTEST_EN_REF_OFFSET 0x54 #define GC_TEMP_ANTEST_EN_VPTAT_LSB 0x2 #define GC_TEMP_ANTEST_EN_VPTAT_MASK 0x4 #define GC_TEMP_ANTEST_EN_VPTAT_SIZE 0x1 #define GC_TEMP_ANTEST_EN_VPTAT_DEFAULT 0x0 #define GC_TEMP_ANTEST_EN_VPTAT_OFFSET 0x54 #define GC_TEMP_ANTEST_EN_CM_LSB 0x3 #define GC_TEMP_ANTEST_EN_CM_MASK 0x8 #define GC_TEMP_ANTEST_EN_CM_SIZE 0x1 #define GC_TEMP_ANTEST_EN_CM_DEFAULT 0x0 #define GC_TEMP_ANTEST_EN_CM_OFFSET 0x54 #define GC_TIMEHS_TIMER1CONTROL_ONESHOT_LSB 0x0 #define GC_TIMEHS_TIMER1CONTROL_ONESHOT_MASK 0x1 #define GC_TIMEHS_TIMER1CONTROL_ONESHOT_SIZE 0x1 #define GC_TIMEHS_TIMER1CONTROL_ONESHOT_DEFAULT 0x0 #define GC_TIMEHS_TIMER1CONTROL_ONESHOT_OFFSET 0x8 #define GC_TIMEHS_TIMER1CONTROL_SIZE_LSB 0x1 #define GC_TIMEHS_TIMER1CONTROL_SIZE_MASK 0x2 #define GC_TIMEHS_TIMER1CONTROL_SIZE_SIZE 0x1 #define GC_TIMEHS_TIMER1CONTROL_SIZE_DEFAULT 0x0 #define GC_TIMEHS_TIMER1CONTROL_SIZE_OFFSET 0x8 #define GC_TIMEHS_TIMER1CONTROL_PRE_LSB 0x2 #define GC_TIMEHS_TIMER1CONTROL_PRE_MASK 0xc #define GC_TIMEHS_TIMER1CONTROL_PRE_SIZE 0x2 #define GC_TIMEHS_TIMER1CONTROL_PRE_DEFAULT 0x0 #define GC_TIMEHS_TIMER1CONTROL_PRE_OFFSET 0x8 #define GC_TIMEHS_TIMER1CONTROL_RESERVED_LSB 0x4 #define GC_TIMEHS_TIMER1CONTROL_RESERVED_MASK 0x10 #define GC_TIMEHS_TIMER1CONTROL_RESERVED_SIZE 0x1 #define GC_TIMEHS_TIMER1CONTROL_RESERVED_DEFAULT 0x0 #define GC_TIMEHS_TIMER1CONTROL_RESERVED_OFFSET 0x8 #define GC_TIMEHS_TIMER1CONTROL_INTENABLE_LSB 0x5 #define GC_TIMEHS_TIMER1CONTROL_INTENABLE_MASK 0x20 #define GC_TIMEHS_TIMER1CONTROL_INTENABLE_SIZE 0x1 #define GC_TIMEHS_TIMER1CONTROL_INTENABLE_DEFAULT 0x1 #define GC_TIMEHS_TIMER1CONTROL_INTENABLE_OFFSET 0x8 #define GC_TIMEHS_TIMER1CONTROL_MODE_LSB 0x6 #define GC_TIMEHS_TIMER1CONTROL_MODE_MASK 0x40 #define GC_TIMEHS_TIMER1CONTROL_MODE_SIZE 0x1 #define GC_TIMEHS_TIMER1CONTROL_MODE_DEFAULT 0x0 #define GC_TIMEHS_TIMER1CONTROL_MODE_OFFSET 0x8 #define GC_TIMEHS_TIMER1CONTROL_ENABLE_LSB 0x7 #define GC_TIMEHS_TIMER1CONTROL_ENABLE_MASK 0x80 #define GC_TIMEHS_TIMER1CONTROL_ENABLE_SIZE 0x1 #define GC_TIMEHS_TIMER1CONTROL_ENABLE_DEFAULT 0x0 #define GC_TIMEHS_TIMER1CONTROL_ENABLE_OFFSET 0x8 #define GC_TIMEHS_TIMER2CONTROL_ONESHOT_LSB 0x0 #define GC_TIMEHS_TIMER2CONTROL_ONESHOT_MASK 0x1 #define GC_TIMEHS_TIMER2CONTROL_ONESHOT_SIZE 0x1 #define GC_TIMEHS_TIMER2CONTROL_ONESHOT_DEFAULT 0x0 #define GC_TIMEHS_TIMER2CONTROL_ONESHOT_OFFSET 0x28 #define GC_TIMEHS_TIMER2CONTROL_SIZE_LSB 0x1 #define GC_TIMEHS_TIMER2CONTROL_SIZE_MASK 0x2 #define GC_TIMEHS_TIMER2CONTROL_SIZE_SIZE 0x1 #define GC_TIMEHS_TIMER2CONTROL_SIZE_DEFAULT 0x0 #define GC_TIMEHS_TIMER2CONTROL_SIZE_OFFSET 0x28 #define GC_TIMEHS_TIMER2CONTROL_PRE_LSB 0x2 #define GC_TIMEHS_TIMER2CONTROL_PRE_MASK 0xc #define GC_TIMEHS_TIMER2CONTROL_PRE_SIZE 0x2 #define GC_TIMEHS_TIMER2CONTROL_PRE_DEFAULT 0x0 #define GC_TIMEHS_TIMER2CONTROL_PRE_OFFSET 0x28 #define GC_TIMEHS_TIMER2CONTROL_RESERVED_LSB 0x4 #define GC_TIMEHS_TIMER2CONTROL_RESERVED_MASK 0x10 #define GC_TIMEHS_TIMER2CONTROL_RESERVED_SIZE 0x1 #define GC_TIMEHS_TIMER2CONTROL_RESERVED_DEFAULT 0x0 #define GC_TIMEHS_TIMER2CONTROL_RESERVED_OFFSET 0x28 #define GC_TIMEHS_TIMER2CONTROL_INTENABLE_LSB 0x5 #define GC_TIMEHS_TIMER2CONTROL_INTENABLE_MASK 0x20 #define GC_TIMEHS_TIMER2CONTROL_INTENABLE_SIZE 0x1 #define GC_TIMEHS_TIMER2CONTROL_INTENABLE_DEFAULT 0x1 #define GC_TIMEHS_TIMER2CONTROL_INTENABLE_OFFSET 0x28 #define GC_TIMEHS_TIMER2CONTROL_MODE_LSB 0x6 #define GC_TIMEHS_TIMER2CONTROL_MODE_MASK 0x40 #define GC_TIMEHS_TIMER2CONTROL_MODE_SIZE 0x1 #define GC_TIMEHS_TIMER2CONTROL_MODE_DEFAULT 0x0 #define GC_TIMEHS_TIMER2CONTROL_MODE_OFFSET 0x28 #define GC_TIMEHS_TIMER2CONTROL_ENABLE_LSB 0x7 #define GC_TIMEHS_TIMER2CONTROL_ENABLE_MASK 0x80 #define GC_TIMEHS_TIMER2CONTROL_ENABLE_SIZE 0x1 #define GC_TIMEHS_TIMER2CONTROL_ENABLE_DEFAULT 0x0 #define GC_TIMEHS_TIMER2CONTROL_ENABLE_OFFSET 0x28 #define GC_TIMEHS_TIMERITOP_TIMINT1_LSB 0x0 #define GC_TIMEHS_TIMERITOP_TIMINT1_MASK 0x1 #define GC_TIMEHS_TIMERITOP_TIMINT1_SIZE 0x1 #define GC_TIMEHS_TIMERITOP_TIMINT1_DEFAULT 0x0 #define GC_TIMEHS_TIMERITOP_TIMINT1_OFFSET 0xf04 #define GC_TIMEHS_TIMERITOP_TIMINT2_LSB 0x1 #define GC_TIMEHS_TIMERITOP_TIMINT2_MASK 0x2 #define GC_TIMEHS_TIMERITOP_TIMINT2_SIZE 0x1 #define GC_TIMEHS_TIMERITOP_TIMINT2_DEFAULT 0x0 #define GC_TIMEHS_TIMERITOP_TIMINT2_OFFSET 0xf04 #define GC_TIMELS_TIMER0_CONTROL_ENABLE_LSB 0x0 #define GC_TIMELS_TIMER0_CONTROL_ENABLE_MASK 0x1 #define GC_TIMELS_TIMER0_CONTROL_ENABLE_SIZE 0x1 #define GC_TIMELS_TIMER0_CONTROL_ENABLE_DEFAULT 0x0 #define GC_TIMELS_TIMER0_CONTROL_ENABLE_OFFSET 0x0 #define GC_TIMELS_TIMER0_CONTROL_RELOAD_LSB 0x1 #define GC_TIMELS_TIMER0_CONTROL_RELOAD_MASK 0x2 #define GC_TIMELS_TIMER0_CONTROL_RELOAD_SIZE 0x1 #define GC_TIMELS_TIMER0_CONTROL_RELOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER0_CONTROL_RELOAD_OFFSET 0x0 #define GC_TIMELS_TIMER0_CONTROL_WRAP_LSB 0x2 #define GC_TIMELS_TIMER0_CONTROL_WRAP_MASK 0x4 #define GC_TIMELS_TIMER0_CONTROL_WRAP_SIZE 0x1 #define GC_TIMELS_TIMER0_CONTROL_WRAP_DEFAULT 0x0 #define GC_TIMELS_TIMER0_CONTROL_WRAP_OFFSET 0x0 #define GC_TIMELS_TIMER0_CONTROL_TEST_LSB 0x3 #define GC_TIMELS_TIMER0_CONTROL_TEST_MASK 0x8 #define GC_TIMELS_TIMER0_CONTROL_TEST_SIZE 0x1 #define GC_TIMELS_TIMER0_CONTROL_TEST_DEFAULT 0x0 #define GC_TIMELS_TIMER0_CONTROL_TEST_OFFSET 0x0 #define GC_TIMELS_TIMER0_STATUS_SYNCING_LOAD_LSB 0x0 #define GC_TIMELS_TIMER0_STATUS_SYNCING_LOAD_MASK 0x1 #define GC_TIMELS_TIMER0_STATUS_SYNCING_LOAD_SIZE 0x1 #define GC_TIMELS_TIMER0_STATUS_SYNCING_LOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER0_STATUS_SYNCING_LOAD_OFFSET 0x4 #define GC_TIMELS_TIMER0_STATUS_WAITING_LOAD_LSB 0x1 #define GC_TIMELS_TIMER0_STATUS_WAITING_LOAD_MASK 0x2 #define GC_TIMELS_TIMER0_STATUS_WAITING_LOAD_SIZE 0x1 #define GC_TIMELS_TIMER0_STATUS_WAITING_LOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER0_STATUS_WAITING_LOAD_OFFSET 0x4 #define GC_TIMELS_TIMER0_STATUS_PENDING_LOAD_LSB 0x2 #define GC_TIMELS_TIMER0_STATUS_PENDING_LOAD_MASK 0x4 #define GC_TIMELS_TIMER0_STATUS_PENDING_LOAD_SIZE 0x1 #define GC_TIMELS_TIMER0_STATUS_PENDING_LOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER0_STATUS_PENDING_LOAD_OFFSET 0x4 #define GC_TIMELS_TIMER0_STATUS_SYNCING_RELOAD_LSB 0x3 #define GC_TIMELS_TIMER0_STATUS_SYNCING_RELOAD_MASK 0x8 #define GC_TIMELS_TIMER0_STATUS_SYNCING_RELOAD_SIZE 0x1 #define GC_TIMELS_TIMER0_STATUS_SYNCING_RELOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER0_STATUS_SYNCING_RELOAD_OFFSET 0x4 #define GC_TIMELS_TIMER0_STATUS_WAITING_RELOAD_LSB 0x4 #define GC_TIMELS_TIMER0_STATUS_WAITING_RELOAD_MASK 0x10 #define GC_TIMELS_TIMER0_STATUS_WAITING_RELOAD_SIZE 0x1 #define GC_TIMELS_TIMER0_STATUS_WAITING_RELOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER0_STATUS_WAITING_RELOAD_OFFSET 0x4 #define GC_TIMELS_TIMER0_STATUS_PENDING_RELOAD_LSB 0x5 #define GC_TIMELS_TIMER0_STATUS_PENDING_RELOAD_MASK 0x20 #define GC_TIMELS_TIMER0_STATUS_PENDING_RELOAD_SIZE 0x1 #define GC_TIMELS_TIMER0_STATUS_PENDING_RELOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER0_STATUS_PENDING_RELOAD_OFFSET 0x4 #define GC_TIMELS_TIMER0_STATUS_WRAPPED_LSB 0x6 #define GC_TIMELS_TIMER0_STATUS_WRAPPED_MASK 0x40 #define GC_TIMELS_TIMER0_STATUS_WRAPPED_SIZE 0x1 #define GC_TIMELS_TIMER0_STATUS_WRAPPED_DEFAULT 0x0 #define GC_TIMELS_TIMER0_STATUS_WRAPPED_OFFSET 0x4 #define GC_TIMELS_TIMER1_CONTROL_ENABLE_LSB 0x0 #define GC_TIMELS_TIMER1_CONTROL_ENABLE_MASK 0x1 #define GC_TIMELS_TIMER1_CONTROL_ENABLE_SIZE 0x1 #define GC_TIMELS_TIMER1_CONTROL_ENABLE_DEFAULT 0x0 #define GC_TIMELS_TIMER1_CONTROL_ENABLE_OFFSET 0x40 #define GC_TIMELS_TIMER1_CONTROL_RELOAD_LSB 0x1 #define GC_TIMELS_TIMER1_CONTROL_RELOAD_MASK 0x2 #define GC_TIMELS_TIMER1_CONTROL_RELOAD_SIZE 0x1 #define GC_TIMELS_TIMER1_CONTROL_RELOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER1_CONTROL_RELOAD_OFFSET 0x40 #define GC_TIMELS_TIMER1_CONTROL_WRAP_LSB 0x2 #define GC_TIMELS_TIMER1_CONTROL_WRAP_MASK 0x4 #define GC_TIMELS_TIMER1_CONTROL_WRAP_SIZE 0x1 #define GC_TIMELS_TIMER1_CONTROL_WRAP_DEFAULT 0x0 #define GC_TIMELS_TIMER1_CONTROL_WRAP_OFFSET 0x40 #define GC_TIMELS_TIMER1_CONTROL_TEST_LSB 0x3 #define GC_TIMELS_TIMER1_CONTROL_TEST_MASK 0x8 #define GC_TIMELS_TIMER1_CONTROL_TEST_SIZE 0x1 #define GC_TIMELS_TIMER1_CONTROL_TEST_DEFAULT 0x0 #define GC_TIMELS_TIMER1_CONTROL_TEST_OFFSET 0x40 #define GC_TIMELS_TIMER1_STATUS_SYNCING_LOAD_LSB 0x0 #define GC_TIMELS_TIMER1_STATUS_SYNCING_LOAD_MASK 0x1 #define GC_TIMELS_TIMER1_STATUS_SYNCING_LOAD_SIZE 0x1 #define GC_TIMELS_TIMER1_STATUS_SYNCING_LOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER1_STATUS_SYNCING_LOAD_OFFSET 0x44 #define GC_TIMELS_TIMER1_STATUS_WAITING_LOAD_LSB 0x1 #define GC_TIMELS_TIMER1_STATUS_WAITING_LOAD_MASK 0x2 #define GC_TIMELS_TIMER1_STATUS_WAITING_LOAD_SIZE 0x1 #define GC_TIMELS_TIMER1_STATUS_WAITING_LOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER1_STATUS_WAITING_LOAD_OFFSET 0x44 #define GC_TIMELS_TIMER1_STATUS_PENDING_LOAD_LSB 0x2 #define GC_TIMELS_TIMER1_STATUS_PENDING_LOAD_MASK 0x4 #define GC_TIMELS_TIMER1_STATUS_PENDING_LOAD_SIZE 0x1 #define GC_TIMELS_TIMER1_STATUS_PENDING_LOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER1_STATUS_PENDING_LOAD_OFFSET 0x44 #define GC_TIMELS_TIMER1_STATUS_SYNCING_RELOAD_LSB 0x3 #define GC_TIMELS_TIMER1_STATUS_SYNCING_RELOAD_MASK 0x8 #define GC_TIMELS_TIMER1_STATUS_SYNCING_RELOAD_SIZE 0x1 #define GC_TIMELS_TIMER1_STATUS_SYNCING_RELOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER1_STATUS_SYNCING_RELOAD_OFFSET 0x44 #define GC_TIMELS_TIMER1_STATUS_WAITING_RELOAD_LSB 0x4 #define GC_TIMELS_TIMER1_STATUS_WAITING_RELOAD_MASK 0x10 #define GC_TIMELS_TIMER1_STATUS_WAITING_RELOAD_SIZE 0x1 #define GC_TIMELS_TIMER1_STATUS_WAITING_RELOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER1_STATUS_WAITING_RELOAD_OFFSET 0x44 #define GC_TIMELS_TIMER1_STATUS_PENDING_RELOAD_LSB 0x5 #define GC_TIMELS_TIMER1_STATUS_PENDING_RELOAD_MASK 0x20 #define GC_TIMELS_TIMER1_STATUS_PENDING_RELOAD_SIZE 0x1 #define GC_TIMELS_TIMER1_STATUS_PENDING_RELOAD_DEFAULT 0x0 #define GC_TIMELS_TIMER1_STATUS_PENDING_RELOAD_OFFSET 0x44 #define GC_TIMELS_TIMER1_STATUS_WRAPPED_LSB 0x6 #define GC_TIMELS_TIMER1_STATUS_WRAPPED_MASK 0x40 #define GC_TIMELS_TIMER1_STATUS_WRAPPED_SIZE 0x1 #define GC_TIMELS_TIMER1_STATUS_WRAPPED_DEFAULT 0x0 #define GC_TIMELS_TIMER1_STATUS_WRAPPED_OFFSET 0x44 #define GC_TIMELS_ITOP_TIMINT0_LSB 0x0 #define GC_TIMELS_ITOP_TIMINT0_MASK 0x1 #define GC_TIMELS_ITOP_TIMINT0_SIZE 0x1 #define GC_TIMELS_ITOP_TIMINT0_DEFAULT 0x0 #define GC_TIMELS_ITOP_TIMINT0_OFFSET 0xf04 #define GC_TIMELS_ITOP_TIMINT1_LSB 0x1 #define GC_TIMELS_ITOP_TIMINT1_MASK 0x2 #define GC_TIMELS_ITOP_TIMINT1_SIZE 0x1 #define GC_TIMELS_ITOP_TIMINT1_DEFAULT 0x0 #define GC_TIMELS_ITOP_TIMINT1_OFFSET 0xf04 #define GC_TIMEUS_VERSION_CHANGE_LSB 0x0 #define GC_TIMEUS_VERSION_CHANGE_MASK 0xffffff #define GC_TIMEUS_VERSION_CHANGE_SIZE 0x18 #define GC_TIMEUS_VERSION_CHANGE_DEFAULT 0x1424a #define GC_TIMEUS_VERSION_CHANGE_OFFSET 0x0 #define GC_TIMEUS_VERSION_REVISION_LSB 0x18 #define GC_TIMEUS_VERSION_REVISION_MASK 0xff000000 #define GC_TIMEUS_VERSION_REVISION_SIZE 0x8 #define GC_TIMEUS_VERSION_REVISION_DEFAULT 0x1 #define GC_TIMEUS_VERSION_REVISION_OFFSET 0x0 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT0_LSB 0x0 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT0_MASK 0x1 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT0_SIZE 0x1 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT0_DEFAULT 0x0 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT0_OFFSET 0x4 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT0_LSB 0x1 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT0_MASK 0x2 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT0_SIZE 0x1 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT0_DEFAULT 0x0 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT0_OFFSET 0x4 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT1_LSB 0x2 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT1_MASK 0x4 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT1_SIZE 0x1 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT1_DEFAULT 0x0 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT1_OFFSET 0x4 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT1_LSB 0x3 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT1_MASK 0x8 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT1_SIZE 0x1 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT1_DEFAULT 0x0 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT1_OFFSET 0x4 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT2_LSB 0x4 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT2_MASK 0x10 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT2_SIZE 0x1 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT2_DEFAULT 0x0 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT2_OFFSET 0x4 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT2_LSB 0x5 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT2_MASK 0x20 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT2_SIZE 0x1 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT2_DEFAULT 0x0 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT2_OFFSET 0x4 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT3_LSB 0x6 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT3_MASK 0x40 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT3_SIZE 0x1 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT3_DEFAULT 0x0 #define GC_TIMEUS_INT_ENABLE_INTR_PROG_COUNT_HIT3_OFFSET 0x4 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT3_LSB 0x7 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT3_MASK 0x80 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT3_SIZE 0x1 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT3_DEFAULT 0x0 #define GC_TIMEUS_INT_ENABLE_INTR_MAX_COUNT_HIT3_OFFSET 0x4 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT0_LSB 0x0 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT0_MASK 0x1 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT0_SIZE 0x1 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT0_DEFAULT 0x0 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT0_OFFSET 0x8 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT0_LSB 0x1 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT0_MASK 0x2 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT0_SIZE 0x1 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT0_DEFAULT 0x0 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT0_OFFSET 0x8 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT1_LSB 0x2 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT1_MASK 0x4 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT1_SIZE 0x1 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT1_DEFAULT 0x0 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT1_OFFSET 0x8 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT1_LSB 0x3 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT1_MASK 0x8 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT1_SIZE 0x1 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT1_DEFAULT 0x0 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT1_OFFSET 0x8 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT2_LSB 0x4 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT2_MASK 0x10 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT2_SIZE 0x1 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT2_DEFAULT 0x0 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT2_OFFSET 0x8 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT2_LSB 0x5 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT2_MASK 0x20 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT2_SIZE 0x1 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT2_DEFAULT 0x0 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT2_OFFSET 0x8 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT3_LSB 0x6 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT3_MASK 0x40 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT3_SIZE 0x1 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT3_DEFAULT 0x0 #define GC_TIMEUS_INT_STATE_INTR_PROG_COUNT_HIT3_OFFSET 0x8 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT3_LSB 0x7 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT3_MASK 0x80 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT3_SIZE 0x1 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT3_DEFAULT 0x0 #define GC_TIMEUS_INT_STATE_INTR_MAX_COUNT_HIT3_OFFSET 0x8 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT0_LSB 0x0 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT0_MASK 0x1 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT0_SIZE 0x1 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT0_DEFAULT 0x0 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT0_OFFSET 0xc #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT0_LSB 0x1 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT0_MASK 0x2 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT0_SIZE 0x1 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT0_DEFAULT 0x0 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT0_OFFSET 0xc #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT1_LSB 0x2 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT1_MASK 0x4 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT1_SIZE 0x1 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT1_DEFAULT 0x0 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT1_OFFSET 0xc #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT1_LSB 0x3 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT1_MASK 0x8 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT1_SIZE 0x1 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT1_DEFAULT 0x0 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT1_OFFSET 0xc #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT2_LSB 0x4 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT2_MASK 0x10 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT2_SIZE 0x1 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT2_DEFAULT 0x0 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT2_OFFSET 0xc #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT2_LSB 0x5 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT2_MASK 0x20 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT2_SIZE 0x1 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT2_DEFAULT 0x0 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT2_OFFSET 0xc #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT3_LSB 0x6 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT3_MASK 0x40 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT3_SIZE 0x1 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT3_DEFAULT 0x0 #define GC_TIMEUS_INT_TEST_INTR_PROG_COUNT_HIT3_OFFSET 0xc #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT3_LSB 0x7 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT3_MASK 0x80 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT3_SIZE 0x1 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT3_DEFAULT 0x0 #define GC_TIMEUS_INT_TEST_INTR_MAX_COUNT_HIT3_OFFSET 0xc #define GC_TRNG_VERSION_CHANGE_LSB 0x0 #define GC_TRNG_VERSION_CHANGE_MASK 0xffffff #define GC_TRNG_VERSION_CHANGE_SIZE 0x18 #define GC_TRNG_VERSION_CHANGE_DEFAULT 0x14125 #define GC_TRNG_VERSION_CHANGE_OFFSET 0x0 #define GC_TRNG_VERSION_REVISION_LSB 0x18 #define GC_TRNG_VERSION_REVISION_MASK 0xff000000 #define GC_TRNG_VERSION_REVISION_SIZE 0x8 #define GC_TRNG_VERSION_REVISION_DEFAULT 0x1 #define GC_TRNG_VERSION_REVISION_OFFSET 0x0 #define GC_TRNG_INT_ENABLE_INTR_BUFFER_FULL_LSB 0x0 #define GC_TRNG_INT_ENABLE_INTR_BUFFER_FULL_MASK 0x1 #define GC_TRNG_INT_ENABLE_INTR_BUFFER_FULL_SIZE 0x1 #define GC_TRNG_INT_ENABLE_INTR_BUFFER_FULL_DEFAULT 0x0 #define GC_TRNG_INT_ENABLE_INTR_BUFFER_FULL_OFFSET 0x4 #define GC_TRNG_INT_ENABLE_INTR_ONE_SHOT_DONE_LSB 0x1 #define GC_TRNG_INT_ENABLE_INTR_ONE_SHOT_DONE_MASK 0x2 #define GC_TRNG_INT_ENABLE_INTR_ONE_SHOT_DONE_SIZE 0x1 #define GC_TRNG_INT_ENABLE_INTR_ONE_SHOT_DONE_DEFAULT 0x0 #define GC_TRNG_INT_ENABLE_INTR_ONE_SHOT_DONE_OFFSET 0x4 #define GC_TRNG_INT_ENABLE_INTR_READ_EMPTY_LSB 0x2 #define GC_TRNG_INT_ENABLE_INTR_READ_EMPTY_MASK 0x4 #define GC_TRNG_INT_ENABLE_INTR_READ_EMPTY_SIZE 0x1 #define GC_TRNG_INT_ENABLE_INTR_READ_EMPTY_DEFAULT 0x0 #define GC_TRNG_INT_ENABLE_INTR_READ_EMPTY_OFFSET 0x4 #define GC_TRNG_INT_STATE_INTR_BUFFER_FULL_LSB 0x0 #define GC_TRNG_INT_STATE_INTR_BUFFER_FULL_MASK 0x1 #define GC_TRNG_INT_STATE_INTR_BUFFER_FULL_SIZE 0x1 #define GC_TRNG_INT_STATE_INTR_BUFFER_FULL_DEFAULT 0x0 #define GC_TRNG_INT_STATE_INTR_BUFFER_FULL_OFFSET 0x8 #define GC_TRNG_INT_STATE_INTR_ONE_SHOT_DONE_LSB 0x1 #define GC_TRNG_INT_STATE_INTR_ONE_SHOT_DONE_MASK 0x2 #define GC_TRNG_INT_STATE_INTR_ONE_SHOT_DONE_SIZE 0x1 #define GC_TRNG_INT_STATE_INTR_ONE_SHOT_DONE_DEFAULT 0x0 #define GC_TRNG_INT_STATE_INTR_ONE_SHOT_DONE_OFFSET 0x8 #define GC_TRNG_INT_STATE_INTR_READ_EMPTY_LSB 0x2 #define GC_TRNG_INT_STATE_INTR_READ_EMPTY_MASK 0x4 #define GC_TRNG_INT_STATE_INTR_READ_EMPTY_SIZE 0x1 #define GC_TRNG_INT_STATE_INTR_READ_EMPTY_DEFAULT 0x0 #define GC_TRNG_INT_STATE_INTR_READ_EMPTY_OFFSET 0x8 #define GC_TRNG_INT_TEST_INTR_BUFFER_FULL_LSB 0x0 #define GC_TRNG_INT_TEST_INTR_BUFFER_FULL_MASK 0x1 #define GC_TRNG_INT_TEST_INTR_BUFFER_FULL_SIZE 0x1 #define GC_TRNG_INT_TEST_INTR_BUFFER_FULL_DEFAULT 0x0 #define GC_TRNG_INT_TEST_INTR_BUFFER_FULL_OFFSET 0xc #define GC_TRNG_INT_TEST_INTR_ONE_SHOT_DONE_LSB 0x1 #define GC_TRNG_INT_TEST_INTR_ONE_SHOT_DONE_MASK 0x2 #define GC_TRNG_INT_TEST_INTR_ONE_SHOT_DONE_SIZE 0x1 #define GC_TRNG_INT_TEST_INTR_ONE_SHOT_DONE_DEFAULT 0x0 #define GC_TRNG_INT_TEST_INTR_ONE_SHOT_DONE_OFFSET 0xc #define GC_TRNG_INT_TEST_INTR_READ_EMPTY_LSB 0x2 #define GC_TRNG_INT_TEST_INTR_READ_EMPTY_MASK 0x4 #define GC_TRNG_INT_TEST_INTR_READ_EMPTY_SIZE 0x1 #define GC_TRNG_INT_TEST_INTR_READ_EMPTY_DEFAULT 0x0 #define GC_TRNG_INT_TEST_INTR_READ_EMPTY_OFFSET 0xc #define GC_TRNG_SECURE_POST_PROCESSING_CTRL_REJECT_EXTREME_VALUES_LSB 0x0 #define GC_TRNG_SECURE_POST_PROCESSING_CTRL_REJECT_EXTREME_VALUES_MASK 0x1 #define GC_TRNG_SECURE_POST_PROCESSING_CTRL_REJECT_EXTREME_VALUES_SIZE 0x1 #define GC_TRNG_SECURE_POST_PROCESSING_CTRL_REJECT_EXTREME_VALUES_DEFAULT 0x1 #define GC_TRNG_SECURE_POST_PROCESSING_CTRL_REJECT_EXTREME_VALUES_OFFSET 0x10 #define GC_TRNG_POST_PROCESSING_CTRL_XOR_SLICE_LIMIT_LSB 0x0 #define GC_TRNG_POST_PROCESSING_CTRL_XOR_SLICE_LIMIT_MASK 0x1 #define GC_TRNG_POST_PROCESSING_CTRL_XOR_SLICE_LIMIT_SIZE 0x1 #define GC_TRNG_POST_PROCESSING_CTRL_XOR_SLICE_LIMIT_DEFAULT 0x1 #define GC_TRNG_POST_PROCESSING_CTRL_XOR_SLICE_LIMIT_OFFSET 0x14 #define GC_TRNG_POST_PROCESSING_CTRL_SHUFFLE_BITS_LSB 0x1 #define GC_TRNG_POST_PROCESSING_CTRL_SHUFFLE_BITS_MASK 0x2 #define GC_TRNG_POST_PROCESSING_CTRL_SHUFFLE_BITS_SIZE 0x1 #define GC_TRNG_POST_PROCESSING_CTRL_SHUFFLE_BITS_DEFAULT 0x1 #define GC_TRNG_POST_PROCESSING_CTRL_SHUFFLE_BITS_OFFSET 0x14 #define GC_TRNG_POST_PROCESSING_CTRL_VON_NEUMANN_LSB 0x2 #define GC_TRNG_POST_PROCESSING_CTRL_VON_NEUMANN_MASK 0x4 #define GC_TRNG_POST_PROCESSING_CTRL_VON_NEUMANN_SIZE 0x1 #define GC_TRNG_POST_PROCESSING_CTRL_VON_NEUMANN_DEFAULT 0x1 #define GC_TRNG_POST_PROCESSING_CTRL_VON_NEUMANN_OFFSET 0x14 #define GC_TRNG_POST_PROCESSING_CTRL_CHURN_MODE_LSB 0x3 #define GC_TRNG_POST_PROCESSING_CTRL_CHURN_MODE_MASK 0x8 #define GC_TRNG_POST_PROCESSING_CTRL_CHURN_MODE_SIZE 0x1 #define GC_TRNG_POST_PROCESSING_CTRL_CHURN_MODE_DEFAULT 0x1 #define GC_TRNG_POST_PROCESSING_CTRL_CHURN_MODE_OFFSET 0x14 #define GC_TRNG_FSM_STATE_FSM_IDLE_LSB 0x0 #define GC_TRNG_FSM_STATE_FSM_IDLE_MASK 0x1 #define GC_TRNG_FSM_STATE_FSM_IDLE_SIZE 0x1 #define GC_TRNG_FSM_STATE_FSM_IDLE_DEFAULT 0x1 #define GC_TRNG_FSM_STATE_FSM_IDLE_OFFSET 0x2c #define GC_TRNG_FSM_STATE_FSM_PRECHARGE_LSB 0x1 #define GC_TRNG_FSM_STATE_FSM_PRECHARGE_MASK 0x2 #define GC_TRNG_FSM_STATE_FSM_PRECHARGE_SIZE 0x1 #define GC_TRNG_FSM_STATE_FSM_PRECHARGE_DEFAULT 0x0 #define GC_TRNG_FSM_STATE_FSM_PRECHARGE_OFFSET 0x2c #define GC_TRNG_FSM_STATE_FSM_WAIT_LSB 0x2 #define GC_TRNG_FSM_STATE_FSM_WAIT_MASK 0x4 #define GC_TRNG_FSM_STATE_FSM_WAIT_SIZE 0x1 #define GC_TRNG_FSM_STATE_FSM_WAIT_DEFAULT 0x0 #define GC_TRNG_FSM_STATE_FSM_WAIT_OFFSET 0x2c #define GC_TRNG_FSM_STATE_FSM_TIMEOUT_LSB 0x3 #define GC_TRNG_FSM_STATE_FSM_TIMEOUT_MASK 0x8 #define GC_TRNG_FSM_STATE_FSM_TIMEOUT_SIZE 0x1 #define GC_TRNG_FSM_STATE_FSM_TIMEOUT_DEFAULT 0x0 #define GC_TRNG_FSM_STATE_FSM_TIMEOUT_OFFSET 0x2c #define GC_TRNG_FSM_STATE_FSM_CAPTURE_LSB 0x4 #define GC_TRNG_FSM_STATE_FSM_CAPTURE_MASK 0x10 #define GC_TRNG_FSM_STATE_FSM_CAPTURE_SIZE 0x1 #define GC_TRNG_FSM_STATE_FSM_CAPTURE_DEFAULT 0x0 #define GC_TRNG_FSM_STATE_FSM_CAPTURE_OFFSET 0x2c #define GC_TRNG_FSM_STATE_FSM_FULL_LSB 0x5 #define GC_TRNG_FSM_STATE_FSM_FULL_MASK 0x20 #define GC_TRNG_FSM_STATE_FSM_FULL_SIZE 0x1 #define GC_TRNG_FSM_STATE_FSM_FULL_DEFAULT 0x0 #define GC_TRNG_FSM_STATE_FSM_FULL_OFFSET 0x2c #define GC_TRNG_ALLOWED_VALUES_MIN_LSB 0x0 #define GC_TRNG_ALLOWED_VALUES_MIN_MASK 0x7 #define GC_TRNG_ALLOWED_VALUES_MIN_SIZE 0x3 #define GC_TRNG_ALLOWED_VALUES_MIN_DEFAULT 0x1 #define GC_TRNG_ALLOWED_VALUES_MIN_OFFSET 0x30 #define GC_TRNG_ALLOWED_VALUES_MAX_LSB 0x3 #define GC_TRNG_ALLOWED_VALUES_MAX_MASK 0x38 #define GC_TRNG_ALLOWED_VALUES_MAX_SIZE 0x3 #define GC_TRNG_ALLOWED_VALUES_MAX_DEFAULT 0x4 #define GC_TRNG_ALLOWED_VALUES_MAX_OFFSET 0x30 #define GC_TRNG_ANTEST_VLDO_EN_LSB 0x0 #define GC_TRNG_ANTEST_VLDO_EN_MASK 0x1 #define GC_TRNG_ANTEST_VLDO_EN_SIZE 0x1 #define GC_TRNG_ANTEST_VLDO_EN_DEFAULT 0x0 #define GC_TRNG_ANTEST_VLDO_EN_OFFSET 0x54 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_DIG_IN_LSB 0x0 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_DIG_IN_MASK 0x1 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_DIG_IN_SIZE 0x1 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_DIG_IN_DEFAULT 0x1 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_DIG_IN_OFFSET 0x58 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_ENB_LSB 0x1 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_ENB_MASK 0x2 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_ENB_SIZE 0x1 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_ENB_DEFAULT 0x1 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_ENB_OFFSET 0x58 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_PWR_RDY_LSB 0x2 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_PWR_RDY_MASK 0x4 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_PWR_RDY_SIZE 0x1 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_PWR_RDY_DEFAULT 0x0 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_PWR_RDY_OFFSET 0x58 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_PWR_SW_ENB_LSB 0x3 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_PWR_SW_ENB_MASK 0x8 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_PWR_SW_ENB_SIZE 0x1 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_PWR_SW_ENB_DEFAULT 0x1 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_PWR_SW_ENB_OFFSET 0x58 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_RST_LSB 0x4 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_RST_MASK 0x10 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_RST_SIZE 0x1 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_RST_DEFAULT 0x0 #define GC_TRNG_ANALOG_SEN_LSR_INPUT_RST_OFFSET 0x58 #define GC_TRNG_ANALOG_SEN_LSR_OUTPUT_OUT_LSB 0x0 #define GC_TRNG_ANALOG_SEN_LSR_OUTPUT_OUT_MASK 0x1 #define GC_TRNG_ANALOG_SEN_LSR_OUTPUT_OUT_SIZE 0x1 #define GC_TRNG_ANALOG_SEN_LSR_OUTPUT_OUT_DEFAULT 0x0 #define GC_TRNG_ANALOG_SEN_LSR_OUTPUT_OUT_OFFSET 0x5c #define GC_TRNG_ANALOG_TEST_DIV_EN_LSB 0x0 #define GC_TRNG_ANALOG_TEST_DIV_EN_MASK 0x1 #define GC_TRNG_ANALOG_TEST_DIV_EN_SIZE 0x1 #define GC_TRNG_ANALOG_TEST_DIV_EN_DEFAULT 0x0 #define GC_TRNG_ANALOG_TEST_DIV_EN_OFFSET 0x60 #define GC_TRNG_ANALOG_TEST_RO_CALIBRATION_MODE_LSB 0x1 #define GC_TRNG_ANALOG_TEST_RO_CALIBRATION_MODE_MASK 0x2 #define GC_TRNG_ANALOG_TEST_RO_CALIBRATION_MODE_SIZE 0x1 #define GC_TRNG_ANALOG_TEST_RO_CALIBRATION_MODE_DEFAULT 0x0 #define GC_TRNG_ANALOG_TEST_RO_CALIBRATION_MODE_OFFSET 0x60 #define GC_TRNG_ANALOG_CTRL_EN_RO_LONG_LSB 0x0 #define GC_TRNG_ANALOG_CTRL_EN_RO_LONG_MASK 0x1 #define GC_TRNG_ANALOG_CTRL_EN_RO_LONG_SIZE 0x1 #define GC_TRNG_ANALOG_CTRL_EN_RO_LONG_DEFAULT 0x0 #define GC_TRNG_ANALOG_CTRL_EN_RO_LONG_OFFSET 0x64 #define GC_TRNG_ANALOG_CTRL_RO_REF_SHORT_BYP_DIVB_LSB 0x1 #define GC_TRNG_ANALOG_CTRL_RO_REF_SHORT_BYP_DIVB_MASK 0x2 #define GC_TRNG_ANALOG_CTRL_RO_REF_SHORT_BYP_DIVB_SIZE 0x1 #define GC_TRNG_ANALOG_CTRL_RO_REF_SHORT_BYP_DIVB_DEFAULT 0x0 #define GC_TRNG_ANALOG_CTRL_RO_REF_SHORT_BYP_DIVB_OFFSET 0x64 #define GC_TRNG_ANALOG_CTRL_BLD_RES_CTRL_LSB 0x2 #define GC_TRNG_ANALOG_CTRL_BLD_RES_CTRL_MASK 0xc #define GC_TRNG_ANALOG_CTRL_BLD_RES_CTRL_SIZE 0x2 #define GC_TRNG_ANALOG_CTRL_BLD_RES_CTRL_DEFAULT 0x0 #define GC_TRNG_ANALOG_CTRL_BLD_RES_CTRL_OFFSET 0x64 #define GC_UART_CTRL_TX_LSB 0x0 #define GC_UART_CTRL_TX_MASK 0x1 #define GC_UART_CTRL_TX_SIZE 0x1 #define GC_UART_CTRL_TX_DEFAULT 0x0 #define GC_UART_CTRL_TX_OFFSET 0xc #define GC_UART_CTRL_RX_LSB 0x1 #define GC_UART_CTRL_RX_MASK 0x2 #define GC_UART_CTRL_RX_SIZE 0x1 #define GC_UART_CTRL_RX_DEFAULT 0x0 #define GC_UART_CTRL_RX_OFFSET 0xc #define GC_UART_CTRL_CTS_LSB 0x2 #define GC_UART_CTRL_CTS_MASK 0x4 #define GC_UART_CTRL_CTS_SIZE 0x1 #define GC_UART_CTRL_CTS_DEFAULT 0x0 #define GC_UART_CTRL_CTS_OFFSET 0xc #define GC_UART_CTRL_RTS_LSB 0x3 #define GC_UART_CTRL_RTS_MASK 0x8 #define GC_UART_CTRL_RTS_SIZE 0x1 #define GC_UART_CTRL_RTS_DEFAULT 0x0 #define GC_UART_CTRL_RTS_OFFSET 0xc #define GC_UART_CTRL_SLPBK_LSB 0x4 #define GC_UART_CTRL_SLPBK_MASK 0x10 #define GC_UART_CTRL_SLPBK_SIZE 0x1 #define GC_UART_CTRL_SLPBK_DEFAULT 0x0 #define GC_UART_CTRL_SLPBK_OFFSET 0xc #define GC_UART_CTRL_LLPBK_LSB 0x5 #define GC_UART_CTRL_LLPBK_MASK 0x20 #define GC_UART_CTRL_LLPBK_SIZE 0x1 #define GC_UART_CTRL_LLPBK_DEFAULT 0x0 #define GC_UART_CTRL_LLPBK_OFFSET 0xc #define GC_UART_CTRL_RCOS_LSB 0x6 #define GC_UART_CTRL_RCOS_MASK 0x40 #define GC_UART_CTRL_RCOS_SIZE 0x1 #define GC_UART_CTRL_RCOS_DEFAULT 0x0 #define GC_UART_CTRL_RCOS_OFFSET 0xc #define GC_UART_CTRL_NF_LSB 0x7 #define GC_UART_CTRL_NF_MASK 0x80 #define GC_UART_CTRL_NF_SIZE 0x1 #define GC_UART_CTRL_NF_DEFAULT 0x0 #define GC_UART_CTRL_NF_OFFSET 0xc #define GC_UART_ICTRL_TX_LSB 0x0 #define GC_UART_ICTRL_TX_MASK 0x1 #define GC_UART_ICTRL_TX_SIZE 0x1 #define GC_UART_ICTRL_TX_DEFAULT 0x0 #define GC_UART_ICTRL_TX_OFFSET 0x10 #define GC_UART_ICTRL_RX_LSB 0x1 #define GC_UART_ICTRL_RX_MASK 0x2 #define GC_UART_ICTRL_RX_SIZE 0x1 #define GC_UART_ICTRL_RX_DEFAULT 0x0 #define GC_UART_ICTRL_RX_OFFSET 0x10 #define GC_UART_ICTRL_TXO_LSB 0x2 #define GC_UART_ICTRL_TXO_MASK 0x4 #define GC_UART_ICTRL_TXO_SIZE 0x1 #define GC_UART_ICTRL_TXO_DEFAULT 0x0 #define GC_UART_ICTRL_TXO_OFFSET 0x10 #define GC_UART_ICTRL_RXO_LSB 0x3 #define GC_UART_ICTRL_RXO_MASK 0x8 #define GC_UART_ICTRL_RXO_SIZE 0x1 #define GC_UART_ICTRL_RXO_DEFAULT 0x0 #define GC_UART_ICTRL_RXO_OFFSET 0x10 #define GC_UART_ICTRL_RXF_LSB 0x4 #define GC_UART_ICTRL_RXF_MASK 0x10 #define GC_UART_ICTRL_RXF_SIZE 0x1 #define GC_UART_ICTRL_RXF_DEFAULT 0x0 #define GC_UART_ICTRL_RXF_OFFSET 0x10 #define GC_UART_ICTRL_RXB_LSB 0x5 #define GC_UART_ICTRL_RXB_MASK 0x20 #define GC_UART_ICTRL_RXB_SIZE 0x1 #define GC_UART_ICTRL_RXB_DEFAULT 0x0 #define GC_UART_ICTRL_RXB_OFFSET 0x10 #define GC_UART_ICTRL_RXBLVL_LSB 0x6 #define GC_UART_ICTRL_RXBLVL_MASK 0xc0 #define GC_UART_ICTRL_RXBLVL_SIZE 0x2 #define GC_UART_ICTRL_RXBLVL_DEFAULT 0x0 #define GC_UART_ICTRL_RXBLVL_OFFSET 0x10 #define GC_UART_ICTRL_RXTO_LSB 0x8 #define GC_UART_ICTRL_RXTO_MASK 0x100 #define GC_UART_ICTRL_RXTO_SIZE 0x1 #define GC_UART_ICTRL_RXTO_DEFAULT 0x0 #define GC_UART_ICTRL_RXTO_OFFSET 0x10 #define GC_UART_STATE_TX_LSB 0x0 #define GC_UART_STATE_TX_MASK 0x1 #define GC_UART_STATE_TX_SIZE 0x1 #define GC_UART_STATE_TX_DEFAULT 0x0 #define GC_UART_STATE_TX_OFFSET 0x14 #define GC_UART_STATE_RX_LSB 0x1 #define GC_UART_STATE_RX_MASK 0x2 #define GC_UART_STATE_RX_SIZE 0x1 #define GC_UART_STATE_RX_DEFAULT 0x0 #define GC_UART_STATE_RX_OFFSET 0x14 #define GC_UART_STATE_TXO_LSB 0x2 #define GC_UART_STATE_TXO_MASK 0x4 #define GC_UART_STATE_TXO_SIZE 0x1 #define GC_UART_STATE_TXO_DEFAULT 0x0 #define GC_UART_STATE_TXO_OFFSET 0x14 #define GC_UART_STATE_RXO_LSB 0x3 #define GC_UART_STATE_RXO_MASK 0x8 #define GC_UART_STATE_RXO_SIZE 0x1 #define GC_UART_STATE_RXO_DEFAULT 0x0 #define GC_UART_STATE_RXO_OFFSET 0x14 #define GC_UART_STATE_TXEMPTY_LSB 0x4 #define GC_UART_STATE_TXEMPTY_MASK 0x10 #define GC_UART_STATE_TXEMPTY_SIZE 0x1 #define GC_UART_STATE_TXEMPTY_DEFAULT 0x1 #define GC_UART_STATE_TXEMPTY_OFFSET 0x14 #define GC_UART_STATE_TXIDLE_LSB 0x5 #define GC_UART_STATE_TXIDLE_MASK 0x20 #define GC_UART_STATE_TXIDLE_SIZE 0x1 #define GC_UART_STATE_TXIDLE_DEFAULT 0x0 #define GC_UART_STATE_TXIDLE_OFFSET 0x14 #define GC_UART_STATE_RXIDLE_LSB 0x6 #define GC_UART_STATE_RXIDLE_MASK 0x40 #define GC_UART_STATE_RXIDLE_SIZE 0x1 #define GC_UART_STATE_RXIDLE_DEFAULT 0x0 #define GC_UART_STATE_RXIDLE_OFFSET 0x14 #define GC_UART_STATE_RXEMPTY_LSB 0x7 #define GC_UART_STATE_RXEMPTY_MASK 0x80 #define GC_UART_STATE_RXEMPTY_SIZE 0x1 #define GC_UART_STATE_RXEMPTY_DEFAULT 0x1 #define GC_UART_STATE_RXEMPTY_OFFSET 0x14 #define GC_UART_STATECLR_RES0_LSB 0x0 #define GC_UART_STATECLR_RES0_MASK 0x1 #define GC_UART_STATECLR_RES0_SIZE 0x1 #define GC_UART_STATECLR_RES0_DEFAULT 0x0 #define GC_UART_STATECLR_RES0_OFFSET 0x18 #define GC_UART_STATECLR_RES1_LSB 0x1 #define GC_UART_STATECLR_RES1_MASK 0x2 #define GC_UART_STATECLR_RES1_SIZE 0x1 #define GC_UART_STATECLR_RES1_DEFAULT 0x0 #define GC_UART_STATECLR_RES1_OFFSET 0x18 #define GC_UART_STATECLR_TXO_LSB 0x2 #define GC_UART_STATECLR_TXO_MASK 0x4 #define GC_UART_STATECLR_TXO_SIZE 0x1 #define GC_UART_STATECLR_TXO_DEFAULT 0x0 #define GC_UART_STATECLR_TXO_OFFSET 0x18 #define GC_UART_STATECLR_RXO_LSB 0x3 #define GC_UART_STATECLR_RXO_MASK 0x8 #define GC_UART_STATECLR_RXO_SIZE 0x1 #define GC_UART_STATECLR_RXO_DEFAULT 0x0 #define GC_UART_STATECLR_RXO_OFFSET 0x18 #define GC_UART_ISTATE_TX_LSB 0x0 #define GC_UART_ISTATE_TX_MASK 0x1 #define GC_UART_ISTATE_TX_SIZE 0x1 #define GC_UART_ISTATE_TX_DEFAULT 0x0 #define GC_UART_ISTATE_TX_OFFSET 0x1c #define GC_UART_ISTATE_RX_LSB 0x1 #define GC_UART_ISTATE_RX_MASK 0x2 #define GC_UART_ISTATE_RX_SIZE 0x1 #define GC_UART_ISTATE_RX_DEFAULT 0x0 #define GC_UART_ISTATE_RX_OFFSET 0x1c #define GC_UART_ISTATE_TXO_LSB 0x2 #define GC_UART_ISTATE_TXO_MASK 0x4 #define GC_UART_ISTATE_TXO_SIZE 0x1 #define GC_UART_ISTATE_TXO_DEFAULT 0x0 #define GC_UART_ISTATE_TXO_OFFSET 0x1c #define GC_UART_ISTATE_RXO_LSB 0x3 #define GC_UART_ISTATE_RXO_MASK 0x8 #define GC_UART_ISTATE_RXO_SIZE 0x1 #define GC_UART_ISTATE_RXO_DEFAULT 0x0 #define GC_UART_ISTATE_RXO_OFFSET 0x1c #define GC_UART_ISTATE_RXF_LSB 0x4 #define GC_UART_ISTATE_RXF_MASK 0x10 #define GC_UART_ISTATE_RXF_SIZE 0x1 #define GC_UART_ISTATE_RXF_DEFAULT 0x0 #define GC_UART_ISTATE_RXF_OFFSET 0x1c #define GC_UART_ISTATE_RXB_LSB 0x5 #define GC_UART_ISTATE_RXB_MASK 0x20 #define GC_UART_ISTATE_RXB_SIZE 0x1 #define GC_UART_ISTATE_RXB_DEFAULT 0x0 #define GC_UART_ISTATE_RXB_OFFSET 0x1c #define GC_UART_ISTATE_RXTO_LSB 0x6 #define GC_UART_ISTATE_RXTO_MASK 0x40 #define GC_UART_ISTATE_RXTO_SIZE 0x1 #define GC_UART_ISTATE_RXTO_DEFAULT 0x0 #define GC_UART_ISTATE_RXTO_OFFSET 0x1c #define GC_UART_ISTATECLR_TX_LSB 0x0 #define GC_UART_ISTATECLR_TX_MASK 0x1 #define GC_UART_ISTATECLR_TX_SIZE 0x1 #define GC_UART_ISTATECLR_TX_DEFAULT 0x0 #define GC_UART_ISTATECLR_TX_OFFSET 0x20 #define GC_UART_ISTATECLR_RX_LSB 0x1 #define GC_UART_ISTATECLR_RX_MASK 0x2 #define GC_UART_ISTATECLR_RX_SIZE 0x1 #define GC_UART_ISTATECLR_RX_DEFAULT 0x0 #define GC_UART_ISTATECLR_RX_OFFSET 0x20 #define GC_UART_ISTATECLR_TXO_LSB 0x2 #define GC_UART_ISTATECLR_TXO_MASK 0x4 #define GC_UART_ISTATECLR_TXO_SIZE 0x1 #define GC_UART_ISTATECLR_TXO_DEFAULT 0x0 #define GC_UART_ISTATECLR_TXO_OFFSET 0x20 #define GC_UART_ISTATECLR_RXO_LSB 0x3 #define GC_UART_ISTATECLR_RXO_MASK 0x8 #define GC_UART_ISTATECLR_RXO_SIZE 0x1 #define GC_UART_ISTATECLR_RXO_DEFAULT 0x0 #define GC_UART_ISTATECLR_RXO_OFFSET 0x20 #define GC_UART_ISTATECLR_RXF_LSB 0x4 #define GC_UART_ISTATECLR_RXF_MASK 0x10 #define GC_UART_ISTATECLR_RXF_SIZE 0x1 #define GC_UART_ISTATECLR_RXF_DEFAULT 0x0 #define GC_UART_ISTATECLR_RXF_OFFSET 0x20 #define GC_UART_ISTATECLR_RXB_LSB 0x5 #define GC_UART_ISTATECLR_RXB_MASK 0x20 #define GC_UART_ISTATECLR_RXB_SIZE 0x1 #define GC_UART_ISTATECLR_RXB_DEFAULT 0x0 #define GC_UART_ISTATECLR_RXB_OFFSET 0x20 #define GC_UART_ISTATECLR_RXTO_LSB 0x6 #define GC_UART_ISTATECLR_RXTO_MASK 0x40 #define GC_UART_ISTATECLR_RXTO_SIZE 0x1 #define GC_UART_ISTATECLR_RXTO_DEFAULT 0x0 #define GC_UART_ISTATECLR_RXTO_OFFSET 0x20 #define GC_UART_FIFO_RXRST_LSB 0x0 #define GC_UART_FIFO_RXRST_MASK 0x1 #define GC_UART_FIFO_RXRST_SIZE 0x1 #define GC_UART_FIFO_RXRST_DEFAULT 0x0 #define GC_UART_FIFO_RXRST_OFFSET 0x24 #define GC_UART_FIFO_TXRST_LSB 0x1 #define GC_UART_FIFO_TXRST_MASK 0x2 #define GC_UART_FIFO_TXRST_SIZE 0x1 #define GC_UART_FIFO_TXRST_DEFAULT 0x0 #define GC_UART_FIFO_TXRST_OFFSET 0x24 #define GC_UART_FIFO_RXILVL_LSB 0x2 #define GC_UART_FIFO_RXILVL_MASK 0x1c #define GC_UART_FIFO_RXILVL_SIZE 0x3 #define GC_UART_FIFO_RXILVL_DEFAULT 0x0 #define GC_UART_FIFO_RXILVL_OFFSET 0x24 #define GC_UART_FIFO_TXILVL_LSB 0x5 #define GC_UART_FIFO_TXILVL_MASK 0x60 #define GC_UART_FIFO_TXILVL_SIZE 0x2 #define GC_UART_FIFO_TXILVL_DEFAULT 0x0 #define GC_UART_FIFO_TXILVL_OFFSET 0x24 #define GC_UART_RFIFO_TXLVL_LSB 0x0 #define GC_UART_RFIFO_TXLVL_MASK 0x3f #define GC_UART_RFIFO_TXLVL_SIZE 0x6 #define GC_UART_RFIFO_TXLVL_DEFAULT 0x0 #define GC_UART_RFIFO_TXLVL_OFFSET 0x28 #define GC_UART_RFIFO_RXLVL_LSB 0x6 #define GC_UART_RFIFO_RXLVL_MASK 0xfc0 #define GC_UART_RFIFO_RXLVL_SIZE 0x6 #define GC_UART_RFIFO_RXLVL_DEFAULT 0x0 #define GC_UART_RFIFO_RXLVL_OFFSET 0x28 #define GC_UART_OVRD_TXEN_LSB 0x0 #define GC_UART_OVRD_TXEN_MASK 0x1 #define GC_UART_OVRD_TXEN_SIZE 0x1 #define GC_UART_OVRD_TXEN_DEFAULT 0x0 #define GC_UART_OVRD_TXEN_OFFSET 0x2c #define GC_UART_OVRD_TXVAL_LSB 0x1 #define GC_UART_OVRD_TXVAL_MASK 0x2 #define GC_UART_OVRD_TXVAL_SIZE 0x1 #define GC_UART_OVRD_TXVAL_DEFAULT 0x0 #define GC_UART_OVRD_TXVAL_OFFSET 0x2c #define GC_UART_OVRD_RTSEN_LSB 0x2 #define GC_UART_OVRD_RTSEN_MASK 0x4 #define GC_UART_OVRD_RTSEN_SIZE 0x1 #define GC_UART_OVRD_RTSEN_DEFAULT 0x0 #define GC_UART_OVRD_RTSEN_OFFSET 0x2c #define GC_UART_OVRD_RTSVAL_LSB 0x3 #define GC_UART_OVRD_RTSVAL_MASK 0x8 #define GC_UART_OVRD_RTSVAL_SIZE 0x1 #define GC_UART_OVRD_RTSVAL_DEFAULT 0x0 #define GC_UART_OVRD_RTSVAL_OFFSET 0x2c #define GC_UART_VAL_RX_LSB 0x0 #define GC_UART_VAL_RX_MASK 0xffff #define GC_UART_VAL_RX_SIZE 0x10 #define GC_UART_VAL_RX_DEFAULT 0x0 #define GC_UART_VAL_RX_OFFSET 0x30 #define GC_UART_VAL_CTS_LSB 0x10 #define GC_UART_VAL_CTS_MASK 0xffff0000 #define GC_UART_VAL_CTS_SIZE 0x10 #define GC_UART_VAL_CTS_DEFAULT 0x0 #define GC_UART_VAL_CTS_OFFSET 0x30 #define GC_UART_RXTO_EN_LSB 0x0 #define GC_UART_RXTO_EN_MASK 0x1 #define GC_UART_RXTO_EN_SIZE 0x1 #define GC_UART_RXTO_EN_DEFAULT 0x0 #define GC_UART_RXTO_EN_OFFSET 0x34 #define GC_UART_RXTO_VAL_LSB 0x1 #define GC_UART_RXTO_VAL_MASK 0x1fffffe #define GC_UART_RXTO_VAL_SIZE 0x18 #define GC_UART_RXTO_VAL_DEFAULT 0x0 #define GC_UART_RXTO_VAL_OFFSET 0x34 #define GC_UART_ITOP_TX_LSB 0x0 #define GC_UART_ITOP_TX_MASK 0x1 #define GC_UART_ITOP_TX_SIZE 0x1 #define GC_UART_ITOP_TX_DEFAULT 0x0 #define GC_UART_ITOP_TX_OFFSET 0xf04 #define GC_UART_ITOP_RX_LSB 0x1 #define GC_UART_ITOP_RX_MASK 0x2 #define GC_UART_ITOP_RX_SIZE 0x1 #define GC_UART_ITOP_RX_DEFAULT 0x0 #define GC_UART_ITOP_RX_OFFSET 0xf04 #define GC_UART_ITOP_TXO_LSB 0x2 #define GC_UART_ITOP_TXO_MASK 0x4 #define GC_UART_ITOP_TXO_SIZE 0x1 #define GC_UART_ITOP_TXO_DEFAULT 0x0 #define GC_UART_ITOP_TXO_OFFSET 0xf04 #define GC_UART_ITOP_RXO_LSB 0x3 #define GC_UART_ITOP_RXO_MASK 0x8 #define GC_UART_ITOP_RXO_SIZE 0x1 #define GC_UART_ITOP_RXO_DEFAULT 0x0 #define GC_UART_ITOP_RXO_OFFSET 0xf04 #define GC_UART_ITOP_RXF_LSB 0x4 #define GC_UART_ITOP_RXF_MASK 0x10 #define GC_UART_ITOP_RXF_SIZE 0x1 #define GC_UART_ITOP_RXF_DEFAULT 0x0 #define GC_UART_ITOP_RXF_OFFSET 0xf04 #define GC_UART_ITOP_RXB_LSB 0x5 #define GC_UART_ITOP_RXB_MASK 0x20 #define GC_UART_ITOP_RXB_SIZE 0x1 #define GC_UART_ITOP_RXB_DEFAULT 0x0 #define GC_UART_ITOP_RXB_OFFSET 0xf04 #define GC_UART_ITOP_RXTO_LSB 0x6 #define GC_UART_ITOP_RXTO_MASK 0x40 #define GC_UART_ITOP_RXTO_SIZE 0x1 #define GC_UART_ITOP_RXTO_DEFAULT 0x0 #define GC_UART_ITOP_RXTO_OFFSET 0xf04 #define GC_USB_GOTGCTL_BVALIDOVEN_LSB 0x6 #define GC_USB_GOTGCTL_BVALIDOVEN_MASK 0x40 #define GC_USB_GOTGCTL_BVALIDOVEN_SIZE 0x1 #define GC_USB_GOTGCTL_BVALIDOVEN_DEFAULT 0x0 #define GC_USB_GOTGCTL_BVALIDOVEN_OFFSET 0x0 #define GC_USB_GOTGCTL_BVALIDOVVAL_LSB 0x7 #define GC_USB_GOTGCTL_BVALIDOVVAL_MASK 0x80 #define GC_USB_GOTGCTL_BVALIDOVVAL_SIZE 0x1 #define GC_USB_GOTGCTL_BVALIDOVVAL_DEFAULT 0x0 #define GC_USB_GOTGCTL_BVALIDOVVAL_OFFSET 0x0 #define GC_USB_GOTGCTL_CONIDSTS_LSB 0x10 #define GC_USB_GOTGCTL_CONIDSTS_MASK 0x10000 #define GC_USB_GOTGCTL_CONIDSTS_SIZE 0x1 #define GC_USB_GOTGCTL_CONIDSTS_DEFAULT 0x0 #define GC_USB_GOTGCTL_CONIDSTS_OFFSET 0x0 #define GC_USB_GOTGCTL_BSESVLD_LSB 0x13 #define GC_USB_GOTGCTL_BSESVLD_MASK 0x80000 #define GC_USB_GOTGCTL_BSESVLD_SIZE 0x1 #define GC_USB_GOTGCTL_BSESVLD_DEFAULT 0x0 #define GC_USB_GOTGCTL_BSESVLD_OFFSET 0x0 #define GC_USB_GOTGCTL_OTGVER_LSB 0x14 #define GC_USB_GOTGCTL_OTGVER_MASK 0x100000 #define GC_USB_GOTGCTL_OTGVER_SIZE 0x1 #define GC_USB_GOTGCTL_OTGVER_DEFAULT 0x0 #define GC_USB_GOTGCTL_OTGVER_OFFSET 0x0 #define GC_USB_GOTGCTL_CURMOD_LSB 0x15 #define GC_USB_GOTGCTL_CURMOD_MASK 0x200000 #define GC_USB_GOTGCTL_CURMOD_SIZE 0x1 #define GC_USB_GOTGCTL_CURMOD_DEFAULT 0x0 #define GC_USB_GOTGCTL_CURMOD_OFFSET 0x0 #define GC_USB_GOTGINT_SESENDDET_LSB 0x2 #define GC_USB_GOTGINT_SESENDDET_MASK 0x4 #define GC_USB_GOTGINT_SESENDDET_SIZE 0x1 #define GC_USB_GOTGINT_SESENDDET_DEFAULT 0x0 #define GC_USB_GOTGINT_SESENDDET_OFFSET 0x4 #define GC_USB_GOTGINT_SESREQSUCSTSCHNG_LSB 0x8 #define GC_USB_GOTGINT_SESREQSUCSTSCHNG_MASK 0x100 #define GC_USB_GOTGINT_SESREQSUCSTSCHNG_SIZE 0x1 #define GC_USB_GOTGINT_SESREQSUCSTSCHNG_DEFAULT 0x0 #define GC_USB_GOTGINT_SESREQSUCSTSCHNG_OFFSET 0x4 #define GC_USB_GOTGINT_HSTNEGSUCSTSCHNG_LSB 0x9 #define GC_USB_GOTGINT_HSTNEGSUCSTSCHNG_MASK 0x200 #define GC_USB_GOTGINT_HSTNEGSUCSTSCHNG_SIZE 0x1 #define GC_USB_GOTGINT_HSTNEGSUCSTSCHNG_DEFAULT 0x0 #define GC_USB_GOTGINT_HSTNEGSUCSTSCHNG_OFFSET 0x4 #define GC_USB_GOTGINT_HSTNEGDET_LSB 0x11 #define GC_USB_GOTGINT_HSTNEGDET_MASK 0x20000 #define GC_USB_GOTGINT_HSTNEGDET_SIZE 0x1 #define GC_USB_GOTGINT_HSTNEGDET_DEFAULT 0x0 #define GC_USB_GOTGINT_HSTNEGDET_OFFSET 0x4 #define GC_USB_GOTGINT_ADEVTOUTCHG_LSB 0x12 #define GC_USB_GOTGINT_ADEVTOUTCHG_MASK 0x40000 #define GC_USB_GOTGINT_ADEVTOUTCHG_SIZE 0x1 #define GC_USB_GOTGINT_ADEVTOUTCHG_DEFAULT 0x0 #define GC_USB_GOTGINT_ADEVTOUTCHG_OFFSET 0x4 #define GC_USB_GAHBCFG_GLBLINTRMSK_LSB 0x0 #define GC_USB_GAHBCFG_GLBLINTRMSK_MASK 0x1 #define GC_USB_GAHBCFG_GLBLINTRMSK_SIZE 0x1 #define GC_USB_GAHBCFG_GLBLINTRMSK_DEFAULT 0x0 #define GC_USB_GAHBCFG_GLBLINTRMSK_OFFSET 0x8 #define GC_USB_GAHBCFG_HBSTLEN_LSB 0x1 #define GC_USB_GAHBCFG_HBSTLEN_MASK 0x1e #define GC_USB_GAHBCFG_HBSTLEN_SIZE 0x4 #define GC_USB_GAHBCFG_HBSTLEN_DEFAULT 0x0 #define GC_USB_GAHBCFG_HBSTLEN_OFFSET 0x8 #define GC_USB_GAHBCFG_DMAEN_LSB 0x5 #define GC_USB_GAHBCFG_DMAEN_MASK 0x20 #define GC_USB_GAHBCFG_DMAEN_SIZE 0x1 #define GC_USB_GAHBCFG_DMAEN_DEFAULT 0x0 #define GC_USB_GAHBCFG_DMAEN_OFFSET 0x8 #define GC_USB_GAHBCFG_NPTXFEMPLVL_LSB 0x7 #define GC_USB_GAHBCFG_NPTXFEMPLVL_MASK 0x80 #define GC_USB_GAHBCFG_NPTXFEMPLVL_SIZE 0x1 #define GC_USB_GAHBCFG_NPTXFEMPLVL_DEFAULT 0x0 #define GC_USB_GAHBCFG_NPTXFEMPLVL_OFFSET 0x8 #define GC_USB_GAHBCFG_REMMEMSUPP_LSB 0x15 #define GC_USB_GAHBCFG_REMMEMSUPP_MASK 0x200000 #define GC_USB_GAHBCFG_REMMEMSUPP_SIZE 0x1 #define GC_USB_GAHBCFG_REMMEMSUPP_DEFAULT 0x0 #define GC_USB_GAHBCFG_REMMEMSUPP_OFFSET 0x8 #define GC_USB_GAHBCFG_NOTIALLDMAWRIT_LSB 0x16 #define GC_USB_GAHBCFG_NOTIALLDMAWRIT_MASK 0x400000 #define GC_USB_GAHBCFG_NOTIALLDMAWRIT_SIZE 0x1 #define GC_USB_GAHBCFG_NOTIALLDMAWRIT_DEFAULT 0x0 #define GC_USB_GAHBCFG_NOTIALLDMAWRIT_OFFSET 0x8 #define GC_USB_GAHBCFG_AHBSINGLE_LSB 0x17 #define GC_USB_GAHBCFG_AHBSINGLE_MASK 0x800000 #define GC_USB_GAHBCFG_AHBSINGLE_SIZE 0x1 #define GC_USB_GAHBCFG_AHBSINGLE_DEFAULT 0x0 #define GC_USB_GAHBCFG_AHBSINGLE_OFFSET 0x8 #define GC_USB_GAHBCFG_INVDESCENDIANESS_LSB 0x18 #define GC_USB_GAHBCFG_INVDESCENDIANESS_MASK 0x1000000 #define GC_USB_GAHBCFG_INVDESCENDIANESS_SIZE 0x1 #define GC_USB_GAHBCFG_INVDESCENDIANESS_DEFAULT 0x0 #define GC_USB_GAHBCFG_INVDESCENDIANESS_OFFSET 0x8 #define GC_USB_GUSBCFG_TOUTCAL_LSB 0x0 #define GC_USB_GUSBCFG_TOUTCAL_MASK 0x7 #define GC_USB_GUSBCFG_TOUTCAL_SIZE 0x3 #define GC_USB_GUSBCFG_TOUTCAL_DEFAULT 0x0 #define GC_USB_GUSBCFG_TOUTCAL_OFFSET 0xc #define GC_USB_GUSBCFG_PHYIF_LSB 0x3 #define GC_USB_GUSBCFG_PHYIF_MASK 0x8 #define GC_USB_GUSBCFG_PHYIF_SIZE 0x1 #define GC_USB_GUSBCFG_PHYIF_DEFAULT 0x0 #define GC_USB_GUSBCFG_PHYIF_OFFSET 0xc #define GC_USB_GUSBCFG_ULPI_UTMI_SEL_LSB 0x4 #define GC_USB_GUSBCFG_ULPI_UTMI_SEL_MASK 0x10 #define GC_USB_GUSBCFG_ULPI_UTMI_SEL_SIZE 0x1 #define GC_USB_GUSBCFG_ULPI_UTMI_SEL_DEFAULT 0x0 #define GC_USB_GUSBCFG_ULPI_UTMI_SEL_OFFSET 0xc #define GC_USB_GUSBCFG_FSINTF_LSB 0x5 #define GC_USB_GUSBCFG_FSINTF_MASK 0x20 #define GC_USB_GUSBCFG_FSINTF_SIZE 0x1 #define GC_USB_GUSBCFG_FSINTF_DEFAULT 0x0 #define GC_USB_GUSBCFG_FSINTF_OFFSET 0xc #define GC_USB_GUSBCFG_PHYSEL_LSB 0x6 #define GC_USB_GUSBCFG_PHYSEL_MASK 0x40 #define GC_USB_GUSBCFG_PHYSEL_SIZE 0x1 #define GC_USB_GUSBCFG_PHYSEL_DEFAULT 0x0 #define GC_USB_GUSBCFG_PHYSEL_OFFSET 0xc #define GC_USB_GUSBCFG_DDRSEL_LSB 0x7 #define GC_USB_GUSBCFG_DDRSEL_MASK 0x80 #define GC_USB_GUSBCFG_DDRSEL_SIZE 0x1 #define GC_USB_GUSBCFG_DDRSEL_DEFAULT 0x0 #define GC_USB_GUSBCFG_DDRSEL_OFFSET 0xc #define GC_USB_GUSBCFG_USBTRDTIM_LSB 0xa #define GC_USB_GUSBCFG_USBTRDTIM_MASK 0x3c00 #define GC_USB_GUSBCFG_USBTRDTIM_SIZE 0x4 #define GC_USB_GUSBCFG_USBTRDTIM_DEFAULT 0x0 #define GC_USB_GUSBCFG_USBTRDTIM_OFFSET 0xc #define GC_USB_GUSBCFG_PHYLPWRCLKSEL_LSB 0xf #define GC_USB_GUSBCFG_PHYLPWRCLKSEL_MASK 0x8000 #define GC_USB_GUSBCFG_PHYLPWRCLKSEL_SIZE 0x1 #define GC_USB_GUSBCFG_PHYLPWRCLKSEL_DEFAULT 0x0 #define GC_USB_GUSBCFG_PHYLPWRCLKSEL_OFFSET 0xc #define GC_USB_GUSBCFG_ULPIFSLS_LSB 0x11 #define GC_USB_GUSBCFG_ULPIFSLS_MASK 0x20000 #define GC_USB_GUSBCFG_ULPIFSLS_SIZE 0x1 #define GC_USB_GUSBCFG_ULPIFSLS_DEFAULT 0x0 #define GC_USB_GUSBCFG_ULPIFSLS_OFFSET 0xc #define GC_USB_GUSBCFG_ULPIAUTORES_LSB 0x12 #define GC_USB_GUSBCFG_ULPIAUTORES_MASK 0x40000 #define GC_USB_GUSBCFG_ULPIAUTORES_SIZE 0x1 #define GC_USB_GUSBCFG_ULPIAUTORES_DEFAULT 0x0 #define GC_USB_GUSBCFG_ULPIAUTORES_OFFSET 0xc #define GC_USB_GUSBCFG_ULPICLKSUSM_LSB 0x13 #define GC_USB_GUSBCFG_ULPICLKSUSM_MASK 0x80000 #define GC_USB_GUSBCFG_ULPICLKSUSM_SIZE 0x1 #define GC_USB_GUSBCFG_ULPICLKSUSM_DEFAULT 0x0 #define GC_USB_GUSBCFG_ULPICLKSUSM_OFFSET 0xc #define GC_USB_GUSBCFG_TERMSELDLPULSE_LSB 0x16 #define GC_USB_GUSBCFG_TERMSELDLPULSE_MASK 0x400000 #define GC_USB_GUSBCFG_TERMSELDLPULSE_SIZE 0x1 #define GC_USB_GUSBCFG_TERMSELDLPULSE_DEFAULT 0x0 #define GC_USB_GUSBCFG_TERMSELDLPULSE_OFFSET 0xc #define GC_USB_GUSBCFG_IC_USBCAP_LSB 0x1a #define GC_USB_GUSBCFG_IC_USBCAP_MASK 0x4000000 #define GC_USB_GUSBCFG_IC_USBCAP_SIZE 0x1 #define GC_USB_GUSBCFG_IC_USBCAP_DEFAULT 0x0 #define GC_USB_GUSBCFG_IC_USBCAP_OFFSET 0xc #define GC_USB_GUSBCFG_TXENDDELAY_LSB 0x1c #define GC_USB_GUSBCFG_TXENDDELAY_MASK 0x10000000 #define GC_USB_GUSBCFG_TXENDDELAY_SIZE 0x1 #define GC_USB_GUSBCFG_TXENDDELAY_DEFAULT 0x0 #define GC_USB_GUSBCFG_TXENDDELAY_OFFSET 0xc #define GC_USB_GUSBCFG_CORRUPTTXPKT_LSB 0x1f #define GC_USB_GUSBCFG_CORRUPTTXPKT_MASK 0x80000000 #define GC_USB_GUSBCFG_CORRUPTTXPKT_SIZE 0x1 #define GC_USB_GUSBCFG_CORRUPTTXPKT_DEFAULT 0x0 #define GC_USB_GUSBCFG_CORRUPTTXPKT_OFFSET 0xc #define GC_USB_GRSTCTL_CSFTRST_LSB 0x0 #define GC_USB_GRSTCTL_CSFTRST_MASK 0x1 #define GC_USB_GRSTCTL_CSFTRST_SIZE 0x1 #define GC_USB_GRSTCTL_CSFTRST_DEFAULT 0x0 #define GC_USB_GRSTCTL_CSFTRST_OFFSET 0x10 #define GC_USB_GRSTCTL_PIUFSSFTRST_LSB 0x1 #define GC_USB_GRSTCTL_PIUFSSFTRST_MASK 0x2 #define GC_USB_GRSTCTL_PIUFSSFTRST_SIZE 0x1 #define GC_USB_GRSTCTL_PIUFSSFTRST_DEFAULT 0x0 #define GC_USB_GRSTCTL_PIUFSSFTRST_OFFSET 0x10 #define GC_USB_GRSTCTL_RXFFLSH_LSB 0x4 #define GC_USB_GRSTCTL_RXFFLSH_MASK 0x10 #define GC_USB_GRSTCTL_RXFFLSH_SIZE 0x1 #define GC_USB_GRSTCTL_RXFFLSH_DEFAULT 0x0 #define GC_USB_GRSTCTL_RXFFLSH_OFFSET 0x10 #define GC_USB_GRSTCTL_TXFFLSH_LSB 0x5 #define GC_USB_GRSTCTL_TXFFLSH_MASK 0x20 #define GC_USB_GRSTCTL_TXFFLSH_SIZE 0x1 #define GC_USB_GRSTCTL_TXFFLSH_DEFAULT 0x0 #define GC_USB_GRSTCTL_TXFFLSH_OFFSET 0x10 #define GC_USB_GRSTCTL_TXFNUM_LSB 0x6 #define GC_USB_GRSTCTL_TXFNUM_MASK 0x7c0 #define GC_USB_GRSTCTL_TXFNUM_SIZE 0x5 #define GC_USB_GRSTCTL_TXFNUM_DEFAULT 0x0 #define GC_USB_GRSTCTL_TXFNUM_OFFSET 0x10 #define GC_USB_GRSTCTL_DMAREQ_LSB 0x1e #define GC_USB_GRSTCTL_DMAREQ_MASK 0x40000000 #define GC_USB_GRSTCTL_DMAREQ_SIZE 0x1 #define GC_USB_GRSTCTL_DMAREQ_DEFAULT 0x0 #define GC_USB_GRSTCTL_DMAREQ_OFFSET 0x10 #define GC_USB_GRSTCTL_AHBIDLE_LSB 0x1f #define GC_USB_GRSTCTL_AHBIDLE_MASK 0x80000000 #define GC_USB_GRSTCTL_AHBIDLE_SIZE 0x1 #define GC_USB_GRSTCTL_AHBIDLE_DEFAULT 0x0 #define GC_USB_GRSTCTL_AHBIDLE_OFFSET 0x10 #define GC_USB_GINTSTS_CURMOD_LSB 0x0 #define GC_USB_GINTSTS_CURMOD_MASK 0x1 #define GC_USB_GINTSTS_CURMOD_SIZE 0x1 #define GC_USB_GINTSTS_CURMOD_DEFAULT 0x0 #define GC_USB_GINTSTS_CURMOD_OFFSET 0x14 #define GC_USB_GINTSTS_MODEMIS_LSB 0x1 #define GC_USB_GINTSTS_MODEMIS_MASK 0x2 #define GC_USB_GINTSTS_MODEMIS_SIZE 0x1 #define GC_USB_GINTSTS_MODEMIS_DEFAULT 0x0 #define GC_USB_GINTSTS_MODEMIS_OFFSET 0x14 #define GC_USB_GINTSTS_OTGINT_LSB 0x2 #define GC_USB_GINTSTS_OTGINT_MASK 0x4 #define GC_USB_GINTSTS_OTGINT_SIZE 0x1 #define GC_USB_GINTSTS_OTGINT_DEFAULT 0x0 #define GC_USB_GINTSTS_OTGINT_OFFSET 0x14 #define GC_USB_GINTSTS_SOF_LSB 0x3 #define GC_USB_GINTSTS_SOF_MASK 0x8 #define GC_USB_GINTSTS_SOF_SIZE 0x1 #define GC_USB_GINTSTS_SOF_DEFAULT 0x0 #define GC_USB_GINTSTS_SOF_OFFSET 0x14 #define GC_USB_GINTSTS_RXFLVL_LSB 0x4 #define GC_USB_GINTSTS_RXFLVL_MASK 0x10 #define GC_USB_GINTSTS_RXFLVL_SIZE 0x1 #define GC_USB_GINTSTS_RXFLVL_DEFAULT 0x0 #define GC_USB_GINTSTS_RXFLVL_OFFSET 0x14 #define GC_USB_GINTSTS_GINNAKEFF_LSB 0x6 #define GC_USB_GINTSTS_GINNAKEFF_MASK 0x40 #define GC_USB_GINTSTS_GINNAKEFF_SIZE 0x1 #define GC_USB_GINTSTS_GINNAKEFF_DEFAULT 0x0 #define GC_USB_GINTSTS_GINNAKEFF_OFFSET 0x14 #define GC_USB_GINTSTS_GOUTNAKEFF_LSB 0x7 #define GC_USB_GINTSTS_GOUTNAKEFF_MASK 0x80 #define GC_USB_GINTSTS_GOUTNAKEFF_SIZE 0x1 #define GC_USB_GINTSTS_GOUTNAKEFF_DEFAULT 0x0 #define GC_USB_GINTSTS_GOUTNAKEFF_OFFSET 0x14 #define GC_USB_GINTSTS_ERLYSUSP_LSB 0xa #define GC_USB_GINTSTS_ERLYSUSP_MASK 0x400 #define GC_USB_GINTSTS_ERLYSUSP_SIZE 0x1 #define GC_USB_GINTSTS_ERLYSUSP_DEFAULT 0x0 #define GC_USB_GINTSTS_ERLYSUSP_OFFSET 0x14 #define GC_USB_GINTSTS_USBSUSP_LSB 0xb #define GC_USB_GINTSTS_USBSUSP_MASK 0x800 #define GC_USB_GINTSTS_USBSUSP_SIZE 0x1 #define GC_USB_GINTSTS_USBSUSP_DEFAULT 0x0 #define GC_USB_GINTSTS_USBSUSP_OFFSET 0x14 #define GC_USB_GINTSTS_USBRST_LSB 0xc #define GC_USB_GINTSTS_USBRST_MASK 0x1000 #define GC_USB_GINTSTS_USBRST_SIZE 0x1 #define GC_USB_GINTSTS_USBRST_DEFAULT 0x0 #define GC_USB_GINTSTS_USBRST_OFFSET 0x14 #define GC_USB_GINTSTS_ENUMDONE_LSB 0xd #define GC_USB_GINTSTS_ENUMDONE_MASK 0x2000 #define GC_USB_GINTSTS_ENUMDONE_SIZE 0x1 #define GC_USB_GINTSTS_ENUMDONE_DEFAULT 0x0 #define GC_USB_GINTSTS_ENUMDONE_OFFSET 0x14 #define GC_USB_GINTSTS_ISOOUTDROP_LSB 0xe #define GC_USB_GINTSTS_ISOOUTDROP_MASK 0x4000 #define GC_USB_GINTSTS_ISOOUTDROP_SIZE 0x1 #define GC_USB_GINTSTS_ISOOUTDROP_DEFAULT 0x0 #define GC_USB_GINTSTS_ISOOUTDROP_OFFSET 0x14 #define GC_USB_GINTSTS_EOPF_LSB 0xf #define GC_USB_GINTSTS_EOPF_MASK 0x8000 #define GC_USB_GINTSTS_EOPF_SIZE 0x1 #define GC_USB_GINTSTS_EOPF_DEFAULT 0x0 #define GC_USB_GINTSTS_EOPF_OFFSET 0x14 #define GC_USB_GINTSTS_EPMIS_LSB 0x11 #define GC_USB_GINTSTS_EPMIS_MASK 0x20000 #define GC_USB_GINTSTS_EPMIS_SIZE 0x1 #define GC_USB_GINTSTS_EPMIS_DEFAULT 0x0 #define GC_USB_GINTSTS_EPMIS_OFFSET 0x14 #define GC_USB_GINTSTS_IEPINT_LSB 0x12 #define GC_USB_GINTSTS_IEPINT_MASK 0x40000 #define GC_USB_GINTSTS_IEPINT_SIZE 0x1 #define GC_USB_GINTSTS_IEPINT_DEFAULT 0x0 #define GC_USB_GINTSTS_IEPINT_OFFSET 0x14 #define GC_USB_GINTSTS_OEPINT_LSB 0x13 #define GC_USB_GINTSTS_OEPINT_MASK 0x80000 #define GC_USB_GINTSTS_OEPINT_SIZE 0x1 #define GC_USB_GINTSTS_OEPINT_DEFAULT 0x0 #define GC_USB_GINTSTS_OEPINT_OFFSET 0x14 #define GC_USB_GINTSTS_INCOMPISOIN_LSB 0x14 #define GC_USB_GINTSTS_INCOMPISOIN_MASK 0x100000 #define GC_USB_GINTSTS_INCOMPISOIN_SIZE 0x1 #define GC_USB_GINTSTS_INCOMPISOIN_DEFAULT 0x0 #define GC_USB_GINTSTS_INCOMPISOIN_OFFSET 0x14 #define GC_USB_GINTSTS_INCOMPLP_LSB 0x15 #define GC_USB_GINTSTS_INCOMPLP_MASK 0x200000 #define GC_USB_GINTSTS_INCOMPLP_SIZE 0x1 #define GC_USB_GINTSTS_INCOMPLP_DEFAULT 0x0 #define GC_USB_GINTSTS_INCOMPLP_OFFSET 0x14 #define GC_USB_GINTSTS_FETSUSP_LSB 0x16 #define GC_USB_GINTSTS_FETSUSP_MASK 0x400000 #define GC_USB_GINTSTS_FETSUSP_SIZE 0x1 #define GC_USB_GINTSTS_FETSUSP_DEFAULT 0x0 #define GC_USB_GINTSTS_FETSUSP_OFFSET 0x14 #define GC_USB_GINTSTS_RESETDET_LSB 0x17 #define GC_USB_GINTSTS_RESETDET_MASK 0x800000 #define GC_USB_GINTSTS_RESETDET_SIZE 0x1 #define GC_USB_GINTSTS_RESETDET_DEFAULT 0x0 #define GC_USB_GINTSTS_RESETDET_OFFSET 0x14 #define GC_USB_GINTSTS_CONIDSTSCHNG_LSB 0x1c #define GC_USB_GINTSTS_CONIDSTSCHNG_MASK 0x10000000 #define GC_USB_GINTSTS_CONIDSTSCHNG_SIZE 0x1 #define GC_USB_GINTSTS_CONIDSTSCHNG_DEFAULT 0x0 #define GC_USB_GINTSTS_CONIDSTSCHNG_OFFSET 0x14 #define GC_USB_GINTSTS_SESSREQINT_LSB 0x1e #define GC_USB_GINTSTS_SESSREQINT_MASK 0x40000000 #define GC_USB_GINTSTS_SESSREQINT_SIZE 0x1 #define GC_USB_GINTSTS_SESSREQINT_DEFAULT 0x0 #define GC_USB_GINTSTS_SESSREQINT_OFFSET 0x14 #define GC_USB_GINTSTS_WKUPINT_LSB 0x1f #define GC_USB_GINTSTS_WKUPINT_MASK 0x80000000 #define GC_USB_GINTSTS_WKUPINT_SIZE 0x1 #define GC_USB_GINTSTS_WKUPINT_DEFAULT 0x0 #define GC_USB_GINTSTS_WKUPINT_OFFSET 0x14 #define GC_USB_GINTMSK_MODEMISMSK_LSB 0x1 #define GC_USB_GINTMSK_MODEMISMSK_MASK 0x2 #define GC_USB_GINTMSK_MODEMISMSK_SIZE 0x1 #define GC_USB_GINTMSK_MODEMISMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_MODEMISMSK_OFFSET 0x18 #define GC_USB_GINTMSK_OTGINTMSK_LSB 0x2 #define GC_USB_GINTMSK_OTGINTMSK_MASK 0x4 #define GC_USB_GINTMSK_OTGINTMSK_SIZE 0x1 #define GC_USB_GINTMSK_OTGINTMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_OTGINTMSK_OFFSET 0x18 #define GC_USB_GINTMSK_SOFMSK_LSB 0x3 #define GC_USB_GINTMSK_SOFMSK_MASK 0x8 #define GC_USB_GINTMSK_SOFMSK_SIZE 0x1 #define GC_USB_GINTMSK_SOFMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_SOFMSK_OFFSET 0x18 #define GC_USB_GINTMSK_RXFLVLMSK_LSB 0x4 #define GC_USB_GINTMSK_RXFLVLMSK_MASK 0x10 #define GC_USB_GINTMSK_RXFLVLMSK_SIZE 0x1 #define GC_USB_GINTMSK_RXFLVLMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_RXFLVLMSK_OFFSET 0x18 #define GC_USB_GINTMSK_UNKNOWN5_LSB 0x5 #define GC_USB_GINTMSK_UNKNOWN5_MASK 0x20 #define GC_USB_GINTMSK_UNKNOWN5_SIZE 0x1 #define GC_USB_GINTMSK_UNKNOWN5_DEFAULT 0x0 #define GC_USB_GINTMSK_UNKNOWN5_OFFSET 0x18 #define GC_USB_GINTMSK_GINNAKEFFMSK_LSB 0x6 #define GC_USB_GINTMSK_GINNAKEFFMSK_MASK 0x40 #define GC_USB_GINTMSK_GINNAKEFFMSK_SIZE 0x1 #define GC_USB_GINTMSK_GINNAKEFFMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_GINNAKEFFMSK_OFFSET 0x18 #define GC_USB_GINTMSK_GOUTNAKEFFMSK_LSB 0x7 #define GC_USB_GINTMSK_GOUTNAKEFFMSK_MASK 0x80 #define GC_USB_GINTMSK_GOUTNAKEFFMSK_SIZE 0x1 #define GC_USB_GINTMSK_GOUTNAKEFFMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_GOUTNAKEFFMSK_OFFSET 0x18 #define GC_USB_GINTMSK_ERLYSUSPMSK_LSB 0xa #define GC_USB_GINTMSK_ERLYSUSPMSK_MASK 0x400 #define GC_USB_GINTMSK_ERLYSUSPMSK_SIZE 0x1 #define GC_USB_GINTMSK_ERLYSUSPMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_ERLYSUSPMSK_OFFSET 0x18 #define GC_USB_GINTMSK_USBSUSPMSK_LSB 0xb #define GC_USB_GINTMSK_USBSUSPMSK_MASK 0x800 #define GC_USB_GINTMSK_USBSUSPMSK_SIZE 0x1 #define GC_USB_GINTMSK_USBSUSPMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_USBSUSPMSK_OFFSET 0x18 #define GC_USB_GINTMSK_USBRSTMSK_LSB 0xc #define GC_USB_GINTMSK_USBRSTMSK_MASK 0x1000 #define GC_USB_GINTMSK_USBRSTMSK_SIZE 0x1 #define GC_USB_GINTMSK_USBRSTMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_USBRSTMSK_OFFSET 0x18 #define GC_USB_GINTMSK_ENUMDONEMSK_LSB 0xd #define GC_USB_GINTMSK_ENUMDONEMSK_MASK 0x2000 #define GC_USB_GINTMSK_ENUMDONEMSK_SIZE 0x1 #define GC_USB_GINTMSK_ENUMDONEMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_ENUMDONEMSK_OFFSET 0x18 #define GC_USB_GINTMSK_ISOOUTDROPMSK_LSB 0xe #define GC_USB_GINTMSK_ISOOUTDROPMSK_MASK 0x4000 #define GC_USB_GINTMSK_ISOOUTDROPMSK_SIZE 0x1 #define GC_USB_GINTMSK_ISOOUTDROPMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_ISOOUTDROPMSK_OFFSET 0x18 #define GC_USB_GINTMSK_EOPFMSK_LSB 0xf #define GC_USB_GINTMSK_EOPFMSK_MASK 0x8000 #define GC_USB_GINTMSK_EOPFMSK_SIZE 0x1 #define GC_USB_GINTMSK_EOPFMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_EOPFMSK_OFFSET 0x18 #define GC_USB_GINTMSK_UNKNOWN16_LSB 0x10 #define GC_USB_GINTMSK_UNKNOWN16_MASK 0x10000 #define GC_USB_GINTMSK_UNKNOWN16_SIZE 0x1 #define GC_USB_GINTMSK_UNKNOWN16_DEFAULT 0x0 #define GC_USB_GINTMSK_UNKNOWN16_OFFSET 0x18 #define GC_USB_GINTMSK_EPMISMSK_LSB 0x11 #define GC_USB_GINTMSK_EPMISMSK_MASK 0x20000 #define GC_USB_GINTMSK_EPMISMSK_SIZE 0x1 #define GC_USB_GINTMSK_EPMISMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_EPMISMSK_OFFSET 0x18 #define GC_USB_GINTMSK_IEPINTMSK_LSB 0x12 #define GC_USB_GINTMSK_IEPINTMSK_MASK 0x40000 #define GC_USB_GINTMSK_IEPINTMSK_SIZE 0x1 #define GC_USB_GINTMSK_IEPINTMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_IEPINTMSK_OFFSET 0x18 #define GC_USB_GINTMSK_OEPINTMSK_LSB 0x13 #define GC_USB_GINTMSK_OEPINTMSK_MASK 0x80000 #define GC_USB_GINTMSK_OEPINTMSK_SIZE 0x1 #define GC_USB_GINTMSK_OEPINTMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_OEPINTMSK_OFFSET 0x18 #define GC_USB_GINTMSK_INCOMPISOINMSK_LSB 0x14 #define GC_USB_GINTMSK_INCOMPISOINMSK_MASK 0x100000 #define GC_USB_GINTMSK_INCOMPISOINMSK_SIZE 0x1 #define GC_USB_GINTMSK_INCOMPISOINMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_INCOMPISOINMSK_OFFSET 0x18 #define GC_USB_GINTMSK_INCOMPLISOOUTMSK_LSB 0x15 #define GC_USB_GINTMSK_INCOMPLISOOUTMSK_MASK 0x200000 #define GC_USB_GINTMSK_INCOMPLISOOUTMSK_SIZE 0x1 #define GC_USB_GINTMSK_INCOMPLISOOUTMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_INCOMPLISOOUTMSK_OFFSET 0x18 #define GC_USB_GINTMSK_FETSUSPMSK_LSB 0x16 #define GC_USB_GINTMSK_FETSUSPMSK_MASK 0x400000 #define GC_USB_GINTMSK_FETSUSPMSK_SIZE 0x1 #define GC_USB_GINTMSK_FETSUSPMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_FETSUSPMSK_OFFSET 0x18 #define GC_USB_GINTMSK_RESETDETMSK_LSB 0x17 #define GC_USB_GINTMSK_RESETDETMSK_MASK 0x800000 #define GC_USB_GINTMSK_RESETDETMSK_SIZE 0x1 #define GC_USB_GINTMSK_RESETDETMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_RESETDETMSK_OFFSET 0x18 #define GC_USB_GINTMSK_CONIDSTSCHNGMSK_LSB 0x1c #define GC_USB_GINTMSK_CONIDSTSCHNGMSK_MASK 0x10000000 #define GC_USB_GINTMSK_CONIDSTSCHNGMSK_SIZE 0x1 #define GC_USB_GINTMSK_CONIDSTSCHNGMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_CONIDSTSCHNGMSK_OFFSET 0x18 #define GC_USB_GINTMSK_DISCONNINTMSK_LSB 0x1d #define GC_USB_GINTMSK_DISCONNINTMSK_MASK 0x20000000 #define GC_USB_GINTMSK_DISCONNINTMSK_SIZE 0x1 #define GC_USB_GINTMSK_DISCONNINTMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_DISCONNINTMSK_OFFSET 0x18 #define GC_USB_GINTMSK_SESSREQINTMSK_LSB 0x1e #define GC_USB_GINTMSK_SESSREQINTMSK_MASK 0x40000000 #define GC_USB_GINTMSK_SESSREQINTMSK_SIZE 0x1 #define GC_USB_GINTMSK_SESSREQINTMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_SESSREQINTMSK_OFFSET 0x18 #define GC_USB_GINTMSK_WKUPINTMSK_LSB 0x1f #define GC_USB_GINTMSK_WKUPINTMSK_MASK 0x80000000 #define GC_USB_GINTMSK_WKUPINTMSK_SIZE 0x1 #define GC_USB_GINTMSK_WKUPINTMSK_DEFAULT 0x0 #define GC_USB_GINTMSK_WKUPINTMSK_OFFSET 0x18 #define GC_USB_GRXSTSR_CHNUM_LSB 0x0 #define GC_USB_GRXSTSR_CHNUM_MASK 0xf #define GC_USB_GRXSTSR_CHNUM_SIZE 0x4 #define GC_USB_GRXSTSR_CHNUM_DEFAULT 0x0 #define GC_USB_GRXSTSR_CHNUM_OFFSET 0x1c #define GC_USB_GRXSTSR_BCNT_LSB 0x4 #define GC_USB_GRXSTSR_BCNT_MASK 0x7ff0 #define GC_USB_GRXSTSR_BCNT_SIZE 0xb #define GC_USB_GRXSTSR_BCNT_DEFAULT 0x0 #define GC_USB_GRXSTSR_BCNT_OFFSET 0x1c #define GC_USB_GRXSTSR_DPID_LSB 0xf #define GC_USB_GRXSTSR_DPID_MASK 0x18000 #define GC_USB_GRXSTSR_DPID_SIZE 0x2 #define GC_USB_GRXSTSR_DPID_DEFAULT 0x0 #define GC_USB_GRXSTSR_DPID_OFFSET 0x1c #define GC_USB_GRXSTSR_PKTSTS_LSB 0x11 #define GC_USB_GRXSTSR_PKTSTS_MASK 0x1e0000 #define GC_USB_GRXSTSR_PKTSTS_SIZE 0x4 #define GC_USB_GRXSTSR_PKTSTS_DEFAULT 0x0 #define GC_USB_GRXSTSR_PKTSTS_OFFSET 0x1c #define GC_USB_GRXSTSR_FN_LSB 0x15 #define GC_USB_GRXSTSR_FN_MASK 0x1e00000 #define GC_USB_GRXSTSR_FN_SIZE 0x4 #define GC_USB_GRXSTSR_FN_DEFAULT 0x0 #define GC_USB_GRXSTSR_FN_OFFSET 0x1c #define GC_USB_GRXSTSP_CHNUM_LSB 0x0 #define GC_USB_GRXSTSP_CHNUM_MASK 0xf #define GC_USB_GRXSTSP_CHNUM_SIZE 0x4 #define GC_USB_GRXSTSP_CHNUM_DEFAULT 0x0 #define GC_USB_GRXSTSP_CHNUM_OFFSET 0x20 #define GC_USB_GRXSTSP_BCNT_LSB 0x4 #define GC_USB_GRXSTSP_BCNT_MASK 0x7ff0 #define GC_USB_GRXSTSP_BCNT_SIZE 0xb #define GC_USB_GRXSTSP_BCNT_DEFAULT 0x0 #define GC_USB_GRXSTSP_BCNT_OFFSET 0x20 #define GC_USB_GRXSTSP_DPID_LSB 0xf #define GC_USB_GRXSTSP_DPID_MASK 0x18000 #define GC_USB_GRXSTSP_DPID_SIZE 0x2 #define GC_USB_GRXSTSP_DPID_DEFAULT 0x0 #define GC_USB_GRXSTSP_DPID_OFFSET 0x20 #define GC_USB_GRXSTSP_PKTSTS_LSB 0x11 #define GC_USB_GRXSTSP_PKTSTS_MASK 0x1e0000 #define GC_USB_GRXSTSP_PKTSTS_SIZE 0x4 #define GC_USB_GRXSTSP_PKTSTS_DEFAULT 0x0 #define GC_USB_GRXSTSP_PKTSTS_OFFSET 0x20 #define GC_USB_GRXSTSP_FN_LSB 0x15 #define GC_USB_GRXSTSP_FN_MASK 0x1e00000 #define GC_USB_GRXSTSP_FN_SIZE 0x4 #define GC_USB_GRXSTSP_FN_DEFAULT 0x0 #define GC_USB_GRXSTSP_FN_OFFSET 0x20 #define GC_USB_GRXFSIZ_RXFDEP_LSB 0x0 #define GC_USB_GRXFSIZ_RXFDEP_MASK 0x7ff #define GC_USB_GRXFSIZ_RXFDEP_SIZE 0xb #define GC_USB_GRXFSIZ_RXFDEP_DEFAULT 0x0 #define GC_USB_GRXFSIZ_RXFDEP_OFFSET 0x24 #define GC_USB_GNPTXFSIZ_INEPTXF0STADDR_LSB 0x0 #define GC_USB_GNPTXFSIZ_INEPTXF0STADDR_MASK 0xffff #define GC_USB_GNPTXFSIZ_INEPTXF0STADDR_SIZE 0x10 #define GC_USB_GNPTXFSIZ_INEPTXF0STADDR_DEFAULT 0x0 #define GC_USB_GNPTXFSIZ_INEPTXF0STADDR_OFFSET 0x28 #define GC_USB_GNPTXFSIZ_INEPTXF0DEP_LSB 0x10 #define GC_USB_GNPTXFSIZ_INEPTXF0DEP_MASK 0xffff0000 #define GC_USB_GNPTXFSIZ_INEPTXF0DEP_SIZE 0x10 #define GC_USB_GNPTXFSIZ_INEPTXF0DEP_DEFAULT 0x0 #define GC_USB_GNPTXFSIZ_INEPTXF0DEP_OFFSET 0x28 #define GC_USB_GGPIO_GPI_LSB 0x0 #define GC_USB_GGPIO_GPI_MASK 0xffff #define GC_USB_GGPIO_GPI_SIZE 0x10 #define GC_USB_GGPIO_GPI_DEFAULT 0x0 #define GC_USB_GGPIO_GPI_OFFSET 0x38 #define GC_USB_GGPIO_GPO_LSB 0x10 #define GC_USB_GGPIO_GPO_MASK 0xffff0000 #define GC_USB_GGPIO_GPO_SIZE 0x10 #define GC_USB_GGPIO_GPO_DEFAULT 0x0 #define GC_USB_GGPIO_GPO_OFFSET 0x38 #define GC_USB_GUID_GUID_LSB 0x0 #define GC_USB_GUID_GUID_MASK 0xffffffff #define GC_USB_GUID_GUID_SIZE 0x20 #define GC_USB_GUID_GUID_DEFAULT 0x0 #define GC_USB_GUID_GUID_OFFSET 0x3c #define GC_USB_GSNPSID_SYNOPSYSID_LSB 0x0 #define GC_USB_GSNPSID_SYNOPSYSID_MASK 0xffffffff #define GC_USB_GSNPSID_SYNOPSYSID_SIZE 0x20 #define GC_USB_GSNPSID_SYNOPSYSID_DEFAULT 0x0 #define GC_USB_GSNPSID_SYNOPSYSID_OFFSET 0x40 #define GC_USB_GHWCFG1_EPDIR_LSB 0x0 #define GC_USB_GHWCFG1_EPDIR_MASK 0xffffffff #define GC_USB_GHWCFG1_EPDIR_SIZE 0x20 #define GC_USB_GHWCFG1_EPDIR_DEFAULT 0x0 #define GC_USB_GHWCFG1_EPDIR_OFFSET 0x44 #define GC_USB_GHWCFG2_OTGMODE_LSB 0x0 #define GC_USB_GHWCFG2_OTGMODE_MASK 0x7 #define GC_USB_GHWCFG2_OTGMODE_SIZE 0x3 #define GC_USB_GHWCFG2_OTGMODE_DEFAULT 0x0 #define GC_USB_GHWCFG2_OTGMODE_OFFSET 0x48 #define GC_USB_GHWCFG2_OTGARCH_LSB 0x3 #define GC_USB_GHWCFG2_OTGARCH_MASK 0x18 #define GC_USB_GHWCFG2_OTGARCH_SIZE 0x2 #define GC_USB_GHWCFG2_OTGARCH_DEFAULT 0x0 #define GC_USB_GHWCFG2_OTGARCH_OFFSET 0x48 #define GC_USB_GHWCFG2_SINGPNT_LSB 0x5 #define GC_USB_GHWCFG2_SINGPNT_MASK 0x20 #define GC_USB_GHWCFG2_SINGPNT_SIZE 0x1 #define GC_USB_GHWCFG2_SINGPNT_DEFAULT 0x0 #define GC_USB_GHWCFG2_SINGPNT_OFFSET 0x48 #define GC_USB_GHWCFG2_HSPHYTYPE_LSB 0x6 #define GC_USB_GHWCFG2_HSPHYTYPE_MASK 0xc0 #define GC_USB_GHWCFG2_HSPHYTYPE_SIZE 0x2 #define GC_USB_GHWCFG2_HSPHYTYPE_DEFAULT 0x0 #define GC_USB_GHWCFG2_HSPHYTYPE_OFFSET 0x48 #define GC_USB_GHWCFG2_FSPHYTYPE_LSB 0x8 #define GC_USB_GHWCFG2_FSPHYTYPE_MASK 0x300 #define GC_USB_GHWCFG2_FSPHYTYPE_SIZE 0x2 #define GC_USB_GHWCFG2_FSPHYTYPE_DEFAULT 0x0 #define GC_USB_GHWCFG2_FSPHYTYPE_OFFSET 0x48 #define GC_USB_GHWCFG2_NUMDEVEPS_LSB 0xa #define GC_USB_GHWCFG2_NUMDEVEPS_MASK 0x3c00 #define GC_USB_GHWCFG2_NUMDEVEPS_SIZE 0x4 #define GC_USB_GHWCFG2_NUMDEVEPS_DEFAULT 0x0 #define GC_USB_GHWCFG2_NUMDEVEPS_OFFSET 0x48 #define GC_USB_GHWCFG2_NUMHSTCHNL_LSB 0xe #define GC_USB_GHWCFG2_NUMHSTCHNL_MASK 0x3c000 #define GC_USB_GHWCFG2_NUMHSTCHNL_SIZE 0x4 #define GC_USB_GHWCFG2_NUMHSTCHNL_DEFAULT 0x0 #define GC_USB_GHWCFG2_NUMHSTCHNL_OFFSET 0x48 #define GC_USB_GHWCFG2_PERIOSUPPORT_LSB 0x12 #define GC_USB_GHWCFG2_PERIOSUPPORT_MASK 0x40000 #define GC_USB_GHWCFG2_PERIOSUPPORT_SIZE 0x1 #define GC_USB_GHWCFG2_PERIOSUPPORT_DEFAULT 0x0 #define GC_USB_GHWCFG2_PERIOSUPPORT_OFFSET 0x48 #define GC_USB_GHWCFG2_DYNFIFOSIZING_LSB 0x13 #define GC_USB_GHWCFG2_DYNFIFOSIZING_MASK 0x80000 #define GC_USB_GHWCFG2_DYNFIFOSIZING_SIZE 0x1 #define GC_USB_GHWCFG2_DYNFIFOSIZING_DEFAULT 0x0 #define GC_USB_GHWCFG2_DYNFIFOSIZING_OFFSET 0x48 #define GC_USB_GHWCFG2_MULTIPROCINTRPT_LSB 0x14 #define GC_USB_GHWCFG2_MULTIPROCINTRPT_MASK 0x100000 #define GC_USB_GHWCFG2_MULTIPROCINTRPT_SIZE 0x1 #define GC_USB_GHWCFG2_MULTIPROCINTRPT_DEFAULT 0x0 #define GC_USB_GHWCFG2_MULTIPROCINTRPT_OFFSET 0x48 #define GC_USB_GHWCFG2_NPTXQDEPTH_LSB 0x16 #define GC_USB_GHWCFG2_NPTXQDEPTH_MASK 0xc00000 #define GC_USB_GHWCFG2_NPTXQDEPTH_SIZE 0x2 #define GC_USB_GHWCFG2_NPTXQDEPTH_DEFAULT 0x0 #define GC_USB_GHWCFG2_NPTXQDEPTH_OFFSET 0x48 #define GC_USB_GHWCFG2_PTXQDEPTH_LSB 0x18 #define GC_USB_GHWCFG2_PTXQDEPTH_MASK 0x3000000 #define GC_USB_GHWCFG2_PTXQDEPTH_SIZE 0x2 #define GC_USB_GHWCFG2_PTXQDEPTH_DEFAULT 0x0 #define GC_USB_GHWCFG2_PTXQDEPTH_OFFSET 0x48 #define GC_USB_GHWCFG2_TKNQDEPTH_LSB 0x1a #define GC_USB_GHWCFG2_TKNQDEPTH_MASK 0x7c000000 #define GC_USB_GHWCFG2_TKNQDEPTH_SIZE 0x5 #define GC_USB_GHWCFG2_TKNQDEPTH_DEFAULT 0x0 #define GC_USB_GHWCFG2_TKNQDEPTH_OFFSET 0x48 #define GC_USB_GHWCFG3_XFERSIZEWIDTH_LSB 0x0 #define GC_USB_GHWCFG3_XFERSIZEWIDTH_MASK 0xf #define GC_USB_GHWCFG3_XFERSIZEWIDTH_SIZE 0x4 #define GC_USB_GHWCFG3_XFERSIZEWIDTH_DEFAULT 0x0 #define GC_USB_GHWCFG3_XFERSIZEWIDTH_OFFSET 0x4c #define GC_USB_GHWCFG3_PKTSIZEWIDTH_LSB 0x4 #define GC_USB_GHWCFG3_PKTSIZEWIDTH_MASK 0x70 #define GC_USB_GHWCFG3_PKTSIZEWIDTH_SIZE 0x3 #define GC_USB_GHWCFG3_PKTSIZEWIDTH_DEFAULT 0x0 #define GC_USB_GHWCFG3_PKTSIZEWIDTH_OFFSET 0x4c #define GC_USB_GHWCFG3_OTGEN_LSB 0x7 #define GC_USB_GHWCFG3_OTGEN_MASK 0x80 #define GC_USB_GHWCFG3_OTGEN_SIZE 0x1 #define GC_USB_GHWCFG3_OTGEN_DEFAULT 0x0 #define GC_USB_GHWCFG3_OTGEN_OFFSET 0x4c #define GC_USB_GHWCFG3_I2CINTSEL_LSB 0x8 #define GC_USB_GHWCFG3_I2CINTSEL_MASK 0x100 #define GC_USB_GHWCFG3_I2CINTSEL_SIZE 0x1 #define GC_USB_GHWCFG3_I2CINTSEL_DEFAULT 0x0 #define GC_USB_GHWCFG3_I2CINTSEL_OFFSET 0x4c #define GC_USB_GHWCFG3_VNDCTLSUPT_LSB 0x9 #define GC_USB_GHWCFG3_VNDCTLSUPT_MASK 0x200 #define GC_USB_GHWCFG3_VNDCTLSUPT_SIZE 0x1 #define GC_USB_GHWCFG3_VNDCTLSUPT_DEFAULT 0x0 #define GC_USB_GHWCFG3_VNDCTLSUPT_OFFSET 0x4c #define GC_USB_GHWCFG3_OPTFEATURE_LSB 0xa #define GC_USB_GHWCFG3_OPTFEATURE_MASK 0x400 #define GC_USB_GHWCFG3_OPTFEATURE_SIZE 0x1 #define GC_USB_GHWCFG3_OPTFEATURE_DEFAULT 0x0 #define GC_USB_GHWCFG3_OPTFEATURE_OFFSET 0x4c #define GC_USB_GHWCFG3_RSTTYPE_LSB 0xb #define GC_USB_GHWCFG3_RSTTYPE_MASK 0x800 #define GC_USB_GHWCFG3_RSTTYPE_SIZE 0x1 #define GC_USB_GHWCFG3_RSTTYPE_DEFAULT 0x0 #define GC_USB_GHWCFG3_RSTTYPE_OFFSET 0x4c #define GC_USB_GHWCFG3_ADPSUPPORT_LSB 0xc #define GC_USB_GHWCFG3_ADPSUPPORT_MASK 0x1000 #define GC_USB_GHWCFG3_ADPSUPPORT_SIZE 0x1 #define GC_USB_GHWCFG3_ADPSUPPORT_DEFAULT 0x0 #define GC_USB_GHWCFG3_ADPSUPPORT_OFFSET 0x4c #define GC_USB_GHWCFG3_HSICMODE_LSB 0xd #define GC_USB_GHWCFG3_HSICMODE_MASK 0x2000 #define GC_USB_GHWCFG3_HSICMODE_SIZE 0x1 #define GC_USB_GHWCFG3_HSICMODE_DEFAULT 0x0 #define GC_USB_GHWCFG3_HSICMODE_OFFSET 0x4c #define GC_USB_GHWCFG3_BCSUPPORT_LSB 0xe #define GC_USB_GHWCFG3_BCSUPPORT_MASK 0x4000 #define GC_USB_GHWCFG3_BCSUPPORT_SIZE 0x1 #define GC_USB_GHWCFG3_BCSUPPORT_DEFAULT 0x0 #define GC_USB_GHWCFG3_BCSUPPORT_OFFSET 0x4c #define GC_USB_GHWCFG3_LPMMODE_LSB 0xf #define GC_USB_GHWCFG3_LPMMODE_MASK 0x8000 #define GC_USB_GHWCFG3_LPMMODE_SIZE 0x1 #define GC_USB_GHWCFG3_LPMMODE_DEFAULT 0x0 #define GC_USB_GHWCFG3_LPMMODE_OFFSET 0x4c #define GC_USB_GHWCFG3_DFIFODEPTH_LSB 0x10 #define GC_USB_GHWCFG3_DFIFODEPTH_MASK 0xffff0000 #define GC_USB_GHWCFG3_DFIFODEPTH_SIZE 0x10 #define GC_USB_GHWCFG3_DFIFODEPTH_DEFAULT 0x0 #define GC_USB_GHWCFG3_DFIFODEPTH_OFFSET 0x4c #define GC_USB_GHWCFG4_NUMDEVPERIOEPS_LSB 0x0 #define GC_USB_GHWCFG4_NUMDEVPERIOEPS_MASK 0xf #define GC_USB_GHWCFG4_NUMDEVPERIOEPS_SIZE 0x4 #define GC_USB_GHWCFG4_NUMDEVPERIOEPS_DEFAULT 0x0 #define GC_USB_GHWCFG4_NUMDEVPERIOEPS_OFFSET 0x50 #define GC_USB_GHWCFG4_PARTIALPWRDN_LSB 0x4 #define GC_USB_GHWCFG4_PARTIALPWRDN_MASK 0x10 #define GC_USB_GHWCFG4_PARTIALPWRDN_SIZE 0x1 #define GC_USB_GHWCFG4_PARTIALPWRDN_DEFAULT 0x0 #define GC_USB_GHWCFG4_PARTIALPWRDN_OFFSET 0x50 #define GC_USB_GHWCFG4_AHBFREQ_LSB 0x5 #define GC_USB_GHWCFG4_AHBFREQ_MASK 0x20 #define GC_USB_GHWCFG4_AHBFREQ_SIZE 0x1 #define GC_USB_GHWCFG4_AHBFREQ_DEFAULT 0x0 #define GC_USB_GHWCFG4_AHBFREQ_OFFSET 0x50 #define GC_USB_GHWCFG4_HIBERNATION_LSB 0x6 #define GC_USB_GHWCFG4_HIBERNATION_MASK 0x40 #define GC_USB_GHWCFG4_HIBERNATION_SIZE 0x1 #define GC_USB_GHWCFG4_HIBERNATION_DEFAULT 0x0 #define GC_USB_GHWCFG4_HIBERNATION_OFFSET 0x50 #define GC_USB_GHWCFG4_EXTENDEDHIBERNATION_LSB 0x7 #define GC_USB_GHWCFG4_EXTENDEDHIBERNATION_MASK 0x80 #define GC_USB_GHWCFG4_EXTENDEDHIBERNATION_SIZE 0x1 #define GC_USB_GHWCFG4_EXTENDEDHIBERNATION_DEFAULT 0x0 #define GC_USB_GHWCFG4_EXTENDEDHIBERNATION_OFFSET 0x50 #define GC_USB_GHWCFG4_PHYDATAWIDTH_LSB 0xe #define GC_USB_GHWCFG4_PHYDATAWIDTH_MASK 0xc000 #define GC_USB_GHWCFG4_PHYDATAWIDTH_SIZE 0x2 #define GC_USB_GHWCFG4_PHYDATAWIDTH_DEFAULT 0x0 #define GC_USB_GHWCFG4_PHYDATAWIDTH_OFFSET 0x50 #define GC_USB_GHWCFG4_NUMCTLEPS_LSB 0x10 #define GC_USB_GHWCFG4_NUMCTLEPS_MASK 0xf0000 #define GC_USB_GHWCFG4_NUMCTLEPS_SIZE 0x4 #define GC_USB_GHWCFG4_NUMCTLEPS_DEFAULT 0x0 #define GC_USB_GHWCFG4_NUMCTLEPS_OFFSET 0x50 #define GC_USB_GHWCFG4_IDDGFLTR_LSB 0x14 #define GC_USB_GHWCFG4_IDDGFLTR_MASK 0x100000 #define GC_USB_GHWCFG4_IDDGFLTR_SIZE 0x1 #define GC_USB_GHWCFG4_IDDGFLTR_DEFAULT 0x0 #define GC_USB_GHWCFG4_IDDGFLTR_OFFSET 0x50 #define GC_USB_GHWCFG4_VBUSVALIDFLTR_LSB 0x15 #define GC_USB_GHWCFG4_VBUSVALIDFLTR_MASK 0x200000 #define GC_USB_GHWCFG4_VBUSVALIDFLTR_SIZE 0x1 #define GC_USB_GHWCFG4_VBUSVALIDFLTR_DEFAULT 0x0 #define GC_USB_GHWCFG4_VBUSVALIDFLTR_OFFSET 0x50 #define GC_USB_GHWCFG4_AVALIDFLTR_LSB 0x16 #define GC_USB_GHWCFG4_AVALIDFLTR_MASK 0x400000 #define GC_USB_GHWCFG4_AVALIDFLTR_SIZE 0x1 #define GC_USB_GHWCFG4_AVALIDFLTR_DEFAULT 0x0 #define GC_USB_GHWCFG4_AVALIDFLTR_OFFSET 0x50 #define GC_USB_GHWCFG4_BVALIDFLTR_LSB 0x17 #define GC_USB_GHWCFG4_BVALIDFLTR_MASK 0x800000 #define GC_USB_GHWCFG4_BVALIDFLTR_SIZE 0x1 #define GC_USB_GHWCFG4_BVALIDFLTR_DEFAULT 0x0 #define GC_USB_GHWCFG4_BVALIDFLTR_OFFSET 0x50 #define GC_USB_GHWCFG4_SESSENDFLTR_LSB 0x18 #define GC_USB_GHWCFG4_SESSENDFLTR_MASK 0x1000000 #define GC_USB_GHWCFG4_SESSENDFLTR_SIZE 0x1 #define GC_USB_GHWCFG4_SESSENDFLTR_DEFAULT 0x0 #define GC_USB_GHWCFG4_SESSENDFLTR_OFFSET 0x50 #define GC_USB_GHWCFG4_DEDFIFOMODE_LSB 0x19 #define GC_USB_GHWCFG4_DEDFIFOMODE_MASK 0x2000000 #define GC_USB_GHWCFG4_DEDFIFOMODE_SIZE 0x1 #define GC_USB_GHWCFG4_DEDFIFOMODE_DEFAULT 0x0 #define GC_USB_GHWCFG4_DEDFIFOMODE_OFFSET 0x50 #define GC_USB_GHWCFG4_INEPS_LSB 0x1a #define GC_USB_GHWCFG4_INEPS_MASK 0x3c000000 #define GC_USB_GHWCFG4_INEPS_SIZE 0x4 #define GC_USB_GHWCFG4_INEPS_DEFAULT 0x0 #define GC_USB_GHWCFG4_INEPS_OFFSET 0x50 #define GC_USB_GHWCFG4_DESCDMAENABLED_LSB 0x1e #define GC_USB_GHWCFG4_DESCDMAENABLED_MASK 0x40000000 #define GC_USB_GHWCFG4_DESCDMAENABLED_SIZE 0x1 #define GC_USB_GHWCFG4_DESCDMAENABLED_DEFAULT 0x0 #define GC_USB_GHWCFG4_DESCDMAENABLED_OFFSET 0x50 #define GC_USB_GHWCFG4_DESCDMA_LSB 0x1f #define GC_USB_GHWCFG4_DESCDMA_MASK 0x80000000 #define GC_USB_GHWCFG4_DESCDMA_SIZE 0x1 #define GC_USB_GHWCFG4_DESCDMA_DEFAULT 0x0 #define GC_USB_GHWCFG4_DESCDMA_OFFSET 0x50 #define GC_USB_GDFIFOCFG_GDFIFOCFG_LSB 0x0 #define GC_USB_GDFIFOCFG_GDFIFOCFG_MASK 0xffff #define GC_USB_GDFIFOCFG_GDFIFOCFG_SIZE 0x10 #define GC_USB_GDFIFOCFG_GDFIFOCFG_DEFAULT 0x0 #define GC_USB_GDFIFOCFG_GDFIFOCFG_OFFSET 0x5c #define GC_USB_GDFIFOCFG_EPINFOBASEADDR_LSB 0x10 #define GC_USB_GDFIFOCFG_EPINFOBASEADDR_MASK 0xffff0000 #define GC_USB_GDFIFOCFG_EPINFOBASEADDR_SIZE 0x10 #define GC_USB_GDFIFOCFG_EPINFOBASEADDR_DEFAULT 0x0 #define GC_USB_GDFIFOCFG_EPINFOBASEADDR_OFFSET 0x5c #define GC_USB_DIEPTXF1_INEPNTXFSTADDR_LSB 0x0 #define GC_USB_DIEPTXF1_INEPNTXFSTADDR_MASK 0x7ff #define GC_USB_DIEPTXF1_INEPNTXFSTADDR_SIZE 0xb #define GC_USB_DIEPTXF1_INEPNTXFSTADDR_DEFAULT 0x0 #define GC_USB_DIEPTXF1_INEPNTXFSTADDR_OFFSET 0x104 #define GC_USB_DIEPTXF1_RESERVED11_LSB 0xc #define GC_USB_DIEPTXF1_RESERVED11_MASK 0x1000 #define GC_USB_DIEPTXF1_RESERVED11_SIZE 0x1 #define GC_USB_DIEPTXF1_RESERVED11_DEFAULT 0x1 #define GC_USB_DIEPTXF1_RESERVED11_OFFSET 0x104 #define GC_USB_DIEPTXF1_INEPNTXFDEP_LSB 0x10 #define GC_USB_DIEPTXF1_INEPNTXFDEP_MASK 0x3f0000 #define GC_USB_DIEPTXF1_INEPNTXFDEP_SIZE 0x6 #define GC_USB_DIEPTXF1_INEPNTXFDEP_DEFAULT 0x0 #define GC_USB_DIEPTXF1_INEPNTXFDEP_OFFSET 0x104 #define GC_USB_DIEPTXF2_INEPNTXFSTADDR_LSB 0x0 #define GC_USB_DIEPTXF2_INEPNTXFSTADDR_MASK 0x7ff #define GC_USB_DIEPTXF2_INEPNTXFSTADDR_SIZE 0xb #define GC_USB_DIEPTXF2_INEPNTXFSTADDR_DEFAULT 0x0 #define GC_USB_DIEPTXF2_INEPNTXFSTADDR_OFFSET 0x108 #define GC_USB_DIEPTXF2_INEPNTXFDEP_LSB 0x10 #define GC_USB_DIEPTXF2_INEPNTXFDEP_MASK 0x3f0000 #define GC_USB_DIEPTXF2_INEPNTXFDEP_SIZE 0x6 #define GC_USB_DIEPTXF2_INEPNTXFDEP_DEFAULT 0x0 #define GC_USB_DIEPTXF2_INEPNTXFDEP_OFFSET 0x108 #define GC_USB_DIEPTXF3_INEPNTXFSTADDR_LSB 0x0 #define GC_USB_DIEPTXF3_INEPNTXFSTADDR_MASK 0x7ff #define GC_USB_DIEPTXF3_INEPNTXFSTADDR_SIZE 0xb #define GC_USB_DIEPTXF3_INEPNTXFSTADDR_DEFAULT 0x0 #define GC_USB_DIEPTXF3_INEPNTXFSTADDR_OFFSET 0x10c #define GC_USB_DIEPTXF3_INEPNTXFDEP_LSB 0x10 #define GC_USB_DIEPTXF3_INEPNTXFDEP_MASK 0x3f0000 #define GC_USB_DIEPTXF3_INEPNTXFDEP_SIZE 0x6 #define GC_USB_DIEPTXF3_INEPNTXFDEP_DEFAULT 0x0 #define GC_USB_DIEPTXF3_INEPNTXFDEP_OFFSET 0x10c #define GC_USB_DIEPTXF4_INEPNTXFSTADDR_LSB 0x0 #define GC_USB_DIEPTXF4_INEPNTXFSTADDR_MASK 0x7ff #define GC_USB_DIEPTXF4_INEPNTXFSTADDR_SIZE 0xb #define GC_USB_DIEPTXF4_INEPNTXFSTADDR_DEFAULT 0x0 #define GC_USB_DIEPTXF4_INEPNTXFSTADDR_OFFSET 0x110 #define GC_USB_DIEPTXF4_INEPNTXFDEP_LSB 0x10 #define GC_USB_DIEPTXF4_INEPNTXFDEP_MASK 0x3f0000 #define GC_USB_DIEPTXF4_INEPNTXFDEP_SIZE 0x6 #define GC_USB_DIEPTXF4_INEPNTXFDEP_DEFAULT 0x0 #define GC_USB_DIEPTXF4_INEPNTXFDEP_OFFSET 0x110 #define GC_USB_DIEPTXF5_INEPNTXFSTADDR_LSB 0x0 #define GC_USB_DIEPTXF5_INEPNTXFSTADDR_MASK 0x7ff #define GC_USB_DIEPTXF5_INEPNTXFSTADDR_SIZE 0xb #define GC_USB_DIEPTXF5_INEPNTXFSTADDR_DEFAULT 0x0 #define GC_USB_DIEPTXF5_INEPNTXFSTADDR_OFFSET 0x114 #define GC_USB_DIEPTXF5_INEPNTXFDEP_LSB 0x10 #define GC_USB_DIEPTXF5_INEPNTXFDEP_MASK 0x3f0000 #define GC_USB_DIEPTXF5_INEPNTXFDEP_SIZE 0x6 #define GC_USB_DIEPTXF5_INEPNTXFDEP_DEFAULT 0x0 #define GC_USB_DIEPTXF5_INEPNTXFDEP_OFFSET 0x114 #define GC_USB_DIEPTXF6_INEPNTXFSTADDR_LSB 0x0 #define GC_USB_DIEPTXF6_INEPNTXFSTADDR_MASK 0x7ff #define GC_USB_DIEPTXF6_INEPNTXFSTADDR_SIZE 0xb #define GC_USB_DIEPTXF6_INEPNTXFSTADDR_DEFAULT 0x0 #define GC_USB_DIEPTXF6_INEPNTXFSTADDR_OFFSET 0x118 #define GC_USB_DIEPTXF6_INEPNTXFDEP_LSB 0x10 #define GC_USB_DIEPTXF6_INEPNTXFDEP_MASK 0x3f0000 #define GC_USB_DIEPTXF6_INEPNTXFDEP_SIZE 0x6 #define GC_USB_DIEPTXF6_INEPNTXFDEP_DEFAULT 0x0 #define GC_USB_DIEPTXF6_INEPNTXFDEP_OFFSET 0x118 #define GC_USB_DIEPTXF7_INEPNTXFSTADDR_LSB 0x0 #define GC_USB_DIEPTXF7_INEPNTXFSTADDR_MASK 0x7ff #define GC_USB_DIEPTXF7_INEPNTXFSTADDR_SIZE 0xb #define GC_USB_DIEPTXF7_INEPNTXFSTADDR_DEFAULT 0x0 #define GC_USB_DIEPTXF7_INEPNTXFSTADDR_OFFSET 0x11c #define GC_USB_DIEPTXF7_INEPNTXFDEP_LSB 0x10 #define GC_USB_DIEPTXF7_INEPNTXFDEP_MASK 0x3f0000 #define GC_USB_DIEPTXF7_INEPNTXFDEP_SIZE 0x6 #define GC_USB_DIEPTXF7_INEPNTXFDEP_DEFAULT 0x0 #define GC_USB_DIEPTXF7_INEPNTXFDEP_OFFSET 0x11c #define GC_USB_DIEPTXF8_INEPNTXFSTADDR_LSB 0x0 #define GC_USB_DIEPTXF8_INEPNTXFSTADDR_MASK 0x7ff #define GC_USB_DIEPTXF8_INEPNTXFSTADDR_SIZE 0xb #define GC_USB_DIEPTXF8_INEPNTXFSTADDR_DEFAULT 0x0 #define GC_USB_DIEPTXF8_INEPNTXFSTADDR_OFFSET 0x120 #define GC_USB_DIEPTXF8_INEPNTXFDEP_LSB 0x10 #define GC_USB_DIEPTXF8_INEPNTXFDEP_MASK 0x3f0000 #define GC_USB_DIEPTXF8_INEPNTXFDEP_SIZE 0x6 #define GC_USB_DIEPTXF8_INEPNTXFDEP_DEFAULT 0x0 #define GC_USB_DIEPTXF8_INEPNTXFDEP_OFFSET 0x120 #define GC_USB_DIEPTXF9_INEPNTXFSTADDR_LSB 0x0 #define GC_USB_DIEPTXF9_INEPNTXFSTADDR_MASK 0x7ff #define GC_USB_DIEPTXF9_INEPNTXFSTADDR_SIZE 0xb #define GC_USB_DIEPTXF9_INEPNTXFSTADDR_DEFAULT 0x0 #define GC_USB_DIEPTXF9_INEPNTXFSTADDR_OFFSET 0x124 #define GC_USB_DIEPTXF9_INEPNTXFDEP_LSB 0x10 #define GC_USB_DIEPTXF9_INEPNTXFDEP_MASK 0x3f0000 #define GC_USB_DIEPTXF9_INEPNTXFDEP_SIZE 0x6 #define GC_USB_DIEPTXF9_INEPNTXFDEP_DEFAULT 0x0 #define GC_USB_DIEPTXF9_INEPNTXFDEP_OFFSET 0x124 #define GC_USB_DIEPTXF10_INEPNTXFSTADDR_LSB 0x0 #define GC_USB_DIEPTXF10_INEPNTXFSTADDR_MASK 0x7ff #define GC_USB_DIEPTXF10_INEPNTXFSTADDR_SIZE 0xb #define GC_USB_DIEPTXF10_INEPNTXFSTADDR_DEFAULT 0x0 #define GC_USB_DIEPTXF10_INEPNTXFSTADDR_OFFSET 0x128 #define GC_USB_DIEPTXF10_INEPNTXFDEP_LSB 0x10 #define GC_USB_DIEPTXF10_INEPNTXFDEP_MASK 0x3f0000 #define GC_USB_DIEPTXF10_INEPNTXFDEP_SIZE 0x6 #define GC_USB_DIEPTXF10_INEPNTXFDEP_DEFAULT 0x0 #define GC_USB_DIEPTXF10_INEPNTXFDEP_OFFSET 0x128 #define GC_USB_DIEPTXF11_INEPNTXFSTADDR_LSB 0x0 #define GC_USB_DIEPTXF11_INEPNTXFSTADDR_MASK 0x7ff #define GC_USB_DIEPTXF11_INEPNTXFSTADDR_SIZE 0xb #define GC_USB_DIEPTXF11_INEPNTXFSTADDR_DEFAULT 0x0 #define GC_USB_DIEPTXF11_INEPNTXFSTADDR_OFFSET 0x12c #define GC_USB_DIEPTXF11_INEPNTXFDEP_LSB 0x10 #define GC_USB_DIEPTXF11_INEPNTXFDEP_MASK 0x3f0000 #define GC_USB_DIEPTXF11_INEPNTXFDEP_SIZE 0x6 #define GC_USB_DIEPTXF11_INEPNTXFDEP_DEFAULT 0x0 #define GC_USB_DIEPTXF11_INEPNTXFDEP_OFFSET 0x12c #define GC_USB_DIEPTXF12_INEPNTXFSTADDR_LSB 0x0 #define GC_USB_DIEPTXF12_INEPNTXFSTADDR_MASK 0x7ff #define GC_USB_DIEPTXF12_INEPNTXFSTADDR_SIZE 0xb #define GC_USB_DIEPTXF12_INEPNTXFSTADDR_DEFAULT 0x0 #define GC_USB_DIEPTXF12_INEPNTXFSTADDR_OFFSET 0x130 #define GC_USB_DIEPTXF12_INEPNTXFDEP_LSB 0x10 #define GC_USB_DIEPTXF12_INEPNTXFDEP_MASK 0x3f0000 #define GC_USB_DIEPTXF12_INEPNTXFDEP_SIZE 0x6 #define GC_USB_DIEPTXF12_INEPNTXFDEP_DEFAULT 0x0 #define GC_USB_DIEPTXF12_INEPNTXFDEP_OFFSET 0x130 #define GC_USB_DIEPTXF13_INEPNTXFSTADDR_LSB 0x0 #define GC_USB_DIEPTXF13_INEPNTXFSTADDR_MASK 0x7ff #define GC_USB_DIEPTXF13_INEPNTXFSTADDR_SIZE 0xb #define GC_USB_DIEPTXF13_INEPNTXFSTADDR_DEFAULT 0x0 #define GC_USB_DIEPTXF13_INEPNTXFSTADDR_OFFSET 0x134 #define GC_USB_DIEPTXF13_INEPNTXFDEP_LSB 0x10 #define GC_USB_DIEPTXF13_INEPNTXFDEP_MASK 0x3f0000 #define GC_USB_DIEPTXF13_INEPNTXFDEP_SIZE 0x6 #define GC_USB_DIEPTXF13_INEPNTXFDEP_DEFAULT 0x0 #define GC_USB_DIEPTXF13_INEPNTXFDEP_OFFSET 0x134 #define GC_USB_DIEPTXF14_INEPNTXFSTADDR_LSB 0x0 #define GC_USB_DIEPTXF14_INEPNTXFSTADDR_MASK 0x7ff #define GC_USB_DIEPTXF14_INEPNTXFSTADDR_SIZE 0xb #define GC_USB_DIEPTXF14_INEPNTXFSTADDR_DEFAULT 0x0 #define GC_USB_DIEPTXF14_INEPNTXFSTADDR_OFFSET 0x138 #define GC_USB_DIEPTXF14_INEPNTXFDEP_LSB 0x10 #define GC_USB_DIEPTXF14_INEPNTXFDEP_MASK 0x3f0000 #define GC_USB_DIEPTXF14_INEPNTXFDEP_SIZE 0x6 #define GC_USB_DIEPTXF14_INEPNTXFDEP_DEFAULT 0x0 #define GC_USB_DIEPTXF14_INEPNTXFDEP_OFFSET 0x138 #define GC_USB_DIEPTXF15_INEPNTXFSTADDR_LSB 0x0 #define GC_USB_DIEPTXF15_INEPNTXFSTADDR_MASK 0x7ff #define GC_USB_DIEPTXF15_INEPNTXFSTADDR_SIZE 0xb #define GC_USB_DIEPTXF15_INEPNTXFSTADDR_DEFAULT 0x0 #define GC_USB_DIEPTXF15_INEPNTXFSTADDR_OFFSET 0x13c #define GC_USB_DIEPTXF15_INEPNTXFDEP_LSB 0x10 #define GC_USB_DIEPTXF15_INEPNTXFDEP_MASK 0x3f0000 #define GC_USB_DIEPTXF15_INEPNTXFDEP_SIZE 0x6 #define GC_USB_DIEPTXF15_INEPNTXFDEP_DEFAULT 0x0 #define GC_USB_DIEPTXF15_INEPNTXFDEP_OFFSET 0x13c #define GC_USB_DCFG_DEVSPD_LSB 0x0 #define GC_USB_DCFG_DEVSPD_MASK 0x3 #define GC_USB_DCFG_DEVSPD_SIZE 0x2 #define GC_USB_DCFG_DEVSPD_DEFAULT 0x0 #define GC_USB_DCFG_DEVSPD_OFFSET 0x800 #define GC_USB_DCFG_NZSTSOUTHSHK_LSB 0x2 #define GC_USB_DCFG_NZSTSOUTHSHK_MASK 0x4 #define GC_USB_DCFG_NZSTSOUTHSHK_SIZE 0x1 #define GC_USB_DCFG_NZSTSOUTHSHK_DEFAULT 0x0 #define GC_USB_DCFG_NZSTSOUTHSHK_OFFSET 0x800 #define GC_USB_DCFG_ENA32KHZSUSP_LSB 0x3 #define GC_USB_DCFG_ENA32KHZSUSP_MASK 0x8 #define GC_USB_DCFG_ENA32KHZSUSP_SIZE 0x1 #define GC_USB_DCFG_ENA32KHZSUSP_DEFAULT 0x0 #define GC_USB_DCFG_ENA32KHZSUSP_OFFSET 0x800 #define GC_USB_DCFG_DEVADDR_LSB 0x4 #define GC_USB_DCFG_DEVADDR_MASK 0x7f0 #define GC_USB_DCFG_DEVADDR_SIZE 0x7 #define GC_USB_DCFG_DEVADDR_DEFAULT 0x0 #define GC_USB_DCFG_DEVADDR_OFFSET 0x800 #define GC_USB_DCFG_PERFRINT_LSB 0xb #define GC_USB_DCFG_PERFRINT_MASK 0x1800 #define GC_USB_DCFG_PERFRINT_SIZE 0x2 #define GC_USB_DCFG_PERFRINT_DEFAULT 0x0 #define GC_USB_DCFG_PERFRINT_OFFSET 0x800 #define GC_USB_DCFG_ENDEVOUTNAK_LSB 0xd #define GC_USB_DCFG_ENDEVOUTNAK_MASK 0x2000 #define GC_USB_DCFG_ENDEVOUTNAK_SIZE 0x1 #define GC_USB_DCFG_ENDEVOUTNAK_DEFAULT 0x0 #define GC_USB_DCFG_ENDEVOUTNAK_OFFSET 0x800 #define GC_USB_DCFG_XCVRDLY_LSB 0xe #define GC_USB_DCFG_XCVRDLY_MASK 0x4000 #define GC_USB_DCFG_XCVRDLY_SIZE 0x1 #define GC_USB_DCFG_XCVRDLY_DEFAULT 0x0 #define GC_USB_DCFG_XCVRDLY_OFFSET 0x800 #define GC_USB_DCFG_ERRATICINTMSK_LSB 0xf #define GC_USB_DCFG_ERRATICINTMSK_MASK 0x8000 #define GC_USB_DCFG_ERRATICINTMSK_SIZE 0x1 #define GC_USB_DCFG_ERRATICINTMSK_DEFAULT 0x0 #define GC_USB_DCFG_ERRATICINTMSK_OFFSET 0x800 #define GC_USB_DCFG_DESCDMA_LSB 0x17 #define GC_USB_DCFG_DESCDMA_MASK 0x800000 #define GC_USB_DCFG_DESCDMA_SIZE 0x1 #define GC_USB_DCFG_DESCDMA_DEFAULT 0x0 #define GC_USB_DCFG_DESCDMA_OFFSET 0x800 #define GC_USB_DCFG_PERSCHINTVL_LSB 0x18 #define GC_USB_DCFG_PERSCHINTVL_MASK 0x3000000 #define GC_USB_DCFG_PERSCHINTVL_SIZE 0x2 #define GC_USB_DCFG_PERSCHINTVL_DEFAULT 0x0 #define GC_USB_DCFG_PERSCHINTVL_OFFSET 0x800 #define GC_USB_DCFG_RESVALID_LSB 0x1a #define GC_USB_DCFG_RESVALID_MASK 0xfc000000 #define GC_USB_DCFG_RESVALID_SIZE 0x6 #define GC_USB_DCFG_RESVALID_DEFAULT 0x2 #define GC_USB_DCFG_RESVALID_OFFSET 0x800 #define GC_USB_DCTL_RMTWKUPSIG_LSB 0x0 #define GC_USB_DCTL_RMTWKUPSIG_MASK 0x1 #define GC_USB_DCTL_RMTWKUPSIG_SIZE 0x1 #define GC_USB_DCTL_RMTWKUPSIG_DEFAULT 0x0 #define GC_USB_DCTL_RMTWKUPSIG_OFFSET 0x804 #define GC_USB_DCTL_SFTDISCON_LSB 0x1 #define GC_USB_DCTL_SFTDISCON_MASK 0x2 #define GC_USB_DCTL_SFTDISCON_SIZE 0x1 #define GC_USB_DCTL_SFTDISCON_DEFAULT 0x0 #define GC_USB_DCTL_SFTDISCON_OFFSET 0x804 #define GC_USB_DCTL_GNPINNAKSTS_LSB 0x2 #define GC_USB_DCTL_GNPINNAKSTS_MASK 0x4 #define GC_USB_DCTL_GNPINNAKSTS_SIZE 0x1 #define GC_USB_DCTL_GNPINNAKSTS_DEFAULT 0x0 #define GC_USB_DCTL_GNPINNAKSTS_OFFSET 0x804 #define GC_USB_DCTL_GOUTNAKSTS_LSB 0x3 #define GC_USB_DCTL_GOUTNAKSTS_MASK 0x8 #define GC_USB_DCTL_GOUTNAKSTS_SIZE 0x1 #define GC_USB_DCTL_GOUTNAKSTS_DEFAULT 0x0 #define GC_USB_DCTL_GOUTNAKSTS_OFFSET 0x804 #define GC_USB_DCTL_TSTCTL_LSB 0x4 #define GC_USB_DCTL_TSTCTL_MASK 0x70 #define GC_USB_DCTL_TSTCTL_SIZE 0x3 #define GC_USB_DCTL_TSTCTL_DEFAULT 0x0 #define GC_USB_DCTL_TSTCTL_OFFSET 0x804 #define GC_USB_DCTL_SGNPINNAK_LSB 0x7 #define GC_USB_DCTL_SGNPINNAK_MASK 0x80 #define GC_USB_DCTL_SGNPINNAK_SIZE 0x1 #define GC_USB_DCTL_SGNPINNAK_DEFAULT 0x0 #define GC_USB_DCTL_SGNPINNAK_OFFSET 0x804 #define GC_USB_DCTL_CGNPINNAK_LSB 0x8 #define GC_USB_DCTL_CGNPINNAK_MASK 0x100 #define GC_USB_DCTL_CGNPINNAK_SIZE 0x1 #define GC_USB_DCTL_CGNPINNAK_DEFAULT 0x0 #define GC_USB_DCTL_CGNPINNAK_OFFSET 0x804 #define GC_USB_DCTL_SGOUTNAK_LSB 0x9 #define GC_USB_DCTL_SGOUTNAK_MASK 0x200 #define GC_USB_DCTL_SGOUTNAK_SIZE 0x1 #define GC_USB_DCTL_SGOUTNAK_DEFAULT 0x0 #define GC_USB_DCTL_SGOUTNAK_OFFSET 0x804 #define GC_USB_DCTL_CGOUTNAK_LSB 0xa #define GC_USB_DCTL_CGOUTNAK_MASK 0x400 #define GC_USB_DCTL_CGOUTNAK_SIZE 0x1 #define GC_USB_DCTL_CGOUTNAK_DEFAULT 0x0 #define GC_USB_DCTL_CGOUTNAK_OFFSET 0x804 #define GC_USB_DCTL_PWRONPRGDONE_LSB 0xb #define GC_USB_DCTL_PWRONPRGDONE_MASK 0x800 #define GC_USB_DCTL_PWRONPRGDONE_SIZE 0x1 #define GC_USB_DCTL_PWRONPRGDONE_DEFAULT 0x0 #define GC_USB_DCTL_PWRONPRGDONE_OFFSET 0x804 #define GC_USB_DCTL_GMC_LSB 0xd #define GC_USB_DCTL_GMC_MASK 0x6000 #define GC_USB_DCTL_GMC_SIZE 0x2 #define GC_USB_DCTL_GMC_DEFAULT 0x0 #define GC_USB_DCTL_GMC_OFFSET 0x804 #define GC_USB_DCTL_IGNRFRMNUM_LSB 0xf #define GC_USB_DCTL_IGNRFRMNUM_MASK 0x8000 #define GC_USB_DCTL_IGNRFRMNUM_SIZE 0x1 #define GC_USB_DCTL_IGNRFRMNUM_DEFAULT 0x0 #define GC_USB_DCTL_IGNRFRMNUM_OFFSET 0x804 #define GC_USB_DCTL_NAKONBBLE_LSB 0x10 #define GC_USB_DCTL_NAKONBBLE_MASK 0x10000 #define GC_USB_DCTL_NAKONBBLE_SIZE 0x1 #define GC_USB_DCTL_NAKONBBLE_DEFAULT 0x0 #define GC_USB_DCTL_NAKONBBLE_OFFSET 0x804 #define GC_USB_DCTL_ENCONTONBNA_LSB 0x11 #define GC_USB_DCTL_ENCONTONBNA_MASK 0x20000 #define GC_USB_DCTL_ENCONTONBNA_SIZE 0x1 #define GC_USB_DCTL_ENCONTONBNA_DEFAULT 0x0 #define GC_USB_DCTL_ENCONTONBNA_OFFSET 0x804 #define GC_USB_DSTS_SUSPSTS_LSB 0x0 #define GC_USB_DSTS_SUSPSTS_MASK 0x1 #define GC_USB_DSTS_SUSPSTS_SIZE 0x1 #define GC_USB_DSTS_SUSPSTS_DEFAULT 0x0 #define GC_USB_DSTS_SUSPSTS_OFFSET 0x808 #define GC_USB_DSTS_ENUMSPD_LSB 0x1 #define GC_USB_DSTS_ENUMSPD_MASK 0x6 #define GC_USB_DSTS_ENUMSPD_SIZE 0x2 #define GC_USB_DSTS_ENUMSPD_DEFAULT 0x0 #define GC_USB_DSTS_ENUMSPD_OFFSET 0x808 #define GC_USB_DSTS_ERRTICERR_LSB 0x3 #define GC_USB_DSTS_ERRTICERR_MASK 0x8 #define GC_USB_DSTS_ERRTICERR_SIZE 0x1 #define GC_USB_DSTS_ERRTICERR_DEFAULT 0x0 #define GC_USB_DSTS_ERRTICERR_OFFSET 0x808 #define GC_USB_DSTS_SOFFN_LSB 0x8 #define GC_USB_DSTS_SOFFN_MASK 0x3fff00 #define GC_USB_DSTS_SOFFN_SIZE 0xe #define GC_USB_DSTS_SOFFN_DEFAULT 0x0 #define GC_USB_DSTS_SOFFN_OFFSET 0x808 #define GC_USB_DSTS_DEVLNSTS_LSB 0x16 #define GC_USB_DSTS_DEVLNSTS_MASK 0xc00000 #define GC_USB_DSTS_DEVLNSTS_SIZE 0x2 #define GC_USB_DSTS_DEVLNSTS_DEFAULT 0x0 #define GC_USB_DSTS_DEVLNSTS_OFFSET 0x808 #define GC_USB_DIEPMSK_XFERCOMPLMSK_LSB 0x0 #define GC_USB_DIEPMSK_XFERCOMPLMSK_MASK 0x1 #define GC_USB_DIEPMSK_XFERCOMPLMSK_SIZE 0x1 #define GC_USB_DIEPMSK_XFERCOMPLMSK_DEFAULT 0x0 #define GC_USB_DIEPMSK_XFERCOMPLMSK_OFFSET 0x810 #define GC_USB_DIEPMSK_EPDISBLDMSK_LSB 0x1 #define GC_USB_DIEPMSK_EPDISBLDMSK_MASK 0x2 #define GC_USB_DIEPMSK_EPDISBLDMSK_SIZE 0x1 #define GC_USB_DIEPMSK_EPDISBLDMSK_DEFAULT 0x0 #define GC_USB_DIEPMSK_EPDISBLDMSK_OFFSET 0x810 #define GC_USB_DIEPMSK_AHBERRMSK_LSB 0x2 #define GC_USB_DIEPMSK_AHBERRMSK_MASK 0x4 #define GC_USB_DIEPMSK_AHBERRMSK_SIZE 0x1 #define GC_USB_DIEPMSK_AHBERRMSK_DEFAULT 0x0 #define GC_USB_DIEPMSK_AHBERRMSK_OFFSET 0x810 #define GC_USB_DIEPMSK_TIMEOUTMSK_LSB 0x3 #define GC_USB_DIEPMSK_TIMEOUTMSK_MASK 0x8 #define GC_USB_DIEPMSK_TIMEOUTMSK_SIZE 0x1 #define GC_USB_DIEPMSK_TIMEOUTMSK_DEFAULT 0x0 #define GC_USB_DIEPMSK_TIMEOUTMSK_OFFSET 0x810 #define GC_USB_DIEPMSK_INTKNTXFEMPMSK_LSB 0x4 #define GC_USB_DIEPMSK_INTKNTXFEMPMSK_MASK 0x10 #define GC_USB_DIEPMSK_INTKNTXFEMPMSK_SIZE 0x1 #define GC_USB_DIEPMSK_INTKNTXFEMPMSK_DEFAULT 0x0 #define GC_USB_DIEPMSK_INTKNTXFEMPMSK_OFFSET 0x810 #define GC_USB_DIEPMSK_INTKNEPMISMSK_LSB 0x5 #define GC_USB_DIEPMSK_INTKNEPMISMSK_MASK 0x20 #define GC_USB_DIEPMSK_INTKNEPMISMSK_SIZE 0x1 #define GC_USB_DIEPMSK_INTKNEPMISMSK_DEFAULT 0x0 #define GC_USB_DIEPMSK_INTKNEPMISMSK_OFFSET 0x810 #define GC_USB_DIEPMSK_INEPNAKEFFMSK_LSB 0x6 #define GC_USB_DIEPMSK_INEPNAKEFFMSK_MASK 0x40 #define GC_USB_DIEPMSK_INEPNAKEFFMSK_SIZE 0x1 #define GC_USB_DIEPMSK_INEPNAKEFFMSK_DEFAULT 0x0 #define GC_USB_DIEPMSK_INEPNAKEFFMSK_OFFSET 0x810 #define GC_USB_DIEPMSK_RESERVED7_LSB 0x7 #define GC_USB_DIEPMSK_RESERVED7_MASK 0x80 #define GC_USB_DIEPMSK_RESERVED7_SIZE 0x1 #define GC_USB_DIEPMSK_RESERVED7_DEFAULT 0x1 #define GC_USB_DIEPMSK_RESERVED7_OFFSET 0x810 #define GC_USB_DIEPMSK_TXFIFOUNDRNMSK_LSB 0x8 #define GC_USB_DIEPMSK_TXFIFOUNDRNMSK_MASK 0x100 #define GC_USB_DIEPMSK_TXFIFOUNDRNMSK_SIZE 0x1 #define GC_USB_DIEPMSK_TXFIFOUNDRNMSK_DEFAULT 0x0 #define GC_USB_DIEPMSK_TXFIFOUNDRNMSK_OFFSET 0x810 #define GC_USB_DIEPMSK_BNAININTRMSK_LSB 0x9 #define GC_USB_DIEPMSK_BNAININTRMSK_MASK 0x200 #define GC_USB_DIEPMSK_BNAININTRMSK_SIZE 0x1 #define GC_USB_DIEPMSK_BNAININTRMSK_DEFAULT 0x0 #define GC_USB_DIEPMSK_BNAININTRMSK_OFFSET 0x810 #define GC_USB_DIEPMSK_NAKMSK_LSB 0xd #define GC_USB_DIEPMSK_NAKMSK_MASK 0x2000 #define GC_USB_DIEPMSK_NAKMSK_SIZE 0x1 #define GC_USB_DIEPMSK_NAKMSK_DEFAULT 0x0 #define GC_USB_DIEPMSK_NAKMSK_OFFSET 0x810 #define GC_USB_DOEPMSK_XFERCOMPLMSK_LSB 0x0 #define GC_USB_DOEPMSK_XFERCOMPLMSK_MASK 0x1 #define GC_USB_DOEPMSK_XFERCOMPLMSK_SIZE 0x1 #define GC_USB_DOEPMSK_XFERCOMPLMSK_DEFAULT 0x0 #define GC_USB_DOEPMSK_XFERCOMPLMSK_OFFSET 0x814 #define GC_USB_DOEPMSK_EPDISBLDMSK_LSB 0x1 #define GC_USB_DOEPMSK_EPDISBLDMSK_MASK 0x2 #define GC_USB_DOEPMSK_EPDISBLDMSK_SIZE 0x1 #define GC_USB_DOEPMSK_EPDISBLDMSK_DEFAULT 0x0 #define GC_USB_DOEPMSK_EPDISBLDMSK_OFFSET 0x814 #define GC_USB_DOEPMSK_AHBERRMSK_LSB 0x2 #define GC_USB_DOEPMSK_AHBERRMSK_MASK 0x4 #define GC_USB_DOEPMSK_AHBERRMSK_SIZE 0x1 #define GC_USB_DOEPMSK_AHBERRMSK_DEFAULT 0x0 #define GC_USB_DOEPMSK_AHBERRMSK_OFFSET 0x814 #define GC_USB_DOEPMSK_SETUPMSK_LSB 0x3 #define GC_USB_DOEPMSK_SETUPMSK_MASK 0x8 #define GC_USB_DOEPMSK_SETUPMSK_SIZE 0x1 #define GC_USB_DOEPMSK_SETUPMSK_DEFAULT 0x0 #define GC_USB_DOEPMSK_SETUPMSK_OFFSET 0x814 #define GC_USB_DOEPMSK_OUTTKNEPDISMSK_LSB 0x4 #define GC_USB_DOEPMSK_OUTTKNEPDISMSK_MASK 0x10 #define GC_USB_DOEPMSK_OUTTKNEPDISMSK_SIZE 0x1 #define GC_USB_DOEPMSK_OUTTKNEPDISMSK_DEFAULT 0x0 #define GC_USB_DOEPMSK_OUTTKNEPDISMSK_OFFSET 0x814 #define GC_USB_DOEPMSK_STSPHSERCVDMSK_LSB 0x5 #define GC_USB_DOEPMSK_STSPHSERCVDMSK_MASK 0x20 #define GC_USB_DOEPMSK_STSPHSERCVDMSK_SIZE 0x1 #define GC_USB_DOEPMSK_STSPHSERCVDMSK_DEFAULT 0x0 #define GC_USB_DOEPMSK_STSPHSERCVDMSK_OFFSET 0x814 #define GC_USB_DOEPMSK_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPMSK_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPMSK_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPMSK_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPMSK_BACK2BACKSETUP_OFFSET 0x814 #define GC_USB_DOEPMSK_OUTPKTERRMSK_LSB 0x8 #define GC_USB_DOEPMSK_OUTPKTERRMSK_MASK 0x100 #define GC_USB_DOEPMSK_OUTPKTERRMSK_SIZE 0x1 #define GC_USB_DOEPMSK_OUTPKTERRMSK_DEFAULT 0x0 #define GC_USB_DOEPMSK_OUTPKTERRMSK_OFFSET 0x814 #define GC_USB_DOEPMSK_BNAOUTINTRMSK_LSB 0x9 #define GC_USB_DOEPMSK_BNAOUTINTRMSK_MASK 0x200 #define GC_USB_DOEPMSK_BNAOUTINTRMSK_SIZE 0x1 #define GC_USB_DOEPMSK_BNAOUTINTRMSK_DEFAULT 0x0 #define GC_USB_DOEPMSK_BNAOUTINTRMSK_OFFSET 0x814 #define GC_USB_DOEPMSK_BBLEERRMSK_LSB 0xc #define GC_USB_DOEPMSK_BBLEERRMSK_MASK 0x1000 #define GC_USB_DOEPMSK_BBLEERRMSK_SIZE 0x1 #define GC_USB_DOEPMSK_BBLEERRMSK_DEFAULT 0x0 #define GC_USB_DOEPMSK_BBLEERRMSK_OFFSET 0x814 #define GC_USB_DOEPMSK_NAKMSK_LSB 0xd #define GC_USB_DOEPMSK_NAKMSK_MASK 0x2000 #define GC_USB_DOEPMSK_NAKMSK_SIZE 0x1 #define GC_USB_DOEPMSK_NAKMSK_DEFAULT 0x0 #define GC_USB_DOEPMSK_NAKMSK_OFFSET 0x814 #define GC_USB_DOEPMSK_NYETMSK_LSB 0xe #define GC_USB_DOEPMSK_NYETMSK_MASK 0x4000 #define GC_USB_DOEPMSK_NYETMSK_SIZE 0x1 #define GC_USB_DOEPMSK_NYETMSK_DEFAULT 0x0 #define GC_USB_DOEPMSK_NYETMSK_OFFSET 0x814 #define GC_USB_DAINT_INEPINT0_LSB 0x0 #define GC_USB_DAINT_INEPINT0_MASK 0x1 #define GC_USB_DAINT_INEPINT0_SIZE 0x1 #define GC_USB_DAINT_INEPINT0_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT0_OFFSET 0x818 #define GC_USB_DAINT_INEPINT1_LSB 0x1 #define GC_USB_DAINT_INEPINT1_MASK 0x2 #define GC_USB_DAINT_INEPINT1_SIZE 0x1 #define GC_USB_DAINT_INEPINT1_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT1_OFFSET 0x818 #define GC_USB_DAINT_INEPINT2_LSB 0x2 #define GC_USB_DAINT_INEPINT2_MASK 0x4 #define GC_USB_DAINT_INEPINT2_SIZE 0x1 #define GC_USB_DAINT_INEPINT2_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT2_OFFSET 0x818 #define GC_USB_DAINT_INEPINT3_LSB 0x3 #define GC_USB_DAINT_INEPINT3_MASK 0x8 #define GC_USB_DAINT_INEPINT3_SIZE 0x1 #define GC_USB_DAINT_INEPINT3_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT3_OFFSET 0x818 #define GC_USB_DAINT_INEPINT4_LSB 0x4 #define GC_USB_DAINT_INEPINT4_MASK 0x10 #define GC_USB_DAINT_INEPINT4_SIZE 0x1 #define GC_USB_DAINT_INEPINT4_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT4_OFFSET 0x818 #define GC_USB_DAINT_INEPINT5_LSB 0x5 #define GC_USB_DAINT_INEPINT5_MASK 0x20 #define GC_USB_DAINT_INEPINT5_SIZE 0x1 #define GC_USB_DAINT_INEPINT5_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT5_OFFSET 0x818 #define GC_USB_DAINT_INEPINT6_LSB 0x6 #define GC_USB_DAINT_INEPINT6_MASK 0x40 #define GC_USB_DAINT_INEPINT6_SIZE 0x1 #define GC_USB_DAINT_INEPINT6_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT6_OFFSET 0x818 #define GC_USB_DAINT_INEPINT7_LSB 0x7 #define GC_USB_DAINT_INEPINT7_MASK 0x80 #define GC_USB_DAINT_INEPINT7_SIZE 0x1 #define GC_USB_DAINT_INEPINT7_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT7_OFFSET 0x818 #define GC_USB_DAINT_INEPINT8_LSB 0x8 #define GC_USB_DAINT_INEPINT8_MASK 0x100 #define GC_USB_DAINT_INEPINT8_SIZE 0x1 #define GC_USB_DAINT_INEPINT8_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT8_OFFSET 0x818 #define GC_USB_DAINT_INEPINT9_LSB 0x9 #define GC_USB_DAINT_INEPINT9_MASK 0x200 #define GC_USB_DAINT_INEPINT9_SIZE 0x1 #define GC_USB_DAINT_INEPINT9_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT9_OFFSET 0x818 #define GC_USB_DAINT_INEPINT10_LSB 0xa #define GC_USB_DAINT_INEPINT10_MASK 0x400 #define GC_USB_DAINT_INEPINT10_SIZE 0x1 #define GC_USB_DAINT_INEPINT10_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT10_OFFSET 0x818 #define GC_USB_DAINT_INEPINT11_LSB 0xb #define GC_USB_DAINT_INEPINT11_MASK 0x800 #define GC_USB_DAINT_INEPINT11_SIZE 0x1 #define GC_USB_DAINT_INEPINT11_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT11_OFFSET 0x818 #define GC_USB_DAINT_INEPINT12_LSB 0xc #define GC_USB_DAINT_INEPINT12_MASK 0x1000 #define GC_USB_DAINT_INEPINT12_SIZE 0x1 #define GC_USB_DAINT_INEPINT12_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT12_OFFSET 0x818 #define GC_USB_DAINT_INEPINT13_LSB 0xd #define GC_USB_DAINT_INEPINT13_MASK 0x2000 #define GC_USB_DAINT_INEPINT13_SIZE 0x1 #define GC_USB_DAINT_INEPINT13_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT13_OFFSET 0x818 #define GC_USB_DAINT_INEPINT14_LSB 0xe #define GC_USB_DAINT_INEPINT14_MASK 0x4000 #define GC_USB_DAINT_INEPINT14_SIZE 0x1 #define GC_USB_DAINT_INEPINT14_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT14_OFFSET 0x818 #define GC_USB_DAINT_INEPINT15_LSB 0xf #define GC_USB_DAINT_INEPINT15_MASK 0x8000 #define GC_USB_DAINT_INEPINT15_SIZE 0x1 #define GC_USB_DAINT_INEPINT15_DEFAULT 0x0 #define GC_USB_DAINT_INEPINT15_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT0_LSB 0x10 #define GC_USB_DAINT_OUTEPINT0_MASK 0x10000 #define GC_USB_DAINT_OUTEPINT0_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT0_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT0_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT1_LSB 0x11 #define GC_USB_DAINT_OUTEPINT1_MASK 0x20000 #define GC_USB_DAINT_OUTEPINT1_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT1_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT1_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT2_LSB 0x12 #define GC_USB_DAINT_OUTEPINT2_MASK 0x40000 #define GC_USB_DAINT_OUTEPINT2_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT2_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT2_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT3_LSB 0x13 #define GC_USB_DAINT_OUTEPINT3_MASK 0x80000 #define GC_USB_DAINT_OUTEPINT3_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT3_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT3_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT4_LSB 0x14 #define GC_USB_DAINT_OUTEPINT4_MASK 0x100000 #define GC_USB_DAINT_OUTEPINT4_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT4_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT4_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT5_LSB 0x15 #define GC_USB_DAINT_OUTEPINT5_MASK 0x200000 #define GC_USB_DAINT_OUTEPINT5_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT5_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT5_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT6_LSB 0x16 #define GC_USB_DAINT_OUTEPINT6_MASK 0x400000 #define GC_USB_DAINT_OUTEPINT6_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT6_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT6_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT7_LSB 0x17 #define GC_USB_DAINT_OUTEPINT7_MASK 0x800000 #define GC_USB_DAINT_OUTEPINT7_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT7_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT7_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT8_LSB 0x18 #define GC_USB_DAINT_OUTEPINT8_MASK 0x1000000 #define GC_USB_DAINT_OUTEPINT8_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT8_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT8_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT9_LSB 0x19 #define GC_USB_DAINT_OUTEPINT9_MASK 0x2000000 #define GC_USB_DAINT_OUTEPINT9_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT9_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT9_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT10_LSB 0x1a #define GC_USB_DAINT_OUTEPINT10_MASK 0x4000000 #define GC_USB_DAINT_OUTEPINT10_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT10_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT10_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT11_LSB 0x1b #define GC_USB_DAINT_OUTEPINT11_MASK 0x8000000 #define GC_USB_DAINT_OUTEPINT11_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT11_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT11_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT12_LSB 0x1c #define GC_USB_DAINT_OUTEPINT12_MASK 0x10000000 #define GC_USB_DAINT_OUTEPINT12_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT12_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT12_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT13_LSB 0x1d #define GC_USB_DAINT_OUTEPINT13_MASK 0x20000000 #define GC_USB_DAINT_OUTEPINT13_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT13_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT13_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT14_LSB 0x1e #define GC_USB_DAINT_OUTEPINT14_MASK 0x40000000 #define GC_USB_DAINT_OUTEPINT14_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT14_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT14_OFFSET 0x818 #define GC_USB_DAINT_OUTEPINT15_LSB 0x1f #define GC_USB_DAINT_OUTEPINT15_MASK 0x80000000 #define GC_USB_DAINT_OUTEPINT15_SIZE 0x1 #define GC_USB_DAINT_OUTEPINT15_DEFAULT 0x0 #define GC_USB_DAINT_OUTEPINT15_OFFSET 0x818 #define GC_USB_DAINTMSK_INEPMSK0_LSB 0x0 #define GC_USB_DAINTMSK_INEPMSK0_MASK 0x1 #define GC_USB_DAINTMSK_INEPMSK0_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK0_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK0_OFFSET 0x81c #define GC_USB_DAINTMSK_INEPMSK1_LSB 0x1 #define GC_USB_DAINTMSK_INEPMSK1_MASK 0x2 #define GC_USB_DAINTMSK_INEPMSK1_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK1_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK1_OFFSET 0x81c #define GC_USB_DAINTMSK_INEPMSK2_LSB 0x2 #define GC_USB_DAINTMSK_INEPMSK2_MASK 0x4 #define GC_USB_DAINTMSK_INEPMSK2_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK2_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK2_OFFSET 0x81c #define GC_USB_DAINTMSK_INEPMSK3_LSB 0x3 #define GC_USB_DAINTMSK_INEPMSK3_MASK 0x8 #define GC_USB_DAINTMSK_INEPMSK3_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK3_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK3_OFFSET 0x81c #define GC_USB_DAINTMSK_INEPMSK4_LSB 0x4 #define GC_USB_DAINTMSK_INEPMSK4_MASK 0x10 #define GC_USB_DAINTMSK_INEPMSK4_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK4_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK4_OFFSET 0x81c #define GC_USB_DAINTMSK_INEPMSK5_LSB 0x5 #define GC_USB_DAINTMSK_INEPMSK5_MASK 0x20 #define GC_USB_DAINTMSK_INEPMSK5_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK5_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK5_OFFSET 0x81c #define GC_USB_DAINTMSK_INEPMSK6_LSB 0x6 #define GC_USB_DAINTMSK_INEPMSK6_MASK 0x40 #define GC_USB_DAINTMSK_INEPMSK6_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK6_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK6_OFFSET 0x81c #define GC_USB_DAINTMSK_INEPMSK7_LSB 0x7 #define GC_USB_DAINTMSK_INEPMSK7_MASK 0x80 #define GC_USB_DAINTMSK_INEPMSK7_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK7_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK7_OFFSET 0x81c #define GC_USB_DAINTMSK_INEPMSK8_LSB 0x8 #define GC_USB_DAINTMSK_INEPMSK8_MASK 0x100 #define GC_USB_DAINTMSK_INEPMSK8_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK8_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK8_OFFSET 0x81c #define GC_USB_DAINTMSK_INEPMSK9_LSB 0x9 #define GC_USB_DAINTMSK_INEPMSK9_MASK 0x200 #define GC_USB_DAINTMSK_INEPMSK9_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK9_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK9_OFFSET 0x81c #define GC_USB_DAINTMSK_INEPMSK10_LSB 0xa #define GC_USB_DAINTMSK_INEPMSK10_MASK 0x400 #define GC_USB_DAINTMSK_INEPMSK10_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK10_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK10_OFFSET 0x81c #define GC_USB_DAINTMSK_INEPMSK11_LSB 0xb #define GC_USB_DAINTMSK_INEPMSK11_MASK 0x800 #define GC_USB_DAINTMSK_INEPMSK11_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK11_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK11_OFFSET 0x81c #define GC_USB_DAINTMSK_INEPMSK12_LSB 0xc #define GC_USB_DAINTMSK_INEPMSK12_MASK 0x1000 #define GC_USB_DAINTMSK_INEPMSK12_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK12_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK12_OFFSET 0x81c #define GC_USB_DAINTMSK_INEPMSK13_LSB 0xd #define GC_USB_DAINTMSK_INEPMSK13_MASK 0x2000 #define GC_USB_DAINTMSK_INEPMSK13_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK13_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK13_OFFSET 0x81c #define GC_USB_DAINTMSK_INEPMSK14_LSB 0xe #define GC_USB_DAINTMSK_INEPMSK14_MASK 0x4000 #define GC_USB_DAINTMSK_INEPMSK14_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK14_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK14_OFFSET 0x81c #define GC_USB_DAINTMSK_INEPMSK15_LSB 0xf #define GC_USB_DAINTMSK_INEPMSK15_MASK 0x8000 #define GC_USB_DAINTMSK_INEPMSK15_SIZE 0x1 #define GC_USB_DAINTMSK_INEPMSK15_DEFAULT 0x0 #define GC_USB_DAINTMSK_INEPMSK15_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK0_LSB 0x10 #define GC_USB_DAINTMSK_OUTEPMSK0_MASK 0x10000 #define GC_USB_DAINTMSK_OUTEPMSK0_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK0_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK0_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK1_LSB 0x11 #define GC_USB_DAINTMSK_OUTEPMSK1_MASK 0x20000 #define GC_USB_DAINTMSK_OUTEPMSK1_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK1_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK1_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK2_LSB 0x12 #define GC_USB_DAINTMSK_OUTEPMSK2_MASK 0x40000 #define GC_USB_DAINTMSK_OUTEPMSK2_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK2_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK2_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK3_LSB 0x13 #define GC_USB_DAINTMSK_OUTEPMSK3_MASK 0x80000 #define GC_USB_DAINTMSK_OUTEPMSK3_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK3_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK3_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK4_LSB 0x14 #define GC_USB_DAINTMSK_OUTEPMSK4_MASK 0x100000 #define GC_USB_DAINTMSK_OUTEPMSK4_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK4_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK4_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK5_LSB 0x15 #define GC_USB_DAINTMSK_OUTEPMSK5_MASK 0x200000 #define GC_USB_DAINTMSK_OUTEPMSK5_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK5_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK5_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK6_LSB 0x16 #define GC_USB_DAINTMSK_OUTEPMSK6_MASK 0x400000 #define GC_USB_DAINTMSK_OUTEPMSK6_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK6_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK6_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK7_LSB 0x17 #define GC_USB_DAINTMSK_OUTEPMSK7_MASK 0x800000 #define GC_USB_DAINTMSK_OUTEPMSK7_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK7_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK7_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK8_LSB 0x18 #define GC_USB_DAINTMSK_OUTEPMSK8_MASK 0x1000000 #define GC_USB_DAINTMSK_OUTEPMSK8_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK8_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK8_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK9_LSB 0x19 #define GC_USB_DAINTMSK_OUTEPMSK9_MASK 0x2000000 #define GC_USB_DAINTMSK_OUTEPMSK9_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK9_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK9_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK10_LSB 0x1a #define GC_USB_DAINTMSK_OUTEPMSK10_MASK 0x4000000 #define GC_USB_DAINTMSK_OUTEPMSK10_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK10_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK10_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK11_LSB 0x1b #define GC_USB_DAINTMSK_OUTEPMSK11_MASK 0x8000000 #define GC_USB_DAINTMSK_OUTEPMSK11_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK11_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK11_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK12_LSB 0x1c #define GC_USB_DAINTMSK_OUTEPMSK12_MASK 0x10000000 #define GC_USB_DAINTMSK_OUTEPMSK12_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK12_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK12_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK13_LSB 0x1d #define GC_USB_DAINTMSK_OUTEPMSK13_MASK 0x20000000 #define GC_USB_DAINTMSK_OUTEPMSK13_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK13_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK13_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK14_LSB 0x1e #define GC_USB_DAINTMSK_OUTEPMSK14_MASK 0x40000000 #define GC_USB_DAINTMSK_OUTEPMSK14_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK14_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK14_OFFSET 0x81c #define GC_USB_DAINTMSK_OUTEPMSK15_LSB 0x1f #define GC_USB_DAINTMSK_OUTEPMSK15_MASK 0x80000000 #define GC_USB_DAINTMSK_OUTEPMSK15_SIZE 0x1 #define GC_USB_DAINTMSK_OUTEPMSK15_DEFAULT 0x0 #define GC_USB_DAINTMSK_OUTEPMSK15_OFFSET 0x81c #define GC_USB_DVBUSDIS_DVBUSDIS_LSB 0x0 #define GC_USB_DVBUSDIS_DVBUSDIS_MASK 0xffff #define GC_USB_DVBUSDIS_DVBUSDIS_SIZE 0x10 #define GC_USB_DVBUSDIS_DVBUSDIS_DEFAULT 0x0 #define GC_USB_DVBUSDIS_DVBUSDIS_OFFSET 0x828 #define GC_USB_DVBUSPULSE_DVBUSPULSE_LSB 0x0 #define GC_USB_DVBUSPULSE_DVBUSPULSE_MASK 0xfff #define GC_USB_DVBUSPULSE_DVBUSPULSE_SIZE 0xc #define GC_USB_DVBUSPULSE_DVBUSPULSE_DEFAULT 0x0 #define GC_USB_DVBUSPULSE_DVBUSPULSE_OFFSET 0x82c #define GC_USB_DTHRCTL_NONISOTHREN_LSB 0x0 #define GC_USB_DTHRCTL_NONISOTHREN_MASK 0x1 #define GC_USB_DTHRCTL_NONISOTHREN_SIZE 0x1 #define GC_USB_DTHRCTL_NONISOTHREN_DEFAULT 0x0 #define GC_USB_DTHRCTL_NONISOTHREN_OFFSET 0x830 #define GC_USB_DTHRCTL_ISOTHREN_LSB 0x1 #define GC_USB_DTHRCTL_ISOTHREN_MASK 0x2 #define GC_USB_DTHRCTL_ISOTHREN_SIZE 0x1 #define GC_USB_DTHRCTL_ISOTHREN_DEFAULT 0x0 #define GC_USB_DTHRCTL_ISOTHREN_OFFSET 0x830 #define GC_USB_DTHRCTL_TXTHRLEN_LSB 0x2 #define GC_USB_DTHRCTL_TXTHRLEN_MASK 0x7fc #define GC_USB_DTHRCTL_TXTHRLEN_SIZE 0x9 #define GC_USB_DTHRCTL_TXTHRLEN_DEFAULT 0x0 #define GC_USB_DTHRCTL_TXTHRLEN_OFFSET 0x830 #define GC_USB_DTHRCTL_AHBTHRRATIO_LSB 0xb #define GC_USB_DTHRCTL_AHBTHRRATIO_MASK 0x1800 #define GC_USB_DTHRCTL_AHBTHRRATIO_SIZE 0x2 #define GC_USB_DTHRCTL_AHBTHRRATIO_DEFAULT 0x0 #define GC_USB_DTHRCTL_AHBTHRRATIO_OFFSET 0x830 #define GC_USB_DTHRCTL_RXTHREN_LSB 0x10 #define GC_USB_DTHRCTL_RXTHREN_MASK 0x10000 #define GC_USB_DTHRCTL_RXTHREN_SIZE 0x1 #define GC_USB_DTHRCTL_RXTHREN_DEFAULT 0x0 #define GC_USB_DTHRCTL_RXTHREN_OFFSET 0x830 #define GC_USB_DTHRCTL_RXTHRLEN_LSB 0x11 #define GC_USB_DTHRCTL_RXTHRLEN_MASK 0x3fe0000 #define GC_USB_DTHRCTL_RXTHRLEN_SIZE 0x9 #define GC_USB_DTHRCTL_RXTHRLEN_DEFAULT 0x0 #define GC_USB_DTHRCTL_RXTHRLEN_OFFSET 0x830 #define GC_USB_DTHRCTL_ARBPRKEN_LSB 0x1b #define GC_USB_DTHRCTL_ARBPRKEN_MASK 0x8000000 #define GC_USB_DTHRCTL_ARBPRKEN_SIZE 0x1 #define GC_USB_DTHRCTL_ARBPRKEN_DEFAULT 0x0 #define GC_USB_DTHRCTL_ARBPRKEN_OFFSET 0x830 #define GC_USB_DIEPEMPMSK_INEPTXFEMPMSK_LSB 0x0 #define GC_USB_DIEPEMPMSK_INEPTXFEMPMSK_MASK 0xffff #define GC_USB_DIEPEMPMSK_INEPTXFEMPMSK_SIZE 0x10 #define GC_USB_DIEPEMPMSK_INEPTXFEMPMSK_DEFAULT 0x0 #define GC_USB_DIEPEMPMSK_INEPTXFEMPMSK_OFFSET 0x834 #define GC_USB_DIEPCTL0_MPS_LSB 0x0 #define GC_USB_DIEPCTL0_MPS_MASK 0x3 #define GC_USB_DIEPCTL0_MPS_SIZE 0x2 #define GC_USB_DIEPCTL0_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL0_MPS_OFFSET 0x900 #define GC_USB_DIEPCTL0_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL0_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL0_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL0_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL0_USBACTEP_OFFSET 0x900 #define GC_USB_DIEPCTL0_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL0_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL0_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL0_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL0_NAKSTS_OFFSET 0x900 #define GC_USB_DIEPCTL0_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL0_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL0_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL0_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL0_EPTYPE_OFFSET 0x900 #define GC_USB_DIEPCTL0_STALL_LSB 0x15 #define GC_USB_DIEPCTL0_STALL_MASK 0x200000 #define GC_USB_DIEPCTL0_STALL_SIZE 0x1 #define GC_USB_DIEPCTL0_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL0_STALL_OFFSET 0x900 #define GC_USB_DIEPCTL0_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL0_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL0_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL0_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL0_TXFNUM_OFFSET 0x900 #define GC_USB_DIEPCTL0_CNAK_LSB 0x1a #define GC_USB_DIEPCTL0_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL0_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL0_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL0_CNAK_OFFSET 0x900 #define GC_USB_DIEPCTL0_SNAK_LSB 0x1b #define GC_USB_DIEPCTL0_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL0_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL0_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL0_SNAK_OFFSET 0x900 #define GC_USB_DIEPCTL0_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL0_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL0_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL0_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL0_EPDIS_OFFSET 0x900 #define GC_USB_DIEPCTL0_EPENA_LSB 0x1f #define GC_USB_DIEPCTL0_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL0_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL0_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL0_EPENA_OFFSET 0x900 #define GC_USB_DIEPINT0_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT0_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT0_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT0_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT0_XFERCOMPL_OFFSET 0x908 #define GC_USB_DIEPINT0_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT0_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT0_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT0_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT0_EPDISBLD_OFFSET 0x908 #define GC_USB_DIEPINT0_AHBERR_LSB 0x2 #define GC_USB_DIEPINT0_AHBERR_MASK 0x4 #define GC_USB_DIEPINT0_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT0_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT0_AHBERR_OFFSET 0x908 #define GC_USB_DIEPINT0_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT0_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT0_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT0_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT0_TIMEOUT_OFFSET 0x908 #define GC_USB_DIEPINT0_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT0_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT0_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT0_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT0_INTKNTXFEMP_OFFSET 0x908 #define GC_USB_DIEPINT0_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT0_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT0_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT0_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT0_INTKNEPMIS_OFFSET 0x908 #define GC_USB_DIEPINT0_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT0_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT0_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT0_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT0_INEPNAKEFF_OFFSET 0x908 #define GC_USB_DIEPINT0_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT0_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT0_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT0_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT0_TXFEMP_OFFSET 0x908 #define GC_USB_DIEPINT0_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT0_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT0_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT0_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT0_TXFIFOUNDRN_OFFSET 0x908 #define GC_USB_DIEPINT0_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT0_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT0_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT0_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT0_BNAINTR_OFFSET 0x908 #define GC_USB_DIEPINT0_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT0_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT0_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT0_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT0_PKTDRPSTS_OFFSET 0x908 #define GC_USB_DIEPINT0_BBLEERR_LSB 0xc #define GC_USB_DIEPINT0_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT0_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT0_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT0_BBLEERR_OFFSET 0x908 #define GC_USB_DIEPINT0_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT0_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT0_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT0_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT0_NAKINTRPT_OFFSET 0x908 #define GC_USB_DIEPINT0_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT0_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT0_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT0_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT0_NYETINTRPT_OFFSET 0x908 #define GC_USB_DIEPTSIZ0_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ0_XFERSIZE_MASK 0x7f #define GC_USB_DIEPTSIZ0_XFERSIZE_SIZE 0x7 #define GC_USB_DIEPTSIZ0_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ0_XFERSIZE_OFFSET 0x910 #define GC_USB_DIEPTSIZ0_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ0_PKTCNT_MASK 0x180000 #define GC_USB_DIEPTSIZ0_PKTCNT_SIZE 0x2 #define GC_USB_DIEPTSIZ0_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ0_PKTCNT_OFFSET 0x910 #define GC_USB_DIEPDMA0_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA0_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA0_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA0_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA0_DMAADDR_OFFSET 0x914 #define GC_USB_DTXFSTS0_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS0_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS0_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS0_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS0_INEPTXFSPCAVAIL_OFFSET 0x918 #define GC_USB_DIEPDMAB0_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB0_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB0_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB0_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB0_DMABUFFERADDR_OFFSET 0x91c #define GC_USB_DIEPCTL1_MPS_LSB 0x0 #define GC_USB_DIEPCTL1_MPS_MASK 0x7ff #define GC_USB_DIEPCTL1_MPS_SIZE 0xb #define GC_USB_DIEPCTL1_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL1_MPS_OFFSET 0x920 #define GC_USB_DIEPCTL1_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL1_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL1_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL1_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL1_USBACTEP_OFFSET 0x920 #define GC_USB_DIEPCTL1_DPID_LSB 0x10 #define GC_USB_DIEPCTL1_DPID_MASK 0x10000 #define GC_USB_DIEPCTL1_DPID_SIZE 0x1 #define GC_USB_DIEPCTL1_DPID_DEFAULT 0x0 #define GC_USB_DIEPCTL1_DPID_OFFSET 0x920 #define GC_USB_DIEPCTL1_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL1_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL1_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL1_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL1_NAKSTS_OFFSET 0x920 #define GC_USB_DIEPCTL1_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL1_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL1_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL1_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL1_EPTYPE_OFFSET 0x920 #define GC_USB_DIEPCTL1_STALL_LSB 0x15 #define GC_USB_DIEPCTL1_STALL_MASK 0x200000 #define GC_USB_DIEPCTL1_STALL_SIZE 0x1 #define GC_USB_DIEPCTL1_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL1_STALL_OFFSET 0x920 #define GC_USB_DIEPCTL1_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL1_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL1_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL1_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL1_TXFNUM_OFFSET 0x920 #define GC_USB_DIEPCTL1_CNAK_LSB 0x1a #define GC_USB_DIEPCTL1_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL1_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL1_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL1_CNAK_OFFSET 0x920 #define GC_USB_DIEPCTL1_SNAK_LSB 0x1b #define GC_USB_DIEPCTL1_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL1_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL1_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL1_SNAK_OFFSET 0x920 #define GC_USB_DIEPCTL1_SETD0PID_LSB 0x1c #define GC_USB_DIEPCTL1_SETD0PID_MASK 0x10000000 #define GC_USB_DIEPCTL1_SETD0PID_SIZE 0x1 #define GC_USB_DIEPCTL1_SETD0PID_DEFAULT 0x0 #define GC_USB_DIEPCTL1_SETD0PID_OFFSET 0x920 #define GC_USB_DIEPCTL1_SETD1PID_LSB 0x1d #define GC_USB_DIEPCTL1_SETD1PID_MASK 0x20000000 #define GC_USB_DIEPCTL1_SETD1PID_SIZE 0x1 #define GC_USB_DIEPCTL1_SETD1PID_DEFAULT 0x0 #define GC_USB_DIEPCTL1_SETD1PID_OFFSET 0x920 #define GC_USB_DIEPCTL1_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL1_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL1_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL1_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL1_EPDIS_OFFSET 0x920 #define GC_USB_DIEPCTL1_EPENA_LSB 0x1f #define GC_USB_DIEPCTL1_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL1_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL1_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL1_EPENA_OFFSET 0x920 #define GC_USB_DIEPINT1_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT1_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT1_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT1_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT1_XFERCOMPL_OFFSET 0x928 #define GC_USB_DIEPINT1_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT1_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT1_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT1_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT1_EPDISBLD_OFFSET 0x928 #define GC_USB_DIEPINT1_AHBERR_LSB 0x2 #define GC_USB_DIEPINT1_AHBERR_MASK 0x4 #define GC_USB_DIEPINT1_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT1_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT1_AHBERR_OFFSET 0x928 #define GC_USB_DIEPINT1_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT1_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT1_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT1_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT1_TIMEOUT_OFFSET 0x928 #define GC_USB_DIEPINT1_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT1_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT1_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT1_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT1_INTKNTXFEMP_OFFSET 0x928 #define GC_USB_DIEPINT1_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT1_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT1_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT1_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT1_INTKNEPMIS_OFFSET 0x928 #define GC_USB_DIEPINT1_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT1_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT1_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT1_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT1_INEPNAKEFF_OFFSET 0x928 #define GC_USB_DIEPINT1_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT1_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT1_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT1_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT1_TXFEMP_OFFSET 0x928 #define GC_USB_DIEPINT1_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT1_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT1_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT1_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT1_TXFIFOUNDRN_OFFSET 0x928 #define GC_USB_DIEPINT1_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT1_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT1_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT1_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT1_BNAINTR_OFFSET 0x928 #define GC_USB_DIEPINT1_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT1_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT1_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT1_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT1_PKTDRPSTS_OFFSET 0x928 #define GC_USB_DIEPINT1_BBLEERR_LSB 0xc #define GC_USB_DIEPINT1_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT1_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT1_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT1_BBLEERR_OFFSET 0x928 #define GC_USB_DIEPINT1_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT1_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT1_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT1_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT1_NAKINTRPT_OFFSET 0x928 #define GC_USB_DIEPINT1_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT1_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT1_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT1_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT1_NYETINTRPT_OFFSET 0x928 #define GC_USB_DIEPTSIZ1_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ1_XFERSIZE_MASK 0x7ffff #define GC_USB_DIEPTSIZ1_XFERSIZE_SIZE 0x13 #define GC_USB_DIEPTSIZ1_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ1_XFERSIZE_OFFSET 0x930 #define GC_USB_DIEPTSIZ1_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ1_PKTCNT_MASK 0x1ff80000 #define GC_USB_DIEPTSIZ1_PKTCNT_SIZE 0xa #define GC_USB_DIEPTSIZ1_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ1_PKTCNT_OFFSET 0x930 #define GC_USB_DIEPTSIZ1_MC_LSB 0x1d #define GC_USB_DIEPTSIZ1_MC_MASK 0x60000000 #define GC_USB_DIEPTSIZ1_MC_SIZE 0x2 #define GC_USB_DIEPTSIZ1_MC_DEFAULT 0x0 #define GC_USB_DIEPTSIZ1_MC_OFFSET 0x930 #define GC_USB_DIEPDMA1_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA1_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA1_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA1_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA1_DMAADDR_OFFSET 0x934 #define GC_USB_DTXFSTS1_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS1_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS1_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS1_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS1_INEPTXFSPCAVAIL_OFFSET 0x938 #define GC_USB_DIEPDMAB1_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB1_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB1_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB1_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB1_DMABUFFERADDR_OFFSET 0x93c #define GC_USB_DIEPCTL2_MPS_LSB 0x0 #define GC_USB_DIEPCTL2_MPS_MASK 0x7ff #define GC_USB_DIEPCTL2_MPS_SIZE 0xb #define GC_USB_DIEPCTL2_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL2_MPS_OFFSET 0x940 #define GC_USB_DIEPCTL2_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL2_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL2_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL2_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL2_USBACTEP_OFFSET 0x940 #define GC_USB_DIEPCTL2_DPID_LSB 0x10 #define GC_USB_DIEPCTL2_DPID_MASK 0x10000 #define GC_USB_DIEPCTL2_DPID_SIZE 0x1 #define GC_USB_DIEPCTL2_DPID_DEFAULT 0x0 #define GC_USB_DIEPCTL2_DPID_OFFSET 0x940 #define GC_USB_DIEPCTL2_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL2_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL2_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL2_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL2_NAKSTS_OFFSET 0x940 #define GC_USB_DIEPCTL2_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL2_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL2_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL2_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL2_EPTYPE_OFFSET 0x940 #define GC_USB_DIEPCTL2_STALL_LSB 0x15 #define GC_USB_DIEPCTL2_STALL_MASK 0x200000 #define GC_USB_DIEPCTL2_STALL_SIZE 0x1 #define GC_USB_DIEPCTL2_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL2_STALL_OFFSET 0x940 #define GC_USB_DIEPCTL2_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL2_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL2_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL2_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL2_TXFNUM_OFFSET 0x940 #define GC_USB_DIEPCTL2_CNAK_LSB 0x1a #define GC_USB_DIEPCTL2_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL2_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL2_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL2_CNAK_OFFSET 0x940 #define GC_USB_DIEPCTL2_SNAK_LSB 0x1b #define GC_USB_DIEPCTL2_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL2_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL2_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL2_SNAK_OFFSET 0x940 #define GC_USB_DIEPCTL2_SETD0PID_LSB 0x1c #define GC_USB_DIEPCTL2_SETD0PID_MASK 0x10000000 #define GC_USB_DIEPCTL2_SETD0PID_SIZE 0x1 #define GC_USB_DIEPCTL2_SETD0PID_DEFAULT 0x0 #define GC_USB_DIEPCTL2_SETD0PID_OFFSET 0x940 #define GC_USB_DIEPCTL2_SETD1PID_LSB 0x1d #define GC_USB_DIEPCTL2_SETD1PID_MASK 0x20000000 #define GC_USB_DIEPCTL2_SETD1PID_SIZE 0x1 #define GC_USB_DIEPCTL2_SETD1PID_DEFAULT 0x0 #define GC_USB_DIEPCTL2_SETD1PID_OFFSET 0x940 #define GC_USB_DIEPCTL2_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL2_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL2_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL2_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL2_EPDIS_OFFSET 0x940 #define GC_USB_DIEPCTL2_EPENA_LSB 0x1f #define GC_USB_DIEPCTL2_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL2_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL2_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL2_EPENA_OFFSET 0x940 #define GC_USB_DIEPINT2_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT2_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT2_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT2_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT2_XFERCOMPL_OFFSET 0x948 #define GC_USB_DIEPINT2_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT2_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT2_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT2_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT2_EPDISBLD_OFFSET 0x948 #define GC_USB_DIEPINT2_AHBERR_LSB 0x2 #define GC_USB_DIEPINT2_AHBERR_MASK 0x4 #define GC_USB_DIEPINT2_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT2_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT2_AHBERR_OFFSET 0x948 #define GC_USB_DIEPINT2_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT2_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT2_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT2_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT2_TIMEOUT_OFFSET 0x948 #define GC_USB_DIEPINT2_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT2_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT2_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT2_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT2_INTKNTXFEMP_OFFSET 0x948 #define GC_USB_DIEPINT2_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT2_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT2_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT2_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT2_INTKNEPMIS_OFFSET 0x948 #define GC_USB_DIEPINT2_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT2_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT2_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT2_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT2_INEPNAKEFF_OFFSET 0x948 #define GC_USB_DIEPINT2_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT2_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT2_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT2_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT2_TXFEMP_OFFSET 0x948 #define GC_USB_DIEPINT2_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT2_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT2_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT2_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT2_TXFIFOUNDRN_OFFSET 0x948 #define GC_USB_DIEPINT2_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT2_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT2_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT2_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT2_BNAINTR_OFFSET 0x948 #define GC_USB_DIEPINT2_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT2_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT2_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT2_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT2_PKTDRPSTS_OFFSET 0x948 #define GC_USB_DIEPINT2_BBLEERR_LSB 0xc #define GC_USB_DIEPINT2_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT2_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT2_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT2_BBLEERR_OFFSET 0x948 #define GC_USB_DIEPINT2_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT2_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT2_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT2_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT2_NAKINTRPT_OFFSET 0x948 #define GC_USB_DIEPINT2_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT2_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT2_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT2_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT2_NYETINTRPT_OFFSET 0x948 #define GC_USB_DIEPTSIZ2_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ2_XFERSIZE_MASK 0x7ffff #define GC_USB_DIEPTSIZ2_XFERSIZE_SIZE 0x13 #define GC_USB_DIEPTSIZ2_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ2_XFERSIZE_OFFSET 0x950 #define GC_USB_DIEPTSIZ2_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ2_PKTCNT_MASK 0x1ff80000 #define GC_USB_DIEPTSIZ2_PKTCNT_SIZE 0xa #define GC_USB_DIEPTSIZ2_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ2_PKTCNT_OFFSET 0x950 #define GC_USB_DIEPTSIZ2_MC_LSB 0x1d #define GC_USB_DIEPTSIZ2_MC_MASK 0x60000000 #define GC_USB_DIEPTSIZ2_MC_SIZE 0x2 #define GC_USB_DIEPTSIZ2_MC_DEFAULT 0x0 #define GC_USB_DIEPTSIZ2_MC_OFFSET 0x950 #define GC_USB_DIEPDMA2_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA2_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA2_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA2_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA2_DMAADDR_OFFSET 0x954 #define GC_USB_DTXFSTS2_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS2_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS2_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS2_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS2_INEPTXFSPCAVAIL_OFFSET 0x958 #define GC_USB_DIEPDMAB2_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB2_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB2_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB2_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB2_DMABUFFERADDR_OFFSET 0x95c #define GC_USB_DIEPCTL3_MPS_LSB 0x0 #define GC_USB_DIEPCTL3_MPS_MASK 0x7ff #define GC_USB_DIEPCTL3_MPS_SIZE 0xb #define GC_USB_DIEPCTL3_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL3_MPS_OFFSET 0x960 #define GC_USB_DIEPCTL3_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL3_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL3_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL3_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL3_USBACTEP_OFFSET 0x960 #define GC_USB_DIEPCTL3_DPID_LSB 0x10 #define GC_USB_DIEPCTL3_DPID_MASK 0x10000 #define GC_USB_DIEPCTL3_DPID_SIZE 0x1 #define GC_USB_DIEPCTL3_DPID_DEFAULT 0x0 #define GC_USB_DIEPCTL3_DPID_OFFSET 0x960 #define GC_USB_DIEPCTL3_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL3_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL3_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL3_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL3_NAKSTS_OFFSET 0x960 #define GC_USB_DIEPCTL3_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL3_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL3_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL3_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL3_EPTYPE_OFFSET 0x960 #define GC_USB_DIEPCTL3_STALL_LSB 0x15 #define GC_USB_DIEPCTL3_STALL_MASK 0x200000 #define GC_USB_DIEPCTL3_STALL_SIZE 0x1 #define GC_USB_DIEPCTL3_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL3_STALL_OFFSET 0x960 #define GC_USB_DIEPCTL3_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL3_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL3_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL3_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL3_TXFNUM_OFFSET 0x960 #define GC_USB_DIEPCTL3_CNAK_LSB 0x1a #define GC_USB_DIEPCTL3_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL3_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL3_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL3_CNAK_OFFSET 0x960 #define GC_USB_DIEPCTL3_SNAK_LSB 0x1b #define GC_USB_DIEPCTL3_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL3_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL3_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL3_SNAK_OFFSET 0x960 #define GC_USB_DIEPCTL3_SETD0PID_LSB 0x1c #define GC_USB_DIEPCTL3_SETD0PID_MASK 0x10000000 #define GC_USB_DIEPCTL3_SETD0PID_SIZE 0x1 #define GC_USB_DIEPCTL3_SETD0PID_DEFAULT 0x0 #define GC_USB_DIEPCTL3_SETD0PID_OFFSET 0x960 #define GC_USB_DIEPCTL3_SETD1PID_LSB 0x1d #define GC_USB_DIEPCTL3_SETD1PID_MASK 0x20000000 #define GC_USB_DIEPCTL3_SETD1PID_SIZE 0x1 #define GC_USB_DIEPCTL3_SETD1PID_DEFAULT 0x0 #define GC_USB_DIEPCTL3_SETD1PID_OFFSET 0x960 #define GC_USB_DIEPCTL3_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL3_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL3_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL3_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL3_EPDIS_OFFSET 0x960 #define GC_USB_DIEPCTL3_EPENA_LSB 0x1f #define GC_USB_DIEPCTL3_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL3_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL3_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL3_EPENA_OFFSET 0x960 #define GC_USB_DIEPINT3_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT3_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT3_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT3_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT3_XFERCOMPL_OFFSET 0x968 #define GC_USB_DIEPINT3_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT3_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT3_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT3_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT3_EPDISBLD_OFFSET 0x968 #define GC_USB_DIEPINT3_AHBERR_LSB 0x2 #define GC_USB_DIEPINT3_AHBERR_MASK 0x4 #define GC_USB_DIEPINT3_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT3_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT3_AHBERR_OFFSET 0x968 #define GC_USB_DIEPINT3_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT3_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT3_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT3_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT3_TIMEOUT_OFFSET 0x968 #define GC_USB_DIEPINT3_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT3_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT3_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT3_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT3_INTKNTXFEMP_OFFSET 0x968 #define GC_USB_DIEPINT3_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT3_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT3_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT3_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT3_INTKNEPMIS_OFFSET 0x968 #define GC_USB_DIEPINT3_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT3_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT3_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT3_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT3_INEPNAKEFF_OFFSET 0x968 #define GC_USB_DIEPINT3_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT3_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT3_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT3_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT3_TXFEMP_OFFSET 0x968 #define GC_USB_DIEPINT3_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT3_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT3_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT3_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT3_TXFIFOUNDRN_OFFSET 0x968 #define GC_USB_DIEPINT3_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT3_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT3_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT3_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT3_BNAINTR_OFFSET 0x968 #define GC_USB_DIEPINT3_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT3_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT3_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT3_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT3_PKTDRPSTS_OFFSET 0x968 #define GC_USB_DIEPINT3_BBLEERR_LSB 0xc #define GC_USB_DIEPINT3_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT3_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT3_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT3_BBLEERR_OFFSET 0x968 #define GC_USB_DIEPINT3_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT3_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT3_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT3_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT3_NAKINTRPT_OFFSET 0x968 #define GC_USB_DIEPINT3_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT3_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT3_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT3_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT3_NYETINTRPT_OFFSET 0x968 #define GC_USB_DIEPTSIZ3_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ3_XFERSIZE_MASK 0x7ffff #define GC_USB_DIEPTSIZ3_XFERSIZE_SIZE 0x13 #define GC_USB_DIEPTSIZ3_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ3_XFERSIZE_OFFSET 0x970 #define GC_USB_DIEPTSIZ3_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ3_PKTCNT_MASK 0x1ff80000 #define GC_USB_DIEPTSIZ3_PKTCNT_SIZE 0xa #define GC_USB_DIEPTSIZ3_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ3_PKTCNT_OFFSET 0x970 #define GC_USB_DIEPTSIZ3_MC_LSB 0x1d #define GC_USB_DIEPTSIZ3_MC_MASK 0x60000000 #define GC_USB_DIEPTSIZ3_MC_SIZE 0x2 #define GC_USB_DIEPTSIZ3_MC_DEFAULT 0x0 #define GC_USB_DIEPTSIZ3_MC_OFFSET 0x970 #define GC_USB_DIEPDMA3_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA3_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA3_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA3_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA3_DMAADDR_OFFSET 0x974 #define GC_USB_DTXFSTS3_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS3_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS3_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS3_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS3_INEPTXFSPCAVAIL_OFFSET 0x978 #define GC_USB_DIEPDMAB3_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB3_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB3_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB3_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB3_DMABUFFERADDR_OFFSET 0x97c #define GC_USB_DIEPCTL4_MPS_LSB 0x0 #define GC_USB_DIEPCTL4_MPS_MASK 0x7ff #define GC_USB_DIEPCTL4_MPS_SIZE 0xb #define GC_USB_DIEPCTL4_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL4_MPS_OFFSET 0x980 #define GC_USB_DIEPCTL4_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL4_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL4_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL4_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL4_USBACTEP_OFFSET 0x980 #define GC_USB_DIEPCTL4_DPID_LSB 0x10 #define GC_USB_DIEPCTL4_DPID_MASK 0x10000 #define GC_USB_DIEPCTL4_DPID_SIZE 0x1 #define GC_USB_DIEPCTL4_DPID_DEFAULT 0x0 #define GC_USB_DIEPCTL4_DPID_OFFSET 0x980 #define GC_USB_DIEPCTL4_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL4_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL4_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL4_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL4_NAKSTS_OFFSET 0x980 #define GC_USB_DIEPCTL4_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL4_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL4_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL4_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL4_EPTYPE_OFFSET 0x980 #define GC_USB_DIEPCTL4_STALL_LSB 0x15 #define GC_USB_DIEPCTL4_STALL_MASK 0x200000 #define GC_USB_DIEPCTL4_STALL_SIZE 0x1 #define GC_USB_DIEPCTL4_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL4_STALL_OFFSET 0x980 #define GC_USB_DIEPCTL4_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL4_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL4_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL4_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL4_TXFNUM_OFFSET 0x980 #define GC_USB_DIEPCTL4_CNAK_LSB 0x1a #define GC_USB_DIEPCTL4_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL4_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL4_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL4_CNAK_OFFSET 0x980 #define GC_USB_DIEPCTL4_SNAK_LSB 0x1b #define GC_USB_DIEPCTL4_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL4_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL4_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL4_SNAK_OFFSET 0x980 #define GC_USB_DIEPCTL4_SETD0PID_LSB 0x1c #define GC_USB_DIEPCTL4_SETD0PID_MASK 0x10000000 #define GC_USB_DIEPCTL4_SETD0PID_SIZE 0x1 #define GC_USB_DIEPCTL4_SETD0PID_DEFAULT 0x0 #define GC_USB_DIEPCTL4_SETD0PID_OFFSET 0x980 #define GC_USB_DIEPCTL4_SETD1PID_LSB 0x1d #define GC_USB_DIEPCTL4_SETD1PID_MASK 0x20000000 #define GC_USB_DIEPCTL4_SETD1PID_SIZE 0x1 #define GC_USB_DIEPCTL4_SETD1PID_DEFAULT 0x0 #define GC_USB_DIEPCTL4_SETD1PID_OFFSET 0x980 #define GC_USB_DIEPCTL4_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL4_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL4_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL4_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL4_EPDIS_OFFSET 0x980 #define GC_USB_DIEPCTL4_EPENA_LSB 0x1f #define GC_USB_DIEPCTL4_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL4_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL4_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL4_EPENA_OFFSET 0x980 #define GC_USB_DIEPINT4_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT4_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT4_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT4_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT4_XFERCOMPL_OFFSET 0x988 #define GC_USB_DIEPINT4_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT4_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT4_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT4_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT4_EPDISBLD_OFFSET 0x988 #define GC_USB_DIEPINT4_AHBERR_LSB 0x2 #define GC_USB_DIEPINT4_AHBERR_MASK 0x4 #define GC_USB_DIEPINT4_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT4_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT4_AHBERR_OFFSET 0x988 #define GC_USB_DIEPINT4_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT4_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT4_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT4_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT4_TIMEOUT_OFFSET 0x988 #define GC_USB_DIEPINT4_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT4_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT4_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT4_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT4_INTKNTXFEMP_OFFSET 0x988 #define GC_USB_DIEPINT4_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT4_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT4_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT4_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT4_INTKNEPMIS_OFFSET 0x988 #define GC_USB_DIEPINT4_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT4_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT4_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT4_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT4_INEPNAKEFF_OFFSET 0x988 #define GC_USB_DIEPINT4_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT4_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT4_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT4_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT4_TXFEMP_OFFSET 0x988 #define GC_USB_DIEPINT4_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT4_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT4_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT4_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT4_TXFIFOUNDRN_OFFSET 0x988 #define GC_USB_DIEPINT4_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT4_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT4_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT4_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT4_BNAINTR_OFFSET 0x988 #define GC_USB_DIEPINT4_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT4_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT4_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT4_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT4_PKTDRPSTS_OFFSET 0x988 #define GC_USB_DIEPINT4_BBLEERR_LSB 0xc #define GC_USB_DIEPINT4_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT4_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT4_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT4_BBLEERR_OFFSET 0x988 #define GC_USB_DIEPINT4_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT4_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT4_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT4_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT4_NAKINTRPT_OFFSET 0x988 #define GC_USB_DIEPINT4_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT4_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT4_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT4_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT4_NYETINTRPT_OFFSET 0x988 #define GC_USB_DIEPTSIZ4_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ4_XFERSIZE_MASK 0x7ffff #define GC_USB_DIEPTSIZ4_XFERSIZE_SIZE 0x13 #define GC_USB_DIEPTSIZ4_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ4_XFERSIZE_OFFSET 0x990 #define GC_USB_DIEPTSIZ4_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ4_PKTCNT_MASK 0x1ff80000 #define GC_USB_DIEPTSIZ4_PKTCNT_SIZE 0xa #define GC_USB_DIEPTSIZ4_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ4_PKTCNT_OFFSET 0x990 #define GC_USB_DIEPTSIZ4_MC_LSB 0x1d #define GC_USB_DIEPTSIZ4_MC_MASK 0x60000000 #define GC_USB_DIEPTSIZ4_MC_SIZE 0x2 #define GC_USB_DIEPTSIZ4_MC_DEFAULT 0x0 #define GC_USB_DIEPTSIZ4_MC_OFFSET 0x990 #define GC_USB_DIEPDMA4_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA4_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA4_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA4_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA4_DMAADDR_OFFSET 0x994 #define GC_USB_DTXFSTS4_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS4_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS4_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS4_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS4_INEPTXFSPCAVAIL_OFFSET 0x998 #define GC_USB_DIEPDMAB4_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB4_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB4_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB4_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB4_DMABUFFERADDR_OFFSET 0x99c #define GC_USB_DIEPCTL5_MPS_LSB 0x0 #define GC_USB_DIEPCTL5_MPS_MASK 0x7ff #define GC_USB_DIEPCTL5_MPS_SIZE 0xb #define GC_USB_DIEPCTL5_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL5_MPS_OFFSET 0x9a0 #define GC_USB_DIEPCTL5_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL5_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL5_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL5_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL5_USBACTEP_OFFSET 0x9a0 #define GC_USB_DIEPCTL5_DPID_LSB 0x10 #define GC_USB_DIEPCTL5_DPID_MASK 0x10000 #define GC_USB_DIEPCTL5_DPID_SIZE 0x1 #define GC_USB_DIEPCTL5_DPID_DEFAULT 0x0 #define GC_USB_DIEPCTL5_DPID_OFFSET 0x9a0 #define GC_USB_DIEPCTL5_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL5_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL5_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL5_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL5_NAKSTS_OFFSET 0x9a0 #define GC_USB_DIEPCTL5_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL5_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL5_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL5_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL5_EPTYPE_OFFSET 0x9a0 #define GC_USB_DIEPCTL5_STALL_LSB 0x15 #define GC_USB_DIEPCTL5_STALL_MASK 0x200000 #define GC_USB_DIEPCTL5_STALL_SIZE 0x1 #define GC_USB_DIEPCTL5_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL5_STALL_OFFSET 0x9a0 #define GC_USB_DIEPCTL5_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL5_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL5_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL5_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL5_TXFNUM_OFFSET 0x9a0 #define GC_USB_DIEPCTL5_CNAK_LSB 0x1a #define GC_USB_DIEPCTL5_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL5_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL5_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL5_CNAK_OFFSET 0x9a0 #define GC_USB_DIEPCTL5_SNAK_LSB 0x1b #define GC_USB_DIEPCTL5_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL5_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL5_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL5_SNAK_OFFSET 0x9a0 #define GC_USB_DIEPCTL5_SETD0PID_LSB 0x1c #define GC_USB_DIEPCTL5_SETD0PID_MASK 0x10000000 #define GC_USB_DIEPCTL5_SETD0PID_SIZE 0x1 #define GC_USB_DIEPCTL5_SETD0PID_DEFAULT 0x0 #define GC_USB_DIEPCTL5_SETD0PID_OFFSET 0x9a0 #define GC_USB_DIEPCTL5_SETD1PID_LSB 0x1d #define GC_USB_DIEPCTL5_SETD1PID_MASK 0x20000000 #define GC_USB_DIEPCTL5_SETD1PID_SIZE 0x1 #define GC_USB_DIEPCTL5_SETD1PID_DEFAULT 0x0 #define GC_USB_DIEPCTL5_SETD1PID_OFFSET 0x9a0 #define GC_USB_DIEPCTL5_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL5_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL5_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL5_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL5_EPDIS_OFFSET 0x9a0 #define GC_USB_DIEPCTL5_EPENA_LSB 0x1f #define GC_USB_DIEPCTL5_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL5_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL5_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL5_EPENA_OFFSET 0x9a0 #define GC_USB_DIEPINT5_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT5_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT5_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT5_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT5_XFERCOMPL_OFFSET 0x9a8 #define GC_USB_DIEPINT5_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT5_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT5_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT5_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT5_EPDISBLD_OFFSET 0x9a8 #define GC_USB_DIEPINT5_AHBERR_LSB 0x2 #define GC_USB_DIEPINT5_AHBERR_MASK 0x4 #define GC_USB_DIEPINT5_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT5_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT5_AHBERR_OFFSET 0x9a8 #define GC_USB_DIEPINT5_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT5_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT5_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT5_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT5_TIMEOUT_OFFSET 0x9a8 #define GC_USB_DIEPINT5_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT5_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT5_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT5_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT5_INTKNTXFEMP_OFFSET 0x9a8 #define GC_USB_DIEPINT5_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT5_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT5_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT5_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT5_INTKNEPMIS_OFFSET 0x9a8 #define GC_USB_DIEPINT5_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT5_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT5_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT5_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT5_INEPNAKEFF_OFFSET 0x9a8 #define GC_USB_DIEPINT5_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT5_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT5_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT5_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT5_TXFEMP_OFFSET 0x9a8 #define GC_USB_DIEPINT5_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT5_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT5_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT5_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT5_TXFIFOUNDRN_OFFSET 0x9a8 #define GC_USB_DIEPINT5_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT5_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT5_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT5_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT5_BNAINTR_OFFSET 0x9a8 #define GC_USB_DIEPINT5_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT5_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT5_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT5_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT5_PKTDRPSTS_OFFSET 0x9a8 #define GC_USB_DIEPINT5_BBLEERR_LSB 0xc #define GC_USB_DIEPINT5_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT5_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT5_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT5_BBLEERR_OFFSET 0x9a8 #define GC_USB_DIEPINT5_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT5_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT5_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT5_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT5_NAKINTRPT_OFFSET 0x9a8 #define GC_USB_DIEPINT5_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT5_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT5_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT5_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT5_NYETINTRPT_OFFSET 0x9a8 #define GC_USB_DIEPTSIZ5_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ5_XFERSIZE_MASK 0x7ffff #define GC_USB_DIEPTSIZ5_XFERSIZE_SIZE 0x13 #define GC_USB_DIEPTSIZ5_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ5_XFERSIZE_OFFSET 0x9b0 #define GC_USB_DIEPTSIZ5_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ5_PKTCNT_MASK 0x1ff80000 #define GC_USB_DIEPTSIZ5_PKTCNT_SIZE 0xa #define GC_USB_DIEPTSIZ5_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ5_PKTCNT_OFFSET 0x9b0 #define GC_USB_DIEPTSIZ5_MC_LSB 0x1d #define GC_USB_DIEPTSIZ5_MC_MASK 0x60000000 #define GC_USB_DIEPTSIZ5_MC_SIZE 0x2 #define GC_USB_DIEPTSIZ5_MC_DEFAULT 0x0 #define GC_USB_DIEPTSIZ5_MC_OFFSET 0x9b0 #define GC_USB_DIEPDMA5_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA5_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA5_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA5_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA5_DMAADDR_OFFSET 0x9b4 #define GC_USB_DTXFSTS5_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS5_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS5_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS5_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS5_INEPTXFSPCAVAIL_OFFSET 0x9b8 #define GC_USB_DIEPDMAB5_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB5_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB5_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB5_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB5_DMABUFFERADDR_OFFSET 0x9bc #define GC_USB_DIEPCTL6_MPS_LSB 0x0 #define GC_USB_DIEPCTL6_MPS_MASK 0x7ff #define GC_USB_DIEPCTL6_MPS_SIZE 0xb #define GC_USB_DIEPCTL6_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL6_MPS_OFFSET 0x9c0 #define GC_USB_DIEPCTL6_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL6_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL6_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL6_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL6_USBACTEP_OFFSET 0x9c0 #define GC_USB_DIEPCTL6_DPID_LSB 0x10 #define GC_USB_DIEPCTL6_DPID_MASK 0x10000 #define GC_USB_DIEPCTL6_DPID_SIZE 0x1 #define GC_USB_DIEPCTL6_DPID_DEFAULT 0x0 #define GC_USB_DIEPCTL6_DPID_OFFSET 0x9c0 #define GC_USB_DIEPCTL6_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL6_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL6_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL6_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL6_NAKSTS_OFFSET 0x9c0 #define GC_USB_DIEPCTL6_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL6_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL6_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL6_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL6_EPTYPE_OFFSET 0x9c0 #define GC_USB_DIEPCTL6_STALL_LSB 0x15 #define GC_USB_DIEPCTL6_STALL_MASK 0x200000 #define GC_USB_DIEPCTL6_STALL_SIZE 0x1 #define GC_USB_DIEPCTL6_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL6_STALL_OFFSET 0x9c0 #define GC_USB_DIEPCTL6_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL6_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL6_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL6_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL6_TXFNUM_OFFSET 0x9c0 #define GC_USB_DIEPCTL6_CNAK_LSB 0x1a #define GC_USB_DIEPCTL6_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL6_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL6_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL6_CNAK_OFFSET 0x9c0 #define GC_USB_DIEPCTL6_SNAK_LSB 0x1b #define GC_USB_DIEPCTL6_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL6_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL6_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL6_SNAK_OFFSET 0x9c0 #define GC_USB_DIEPCTL6_SETD0PID_LSB 0x1c #define GC_USB_DIEPCTL6_SETD0PID_MASK 0x10000000 #define GC_USB_DIEPCTL6_SETD0PID_SIZE 0x1 #define GC_USB_DIEPCTL6_SETD0PID_DEFAULT 0x0 #define GC_USB_DIEPCTL6_SETD0PID_OFFSET 0x9c0 #define GC_USB_DIEPCTL6_SETD1PID_LSB 0x1d #define GC_USB_DIEPCTL6_SETD1PID_MASK 0x20000000 #define GC_USB_DIEPCTL6_SETD1PID_SIZE 0x1 #define GC_USB_DIEPCTL6_SETD1PID_DEFAULT 0x0 #define GC_USB_DIEPCTL6_SETD1PID_OFFSET 0x9c0 #define GC_USB_DIEPCTL6_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL6_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL6_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL6_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL6_EPDIS_OFFSET 0x9c0 #define GC_USB_DIEPCTL6_EPENA_LSB 0x1f #define GC_USB_DIEPCTL6_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL6_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL6_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL6_EPENA_OFFSET 0x9c0 #define GC_USB_DIEPINT6_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT6_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT6_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT6_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT6_XFERCOMPL_OFFSET 0x9c8 #define GC_USB_DIEPINT6_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT6_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT6_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT6_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT6_EPDISBLD_OFFSET 0x9c8 #define GC_USB_DIEPINT6_AHBERR_LSB 0x2 #define GC_USB_DIEPINT6_AHBERR_MASK 0x4 #define GC_USB_DIEPINT6_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT6_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT6_AHBERR_OFFSET 0x9c8 #define GC_USB_DIEPINT6_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT6_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT6_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT6_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT6_TIMEOUT_OFFSET 0x9c8 #define GC_USB_DIEPINT6_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT6_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT6_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT6_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT6_INTKNTXFEMP_OFFSET 0x9c8 #define GC_USB_DIEPINT6_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT6_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT6_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT6_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT6_INTKNEPMIS_OFFSET 0x9c8 #define GC_USB_DIEPINT6_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT6_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT6_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT6_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT6_INEPNAKEFF_OFFSET 0x9c8 #define GC_USB_DIEPINT6_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT6_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT6_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT6_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT6_TXFEMP_OFFSET 0x9c8 #define GC_USB_DIEPINT6_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT6_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT6_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT6_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT6_TXFIFOUNDRN_OFFSET 0x9c8 #define GC_USB_DIEPINT6_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT6_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT6_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT6_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT6_BNAINTR_OFFSET 0x9c8 #define GC_USB_DIEPINT6_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT6_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT6_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT6_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT6_PKTDRPSTS_OFFSET 0x9c8 #define GC_USB_DIEPINT6_BBLEERR_LSB 0xc #define GC_USB_DIEPINT6_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT6_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT6_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT6_BBLEERR_OFFSET 0x9c8 #define GC_USB_DIEPINT6_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT6_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT6_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT6_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT6_NAKINTRPT_OFFSET 0x9c8 #define GC_USB_DIEPINT6_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT6_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT6_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT6_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT6_NYETINTRPT_OFFSET 0x9c8 #define GC_USB_DIEPTSIZ6_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ6_XFERSIZE_MASK 0x7ffff #define GC_USB_DIEPTSIZ6_XFERSIZE_SIZE 0x13 #define GC_USB_DIEPTSIZ6_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ6_XFERSIZE_OFFSET 0x9d0 #define GC_USB_DIEPTSIZ6_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ6_PKTCNT_MASK 0x1ff80000 #define GC_USB_DIEPTSIZ6_PKTCNT_SIZE 0xa #define GC_USB_DIEPTSIZ6_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ6_PKTCNT_OFFSET 0x9d0 #define GC_USB_DIEPTSIZ6_MC_LSB 0x1d #define GC_USB_DIEPTSIZ6_MC_MASK 0x60000000 #define GC_USB_DIEPTSIZ6_MC_SIZE 0x2 #define GC_USB_DIEPTSIZ6_MC_DEFAULT 0x0 #define GC_USB_DIEPTSIZ6_MC_OFFSET 0x9d0 #define GC_USB_DIEPDMA6_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA6_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA6_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA6_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA6_DMAADDR_OFFSET 0x9d4 #define GC_USB_DTXFSTS6_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS6_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS6_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS6_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS6_INEPTXFSPCAVAIL_OFFSET 0x9d8 #define GC_USB_DIEPDMAB6_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB6_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB6_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB6_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB6_DMABUFFERADDR_OFFSET 0x9dc #define GC_USB_DIEPCTL7_MPS_LSB 0x0 #define GC_USB_DIEPCTL7_MPS_MASK 0x7ff #define GC_USB_DIEPCTL7_MPS_SIZE 0xb #define GC_USB_DIEPCTL7_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL7_MPS_OFFSET 0x9e0 #define GC_USB_DIEPCTL7_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL7_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL7_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL7_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL7_USBACTEP_OFFSET 0x9e0 #define GC_USB_DIEPCTL7_DPID_LSB 0x10 #define GC_USB_DIEPCTL7_DPID_MASK 0x10000 #define GC_USB_DIEPCTL7_DPID_SIZE 0x1 #define GC_USB_DIEPCTL7_DPID_DEFAULT 0x0 #define GC_USB_DIEPCTL7_DPID_OFFSET 0x9e0 #define GC_USB_DIEPCTL7_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL7_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL7_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL7_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL7_NAKSTS_OFFSET 0x9e0 #define GC_USB_DIEPCTL7_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL7_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL7_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL7_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL7_EPTYPE_OFFSET 0x9e0 #define GC_USB_DIEPCTL7_STALL_LSB 0x15 #define GC_USB_DIEPCTL7_STALL_MASK 0x200000 #define GC_USB_DIEPCTL7_STALL_SIZE 0x1 #define GC_USB_DIEPCTL7_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL7_STALL_OFFSET 0x9e0 #define GC_USB_DIEPCTL7_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL7_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL7_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL7_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL7_TXFNUM_OFFSET 0x9e0 #define GC_USB_DIEPCTL7_CNAK_LSB 0x1a #define GC_USB_DIEPCTL7_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL7_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL7_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL7_CNAK_OFFSET 0x9e0 #define GC_USB_DIEPCTL7_SNAK_LSB 0x1b #define GC_USB_DIEPCTL7_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL7_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL7_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL7_SNAK_OFFSET 0x9e0 #define GC_USB_DIEPCTL7_SETD0PID_LSB 0x1c #define GC_USB_DIEPCTL7_SETD0PID_MASK 0x10000000 #define GC_USB_DIEPCTL7_SETD0PID_SIZE 0x1 #define GC_USB_DIEPCTL7_SETD0PID_DEFAULT 0x0 #define GC_USB_DIEPCTL7_SETD0PID_OFFSET 0x9e0 #define GC_USB_DIEPCTL7_SETD1PID_LSB 0x1d #define GC_USB_DIEPCTL7_SETD1PID_MASK 0x20000000 #define GC_USB_DIEPCTL7_SETD1PID_SIZE 0x1 #define GC_USB_DIEPCTL7_SETD1PID_DEFAULT 0x0 #define GC_USB_DIEPCTL7_SETD1PID_OFFSET 0x9e0 #define GC_USB_DIEPCTL7_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL7_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL7_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL7_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL7_EPDIS_OFFSET 0x9e0 #define GC_USB_DIEPCTL7_EPENA_LSB 0x1f #define GC_USB_DIEPCTL7_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL7_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL7_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL7_EPENA_OFFSET 0x9e0 #define GC_USB_DIEPINT7_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT7_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT7_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT7_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT7_XFERCOMPL_OFFSET 0x9e8 #define GC_USB_DIEPINT7_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT7_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT7_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT7_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT7_EPDISBLD_OFFSET 0x9e8 #define GC_USB_DIEPINT7_AHBERR_LSB 0x2 #define GC_USB_DIEPINT7_AHBERR_MASK 0x4 #define GC_USB_DIEPINT7_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT7_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT7_AHBERR_OFFSET 0x9e8 #define GC_USB_DIEPINT7_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT7_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT7_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT7_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT7_TIMEOUT_OFFSET 0x9e8 #define GC_USB_DIEPINT7_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT7_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT7_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT7_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT7_INTKNTXFEMP_OFFSET 0x9e8 #define GC_USB_DIEPINT7_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT7_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT7_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT7_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT7_INTKNEPMIS_OFFSET 0x9e8 #define GC_USB_DIEPINT7_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT7_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT7_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT7_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT7_INEPNAKEFF_OFFSET 0x9e8 #define GC_USB_DIEPINT7_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT7_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT7_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT7_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT7_TXFEMP_OFFSET 0x9e8 #define GC_USB_DIEPINT7_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT7_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT7_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT7_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT7_TXFIFOUNDRN_OFFSET 0x9e8 #define GC_USB_DIEPINT7_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT7_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT7_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT7_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT7_BNAINTR_OFFSET 0x9e8 #define GC_USB_DIEPINT7_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT7_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT7_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT7_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT7_PKTDRPSTS_OFFSET 0x9e8 #define GC_USB_DIEPINT7_BBLEERR_LSB 0xc #define GC_USB_DIEPINT7_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT7_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT7_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT7_BBLEERR_OFFSET 0x9e8 #define GC_USB_DIEPINT7_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT7_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT7_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT7_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT7_NAKINTRPT_OFFSET 0x9e8 #define GC_USB_DIEPINT7_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT7_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT7_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT7_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT7_NYETINTRPT_OFFSET 0x9e8 #define GC_USB_DIEPTSIZ7_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ7_XFERSIZE_MASK 0x7ffff #define GC_USB_DIEPTSIZ7_XFERSIZE_SIZE 0x13 #define GC_USB_DIEPTSIZ7_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ7_XFERSIZE_OFFSET 0x9f0 #define GC_USB_DIEPTSIZ7_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ7_PKTCNT_MASK 0x1ff80000 #define GC_USB_DIEPTSIZ7_PKTCNT_SIZE 0xa #define GC_USB_DIEPTSIZ7_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ7_PKTCNT_OFFSET 0x9f0 #define GC_USB_DIEPTSIZ7_MC_LSB 0x1d #define GC_USB_DIEPTSIZ7_MC_MASK 0x60000000 #define GC_USB_DIEPTSIZ7_MC_SIZE 0x2 #define GC_USB_DIEPTSIZ7_MC_DEFAULT 0x0 #define GC_USB_DIEPTSIZ7_MC_OFFSET 0x9f0 #define GC_USB_DIEPDMA7_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA7_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA7_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA7_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA7_DMAADDR_OFFSET 0x9f4 #define GC_USB_DTXFSTS7_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS7_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS7_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS7_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS7_INEPTXFSPCAVAIL_OFFSET 0x9f8 #define GC_USB_DIEPDMAB7_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB7_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB7_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB7_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB7_DMABUFFERADDR_OFFSET 0x9fc #define GC_USB_DIEPCTL8_MPS_LSB 0x0 #define GC_USB_DIEPCTL8_MPS_MASK 0x7ff #define GC_USB_DIEPCTL8_MPS_SIZE 0xb #define GC_USB_DIEPCTL8_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL8_MPS_OFFSET 0xa00 #define GC_USB_DIEPCTL8_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL8_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL8_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL8_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL8_USBACTEP_OFFSET 0xa00 #define GC_USB_DIEPCTL8_DPID_LSB 0x10 #define GC_USB_DIEPCTL8_DPID_MASK 0x10000 #define GC_USB_DIEPCTL8_DPID_SIZE 0x1 #define GC_USB_DIEPCTL8_DPID_DEFAULT 0x0 #define GC_USB_DIEPCTL8_DPID_OFFSET 0xa00 #define GC_USB_DIEPCTL8_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL8_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL8_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL8_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL8_NAKSTS_OFFSET 0xa00 #define GC_USB_DIEPCTL8_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL8_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL8_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL8_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL8_EPTYPE_OFFSET 0xa00 #define GC_USB_DIEPCTL8_STALL_LSB 0x15 #define GC_USB_DIEPCTL8_STALL_MASK 0x200000 #define GC_USB_DIEPCTL8_STALL_SIZE 0x1 #define GC_USB_DIEPCTL8_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL8_STALL_OFFSET 0xa00 #define GC_USB_DIEPCTL8_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL8_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL8_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL8_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL8_TXFNUM_OFFSET 0xa00 #define GC_USB_DIEPCTL8_CNAK_LSB 0x1a #define GC_USB_DIEPCTL8_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL8_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL8_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL8_CNAK_OFFSET 0xa00 #define GC_USB_DIEPCTL8_SNAK_LSB 0x1b #define GC_USB_DIEPCTL8_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL8_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL8_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL8_SNAK_OFFSET 0xa00 #define GC_USB_DIEPCTL8_SETD0PID_LSB 0x1c #define GC_USB_DIEPCTL8_SETD0PID_MASK 0x10000000 #define GC_USB_DIEPCTL8_SETD0PID_SIZE 0x1 #define GC_USB_DIEPCTL8_SETD0PID_DEFAULT 0x0 #define GC_USB_DIEPCTL8_SETD0PID_OFFSET 0xa00 #define GC_USB_DIEPCTL8_SETD1PID_LSB 0x1d #define GC_USB_DIEPCTL8_SETD1PID_MASK 0x20000000 #define GC_USB_DIEPCTL8_SETD1PID_SIZE 0x1 #define GC_USB_DIEPCTL8_SETD1PID_DEFAULT 0x0 #define GC_USB_DIEPCTL8_SETD1PID_OFFSET 0xa00 #define GC_USB_DIEPCTL8_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL8_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL8_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL8_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL8_EPDIS_OFFSET 0xa00 #define GC_USB_DIEPCTL8_EPENA_LSB 0x1f #define GC_USB_DIEPCTL8_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL8_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL8_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL8_EPENA_OFFSET 0xa00 #define GC_USB_DIEPINT8_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT8_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT8_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT8_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT8_XFERCOMPL_OFFSET 0xa08 #define GC_USB_DIEPINT8_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT8_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT8_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT8_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT8_EPDISBLD_OFFSET 0xa08 #define GC_USB_DIEPINT8_AHBERR_LSB 0x2 #define GC_USB_DIEPINT8_AHBERR_MASK 0x4 #define GC_USB_DIEPINT8_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT8_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT8_AHBERR_OFFSET 0xa08 #define GC_USB_DIEPINT8_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT8_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT8_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT8_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT8_TIMEOUT_OFFSET 0xa08 #define GC_USB_DIEPINT8_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT8_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT8_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT8_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT8_INTKNTXFEMP_OFFSET 0xa08 #define GC_USB_DIEPINT8_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT8_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT8_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT8_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT8_INTKNEPMIS_OFFSET 0xa08 #define GC_USB_DIEPINT8_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT8_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT8_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT8_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT8_INEPNAKEFF_OFFSET 0xa08 #define GC_USB_DIEPINT8_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT8_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT8_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT8_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT8_TXFEMP_OFFSET 0xa08 #define GC_USB_DIEPINT8_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT8_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT8_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT8_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT8_TXFIFOUNDRN_OFFSET 0xa08 #define GC_USB_DIEPINT8_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT8_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT8_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT8_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT8_BNAINTR_OFFSET 0xa08 #define GC_USB_DIEPINT8_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT8_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT8_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT8_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT8_PKTDRPSTS_OFFSET 0xa08 #define GC_USB_DIEPINT8_BBLEERR_LSB 0xc #define GC_USB_DIEPINT8_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT8_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT8_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT8_BBLEERR_OFFSET 0xa08 #define GC_USB_DIEPINT8_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT8_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT8_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT8_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT8_NAKINTRPT_OFFSET 0xa08 #define GC_USB_DIEPINT8_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT8_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT8_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT8_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT8_NYETINTRPT_OFFSET 0xa08 #define GC_USB_DIEPTSIZ8_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ8_XFERSIZE_MASK 0x7ffff #define GC_USB_DIEPTSIZ8_XFERSIZE_SIZE 0x13 #define GC_USB_DIEPTSIZ8_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ8_XFERSIZE_OFFSET 0xa10 #define GC_USB_DIEPTSIZ8_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ8_PKTCNT_MASK 0x1ff80000 #define GC_USB_DIEPTSIZ8_PKTCNT_SIZE 0xa #define GC_USB_DIEPTSIZ8_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ8_PKTCNT_OFFSET 0xa10 #define GC_USB_DIEPTSIZ8_MC_LSB 0x1d #define GC_USB_DIEPTSIZ8_MC_MASK 0x60000000 #define GC_USB_DIEPTSIZ8_MC_SIZE 0x2 #define GC_USB_DIEPTSIZ8_MC_DEFAULT 0x0 #define GC_USB_DIEPTSIZ8_MC_OFFSET 0xa10 #define GC_USB_DIEPDMA8_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA8_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA8_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA8_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA8_DMAADDR_OFFSET 0xa14 #define GC_USB_DTXFSTS8_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS8_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS8_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS8_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS8_INEPTXFSPCAVAIL_OFFSET 0xa18 #define GC_USB_DIEPDMAB8_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB8_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB8_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB8_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB8_DMABUFFERADDR_OFFSET 0xa1c #define GC_USB_DIEPCTL9_MPS_LSB 0x0 #define GC_USB_DIEPCTL9_MPS_MASK 0x7ff #define GC_USB_DIEPCTL9_MPS_SIZE 0xb #define GC_USB_DIEPCTL9_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL9_MPS_OFFSET 0xa20 #define GC_USB_DIEPCTL9_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL9_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL9_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL9_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL9_USBACTEP_OFFSET 0xa20 #define GC_USB_DIEPCTL9_DPID_LSB 0x10 #define GC_USB_DIEPCTL9_DPID_MASK 0x10000 #define GC_USB_DIEPCTL9_DPID_SIZE 0x1 #define GC_USB_DIEPCTL9_DPID_DEFAULT 0x0 #define GC_USB_DIEPCTL9_DPID_OFFSET 0xa20 #define GC_USB_DIEPCTL9_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL9_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL9_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL9_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL9_NAKSTS_OFFSET 0xa20 #define GC_USB_DIEPCTL9_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL9_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL9_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL9_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL9_EPTYPE_OFFSET 0xa20 #define GC_USB_DIEPCTL9_STALL_LSB 0x15 #define GC_USB_DIEPCTL9_STALL_MASK 0x200000 #define GC_USB_DIEPCTL9_STALL_SIZE 0x1 #define GC_USB_DIEPCTL9_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL9_STALL_OFFSET 0xa20 #define GC_USB_DIEPCTL9_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL9_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL9_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL9_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL9_TXFNUM_OFFSET 0xa20 #define GC_USB_DIEPCTL9_CNAK_LSB 0x1a #define GC_USB_DIEPCTL9_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL9_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL9_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL9_CNAK_OFFSET 0xa20 #define GC_USB_DIEPCTL9_SNAK_LSB 0x1b #define GC_USB_DIEPCTL9_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL9_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL9_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL9_SNAK_OFFSET 0xa20 #define GC_USB_DIEPCTL9_SETD0PID_LSB 0x1c #define GC_USB_DIEPCTL9_SETD0PID_MASK 0x10000000 #define GC_USB_DIEPCTL9_SETD0PID_SIZE 0x1 #define GC_USB_DIEPCTL9_SETD0PID_DEFAULT 0x0 #define GC_USB_DIEPCTL9_SETD0PID_OFFSET 0xa20 #define GC_USB_DIEPCTL9_SETD1PID_LSB 0x1d #define GC_USB_DIEPCTL9_SETD1PID_MASK 0x20000000 #define GC_USB_DIEPCTL9_SETD1PID_SIZE 0x1 #define GC_USB_DIEPCTL9_SETD1PID_DEFAULT 0x0 #define GC_USB_DIEPCTL9_SETD1PID_OFFSET 0xa20 #define GC_USB_DIEPCTL9_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL9_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL9_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL9_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL9_EPDIS_OFFSET 0xa20 #define GC_USB_DIEPCTL9_EPENA_LSB 0x1f #define GC_USB_DIEPCTL9_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL9_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL9_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL9_EPENA_OFFSET 0xa20 #define GC_USB_DIEPINT9_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT9_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT9_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT9_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT9_XFERCOMPL_OFFSET 0xa28 #define GC_USB_DIEPINT9_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT9_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT9_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT9_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT9_EPDISBLD_OFFSET 0xa28 #define GC_USB_DIEPINT9_AHBERR_LSB 0x2 #define GC_USB_DIEPINT9_AHBERR_MASK 0x4 #define GC_USB_DIEPINT9_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT9_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT9_AHBERR_OFFSET 0xa28 #define GC_USB_DIEPINT9_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT9_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT9_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT9_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT9_TIMEOUT_OFFSET 0xa28 #define GC_USB_DIEPINT9_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT9_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT9_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT9_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT9_INTKNTXFEMP_OFFSET 0xa28 #define GC_USB_DIEPINT9_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT9_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT9_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT9_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT9_INTKNEPMIS_OFFSET 0xa28 #define GC_USB_DIEPINT9_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT9_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT9_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT9_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT9_INEPNAKEFF_OFFSET 0xa28 #define GC_USB_DIEPINT9_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT9_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT9_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT9_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT9_TXFEMP_OFFSET 0xa28 #define GC_USB_DIEPINT9_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT9_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT9_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT9_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT9_TXFIFOUNDRN_OFFSET 0xa28 #define GC_USB_DIEPINT9_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT9_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT9_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT9_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT9_BNAINTR_OFFSET 0xa28 #define GC_USB_DIEPINT9_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT9_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT9_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT9_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT9_PKTDRPSTS_OFFSET 0xa28 #define GC_USB_DIEPINT9_BBLEERR_LSB 0xc #define GC_USB_DIEPINT9_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT9_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT9_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT9_BBLEERR_OFFSET 0xa28 #define GC_USB_DIEPINT9_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT9_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT9_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT9_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT9_NAKINTRPT_OFFSET 0xa28 #define GC_USB_DIEPINT9_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT9_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT9_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT9_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT9_NYETINTRPT_OFFSET 0xa28 #define GC_USB_DIEPTSIZ9_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ9_XFERSIZE_MASK 0x7ffff #define GC_USB_DIEPTSIZ9_XFERSIZE_SIZE 0x13 #define GC_USB_DIEPTSIZ9_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ9_XFERSIZE_OFFSET 0xa30 #define GC_USB_DIEPTSIZ9_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ9_PKTCNT_MASK 0x1ff80000 #define GC_USB_DIEPTSIZ9_PKTCNT_SIZE 0xa #define GC_USB_DIEPTSIZ9_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ9_PKTCNT_OFFSET 0xa30 #define GC_USB_DIEPTSIZ9_MC_LSB 0x1d #define GC_USB_DIEPTSIZ9_MC_MASK 0x60000000 #define GC_USB_DIEPTSIZ9_MC_SIZE 0x2 #define GC_USB_DIEPTSIZ9_MC_DEFAULT 0x0 #define GC_USB_DIEPTSIZ9_MC_OFFSET 0xa30 #define GC_USB_DIEPDMA9_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA9_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA9_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA9_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA9_DMAADDR_OFFSET 0xa34 #define GC_USB_DTXFSTS9_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS9_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS9_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS9_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS9_INEPTXFSPCAVAIL_OFFSET 0xa38 #define GC_USB_DIEPDMAB9_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB9_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB9_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB9_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB9_DMABUFFERADDR_OFFSET 0xa3c #define GC_USB_DIEPCTL10_MPS_LSB 0x0 #define GC_USB_DIEPCTL10_MPS_MASK 0x7ff #define GC_USB_DIEPCTL10_MPS_SIZE 0xb #define GC_USB_DIEPCTL10_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL10_MPS_OFFSET 0xa40 #define GC_USB_DIEPCTL10_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL10_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL10_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL10_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL10_USBACTEP_OFFSET 0xa40 #define GC_USB_DIEPCTL10_DPID_LSB 0x10 #define GC_USB_DIEPCTL10_DPID_MASK 0x10000 #define GC_USB_DIEPCTL10_DPID_SIZE 0x1 #define GC_USB_DIEPCTL10_DPID_DEFAULT 0x0 #define GC_USB_DIEPCTL10_DPID_OFFSET 0xa40 #define GC_USB_DIEPCTL10_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL10_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL10_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL10_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL10_NAKSTS_OFFSET 0xa40 #define GC_USB_DIEPCTL10_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL10_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL10_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL10_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL10_EPTYPE_OFFSET 0xa40 #define GC_USB_DIEPCTL10_STALL_LSB 0x15 #define GC_USB_DIEPCTL10_STALL_MASK 0x200000 #define GC_USB_DIEPCTL10_STALL_SIZE 0x1 #define GC_USB_DIEPCTL10_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL10_STALL_OFFSET 0xa40 #define GC_USB_DIEPCTL10_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL10_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL10_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL10_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL10_TXFNUM_OFFSET 0xa40 #define GC_USB_DIEPCTL10_CNAK_LSB 0x1a #define GC_USB_DIEPCTL10_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL10_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL10_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL10_CNAK_OFFSET 0xa40 #define GC_USB_DIEPCTL10_SNAK_LSB 0x1b #define GC_USB_DIEPCTL10_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL10_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL10_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL10_SNAK_OFFSET 0xa40 #define GC_USB_DIEPCTL10_SETD0PID_LSB 0x1c #define GC_USB_DIEPCTL10_SETD0PID_MASK 0x10000000 #define GC_USB_DIEPCTL10_SETD0PID_SIZE 0x1 #define GC_USB_DIEPCTL10_SETD0PID_DEFAULT 0x0 #define GC_USB_DIEPCTL10_SETD0PID_OFFSET 0xa40 #define GC_USB_DIEPCTL10_SETD1PID_LSB 0x1d #define GC_USB_DIEPCTL10_SETD1PID_MASK 0x20000000 #define GC_USB_DIEPCTL10_SETD1PID_SIZE 0x1 #define GC_USB_DIEPCTL10_SETD1PID_DEFAULT 0x0 #define GC_USB_DIEPCTL10_SETD1PID_OFFSET 0xa40 #define GC_USB_DIEPCTL10_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL10_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL10_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL10_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL10_EPDIS_OFFSET 0xa40 #define GC_USB_DIEPCTL10_EPENA_LSB 0x1f #define GC_USB_DIEPCTL10_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL10_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL10_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL10_EPENA_OFFSET 0xa40 #define GC_USB_DIEPINT10_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT10_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT10_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT10_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT10_XFERCOMPL_OFFSET 0xa48 #define GC_USB_DIEPINT10_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT10_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT10_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT10_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT10_EPDISBLD_OFFSET 0xa48 #define GC_USB_DIEPINT10_AHBERR_LSB 0x2 #define GC_USB_DIEPINT10_AHBERR_MASK 0x4 #define GC_USB_DIEPINT10_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT10_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT10_AHBERR_OFFSET 0xa48 #define GC_USB_DIEPINT10_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT10_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT10_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT10_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT10_TIMEOUT_OFFSET 0xa48 #define GC_USB_DIEPINT10_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT10_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT10_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT10_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT10_INTKNTXFEMP_OFFSET 0xa48 #define GC_USB_DIEPINT10_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT10_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT10_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT10_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT10_INTKNEPMIS_OFFSET 0xa48 #define GC_USB_DIEPINT10_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT10_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT10_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT10_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT10_INEPNAKEFF_OFFSET 0xa48 #define GC_USB_DIEPINT10_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT10_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT10_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT10_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT10_TXFEMP_OFFSET 0xa48 #define GC_USB_DIEPINT10_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT10_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT10_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT10_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT10_TXFIFOUNDRN_OFFSET 0xa48 #define GC_USB_DIEPINT10_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT10_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT10_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT10_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT10_BNAINTR_OFFSET 0xa48 #define GC_USB_DIEPINT10_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT10_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT10_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT10_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT10_PKTDRPSTS_OFFSET 0xa48 #define GC_USB_DIEPINT10_BBLEERR_LSB 0xc #define GC_USB_DIEPINT10_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT10_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT10_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT10_BBLEERR_OFFSET 0xa48 #define GC_USB_DIEPINT10_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT10_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT10_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT10_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT10_NAKINTRPT_OFFSET 0xa48 #define GC_USB_DIEPINT10_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT10_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT10_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT10_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT10_NYETINTRPT_OFFSET 0xa48 #define GC_USB_DIEPTSIZ10_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ10_XFERSIZE_MASK 0x7ffff #define GC_USB_DIEPTSIZ10_XFERSIZE_SIZE 0x13 #define GC_USB_DIEPTSIZ10_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ10_XFERSIZE_OFFSET 0xa50 #define GC_USB_DIEPTSIZ10_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ10_PKTCNT_MASK 0x1ff80000 #define GC_USB_DIEPTSIZ10_PKTCNT_SIZE 0xa #define GC_USB_DIEPTSIZ10_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ10_PKTCNT_OFFSET 0xa50 #define GC_USB_DIEPTSIZ10_MC_LSB 0x1d #define GC_USB_DIEPTSIZ10_MC_MASK 0x60000000 #define GC_USB_DIEPTSIZ10_MC_SIZE 0x2 #define GC_USB_DIEPTSIZ10_MC_DEFAULT 0x0 #define GC_USB_DIEPTSIZ10_MC_OFFSET 0xa50 #define GC_USB_DIEPDMA10_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA10_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA10_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA10_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA10_DMAADDR_OFFSET 0xa54 #define GC_USB_DTXFSTS10_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS10_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS10_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS10_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS10_INEPTXFSPCAVAIL_OFFSET 0xa58 #define GC_USB_DIEPDMAB10_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB10_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB10_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB10_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB10_DMABUFFERADDR_OFFSET 0xa5c #define GC_USB_DIEPCTL11_MPS_LSB 0x0 #define GC_USB_DIEPCTL11_MPS_MASK 0x7ff #define GC_USB_DIEPCTL11_MPS_SIZE 0xb #define GC_USB_DIEPCTL11_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL11_MPS_OFFSET 0xa60 #define GC_USB_DIEPCTL11_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL11_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL11_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL11_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL11_USBACTEP_OFFSET 0xa60 #define GC_USB_DIEPCTL11_DPID_LSB 0x10 #define GC_USB_DIEPCTL11_DPID_MASK 0x10000 #define GC_USB_DIEPCTL11_DPID_SIZE 0x1 #define GC_USB_DIEPCTL11_DPID_DEFAULT 0x0 #define GC_USB_DIEPCTL11_DPID_OFFSET 0xa60 #define GC_USB_DIEPCTL11_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL11_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL11_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL11_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL11_NAKSTS_OFFSET 0xa60 #define GC_USB_DIEPCTL11_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL11_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL11_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL11_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL11_EPTYPE_OFFSET 0xa60 #define GC_USB_DIEPCTL11_STALL_LSB 0x15 #define GC_USB_DIEPCTL11_STALL_MASK 0x200000 #define GC_USB_DIEPCTL11_STALL_SIZE 0x1 #define GC_USB_DIEPCTL11_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL11_STALL_OFFSET 0xa60 #define GC_USB_DIEPCTL11_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL11_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL11_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL11_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL11_TXFNUM_OFFSET 0xa60 #define GC_USB_DIEPCTL11_CNAK_LSB 0x1a #define GC_USB_DIEPCTL11_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL11_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL11_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL11_CNAK_OFFSET 0xa60 #define GC_USB_DIEPCTL11_SNAK_LSB 0x1b #define GC_USB_DIEPCTL11_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL11_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL11_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL11_SNAK_OFFSET 0xa60 #define GC_USB_DIEPCTL11_SETD0PID_LSB 0x1c #define GC_USB_DIEPCTL11_SETD0PID_MASK 0x10000000 #define GC_USB_DIEPCTL11_SETD0PID_SIZE 0x1 #define GC_USB_DIEPCTL11_SETD0PID_DEFAULT 0x0 #define GC_USB_DIEPCTL11_SETD0PID_OFFSET 0xa60 #define GC_USB_DIEPCTL11_SETD1PID_LSB 0x1d #define GC_USB_DIEPCTL11_SETD1PID_MASK 0x20000000 #define GC_USB_DIEPCTL11_SETD1PID_SIZE 0x1 #define GC_USB_DIEPCTL11_SETD1PID_DEFAULT 0x0 #define GC_USB_DIEPCTL11_SETD1PID_OFFSET 0xa60 #define GC_USB_DIEPCTL11_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL11_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL11_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL11_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL11_EPDIS_OFFSET 0xa60 #define GC_USB_DIEPCTL11_EPENA_LSB 0x1f #define GC_USB_DIEPCTL11_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL11_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL11_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL11_EPENA_OFFSET 0xa60 #define GC_USB_DIEPINT11_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT11_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT11_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT11_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT11_XFERCOMPL_OFFSET 0xa68 #define GC_USB_DIEPINT11_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT11_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT11_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT11_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT11_EPDISBLD_OFFSET 0xa68 #define GC_USB_DIEPINT11_AHBERR_LSB 0x2 #define GC_USB_DIEPINT11_AHBERR_MASK 0x4 #define GC_USB_DIEPINT11_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT11_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT11_AHBERR_OFFSET 0xa68 #define GC_USB_DIEPINT11_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT11_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT11_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT11_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT11_TIMEOUT_OFFSET 0xa68 #define GC_USB_DIEPINT11_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT11_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT11_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT11_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT11_INTKNTXFEMP_OFFSET 0xa68 #define GC_USB_DIEPINT11_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT11_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT11_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT11_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT11_INTKNEPMIS_OFFSET 0xa68 #define GC_USB_DIEPINT11_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT11_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT11_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT11_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT11_INEPNAKEFF_OFFSET 0xa68 #define GC_USB_DIEPINT11_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT11_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT11_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT11_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT11_TXFEMP_OFFSET 0xa68 #define GC_USB_DIEPINT11_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT11_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT11_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT11_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT11_TXFIFOUNDRN_OFFSET 0xa68 #define GC_USB_DIEPINT11_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT11_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT11_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT11_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT11_BNAINTR_OFFSET 0xa68 #define GC_USB_DIEPINT11_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT11_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT11_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT11_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT11_PKTDRPSTS_OFFSET 0xa68 #define GC_USB_DIEPINT11_BBLEERR_LSB 0xc #define GC_USB_DIEPINT11_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT11_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT11_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT11_BBLEERR_OFFSET 0xa68 #define GC_USB_DIEPINT11_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT11_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT11_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT11_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT11_NAKINTRPT_OFFSET 0xa68 #define GC_USB_DIEPINT11_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT11_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT11_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT11_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT11_NYETINTRPT_OFFSET 0xa68 #define GC_USB_DIEPTSIZ11_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ11_XFERSIZE_MASK 0x7ffff #define GC_USB_DIEPTSIZ11_XFERSIZE_SIZE 0x13 #define GC_USB_DIEPTSIZ11_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ11_XFERSIZE_OFFSET 0xa70 #define GC_USB_DIEPTSIZ11_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ11_PKTCNT_MASK 0x1ff80000 #define GC_USB_DIEPTSIZ11_PKTCNT_SIZE 0xa #define GC_USB_DIEPTSIZ11_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ11_PKTCNT_OFFSET 0xa70 #define GC_USB_DIEPTSIZ11_MC_LSB 0x1d #define GC_USB_DIEPTSIZ11_MC_MASK 0x60000000 #define GC_USB_DIEPTSIZ11_MC_SIZE 0x2 #define GC_USB_DIEPTSIZ11_MC_DEFAULT 0x0 #define GC_USB_DIEPTSIZ11_MC_OFFSET 0xa70 #define GC_USB_DIEPDMA11_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA11_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA11_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA11_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA11_DMAADDR_OFFSET 0xa74 #define GC_USB_DTXFSTS11_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS11_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS11_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS11_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS11_INEPTXFSPCAVAIL_OFFSET 0xa78 #define GC_USB_DIEPDMAB11_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB11_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB11_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB11_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB11_DMABUFFERADDR_OFFSET 0xa7c #define GC_USB_DIEPCTL12_MPS_LSB 0x0 #define GC_USB_DIEPCTL12_MPS_MASK 0x7ff #define GC_USB_DIEPCTL12_MPS_SIZE 0xb #define GC_USB_DIEPCTL12_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL12_MPS_OFFSET 0xa80 #define GC_USB_DIEPCTL12_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL12_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL12_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL12_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL12_USBACTEP_OFFSET 0xa80 #define GC_USB_DIEPCTL12_DPID_LSB 0x10 #define GC_USB_DIEPCTL12_DPID_MASK 0x10000 #define GC_USB_DIEPCTL12_DPID_SIZE 0x1 #define GC_USB_DIEPCTL12_DPID_DEFAULT 0x0 #define GC_USB_DIEPCTL12_DPID_OFFSET 0xa80 #define GC_USB_DIEPCTL12_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL12_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL12_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL12_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL12_NAKSTS_OFFSET 0xa80 #define GC_USB_DIEPCTL12_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL12_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL12_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL12_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL12_EPTYPE_OFFSET 0xa80 #define GC_USB_DIEPCTL12_STALL_LSB 0x15 #define GC_USB_DIEPCTL12_STALL_MASK 0x200000 #define GC_USB_DIEPCTL12_STALL_SIZE 0x1 #define GC_USB_DIEPCTL12_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL12_STALL_OFFSET 0xa80 #define GC_USB_DIEPCTL12_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL12_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL12_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL12_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL12_TXFNUM_OFFSET 0xa80 #define GC_USB_DIEPCTL12_CNAK_LSB 0x1a #define GC_USB_DIEPCTL12_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL12_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL12_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL12_CNAK_OFFSET 0xa80 #define GC_USB_DIEPCTL12_SNAK_LSB 0x1b #define GC_USB_DIEPCTL12_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL12_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL12_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL12_SNAK_OFFSET 0xa80 #define GC_USB_DIEPCTL12_SETD0PID_LSB 0x1c #define GC_USB_DIEPCTL12_SETD0PID_MASK 0x10000000 #define GC_USB_DIEPCTL12_SETD0PID_SIZE 0x1 #define GC_USB_DIEPCTL12_SETD0PID_DEFAULT 0x0 #define GC_USB_DIEPCTL12_SETD0PID_OFFSET 0xa80 #define GC_USB_DIEPCTL12_SETD1PID_LSB 0x1d #define GC_USB_DIEPCTL12_SETD1PID_MASK 0x20000000 #define GC_USB_DIEPCTL12_SETD1PID_SIZE 0x1 #define GC_USB_DIEPCTL12_SETD1PID_DEFAULT 0x0 #define GC_USB_DIEPCTL12_SETD1PID_OFFSET 0xa80 #define GC_USB_DIEPCTL12_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL12_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL12_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL12_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL12_EPDIS_OFFSET 0xa80 #define GC_USB_DIEPCTL12_EPENA_LSB 0x1f #define GC_USB_DIEPCTL12_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL12_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL12_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL12_EPENA_OFFSET 0xa80 #define GC_USB_DIEPINT12_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT12_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT12_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT12_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT12_XFERCOMPL_OFFSET 0xa88 #define GC_USB_DIEPINT12_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT12_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT12_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT12_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT12_EPDISBLD_OFFSET 0xa88 #define GC_USB_DIEPINT12_AHBERR_LSB 0x2 #define GC_USB_DIEPINT12_AHBERR_MASK 0x4 #define GC_USB_DIEPINT12_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT12_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT12_AHBERR_OFFSET 0xa88 #define GC_USB_DIEPINT12_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT12_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT12_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT12_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT12_TIMEOUT_OFFSET 0xa88 #define GC_USB_DIEPINT12_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT12_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT12_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT12_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT12_INTKNTXFEMP_OFFSET 0xa88 #define GC_USB_DIEPINT12_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT12_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT12_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT12_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT12_INTKNEPMIS_OFFSET 0xa88 #define GC_USB_DIEPINT12_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT12_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT12_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT12_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT12_INEPNAKEFF_OFFSET 0xa88 #define GC_USB_DIEPINT12_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT12_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT12_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT12_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT12_TXFEMP_OFFSET 0xa88 #define GC_USB_DIEPINT12_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT12_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT12_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT12_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT12_TXFIFOUNDRN_OFFSET 0xa88 #define GC_USB_DIEPINT12_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT12_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT12_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT12_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT12_BNAINTR_OFFSET 0xa88 #define GC_USB_DIEPINT12_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT12_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT12_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT12_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT12_PKTDRPSTS_OFFSET 0xa88 #define GC_USB_DIEPINT12_BBLEERR_LSB 0xc #define GC_USB_DIEPINT12_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT12_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT12_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT12_BBLEERR_OFFSET 0xa88 #define GC_USB_DIEPINT12_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT12_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT12_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT12_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT12_NAKINTRPT_OFFSET 0xa88 #define GC_USB_DIEPINT12_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT12_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT12_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT12_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT12_NYETINTRPT_OFFSET 0xa88 #define GC_USB_DIEPTSIZ12_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ12_XFERSIZE_MASK 0x7ffff #define GC_USB_DIEPTSIZ12_XFERSIZE_SIZE 0x13 #define GC_USB_DIEPTSIZ12_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ12_XFERSIZE_OFFSET 0xa90 #define GC_USB_DIEPTSIZ12_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ12_PKTCNT_MASK 0x1ff80000 #define GC_USB_DIEPTSIZ12_PKTCNT_SIZE 0xa #define GC_USB_DIEPTSIZ12_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ12_PKTCNT_OFFSET 0xa90 #define GC_USB_DIEPTSIZ12_MC_LSB 0x1d #define GC_USB_DIEPTSIZ12_MC_MASK 0x60000000 #define GC_USB_DIEPTSIZ12_MC_SIZE 0x2 #define GC_USB_DIEPTSIZ12_MC_DEFAULT 0x0 #define GC_USB_DIEPTSIZ12_MC_OFFSET 0xa90 #define GC_USB_DIEPDMA12_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA12_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA12_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA12_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA12_DMAADDR_OFFSET 0xa94 #define GC_USB_DTXFSTS12_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS12_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS12_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS12_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS12_INEPTXFSPCAVAIL_OFFSET 0xa98 #define GC_USB_DIEPDMAB12_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB12_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB12_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB12_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB12_DMABUFFERADDR_OFFSET 0xa9c #define GC_USB_DIEPCTL13_MPS_LSB 0x0 #define GC_USB_DIEPCTL13_MPS_MASK 0x7ff #define GC_USB_DIEPCTL13_MPS_SIZE 0xb #define GC_USB_DIEPCTL13_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL13_MPS_OFFSET 0xaa0 #define GC_USB_DIEPCTL13_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL13_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL13_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL13_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL13_USBACTEP_OFFSET 0xaa0 #define GC_USB_DIEPCTL13_DPID_LSB 0x10 #define GC_USB_DIEPCTL13_DPID_MASK 0x10000 #define GC_USB_DIEPCTL13_DPID_SIZE 0x1 #define GC_USB_DIEPCTL13_DPID_DEFAULT 0x0 #define GC_USB_DIEPCTL13_DPID_OFFSET 0xaa0 #define GC_USB_DIEPCTL13_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL13_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL13_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL13_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL13_NAKSTS_OFFSET 0xaa0 #define GC_USB_DIEPCTL13_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL13_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL13_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL13_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL13_EPTYPE_OFFSET 0xaa0 #define GC_USB_DIEPCTL13_STALL_LSB 0x15 #define GC_USB_DIEPCTL13_STALL_MASK 0x200000 #define GC_USB_DIEPCTL13_STALL_SIZE 0x1 #define GC_USB_DIEPCTL13_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL13_STALL_OFFSET 0xaa0 #define GC_USB_DIEPCTL13_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL13_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL13_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL13_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL13_TXFNUM_OFFSET 0xaa0 #define GC_USB_DIEPCTL13_CNAK_LSB 0x1a #define GC_USB_DIEPCTL13_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL13_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL13_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL13_CNAK_OFFSET 0xaa0 #define GC_USB_DIEPCTL13_SNAK_LSB 0x1b #define GC_USB_DIEPCTL13_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL13_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL13_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL13_SNAK_OFFSET 0xaa0 #define GC_USB_DIEPCTL13_SETD0PID_LSB 0x1c #define GC_USB_DIEPCTL13_SETD0PID_MASK 0x10000000 #define GC_USB_DIEPCTL13_SETD0PID_SIZE 0x1 #define GC_USB_DIEPCTL13_SETD0PID_DEFAULT 0x0 #define GC_USB_DIEPCTL13_SETD0PID_OFFSET 0xaa0 #define GC_USB_DIEPCTL13_SETD1PID_LSB 0x1d #define GC_USB_DIEPCTL13_SETD1PID_MASK 0x20000000 #define GC_USB_DIEPCTL13_SETD1PID_SIZE 0x1 #define GC_USB_DIEPCTL13_SETD1PID_DEFAULT 0x0 #define GC_USB_DIEPCTL13_SETD1PID_OFFSET 0xaa0 #define GC_USB_DIEPCTL13_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL13_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL13_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL13_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL13_EPDIS_OFFSET 0xaa0 #define GC_USB_DIEPCTL13_EPENA_LSB 0x1f #define GC_USB_DIEPCTL13_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL13_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL13_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL13_EPENA_OFFSET 0xaa0 #define GC_USB_DIEPINT13_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT13_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT13_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT13_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT13_XFERCOMPL_OFFSET 0xaa8 #define GC_USB_DIEPINT13_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT13_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT13_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT13_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT13_EPDISBLD_OFFSET 0xaa8 #define GC_USB_DIEPINT13_AHBERR_LSB 0x2 #define GC_USB_DIEPINT13_AHBERR_MASK 0x4 #define GC_USB_DIEPINT13_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT13_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT13_AHBERR_OFFSET 0xaa8 #define GC_USB_DIEPINT13_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT13_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT13_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT13_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT13_TIMEOUT_OFFSET 0xaa8 #define GC_USB_DIEPINT13_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT13_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT13_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT13_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT13_INTKNTXFEMP_OFFSET 0xaa8 #define GC_USB_DIEPINT13_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT13_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT13_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT13_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT13_INTKNEPMIS_OFFSET 0xaa8 #define GC_USB_DIEPINT13_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT13_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT13_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT13_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT13_INEPNAKEFF_OFFSET 0xaa8 #define GC_USB_DIEPINT13_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT13_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT13_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT13_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT13_TXFEMP_OFFSET 0xaa8 #define GC_USB_DIEPINT13_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT13_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT13_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT13_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT13_TXFIFOUNDRN_OFFSET 0xaa8 #define GC_USB_DIEPINT13_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT13_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT13_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT13_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT13_BNAINTR_OFFSET 0xaa8 #define GC_USB_DIEPINT13_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT13_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT13_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT13_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT13_PKTDRPSTS_OFFSET 0xaa8 #define GC_USB_DIEPINT13_BBLEERR_LSB 0xc #define GC_USB_DIEPINT13_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT13_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT13_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT13_BBLEERR_OFFSET 0xaa8 #define GC_USB_DIEPINT13_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT13_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT13_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT13_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT13_NAKINTRPT_OFFSET 0xaa8 #define GC_USB_DIEPINT13_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT13_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT13_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT13_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT13_NYETINTRPT_OFFSET 0xaa8 #define GC_USB_DIEPTSIZ13_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ13_XFERSIZE_MASK 0x7ffff #define GC_USB_DIEPTSIZ13_XFERSIZE_SIZE 0x13 #define GC_USB_DIEPTSIZ13_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ13_XFERSIZE_OFFSET 0xab0 #define GC_USB_DIEPTSIZ13_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ13_PKTCNT_MASK 0x1ff80000 #define GC_USB_DIEPTSIZ13_PKTCNT_SIZE 0xa #define GC_USB_DIEPTSIZ13_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ13_PKTCNT_OFFSET 0xab0 #define GC_USB_DIEPTSIZ13_MC_LSB 0x1d #define GC_USB_DIEPTSIZ13_MC_MASK 0x60000000 #define GC_USB_DIEPTSIZ13_MC_SIZE 0x2 #define GC_USB_DIEPTSIZ13_MC_DEFAULT 0x0 #define GC_USB_DIEPTSIZ13_MC_OFFSET 0xab0 #define GC_USB_DIEPDMA13_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA13_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA13_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA13_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA13_DMAADDR_OFFSET 0xab4 #define GC_USB_DTXFSTS13_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS13_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS13_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS13_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS13_INEPTXFSPCAVAIL_OFFSET 0xab8 #define GC_USB_DIEPDMAB13_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB13_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB13_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB13_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB13_DMABUFFERADDR_OFFSET 0xabc #define GC_USB_DIEPCTL14_MPS_LSB 0x0 #define GC_USB_DIEPCTL14_MPS_MASK 0x7ff #define GC_USB_DIEPCTL14_MPS_SIZE 0xb #define GC_USB_DIEPCTL14_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL14_MPS_OFFSET 0xac0 #define GC_USB_DIEPCTL14_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL14_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL14_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL14_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL14_USBACTEP_OFFSET 0xac0 #define GC_USB_DIEPCTL14_DPID_LSB 0x10 #define GC_USB_DIEPCTL14_DPID_MASK 0x10000 #define GC_USB_DIEPCTL14_DPID_SIZE 0x1 #define GC_USB_DIEPCTL14_DPID_DEFAULT 0x0 #define GC_USB_DIEPCTL14_DPID_OFFSET 0xac0 #define GC_USB_DIEPCTL14_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL14_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL14_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL14_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL14_NAKSTS_OFFSET 0xac0 #define GC_USB_DIEPCTL14_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL14_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL14_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL14_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL14_EPTYPE_OFFSET 0xac0 #define GC_USB_DIEPCTL14_STALL_LSB 0x15 #define GC_USB_DIEPCTL14_STALL_MASK 0x200000 #define GC_USB_DIEPCTL14_STALL_SIZE 0x1 #define GC_USB_DIEPCTL14_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL14_STALL_OFFSET 0xac0 #define GC_USB_DIEPCTL14_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL14_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL14_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL14_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL14_TXFNUM_OFFSET 0xac0 #define GC_USB_DIEPCTL14_CNAK_LSB 0x1a #define GC_USB_DIEPCTL14_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL14_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL14_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL14_CNAK_OFFSET 0xac0 #define GC_USB_DIEPCTL14_SNAK_LSB 0x1b #define GC_USB_DIEPCTL14_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL14_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL14_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL14_SNAK_OFFSET 0xac0 #define GC_USB_DIEPCTL14_SETD0PID_LSB 0x1c #define GC_USB_DIEPCTL14_SETD0PID_MASK 0x10000000 #define GC_USB_DIEPCTL14_SETD0PID_SIZE 0x1 #define GC_USB_DIEPCTL14_SETD0PID_DEFAULT 0x0 #define GC_USB_DIEPCTL14_SETD0PID_OFFSET 0xac0 #define GC_USB_DIEPCTL14_SETD1PID_LSB 0x1d #define GC_USB_DIEPCTL14_SETD1PID_MASK 0x20000000 #define GC_USB_DIEPCTL14_SETD1PID_SIZE 0x1 #define GC_USB_DIEPCTL14_SETD1PID_DEFAULT 0x0 #define GC_USB_DIEPCTL14_SETD1PID_OFFSET 0xac0 #define GC_USB_DIEPCTL14_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL14_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL14_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL14_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL14_EPDIS_OFFSET 0xac0 #define GC_USB_DIEPCTL14_EPENA_LSB 0x1f #define GC_USB_DIEPCTL14_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL14_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL14_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL14_EPENA_OFFSET 0xac0 #define GC_USB_DIEPINT14_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT14_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT14_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT14_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT14_XFERCOMPL_OFFSET 0xac8 #define GC_USB_DIEPINT14_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT14_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT14_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT14_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT14_EPDISBLD_OFFSET 0xac8 #define GC_USB_DIEPINT14_AHBERR_LSB 0x2 #define GC_USB_DIEPINT14_AHBERR_MASK 0x4 #define GC_USB_DIEPINT14_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT14_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT14_AHBERR_OFFSET 0xac8 #define GC_USB_DIEPINT14_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT14_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT14_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT14_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT14_TIMEOUT_OFFSET 0xac8 #define GC_USB_DIEPINT14_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT14_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT14_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT14_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT14_INTKNTXFEMP_OFFSET 0xac8 #define GC_USB_DIEPINT14_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT14_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT14_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT14_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT14_INTKNEPMIS_OFFSET 0xac8 #define GC_USB_DIEPINT14_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT14_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT14_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT14_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT14_INEPNAKEFF_OFFSET 0xac8 #define GC_USB_DIEPINT14_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT14_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT14_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT14_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT14_TXFEMP_OFFSET 0xac8 #define GC_USB_DIEPINT14_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT14_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT14_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT14_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT14_TXFIFOUNDRN_OFFSET 0xac8 #define GC_USB_DIEPINT14_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT14_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT14_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT14_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT14_BNAINTR_OFFSET 0xac8 #define GC_USB_DIEPINT14_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT14_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT14_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT14_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT14_PKTDRPSTS_OFFSET 0xac8 #define GC_USB_DIEPINT14_BBLEERR_LSB 0xc #define GC_USB_DIEPINT14_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT14_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT14_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT14_BBLEERR_OFFSET 0xac8 #define GC_USB_DIEPINT14_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT14_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT14_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT14_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT14_NAKINTRPT_OFFSET 0xac8 #define GC_USB_DIEPINT14_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT14_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT14_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT14_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT14_NYETINTRPT_OFFSET 0xac8 #define GC_USB_DIEPTSIZ14_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ14_XFERSIZE_MASK 0x7ffff #define GC_USB_DIEPTSIZ14_XFERSIZE_SIZE 0x13 #define GC_USB_DIEPTSIZ14_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ14_XFERSIZE_OFFSET 0xad0 #define GC_USB_DIEPTSIZ14_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ14_PKTCNT_MASK 0x1ff80000 #define GC_USB_DIEPTSIZ14_PKTCNT_SIZE 0xa #define GC_USB_DIEPTSIZ14_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ14_PKTCNT_OFFSET 0xad0 #define GC_USB_DIEPTSIZ14_MC_LSB 0x1d #define GC_USB_DIEPTSIZ14_MC_MASK 0x60000000 #define GC_USB_DIEPTSIZ14_MC_SIZE 0x2 #define GC_USB_DIEPTSIZ14_MC_DEFAULT 0x0 #define GC_USB_DIEPTSIZ14_MC_OFFSET 0xad0 #define GC_USB_DIEPDMA14_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA14_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA14_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA14_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA14_DMAADDR_OFFSET 0xad4 #define GC_USB_DTXFSTS14_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS14_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS14_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS14_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS14_INEPTXFSPCAVAIL_OFFSET 0xad8 #define GC_USB_DIEPDMAB14_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB14_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB14_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB14_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB14_DMABUFFERADDR_OFFSET 0xadc #define GC_USB_DIEPCTL15_MPS_LSB 0x0 #define GC_USB_DIEPCTL15_MPS_MASK 0x7ff #define GC_USB_DIEPCTL15_MPS_SIZE 0xb #define GC_USB_DIEPCTL15_MPS_DEFAULT 0x0 #define GC_USB_DIEPCTL15_MPS_OFFSET 0xae0 #define GC_USB_DIEPCTL15_USBACTEP_LSB 0xf #define GC_USB_DIEPCTL15_USBACTEP_MASK 0x8000 #define GC_USB_DIEPCTL15_USBACTEP_SIZE 0x1 #define GC_USB_DIEPCTL15_USBACTEP_DEFAULT 0x0 #define GC_USB_DIEPCTL15_USBACTEP_OFFSET 0xae0 #define GC_USB_DIEPCTL15_DPID_LSB 0x10 #define GC_USB_DIEPCTL15_DPID_MASK 0x10000 #define GC_USB_DIEPCTL15_DPID_SIZE 0x1 #define GC_USB_DIEPCTL15_DPID_DEFAULT 0x0 #define GC_USB_DIEPCTL15_DPID_OFFSET 0xae0 #define GC_USB_DIEPCTL15_NAKSTS_LSB 0x11 #define GC_USB_DIEPCTL15_NAKSTS_MASK 0x20000 #define GC_USB_DIEPCTL15_NAKSTS_SIZE 0x1 #define GC_USB_DIEPCTL15_NAKSTS_DEFAULT 0x0 #define GC_USB_DIEPCTL15_NAKSTS_OFFSET 0xae0 #define GC_USB_DIEPCTL15_EPTYPE_LSB 0x12 #define GC_USB_DIEPCTL15_EPTYPE_MASK 0xc0000 #define GC_USB_DIEPCTL15_EPTYPE_SIZE 0x2 #define GC_USB_DIEPCTL15_EPTYPE_DEFAULT 0x0 #define GC_USB_DIEPCTL15_EPTYPE_OFFSET 0xae0 #define GC_USB_DIEPCTL15_STALL_LSB 0x15 #define GC_USB_DIEPCTL15_STALL_MASK 0x200000 #define GC_USB_DIEPCTL15_STALL_SIZE 0x1 #define GC_USB_DIEPCTL15_STALL_DEFAULT 0x0 #define GC_USB_DIEPCTL15_STALL_OFFSET 0xae0 #define GC_USB_DIEPCTL15_TXFNUM_LSB 0x16 #define GC_USB_DIEPCTL15_TXFNUM_MASK 0x3c00000 #define GC_USB_DIEPCTL15_TXFNUM_SIZE 0x4 #define GC_USB_DIEPCTL15_TXFNUM_DEFAULT 0x0 #define GC_USB_DIEPCTL15_TXFNUM_OFFSET 0xae0 #define GC_USB_DIEPCTL15_CNAK_LSB 0x1a #define GC_USB_DIEPCTL15_CNAK_MASK 0x4000000 #define GC_USB_DIEPCTL15_CNAK_SIZE 0x1 #define GC_USB_DIEPCTL15_CNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL15_CNAK_OFFSET 0xae0 #define GC_USB_DIEPCTL15_SNAK_LSB 0x1b #define GC_USB_DIEPCTL15_SNAK_MASK 0x8000000 #define GC_USB_DIEPCTL15_SNAK_SIZE 0x1 #define GC_USB_DIEPCTL15_SNAK_DEFAULT 0x0 #define GC_USB_DIEPCTL15_SNAK_OFFSET 0xae0 #define GC_USB_DIEPCTL15_SETD0PID_LSB 0x1c #define GC_USB_DIEPCTL15_SETD0PID_MASK 0x10000000 #define GC_USB_DIEPCTL15_SETD0PID_SIZE 0x1 #define GC_USB_DIEPCTL15_SETD0PID_DEFAULT 0x0 #define GC_USB_DIEPCTL15_SETD0PID_OFFSET 0xae0 #define GC_USB_DIEPCTL15_SETD1PID_LSB 0x1d #define GC_USB_DIEPCTL15_SETD1PID_MASK 0x20000000 #define GC_USB_DIEPCTL15_SETD1PID_SIZE 0x1 #define GC_USB_DIEPCTL15_SETD1PID_DEFAULT 0x0 #define GC_USB_DIEPCTL15_SETD1PID_OFFSET 0xae0 #define GC_USB_DIEPCTL15_EPDIS_LSB 0x1e #define GC_USB_DIEPCTL15_EPDIS_MASK 0x40000000 #define GC_USB_DIEPCTL15_EPDIS_SIZE 0x1 #define GC_USB_DIEPCTL15_EPDIS_DEFAULT 0x0 #define GC_USB_DIEPCTL15_EPDIS_OFFSET 0xae0 #define GC_USB_DIEPCTL15_EPENA_LSB 0x1f #define GC_USB_DIEPCTL15_EPENA_MASK 0x80000000 #define GC_USB_DIEPCTL15_EPENA_SIZE 0x1 #define GC_USB_DIEPCTL15_EPENA_DEFAULT 0x0 #define GC_USB_DIEPCTL15_EPENA_OFFSET 0xae0 #define GC_USB_DIEPINT15_XFERCOMPL_LSB 0x0 #define GC_USB_DIEPINT15_XFERCOMPL_MASK 0x1 #define GC_USB_DIEPINT15_XFERCOMPL_SIZE 0x1 #define GC_USB_DIEPINT15_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DIEPINT15_XFERCOMPL_OFFSET 0xae8 #define GC_USB_DIEPINT15_EPDISBLD_LSB 0x1 #define GC_USB_DIEPINT15_EPDISBLD_MASK 0x2 #define GC_USB_DIEPINT15_EPDISBLD_SIZE 0x1 #define GC_USB_DIEPINT15_EPDISBLD_DEFAULT 0x0 #define GC_USB_DIEPINT15_EPDISBLD_OFFSET 0xae8 #define GC_USB_DIEPINT15_AHBERR_LSB 0x2 #define GC_USB_DIEPINT15_AHBERR_MASK 0x4 #define GC_USB_DIEPINT15_AHBERR_SIZE 0x1 #define GC_USB_DIEPINT15_AHBERR_DEFAULT 0x0 #define GC_USB_DIEPINT15_AHBERR_OFFSET 0xae8 #define GC_USB_DIEPINT15_TIMEOUT_LSB 0x3 #define GC_USB_DIEPINT15_TIMEOUT_MASK 0x8 #define GC_USB_DIEPINT15_TIMEOUT_SIZE 0x1 #define GC_USB_DIEPINT15_TIMEOUT_DEFAULT 0x0 #define GC_USB_DIEPINT15_TIMEOUT_OFFSET 0xae8 #define GC_USB_DIEPINT15_INTKNTXFEMP_LSB 0x4 #define GC_USB_DIEPINT15_INTKNTXFEMP_MASK 0x10 #define GC_USB_DIEPINT15_INTKNTXFEMP_SIZE 0x1 #define GC_USB_DIEPINT15_INTKNTXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT15_INTKNTXFEMP_OFFSET 0xae8 #define GC_USB_DIEPINT15_INTKNEPMIS_LSB 0x5 #define GC_USB_DIEPINT15_INTKNEPMIS_MASK 0x20 #define GC_USB_DIEPINT15_INTKNEPMIS_SIZE 0x1 #define GC_USB_DIEPINT15_INTKNEPMIS_DEFAULT 0x0 #define GC_USB_DIEPINT15_INTKNEPMIS_OFFSET 0xae8 #define GC_USB_DIEPINT15_INEPNAKEFF_LSB 0x6 #define GC_USB_DIEPINT15_INEPNAKEFF_MASK 0x40 #define GC_USB_DIEPINT15_INEPNAKEFF_SIZE 0x1 #define GC_USB_DIEPINT15_INEPNAKEFF_DEFAULT 0x0 #define GC_USB_DIEPINT15_INEPNAKEFF_OFFSET 0xae8 #define GC_USB_DIEPINT15_TXFEMP_LSB 0x7 #define GC_USB_DIEPINT15_TXFEMP_MASK 0x80 #define GC_USB_DIEPINT15_TXFEMP_SIZE 0x1 #define GC_USB_DIEPINT15_TXFEMP_DEFAULT 0x0 #define GC_USB_DIEPINT15_TXFEMP_OFFSET 0xae8 #define GC_USB_DIEPINT15_TXFIFOUNDRN_LSB 0x8 #define GC_USB_DIEPINT15_TXFIFOUNDRN_MASK 0x100 #define GC_USB_DIEPINT15_TXFIFOUNDRN_SIZE 0x1 #define GC_USB_DIEPINT15_TXFIFOUNDRN_DEFAULT 0x0 #define GC_USB_DIEPINT15_TXFIFOUNDRN_OFFSET 0xae8 #define GC_USB_DIEPINT15_BNAINTR_LSB 0x9 #define GC_USB_DIEPINT15_BNAINTR_MASK 0x200 #define GC_USB_DIEPINT15_BNAINTR_SIZE 0x1 #define GC_USB_DIEPINT15_BNAINTR_DEFAULT 0x0 #define GC_USB_DIEPINT15_BNAINTR_OFFSET 0xae8 #define GC_USB_DIEPINT15_PKTDRPSTS_LSB 0xb #define GC_USB_DIEPINT15_PKTDRPSTS_MASK 0x800 #define GC_USB_DIEPINT15_PKTDRPSTS_SIZE 0x1 #define GC_USB_DIEPINT15_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DIEPINT15_PKTDRPSTS_OFFSET 0xae8 #define GC_USB_DIEPINT15_BBLEERR_LSB 0xc #define GC_USB_DIEPINT15_BBLEERR_MASK 0x1000 #define GC_USB_DIEPINT15_BBLEERR_SIZE 0x1 #define GC_USB_DIEPINT15_BBLEERR_DEFAULT 0x0 #define GC_USB_DIEPINT15_BBLEERR_OFFSET 0xae8 #define GC_USB_DIEPINT15_NAKINTRPT_LSB 0xd #define GC_USB_DIEPINT15_NAKINTRPT_MASK 0x2000 #define GC_USB_DIEPINT15_NAKINTRPT_SIZE 0x1 #define GC_USB_DIEPINT15_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT15_NAKINTRPT_OFFSET 0xae8 #define GC_USB_DIEPINT15_NYETINTRPT_LSB 0xe #define GC_USB_DIEPINT15_NYETINTRPT_MASK 0x4000 #define GC_USB_DIEPINT15_NYETINTRPT_SIZE 0x1 #define GC_USB_DIEPINT15_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DIEPINT15_NYETINTRPT_OFFSET 0xae8 #define GC_USB_DIEPTSIZ15_XFERSIZE_LSB 0x0 #define GC_USB_DIEPTSIZ15_XFERSIZE_MASK 0x7ffff #define GC_USB_DIEPTSIZ15_XFERSIZE_SIZE 0x13 #define GC_USB_DIEPTSIZ15_XFERSIZE_DEFAULT 0x0 #define GC_USB_DIEPTSIZ15_XFERSIZE_OFFSET 0xaf0 #define GC_USB_DIEPTSIZ15_PKTCNT_LSB 0x13 #define GC_USB_DIEPTSIZ15_PKTCNT_MASK 0x1ff80000 #define GC_USB_DIEPTSIZ15_PKTCNT_SIZE 0xa #define GC_USB_DIEPTSIZ15_PKTCNT_DEFAULT 0x0 #define GC_USB_DIEPTSIZ15_PKTCNT_OFFSET 0xaf0 #define GC_USB_DIEPTSIZ15_MC_LSB 0x1d #define GC_USB_DIEPTSIZ15_MC_MASK 0x60000000 #define GC_USB_DIEPTSIZ15_MC_SIZE 0x2 #define GC_USB_DIEPTSIZ15_MC_DEFAULT 0x0 #define GC_USB_DIEPTSIZ15_MC_OFFSET 0xaf0 #define GC_USB_DIEPDMA15_DMAADDR_LSB 0x0 #define GC_USB_DIEPDMA15_DMAADDR_MASK 0xffffffff #define GC_USB_DIEPDMA15_DMAADDR_SIZE 0x20 #define GC_USB_DIEPDMA15_DMAADDR_DEFAULT 0x0 #define GC_USB_DIEPDMA15_DMAADDR_OFFSET 0xaf4 #define GC_USB_DTXFSTS15_INEPTXFSPCAVAIL_LSB 0x0 #define GC_USB_DTXFSTS15_INEPTXFSPCAVAIL_MASK 0xffff #define GC_USB_DTXFSTS15_INEPTXFSPCAVAIL_SIZE 0x10 #define GC_USB_DTXFSTS15_INEPTXFSPCAVAIL_DEFAULT 0x0 #define GC_USB_DTXFSTS15_INEPTXFSPCAVAIL_OFFSET 0xaf8 #define GC_USB_DIEPDMAB15_DMABUFFERADDR_LSB 0x0 #define GC_USB_DIEPDMAB15_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DIEPDMAB15_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DIEPDMAB15_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DIEPDMAB15_DMABUFFERADDR_OFFSET 0xafc #define GC_USB_DOEPCTL0_MPS_LSB 0x0 #define GC_USB_DOEPCTL0_MPS_MASK 0x3 #define GC_USB_DOEPCTL0_MPS_SIZE 0x2 #define GC_USB_DOEPCTL0_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL0_MPS_OFFSET 0xb00 #define GC_USB_DOEPCTL0_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL0_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL0_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL0_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL0_USBACTEP_OFFSET 0xb00 #define GC_USB_DOEPCTL0_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL0_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL0_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL0_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL0_NAKSTS_OFFSET 0xb00 #define GC_USB_DOEPCTL0_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL0_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL0_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL0_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL0_EPTYPE_OFFSET 0xb00 #define GC_USB_DOEPCTL0_SNP_LSB 0x14 #define GC_USB_DOEPCTL0_SNP_MASK 0x100000 #define GC_USB_DOEPCTL0_SNP_SIZE 0x1 #define GC_USB_DOEPCTL0_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL0_SNP_OFFSET 0xb00 #define GC_USB_DOEPCTL0_STALL_LSB 0x15 #define GC_USB_DOEPCTL0_STALL_MASK 0x200000 #define GC_USB_DOEPCTL0_STALL_SIZE 0x1 #define GC_USB_DOEPCTL0_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL0_STALL_OFFSET 0xb00 #define GC_USB_DOEPCTL0_CNAK_LSB 0x1a #define GC_USB_DOEPCTL0_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL0_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL0_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL0_CNAK_OFFSET 0xb00 #define GC_USB_DOEPCTL0_SNAK_LSB 0x1b #define GC_USB_DOEPCTL0_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL0_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL0_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL0_SNAK_OFFSET 0xb00 #define GC_USB_DOEPCTL0_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL0_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL0_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL0_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL0_EPDIS_OFFSET 0xb00 #define GC_USB_DOEPCTL0_EPENA_LSB 0x1f #define GC_USB_DOEPCTL0_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL0_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL0_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL0_EPENA_OFFSET 0xb00 #define GC_USB_DOEPINT0_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT0_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT0_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT0_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT0_XFERCOMPL_OFFSET 0xb08 #define GC_USB_DOEPINT0_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT0_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT0_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT0_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT0_EPDISBLD_OFFSET 0xb08 #define GC_USB_DOEPINT0_AHBERR_LSB 0x2 #define GC_USB_DOEPINT0_AHBERR_MASK 0x4 #define GC_USB_DOEPINT0_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT0_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT0_AHBERR_OFFSET 0xb08 #define GC_USB_DOEPINT0_SETUP_LSB 0x3 #define GC_USB_DOEPINT0_SETUP_MASK 0x8 #define GC_USB_DOEPINT0_SETUP_SIZE 0x1 #define GC_USB_DOEPINT0_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT0_SETUP_OFFSET 0xb08 #define GC_USB_DOEPINT0_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT0_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT0_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT0_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT0_OUTTKNEPDIS_OFFSET 0xb08 #define GC_USB_DOEPINT0_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT0_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT0_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT0_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT0_STSPHSERCVD_OFFSET 0xb08 #define GC_USB_DOEPINT0_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT0_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT0_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT0_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT0_BACK2BACKSETUP_OFFSET 0xb08 #define GC_USB_DOEPINT0_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT0_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT0_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT0_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT0_OUTPKTERR_OFFSET 0xb08 #define GC_USB_DOEPINT0_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT0_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT0_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT0_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT0_BNAINTR_OFFSET 0xb08 #define GC_USB_DOEPINT0_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT0_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT0_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT0_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT0_PKTDRPSTS_OFFSET 0xb08 #define GC_USB_DOEPINT0_BBLEERR_LSB 0xc #define GC_USB_DOEPINT0_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT0_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT0_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT0_BBLEERR_OFFSET 0xb08 #define GC_USB_DOEPINT0_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT0_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT0_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT0_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT0_NAKINTRPT_OFFSET 0xb08 #define GC_USB_DOEPINT0_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT0_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT0_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT0_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT0_NYETINTRPT_OFFSET 0xb08 #define GC_USB_DOEPINT0_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT0_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT0_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT0_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT0_STUPPKTRCVD_OFFSET 0xb08 #define GC_USB_DOEPTSIZ0_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ0_XFERSIZE_MASK 0x7f #define GC_USB_DOEPTSIZ0_XFERSIZE_SIZE 0x7 #define GC_USB_DOEPTSIZ0_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ0_XFERSIZE_OFFSET 0xb10 #define GC_USB_DOEPTSIZ0_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ0_PKTCNT_MASK 0x80000 #define GC_USB_DOEPTSIZ0_PKTCNT_SIZE 0x1 #define GC_USB_DOEPTSIZ0_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ0_PKTCNT_OFFSET 0xb10 #define GC_USB_DOEPTSIZ0_SUPCNT_LSB 0x1d #define GC_USB_DOEPTSIZ0_SUPCNT_MASK 0x60000000 #define GC_USB_DOEPTSIZ0_SUPCNT_SIZE 0x2 #define GC_USB_DOEPTSIZ0_SUPCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ0_SUPCNT_OFFSET 0xb10 #define GC_USB_DOEPDMA0_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA0_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA0_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA0_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA0_DMAADDR_OFFSET 0xb14 #define GC_USB_DOEPDMAB0_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB0_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB0_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB0_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB0_DMABUFFERADDR_OFFSET 0xb1c #define GC_USB_DOEPCTL1_MPS_LSB 0x0 #define GC_USB_DOEPCTL1_MPS_MASK 0x7ff #define GC_USB_DOEPCTL1_MPS_SIZE 0xb #define GC_USB_DOEPCTL1_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL1_MPS_OFFSET 0xb20 #define GC_USB_DOEPCTL1_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL1_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL1_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL1_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL1_USBACTEP_OFFSET 0xb20 #define GC_USB_DOEPCTL1_DPID_LSB 0x10 #define GC_USB_DOEPCTL1_DPID_MASK 0x10000 #define GC_USB_DOEPCTL1_DPID_SIZE 0x1 #define GC_USB_DOEPCTL1_DPID_DEFAULT 0x0 #define GC_USB_DOEPCTL1_DPID_OFFSET 0xb20 #define GC_USB_DOEPCTL1_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL1_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL1_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL1_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL1_NAKSTS_OFFSET 0xb20 #define GC_USB_DOEPCTL1_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL1_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL1_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL1_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL1_EPTYPE_OFFSET 0xb20 #define GC_USB_DOEPCTL1_SNP_LSB 0x14 #define GC_USB_DOEPCTL1_SNP_MASK 0x100000 #define GC_USB_DOEPCTL1_SNP_SIZE 0x1 #define GC_USB_DOEPCTL1_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL1_SNP_OFFSET 0xb20 #define GC_USB_DOEPCTL1_STALL_LSB 0x15 #define GC_USB_DOEPCTL1_STALL_MASK 0x200000 #define GC_USB_DOEPCTL1_STALL_SIZE 0x1 #define GC_USB_DOEPCTL1_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL1_STALL_OFFSET 0xb20 #define GC_USB_DOEPCTL1_CNAK_LSB 0x1a #define GC_USB_DOEPCTL1_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL1_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL1_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL1_CNAK_OFFSET 0xb20 #define GC_USB_DOEPCTL1_SNAK_LSB 0x1b #define GC_USB_DOEPCTL1_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL1_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL1_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL1_SNAK_OFFSET 0xb20 #define GC_USB_DOEPCTL1_SETD0PID_LSB 0x1c #define GC_USB_DOEPCTL1_SETD0PID_MASK 0x10000000 #define GC_USB_DOEPCTL1_SETD0PID_SIZE 0x1 #define GC_USB_DOEPCTL1_SETD0PID_DEFAULT 0x0 #define GC_USB_DOEPCTL1_SETD0PID_OFFSET 0xb20 #define GC_USB_DOEPCTL1_SETD1PID_LSB 0x1d #define GC_USB_DOEPCTL1_SETD1PID_MASK 0x20000000 #define GC_USB_DOEPCTL1_SETD1PID_SIZE 0x1 #define GC_USB_DOEPCTL1_SETD1PID_DEFAULT 0x0 #define GC_USB_DOEPCTL1_SETD1PID_OFFSET 0xb20 #define GC_USB_DOEPCTL1_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL1_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL1_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL1_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL1_EPDIS_OFFSET 0xb20 #define GC_USB_DOEPCTL1_EPENA_LSB 0x1f #define GC_USB_DOEPCTL1_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL1_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL1_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL1_EPENA_OFFSET 0xb20 #define GC_USB_DOEPINT1_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT1_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT1_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT1_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT1_XFERCOMPL_OFFSET 0xb28 #define GC_USB_DOEPINT1_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT1_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT1_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT1_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT1_EPDISBLD_OFFSET 0xb28 #define GC_USB_DOEPINT1_AHBERR_LSB 0x2 #define GC_USB_DOEPINT1_AHBERR_MASK 0x4 #define GC_USB_DOEPINT1_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT1_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT1_AHBERR_OFFSET 0xb28 #define GC_USB_DOEPINT1_SETUP_LSB 0x3 #define GC_USB_DOEPINT1_SETUP_MASK 0x8 #define GC_USB_DOEPINT1_SETUP_SIZE 0x1 #define GC_USB_DOEPINT1_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT1_SETUP_OFFSET 0xb28 #define GC_USB_DOEPINT1_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT1_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT1_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT1_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT1_OUTTKNEPDIS_OFFSET 0xb28 #define GC_USB_DOEPINT1_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT1_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT1_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT1_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT1_STSPHSERCVD_OFFSET 0xb28 #define GC_USB_DOEPINT1_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT1_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT1_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT1_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT1_BACK2BACKSETUP_OFFSET 0xb28 #define GC_USB_DOEPINT1_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT1_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT1_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT1_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT1_OUTPKTERR_OFFSET 0xb28 #define GC_USB_DOEPINT1_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT1_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT1_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT1_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT1_BNAINTR_OFFSET 0xb28 #define GC_USB_DOEPINT1_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT1_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT1_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT1_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT1_PKTDRPSTS_OFFSET 0xb28 #define GC_USB_DOEPINT1_BBLEERR_LSB 0xc #define GC_USB_DOEPINT1_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT1_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT1_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT1_BBLEERR_OFFSET 0xb28 #define GC_USB_DOEPINT1_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT1_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT1_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT1_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT1_NAKINTRPT_OFFSET 0xb28 #define GC_USB_DOEPINT1_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT1_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT1_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT1_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT1_NYETINTRPT_OFFSET 0xb28 #define GC_USB_DOEPINT1_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT1_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT1_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT1_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT1_STUPPKTRCVD_OFFSET 0xb28 #define GC_USB_DOEPTSIZ1_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ1_XFERSIZE_MASK 0x7ffff #define GC_USB_DOEPTSIZ1_XFERSIZE_SIZE 0x13 #define GC_USB_DOEPTSIZ1_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ1_XFERSIZE_OFFSET 0xb30 #define GC_USB_DOEPTSIZ1_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ1_PKTCNT_MASK 0x1ff80000 #define GC_USB_DOEPTSIZ1_PKTCNT_SIZE 0xa #define GC_USB_DOEPTSIZ1_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ1_PKTCNT_OFFSET 0xb30 #define GC_USB_DOEPTSIZ1_RXDPID_LSB 0x1d #define GC_USB_DOEPTSIZ1_RXDPID_MASK 0x60000000 #define GC_USB_DOEPTSIZ1_RXDPID_SIZE 0x2 #define GC_USB_DOEPTSIZ1_RXDPID_DEFAULT 0x0 #define GC_USB_DOEPTSIZ1_RXDPID_OFFSET 0xb30 #define GC_USB_DOEPDMA1_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA1_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA1_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA1_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA1_DMAADDR_OFFSET 0xb34 #define GC_USB_DOEPDMAB1_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB1_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB1_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB1_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB1_DMABUFFERADDR_OFFSET 0xb3c #define GC_USB_DOEPCTL2_MPS_LSB 0x0 #define GC_USB_DOEPCTL2_MPS_MASK 0x7ff #define GC_USB_DOEPCTL2_MPS_SIZE 0xb #define GC_USB_DOEPCTL2_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL2_MPS_OFFSET 0xb40 #define GC_USB_DOEPCTL2_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL2_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL2_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL2_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL2_USBACTEP_OFFSET 0xb40 #define GC_USB_DOEPCTL2_DPID_LSB 0x10 #define GC_USB_DOEPCTL2_DPID_MASK 0x10000 #define GC_USB_DOEPCTL2_DPID_SIZE 0x1 #define GC_USB_DOEPCTL2_DPID_DEFAULT 0x0 #define GC_USB_DOEPCTL2_DPID_OFFSET 0xb40 #define GC_USB_DOEPCTL2_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL2_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL2_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL2_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL2_NAKSTS_OFFSET 0xb40 #define GC_USB_DOEPCTL2_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL2_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL2_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL2_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL2_EPTYPE_OFFSET 0xb40 #define GC_USB_DOEPCTL2_SNP_LSB 0x14 #define GC_USB_DOEPCTL2_SNP_MASK 0x100000 #define GC_USB_DOEPCTL2_SNP_SIZE 0x1 #define GC_USB_DOEPCTL2_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL2_SNP_OFFSET 0xb40 #define GC_USB_DOEPCTL2_STALL_LSB 0x15 #define GC_USB_DOEPCTL2_STALL_MASK 0x200000 #define GC_USB_DOEPCTL2_STALL_SIZE 0x1 #define GC_USB_DOEPCTL2_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL2_STALL_OFFSET 0xb40 #define GC_USB_DOEPCTL2_CNAK_LSB 0x1a #define GC_USB_DOEPCTL2_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL2_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL2_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL2_CNAK_OFFSET 0xb40 #define GC_USB_DOEPCTL2_SNAK_LSB 0x1b #define GC_USB_DOEPCTL2_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL2_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL2_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL2_SNAK_OFFSET 0xb40 #define GC_USB_DOEPCTL2_SETD0PID_LSB 0x1c #define GC_USB_DOEPCTL2_SETD0PID_MASK 0x10000000 #define GC_USB_DOEPCTL2_SETD0PID_SIZE 0x1 #define GC_USB_DOEPCTL2_SETD0PID_DEFAULT 0x0 #define GC_USB_DOEPCTL2_SETD0PID_OFFSET 0xb40 #define GC_USB_DOEPCTL2_SETD1PID_LSB 0x1d #define GC_USB_DOEPCTL2_SETD1PID_MASK 0x20000000 #define GC_USB_DOEPCTL2_SETD1PID_SIZE 0x1 #define GC_USB_DOEPCTL2_SETD1PID_DEFAULT 0x0 #define GC_USB_DOEPCTL2_SETD1PID_OFFSET 0xb40 #define GC_USB_DOEPCTL2_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL2_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL2_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL2_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL2_EPDIS_OFFSET 0xb40 #define GC_USB_DOEPCTL2_EPENA_LSB 0x1f #define GC_USB_DOEPCTL2_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL2_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL2_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL2_EPENA_OFFSET 0xb40 #define GC_USB_DOEPINT2_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT2_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT2_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT2_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT2_XFERCOMPL_OFFSET 0xb48 #define GC_USB_DOEPINT2_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT2_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT2_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT2_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT2_EPDISBLD_OFFSET 0xb48 #define GC_USB_DOEPINT2_AHBERR_LSB 0x2 #define GC_USB_DOEPINT2_AHBERR_MASK 0x4 #define GC_USB_DOEPINT2_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT2_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT2_AHBERR_OFFSET 0xb48 #define GC_USB_DOEPINT2_SETUP_LSB 0x3 #define GC_USB_DOEPINT2_SETUP_MASK 0x8 #define GC_USB_DOEPINT2_SETUP_SIZE 0x1 #define GC_USB_DOEPINT2_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT2_SETUP_OFFSET 0xb48 #define GC_USB_DOEPINT2_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT2_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT2_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT2_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT2_OUTTKNEPDIS_OFFSET 0xb48 #define GC_USB_DOEPINT2_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT2_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT2_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT2_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT2_STSPHSERCVD_OFFSET 0xb48 #define GC_USB_DOEPINT2_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT2_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT2_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT2_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT2_BACK2BACKSETUP_OFFSET 0xb48 #define GC_USB_DOEPINT2_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT2_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT2_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT2_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT2_OUTPKTERR_OFFSET 0xb48 #define GC_USB_DOEPINT2_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT2_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT2_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT2_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT2_BNAINTR_OFFSET 0xb48 #define GC_USB_DOEPINT2_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT2_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT2_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT2_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT2_PKTDRPSTS_OFFSET 0xb48 #define GC_USB_DOEPINT2_BBLEERR_LSB 0xc #define GC_USB_DOEPINT2_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT2_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT2_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT2_BBLEERR_OFFSET 0xb48 #define GC_USB_DOEPINT2_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT2_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT2_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT2_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT2_NAKINTRPT_OFFSET 0xb48 #define GC_USB_DOEPINT2_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT2_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT2_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT2_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT2_NYETINTRPT_OFFSET 0xb48 #define GC_USB_DOEPINT2_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT2_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT2_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT2_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT2_STUPPKTRCVD_OFFSET 0xb48 #define GC_USB_DOEPTSIZ2_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ2_XFERSIZE_MASK 0x7ffff #define GC_USB_DOEPTSIZ2_XFERSIZE_SIZE 0x13 #define GC_USB_DOEPTSIZ2_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ2_XFERSIZE_OFFSET 0xb50 #define GC_USB_DOEPTSIZ2_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ2_PKTCNT_MASK 0x1ff80000 #define GC_USB_DOEPTSIZ2_PKTCNT_SIZE 0xa #define GC_USB_DOEPTSIZ2_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ2_PKTCNT_OFFSET 0xb50 #define GC_USB_DOEPTSIZ2_RXDPID_LSB 0x1d #define GC_USB_DOEPTSIZ2_RXDPID_MASK 0x60000000 #define GC_USB_DOEPTSIZ2_RXDPID_SIZE 0x2 #define GC_USB_DOEPTSIZ2_RXDPID_DEFAULT 0x0 #define GC_USB_DOEPTSIZ2_RXDPID_OFFSET 0xb50 #define GC_USB_DOEPDMA2_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA2_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA2_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA2_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA2_DMAADDR_OFFSET 0xb54 #define GC_USB_DOEPDMAB2_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB2_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB2_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB2_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB2_DMABUFFERADDR_OFFSET 0xb5c #define GC_USB_DOEPCTL3_MPS_LSB 0x0 #define GC_USB_DOEPCTL3_MPS_MASK 0x7ff #define GC_USB_DOEPCTL3_MPS_SIZE 0xb #define GC_USB_DOEPCTL3_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL3_MPS_OFFSET 0xb60 #define GC_USB_DOEPCTL3_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL3_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL3_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL3_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL3_USBACTEP_OFFSET 0xb60 #define GC_USB_DOEPCTL3_DPID_LSB 0x10 #define GC_USB_DOEPCTL3_DPID_MASK 0x10000 #define GC_USB_DOEPCTL3_DPID_SIZE 0x1 #define GC_USB_DOEPCTL3_DPID_DEFAULT 0x0 #define GC_USB_DOEPCTL3_DPID_OFFSET 0xb60 #define GC_USB_DOEPCTL3_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL3_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL3_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL3_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL3_NAKSTS_OFFSET 0xb60 #define GC_USB_DOEPCTL3_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL3_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL3_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL3_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL3_EPTYPE_OFFSET 0xb60 #define GC_USB_DOEPCTL3_SNP_LSB 0x14 #define GC_USB_DOEPCTL3_SNP_MASK 0x100000 #define GC_USB_DOEPCTL3_SNP_SIZE 0x1 #define GC_USB_DOEPCTL3_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL3_SNP_OFFSET 0xb60 #define GC_USB_DOEPCTL3_STALL_LSB 0x15 #define GC_USB_DOEPCTL3_STALL_MASK 0x200000 #define GC_USB_DOEPCTL3_STALL_SIZE 0x1 #define GC_USB_DOEPCTL3_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL3_STALL_OFFSET 0xb60 #define GC_USB_DOEPCTL3_CNAK_LSB 0x1a #define GC_USB_DOEPCTL3_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL3_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL3_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL3_CNAK_OFFSET 0xb60 #define GC_USB_DOEPCTL3_SNAK_LSB 0x1b #define GC_USB_DOEPCTL3_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL3_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL3_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL3_SNAK_OFFSET 0xb60 #define GC_USB_DOEPCTL3_SETD0PID_LSB 0x1c #define GC_USB_DOEPCTL3_SETD0PID_MASK 0x10000000 #define GC_USB_DOEPCTL3_SETD0PID_SIZE 0x1 #define GC_USB_DOEPCTL3_SETD0PID_DEFAULT 0x0 #define GC_USB_DOEPCTL3_SETD0PID_OFFSET 0xb60 #define GC_USB_DOEPCTL3_SETD1PID_LSB 0x1d #define GC_USB_DOEPCTL3_SETD1PID_MASK 0x20000000 #define GC_USB_DOEPCTL3_SETD1PID_SIZE 0x1 #define GC_USB_DOEPCTL3_SETD1PID_DEFAULT 0x0 #define GC_USB_DOEPCTL3_SETD1PID_OFFSET 0xb60 #define GC_USB_DOEPCTL3_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL3_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL3_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL3_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL3_EPDIS_OFFSET 0xb60 #define GC_USB_DOEPCTL3_EPENA_LSB 0x1f #define GC_USB_DOEPCTL3_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL3_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL3_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL3_EPENA_OFFSET 0xb60 #define GC_USB_DOEPINT3_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT3_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT3_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT3_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT3_XFERCOMPL_OFFSET 0xb68 #define GC_USB_DOEPINT3_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT3_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT3_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT3_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT3_EPDISBLD_OFFSET 0xb68 #define GC_USB_DOEPINT3_AHBERR_LSB 0x2 #define GC_USB_DOEPINT3_AHBERR_MASK 0x4 #define GC_USB_DOEPINT3_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT3_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT3_AHBERR_OFFSET 0xb68 #define GC_USB_DOEPINT3_SETUP_LSB 0x3 #define GC_USB_DOEPINT3_SETUP_MASK 0x8 #define GC_USB_DOEPINT3_SETUP_SIZE 0x1 #define GC_USB_DOEPINT3_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT3_SETUP_OFFSET 0xb68 #define GC_USB_DOEPINT3_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT3_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT3_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT3_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT3_OUTTKNEPDIS_OFFSET 0xb68 #define GC_USB_DOEPINT3_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT3_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT3_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT3_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT3_STSPHSERCVD_OFFSET 0xb68 #define GC_USB_DOEPINT3_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT3_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT3_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT3_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT3_BACK2BACKSETUP_OFFSET 0xb68 #define GC_USB_DOEPINT3_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT3_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT3_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT3_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT3_OUTPKTERR_OFFSET 0xb68 #define GC_USB_DOEPINT3_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT3_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT3_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT3_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT3_BNAINTR_OFFSET 0xb68 #define GC_USB_DOEPINT3_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT3_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT3_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT3_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT3_PKTDRPSTS_OFFSET 0xb68 #define GC_USB_DOEPINT3_BBLEERR_LSB 0xc #define GC_USB_DOEPINT3_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT3_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT3_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT3_BBLEERR_OFFSET 0xb68 #define GC_USB_DOEPINT3_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT3_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT3_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT3_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT3_NAKINTRPT_OFFSET 0xb68 #define GC_USB_DOEPINT3_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT3_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT3_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT3_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT3_NYETINTRPT_OFFSET 0xb68 #define GC_USB_DOEPINT3_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT3_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT3_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT3_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT3_STUPPKTRCVD_OFFSET 0xb68 #define GC_USB_DOEPTSIZ3_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ3_XFERSIZE_MASK 0x7ffff #define GC_USB_DOEPTSIZ3_XFERSIZE_SIZE 0x13 #define GC_USB_DOEPTSIZ3_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ3_XFERSIZE_OFFSET 0xb70 #define GC_USB_DOEPTSIZ3_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ3_PKTCNT_MASK 0x1ff80000 #define GC_USB_DOEPTSIZ3_PKTCNT_SIZE 0xa #define GC_USB_DOEPTSIZ3_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ3_PKTCNT_OFFSET 0xb70 #define GC_USB_DOEPTSIZ3_RXDPID_LSB 0x1d #define GC_USB_DOEPTSIZ3_RXDPID_MASK 0x60000000 #define GC_USB_DOEPTSIZ3_RXDPID_SIZE 0x2 #define GC_USB_DOEPTSIZ3_RXDPID_DEFAULT 0x0 #define GC_USB_DOEPTSIZ3_RXDPID_OFFSET 0xb70 #define GC_USB_DOEPDMA3_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA3_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA3_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA3_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA3_DMAADDR_OFFSET 0xb74 #define GC_USB_DOEPDMAB3_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB3_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB3_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB3_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB3_DMABUFFERADDR_OFFSET 0xb7c #define GC_USB_DOEPCTL4_MPS_LSB 0x0 #define GC_USB_DOEPCTL4_MPS_MASK 0x7ff #define GC_USB_DOEPCTL4_MPS_SIZE 0xb #define GC_USB_DOEPCTL4_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL4_MPS_OFFSET 0xb80 #define GC_USB_DOEPCTL4_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL4_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL4_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL4_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL4_USBACTEP_OFFSET 0xb80 #define GC_USB_DOEPCTL4_DPID_LSB 0x10 #define GC_USB_DOEPCTL4_DPID_MASK 0x10000 #define GC_USB_DOEPCTL4_DPID_SIZE 0x1 #define GC_USB_DOEPCTL4_DPID_DEFAULT 0x0 #define GC_USB_DOEPCTL4_DPID_OFFSET 0xb80 #define GC_USB_DOEPCTL4_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL4_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL4_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL4_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL4_NAKSTS_OFFSET 0xb80 #define GC_USB_DOEPCTL4_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL4_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL4_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL4_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL4_EPTYPE_OFFSET 0xb80 #define GC_USB_DOEPCTL4_SNP_LSB 0x14 #define GC_USB_DOEPCTL4_SNP_MASK 0x100000 #define GC_USB_DOEPCTL4_SNP_SIZE 0x1 #define GC_USB_DOEPCTL4_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL4_SNP_OFFSET 0xb80 #define GC_USB_DOEPCTL4_STALL_LSB 0x15 #define GC_USB_DOEPCTL4_STALL_MASK 0x200000 #define GC_USB_DOEPCTL4_STALL_SIZE 0x1 #define GC_USB_DOEPCTL4_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL4_STALL_OFFSET 0xb80 #define GC_USB_DOEPCTL4_CNAK_LSB 0x1a #define GC_USB_DOEPCTL4_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL4_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL4_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL4_CNAK_OFFSET 0xb80 #define GC_USB_DOEPCTL4_SNAK_LSB 0x1b #define GC_USB_DOEPCTL4_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL4_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL4_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL4_SNAK_OFFSET 0xb80 #define GC_USB_DOEPCTL4_SETD0PID_LSB 0x1c #define GC_USB_DOEPCTL4_SETD0PID_MASK 0x10000000 #define GC_USB_DOEPCTL4_SETD0PID_SIZE 0x1 #define GC_USB_DOEPCTL4_SETD0PID_DEFAULT 0x0 #define GC_USB_DOEPCTL4_SETD0PID_OFFSET 0xb80 #define GC_USB_DOEPCTL4_SETD1PID_LSB 0x1d #define GC_USB_DOEPCTL4_SETD1PID_MASK 0x20000000 #define GC_USB_DOEPCTL4_SETD1PID_SIZE 0x1 #define GC_USB_DOEPCTL4_SETD1PID_DEFAULT 0x0 #define GC_USB_DOEPCTL4_SETD1PID_OFFSET 0xb80 #define GC_USB_DOEPCTL4_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL4_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL4_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL4_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL4_EPDIS_OFFSET 0xb80 #define GC_USB_DOEPCTL4_EPENA_LSB 0x1f #define GC_USB_DOEPCTL4_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL4_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL4_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL4_EPENA_OFFSET 0xb80 #define GC_USB_DOEPINT4_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT4_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT4_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT4_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT4_XFERCOMPL_OFFSET 0xb88 #define GC_USB_DOEPINT4_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT4_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT4_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT4_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT4_EPDISBLD_OFFSET 0xb88 #define GC_USB_DOEPINT4_AHBERR_LSB 0x2 #define GC_USB_DOEPINT4_AHBERR_MASK 0x4 #define GC_USB_DOEPINT4_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT4_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT4_AHBERR_OFFSET 0xb88 #define GC_USB_DOEPINT4_SETUP_LSB 0x3 #define GC_USB_DOEPINT4_SETUP_MASK 0x8 #define GC_USB_DOEPINT4_SETUP_SIZE 0x1 #define GC_USB_DOEPINT4_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT4_SETUP_OFFSET 0xb88 #define GC_USB_DOEPINT4_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT4_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT4_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT4_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT4_OUTTKNEPDIS_OFFSET 0xb88 #define GC_USB_DOEPINT4_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT4_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT4_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT4_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT4_STSPHSERCVD_OFFSET 0xb88 #define GC_USB_DOEPINT4_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT4_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT4_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT4_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT4_BACK2BACKSETUP_OFFSET 0xb88 #define GC_USB_DOEPINT4_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT4_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT4_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT4_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT4_OUTPKTERR_OFFSET 0xb88 #define GC_USB_DOEPINT4_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT4_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT4_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT4_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT4_BNAINTR_OFFSET 0xb88 #define GC_USB_DOEPINT4_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT4_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT4_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT4_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT4_PKTDRPSTS_OFFSET 0xb88 #define GC_USB_DOEPINT4_BBLEERR_LSB 0xc #define GC_USB_DOEPINT4_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT4_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT4_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT4_BBLEERR_OFFSET 0xb88 #define GC_USB_DOEPINT4_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT4_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT4_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT4_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT4_NAKINTRPT_OFFSET 0xb88 #define GC_USB_DOEPINT4_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT4_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT4_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT4_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT4_NYETINTRPT_OFFSET 0xb88 #define GC_USB_DOEPINT4_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT4_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT4_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT4_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT4_STUPPKTRCVD_OFFSET 0xb88 #define GC_USB_DOEPTSIZ4_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ4_XFERSIZE_MASK 0x7ffff #define GC_USB_DOEPTSIZ4_XFERSIZE_SIZE 0x13 #define GC_USB_DOEPTSIZ4_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ4_XFERSIZE_OFFSET 0xb90 #define GC_USB_DOEPTSIZ4_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ4_PKTCNT_MASK 0x1ff80000 #define GC_USB_DOEPTSIZ4_PKTCNT_SIZE 0xa #define GC_USB_DOEPTSIZ4_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ4_PKTCNT_OFFSET 0xb90 #define GC_USB_DOEPTSIZ4_RXDPID_LSB 0x1d #define GC_USB_DOEPTSIZ4_RXDPID_MASK 0x60000000 #define GC_USB_DOEPTSIZ4_RXDPID_SIZE 0x2 #define GC_USB_DOEPTSIZ4_RXDPID_DEFAULT 0x0 #define GC_USB_DOEPTSIZ4_RXDPID_OFFSET 0xb90 #define GC_USB_DOEPDMA4_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA4_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA4_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA4_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA4_DMAADDR_OFFSET 0xb94 #define GC_USB_DOEPDMAB4_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB4_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB4_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB4_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB4_DMABUFFERADDR_OFFSET 0xb9c #define GC_USB_DOEPCTL5_MPS_LSB 0x0 #define GC_USB_DOEPCTL5_MPS_MASK 0x7ff #define GC_USB_DOEPCTL5_MPS_SIZE 0xb #define GC_USB_DOEPCTL5_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL5_MPS_OFFSET 0xba0 #define GC_USB_DOEPCTL5_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL5_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL5_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL5_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL5_USBACTEP_OFFSET 0xba0 #define GC_USB_DOEPCTL5_DPID_LSB 0x10 #define GC_USB_DOEPCTL5_DPID_MASK 0x10000 #define GC_USB_DOEPCTL5_DPID_SIZE 0x1 #define GC_USB_DOEPCTL5_DPID_DEFAULT 0x0 #define GC_USB_DOEPCTL5_DPID_OFFSET 0xba0 #define GC_USB_DOEPCTL5_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL5_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL5_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL5_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL5_NAKSTS_OFFSET 0xba0 #define GC_USB_DOEPCTL5_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL5_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL5_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL5_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL5_EPTYPE_OFFSET 0xba0 #define GC_USB_DOEPCTL5_SNP_LSB 0x14 #define GC_USB_DOEPCTL5_SNP_MASK 0x100000 #define GC_USB_DOEPCTL5_SNP_SIZE 0x1 #define GC_USB_DOEPCTL5_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL5_SNP_OFFSET 0xba0 #define GC_USB_DOEPCTL5_STALL_LSB 0x15 #define GC_USB_DOEPCTL5_STALL_MASK 0x200000 #define GC_USB_DOEPCTL5_STALL_SIZE 0x1 #define GC_USB_DOEPCTL5_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL5_STALL_OFFSET 0xba0 #define GC_USB_DOEPCTL5_CNAK_LSB 0x1a #define GC_USB_DOEPCTL5_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL5_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL5_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL5_CNAK_OFFSET 0xba0 #define GC_USB_DOEPCTL5_SNAK_LSB 0x1b #define GC_USB_DOEPCTL5_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL5_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL5_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL5_SNAK_OFFSET 0xba0 #define GC_USB_DOEPCTL5_SETD0PID_LSB 0x1c #define GC_USB_DOEPCTL5_SETD0PID_MASK 0x10000000 #define GC_USB_DOEPCTL5_SETD0PID_SIZE 0x1 #define GC_USB_DOEPCTL5_SETD0PID_DEFAULT 0x0 #define GC_USB_DOEPCTL5_SETD0PID_OFFSET 0xba0 #define GC_USB_DOEPCTL5_SETD1PID_LSB 0x1d #define GC_USB_DOEPCTL5_SETD1PID_MASK 0x20000000 #define GC_USB_DOEPCTL5_SETD1PID_SIZE 0x1 #define GC_USB_DOEPCTL5_SETD1PID_DEFAULT 0x0 #define GC_USB_DOEPCTL5_SETD1PID_OFFSET 0xba0 #define GC_USB_DOEPCTL5_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL5_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL5_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL5_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL5_EPDIS_OFFSET 0xba0 #define GC_USB_DOEPCTL5_EPENA_LSB 0x1f #define GC_USB_DOEPCTL5_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL5_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL5_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL5_EPENA_OFFSET 0xba0 #define GC_USB_DOEPINT5_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT5_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT5_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT5_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT5_XFERCOMPL_OFFSET 0xba8 #define GC_USB_DOEPINT5_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT5_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT5_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT5_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT5_EPDISBLD_OFFSET 0xba8 #define GC_USB_DOEPINT5_AHBERR_LSB 0x2 #define GC_USB_DOEPINT5_AHBERR_MASK 0x4 #define GC_USB_DOEPINT5_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT5_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT5_AHBERR_OFFSET 0xba8 #define GC_USB_DOEPINT5_SETUP_LSB 0x3 #define GC_USB_DOEPINT5_SETUP_MASK 0x8 #define GC_USB_DOEPINT5_SETUP_SIZE 0x1 #define GC_USB_DOEPINT5_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT5_SETUP_OFFSET 0xba8 #define GC_USB_DOEPINT5_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT5_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT5_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT5_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT5_OUTTKNEPDIS_OFFSET 0xba8 #define GC_USB_DOEPINT5_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT5_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT5_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT5_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT5_STSPHSERCVD_OFFSET 0xba8 #define GC_USB_DOEPINT5_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT5_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT5_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT5_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT5_BACK2BACKSETUP_OFFSET 0xba8 #define GC_USB_DOEPINT5_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT5_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT5_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT5_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT5_OUTPKTERR_OFFSET 0xba8 #define GC_USB_DOEPINT5_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT5_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT5_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT5_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT5_BNAINTR_OFFSET 0xba8 #define GC_USB_DOEPINT5_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT5_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT5_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT5_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT5_PKTDRPSTS_OFFSET 0xba8 #define GC_USB_DOEPINT5_BBLEERR_LSB 0xc #define GC_USB_DOEPINT5_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT5_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT5_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT5_BBLEERR_OFFSET 0xba8 #define GC_USB_DOEPINT5_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT5_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT5_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT5_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT5_NAKINTRPT_OFFSET 0xba8 #define GC_USB_DOEPINT5_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT5_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT5_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT5_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT5_NYETINTRPT_OFFSET 0xba8 #define GC_USB_DOEPINT5_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT5_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT5_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT5_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT5_STUPPKTRCVD_OFFSET 0xba8 #define GC_USB_DOEPTSIZ5_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ5_XFERSIZE_MASK 0x7ffff #define GC_USB_DOEPTSIZ5_XFERSIZE_SIZE 0x13 #define GC_USB_DOEPTSIZ5_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ5_XFERSIZE_OFFSET 0xbb0 #define GC_USB_DOEPTSIZ5_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ5_PKTCNT_MASK 0x1ff80000 #define GC_USB_DOEPTSIZ5_PKTCNT_SIZE 0xa #define GC_USB_DOEPTSIZ5_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ5_PKTCNT_OFFSET 0xbb0 #define GC_USB_DOEPTSIZ5_RXDPID_LSB 0x1d #define GC_USB_DOEPTSIZ5_RXDPID_MASK 0x60000000 #define GC_USB_DOEPTSIZ5_RXDPID_SIZE 0x2 #define GC_USB_DOEPTSIZ5_RXDPID_DEFAULT 0x0 #define GC_USB_DOEPTSIZ5_RXDPID_OFFSET 0xbb0 #define GC_USB_DOEPDMA5_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA5_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA5_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA5_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA5_DMAADDR_OFFSET 0xbb4 #define GC_USB_DOEPDMAB5_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB5_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB5_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB5_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB5_DMABUFFERADDR_OFFSET 0xbbc #define GC_USB_DOEPCTL6_MPS_LSB 0x0 #define GC_USB_DOEPCTL6_MPS_MASK 0x7ff #define GC_USB_DOEPCTL6_MPS_SIZE 0xb #define GC_USB_DOEPCTL6_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL6_MPS_OFFSET 0xbc0 #define GC_USB_DOEPCTL6_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL6_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL6_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL6_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL6_USBACTEP_OFFSET 0xbc0 #define GC_USB_DOEPCTL6_DPID_LSB 0x10 #define GC_USB_DOEPCTL6_DPID_MASK 0x10000 #define GC_USB_DOEPCTL6_DPID_SIZE 0x1 #define GC_USB_DOEPCTL6_DPID_DEFAULT 0x0 #define GC_USB_DOEPCTL6_DPID_OFFSET 0xbc0 #define GC_USB_DOEPCTL6_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL6_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL6_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL6_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL6_NAKSTS_OFFSET 0xbc0 #define GC_USB_DOEPCTL6_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL6_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL6_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL6_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL6_EPTYPE_OFFSET 0xbc0 #define GC_USB_DOEPCTL6_SNP_LSB 0x14 #define GC_USB_DOEPCTL6_SNP_MASK 0x100000 #define GC_USB_DOEPCTL6_SNP_SIZE 0x1 #define GC_USB_DOEPCTL6_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL6_SNP_OFFSET 0xbc0 #define GC_USB_DOEPCTL6_STALL_LSB 0x15 #define GC_USB_DOEPCTL6_STALL_MASK 0x200000 #define GC_USB_DOEPCTL6_STALL_SIZE 0x1 #define GC_USB_DOEPCTL6_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL6_STALL_OFFSET 0xbc0 #define GC_USB_DOEPCTL6_CNAK_LSB 0x1a #define GC_USB_DOEPCTL6_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL6_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL6_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL6_CNAK_OFFSET 0xbc0 #define GC_USB_DOEPCTL6_SNAK_LSB 0x1b #define GC_USB_DOEPCTL6_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL6_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL6_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL6_SNAK_OFFSET 0xbc0 #define GC_USB_DOEPCTL6_SETD0PID_LSB 0x1c #define GC_USB_DOEPCTL6_SETD0PID_MASK 0x10000000 #define GC_USB_DOEPCTL6_SETD0PID_SIZE 0x1 #define GC_USB_DOEPCTL6_SETD0PID_DEFAULT 0x0 #define GC_USB_DOEPCTL6_SETD0PID_OFFSET 0xbc0 #define GC_USB_DOEPCTL6_SETD1PID_LSB 0x1d #define GC_USB_DOEPCTL6_SETD1PID_MASK 0x20000000 #define GC_USB_DOEPCTL6_SETD1PID_SIZE 0x1 #define GC_USB_DOEPCTL6_SETD1PID_DEFAULT 0x0 #define GC_USB_DOEPCTL6_SETD1PID_OFFSET 0xbc0 #define GC_USB_DOEPCTL6_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL6_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL6_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL6_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL6_EPDIS_OFFSET 0xbc0 #define GC_USB_DOEPCTL6_EPENA_LSB 0x1f #define GC_USB_DOEPCTL6_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL6_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL6_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL6_EPENA_OFFSET 0xbc0 #define GC_USB_DOEPINT6_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT6_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT6_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT6_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT6_XFERCOMPL_OFFSET 0xbc8 #define GC_USB_DOEPINT6_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT6_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT6_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT6_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT6_EPDISBLD_OFFSET 0xbc8 #define GC_USB_DOEPINT6_AHBERR_LSB 0x2 #define GC_USB_DOEPINT6_AHBERR_MASK 0x4 #define GC_USB_DOEPINT6_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT6_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT6_AHBERR_OFFSET 0xbc8 #define GC_USB_DOEPINT6_SETUP_LSB 0x3 #define GC_USB_DOEPINT6_SETUP_MASK 0x8 #define GC_USB_DOEPINT6_SETUP_SIZE 0x1 #define GC_USB_DOEPINT6_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT6_SETUP_OFFSET 0xbc8 #define GC_USB_DOEPINT6_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT6_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT6_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT6_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT6_OUTTKNEPDIS_OFFSET 0xbc8 #define GC_USB_DOEPINT6_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT6_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT6_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT6_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT6_STSPHSERCVD_OFFSET 0xbc8 #define GC_USB_DOEPINT6_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT6_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT6_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT6_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT6_BACK2BACKSETUP_OFFSET 0xbc8 #define GC_USB_DOEPINT6_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT6_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT6_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT6_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT6_OUTPKTERR_OFFSET 0xbc8 #define GC_USB_DOEPINT6_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT6_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT6_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT6_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT6_BNAINTR_OFFSET 0xbc8 #define GC_USB_DOEPINT6_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT6_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT6_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT6_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT6_PKTDRPSTS_OFFSET 0xbc8 #define GC_USB_DOEPINT6_BBLEERR_LSB 0xc #define GC_USB_DOEPINT6_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT6_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT6_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT6_BBLEERR_OFFSET 0xbc8 #define GC_USB_DOEPINT6_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT6_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT6_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT6_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT6_NAKINTRPT_OFFSET 0xbc8 #define GC_USB_DOEPINT6_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT6_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT6_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT6_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT6_NYETINTRPT_OFFSET 0xbc8 #define GC_USB_DOEPINT6_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT6_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT6_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT6_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT6_STUPPKTRCVD_OFFSET 0xbc8 #define GC_USB_DOEPTSIZ6_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ6_XFERSIZE_MASK 0x7ffff #define GC_USB_DOEPTSIZ6_XFERSIZE_SIZE 0x13 #define GC_USB_DOEPTSIZ6_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ6_XFERSIZE_OFFSET 0xbd0 #define GC_USB_DOEPTSIZ6_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ6_PKTCNT_MASK 0x1ff80000 #define GC_USB_DOEPTSIZ6_PKTCNT_SIZE 0xa #define GC_USB_DOEPTSIZ6_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ6_PKTCNT_OFFSET 0xbd0 #define GC_USB_DOEPTSIZ6_RXDPID_LSB 0x1d #define GC_USB_DOEPTSIZ6_RXDPID_MASK 0x60000000 #define GC_USB_DOEPTSIZ6_RXDPID_SIZE 0x2 #define GC_USB_DOEPTSIZ6_RXDPID_DEFAULT 0x0 #define GC_USB_DOEPTSIZ6_RXDPID_OFFSET 0xbd0 #define GC_USB_DOEPDMA6_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA6_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA6_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA6_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA6_DMAADDR_OFFSET 0xbd4 #define GC_USB_DOEPDMAB6_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB6_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB6_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB6_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB6_DMABUFFERADDR_OFFSET 0xbdc #define GC_USB_DOEPCTL7_MPS_LSB 0x0 #define GC_USB_DOEPCTL7_MPS_MASK 0x7ff #define GC_USB_DOEPCTL7_MPS_SIZE 0xb #define GC_USB_DOEPCTL7_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL7_MPS_OFFSET 0xbe0 #define GC_USB_DOEPCTL7_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL7_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL7_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL7_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL7_USBACTEP_OFFSET 0xbe0 #define GC_USB_DOEPCTL7_DPID_LSB 0x10 #define GC_USB_DOEPCTL7_DPID_MASK 0x10000 #define GC_USB_DOEPCTL7_DPID_SIZE 0x1 #define GC_USB_DOEPCTL7_DPID_DEFAULT 0x0 #define GC_USB_DOEPCTL7_DPID_OFFSET 0xbe0 #define GC_USB_DOEPCTL7_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL7_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL7_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL7_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL7_NAKSTS_OFFSET 0xbe0 #define GC_USB_DOEPCTL7_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL7_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL7_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL7_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL7_EPTYPE_OFFSET 0xbe0 #define GC_USB_DOEPCTL7_SNP_LSB 0x14 #define GC_USB_DOEPCTL7_SNP_MASK 0x100000 #define GC_USB_DOEPCTL7_SNP_SIZE 0x1 #define GC_USB_DOEPCTL7_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL7_SNP_OFFSET 0xbe0 #define GC_USB_DOEPCTL7_STALL_LSB 0x15 #define GC_USB_DOEPCTL7_STALL_MASK 0x200000 #define GC_USB_DOEPCTL7_STALL_SIZE 0x1 #define GC_USB_DOEPCTL7_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL7_STALL_OFFSET 0xbe0 #define GC_USB_DOEPCTL7_CNAK_LSB 0x1a #define GC_USB_DOEPCTL7_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL7_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL7_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL7_CNAK_OFFSET 0xbe0 #define GC_USB_DOEPCTL7_SNAK_LSB 0x1b #define GC_USB_DOEPCTL7_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL7_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL7_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL7_SNAK_OFFSET 0xbe0 #define GC_USB_DOEPCTL7_SETD0PID_LSB 0x1c #define GC_USB_DOEPCTL7_SETD0PID_MASK 0x10000000 #define GC_USB_DOEPCTL7_SETD0PID_SIZE 0x1 #define GC_USB_DOEPCTL7_SETD0PID_DEFAULT 0x0 #define GC_USB_DOEPCTL7_SETD0PID_OFFSET 0xbe0 #define GC_USB_DOEPCTL7_SETD1PID_LSB 0x1d #define GC_USB_DOEPCTL7_SETD1PID_MASK 0x20000000 #define GC_USB_DOEPCTL7_SETD1PID_SIZE 0x1 #define GC_USB_DOEPCTL7_SETD1PID_DEFAULT 0x0 #define GC_USB_DOEPCTL7_SETD1PID_OFFSET 0xbe0 #define GC_USB_DOEPCTL7_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL7_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL7_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL7_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL7_EPDIS_OFFSET 0xbe0 #define GC_USB_DOEPCTL7_EPENA_LSB 0x1f #define GC_USB_DOEPCTL7_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL7_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL7_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL7_EPENA_OFFSET 0xbe0 #define GC_USB_DOEPINT7_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT7_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT7_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT7_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT7_XFERCOMPL_OFFSET 0xbe8 #define GC_USB_DOEPINT7_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT7_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT7_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT7_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT7_EPDISBLD_OFFSET 0xbe8 #define GC_USB_DOEPINT7_AHBERR_LSB 0x2 #define GC_USB_DOEPINT7_AHBERR_MASK 0x4 #define GC_USB_DOEPINT7_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT7_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT7_AHBERR_OFFSET 0xbe8 #define GC_USB_DOEPINT7_SETUP_LSB 0x3 #define GC_USB_DOEPINT7_SETUP_MASK 0x8 #define GC_USB_DOEPINT7_SETUP_SIZE 0x1 #define GC_USB_DOEPINT7_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT7_SETUP_OFFSET 0xbe8 #define GC_USB_DOEPINT7_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT7_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT7_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT7_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT7_OUTTKNEPDIS_OFFSET 0xbe8 #define GC_USB_DOEPINT7_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT7_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT7_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT7_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT7_STSPHSERCVD_OFFSET 0xbe8 #define GC_USB_DOEPINT7_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT7_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT7_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT7_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT7_BACK2BACKSETUP_OFFSET 0xbe8 #define GC_USB_DOEPINT7_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT7_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT7_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT7_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT7_OUTPKTERR_OFFSET 0xbe8 #define GC_USB_DOEPINT7_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT7_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT7_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT7_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT7_BNAINTR_OFFSET 0xbe8 #define GC_USB_DOEPINT7_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT7_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT7_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT7_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT7_PKTDRPSTS_OFFSET 0xbe8 #define GC_USB_DOEPINT7_BBLEERR_LSB 0xc #define GC_USB_DOEPINT7_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT7_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT7_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT7_BBLEERR_OFFSET 0xbe8 #define GC_USB_DOEPINT7_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT7_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT7_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT7_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT7_NAKINTRPT_OFFSET 0xbe8 #define GC_USB_DOEPINT7_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT7_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT7_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT7_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT7_NYETINTRPT_OFFSET 0xbe8 #define GC_USB_DOEPINT7_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT7_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT7_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT7_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT7_STUPPKTRCVD_OFFSET 0xbe8 #define GC_USB_DOEPTSIZ7_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ7_XFERSIZE_MASK 0x7ffff #define GC_USB_DOEPTSIZ7_XFERSIZE_SIZE 0x13 #define GC_USB_DOEPTSIZ7_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ7_XFERSIZE_OFFSET 0xbf0 #define GC_USB_DOEPTSIZ7_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ7_PKTCNT_MASK 0x1ff80000 #define GC_USB_DOEPTSIZ7_PKTCNT_SIZE 0xa #define GC_USB_DOEPTSIZ7_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ7_PKTCNT_OFFSET 0xbf0 #define GC_USB_DOEPTSIZ7_RXDPID_LSB 0x1d #define GC_USB_DOEPTSIZ7_RXDPID_MASK 0x60000000 #define GC_USB_DOEPTSIZ7_RXDPID_SIZE 0x2 #define GC_USB_DOEPTSIZ7_RXDPID_DEFAULT 0x0 #define GC_USB_DOEPTSIZ7_RXDPID_OFFSET 0xbf0 #define GC_USB_DOEPDMA7_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA7_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA7_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA7_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA7_DMAADDR_OFFSET 0xbf4 #define GC_USB_DOEPDMAB7_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB7_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB7_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB7_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB7_DMABUFFERADDR_OFFSET 0xbfc #define GC_USB_DOEPCTL8_MPS_LSB 0x0 #define GC_USB_DOEPCTL8_MPS_MASK 0x7ff #define GC_USB_DOEPCTL8_MPS_SIZE 0xb #define GC_USB_DOEPCTL8_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL8_MPS_OFFSET 0xc00 #define GC_USB_DOEPCTL8_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL8_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL8_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL8_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL8_USBACTEP_OFFSET 0xc00 #define GC_USB_DOEPCTL8_DPID_LSB 0x10 #define GC_USB_DOEPCTL8_DPID_MASK 0x10000 #define GC_USB_DOEPCTL8_DPID_SIZE 0x1 #define GC_USB_DOEPCTL8_DPID_DEFAULT 0x0 #define GC_USB_DOEPCTL8_DPID_OFFSET 0xc00 #define GC_USB_DOEPCTL8_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL8_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL8_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL8_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL8_NAKSTS_OFFSET 0xc00 #define GC_USB_DOEPCTL8_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL8_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL8_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL8_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL8_EPTYPE_OFFSET 0xc00 #define GC_USB_DOEPCTL8_SNP_LSB 0x14 #define GC_USB_DOEPCTL8_SNP_MASK 0x100000 #define GC_USB_DOEPCTL8_SNP_SIZE 0x1 #define GC_USB_DOEPCTL8_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL8_SNP_OFFSET 0xc00 #define GC_USB_DOEPCTL8_STALL_LSB 0x15 #define GC_USB_DOEPCTL8_STALL_MASK 0x200000 #define GC_USB_DOEPCTL8_STALL_SIZE 0x1 #define GC_USB_DOEPCTL8_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL8_STALL_OFFSET 0xc00 #define GC_USB_DOEPCTL8_CNAK_LSB 0x1a #define GC_USB_DOEPCTL8_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL8_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL8_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL8_CNAK_OFFSET 0xc00 #define GC_USB_DOEPCTL8_SNAK_LSB 0x1b #define GC_USB_DOEPCTL8_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL8_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL8_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL8_SNAK_OFFSET 0xc00 #define GC_USB_DOEPCTL8_SETD0PID_LSB 0x1c #define GC_USB_DOEPCTL8_SETD0PID_MASK 0x10000000 #define GC_USB_DOEPCTL8_SETD0PID_SIZE 0x1 #define GC_USB_DOEPCTL8_SETD0PID_DEFAULT 0x0 #define GC_USB_DOEPCTL8_SETD0PID_OFFSET 0xc00 #define GC_USB_DOEPCTL8_SETD1PID_LSB 0x1d #define GC_USB_DOEPCTL8_SETD1PID_MASK 0x20000000 #define GC_USB_DOEPCTL8_SETD1PID_SIZE 0x1 #define GC_USB_DOEPCTL8_SETD1PID_DEFAULT 0x0 #define GC_USB_DOEPCTL8_SETD1PID_OFFSET 0xc00 #define GC_USB_DOEPCTL8_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL8_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL8_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL8_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL8_EPDIS_OFFSET 0xc00 #define GC_USB_DOEPCTL8_EPENA_LSB 0x1f #define GC_USB_DOEPCTL8_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL8_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL8_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL8_EPENA_OFFSET 0xc00 #define GC_USB_DOEPINT8_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT8_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT8_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT8_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT8_XFERCOMPL_OFFSET 0xc08 #define GC_USB_DOEPINT8_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT8_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT8_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT8_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT8_EPDISBLD_OFFSET 0xc08 #define GC_USB_DOEPINT8_AHBERR_LSB 0x2 #define GC_USB_DOEPINT8_AHBERR_MASK 0x4 #define GC_USB_DOEPINT8_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT8_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT8_AHBERR_OFFSET 0xc08 #define GC_USB_DOEPINT8_SETUP_LSB 0x3 #define GC_USB_DOEPINT8_SETUP_MASK 0x8 #define GC_USB_DOEPINT8_SETUP_SIZE 0x1 #define GC_USB_DOEPINT8_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT8_SETUP_OFFSET 0xc08 #define GC_USB_DOEPINT8_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT8_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT8_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT8_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT8_OUTTKNEPDIS_OFFSET 0xc08 #define GC_USB_DOEPINT8_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT8_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT8_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT8_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT8_STSPHSERCVD_OFFSET 0xc08 #define GC_USB_DOEPINT8_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT8_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT8_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT8_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT8_BACK2BACKSETUP_OFFSET 0xc08 #define GC_USB_DOEPINT8_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT8_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT8_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT8_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT8_OUTPKTERR_OFFSET 0xc08 #define GC_USB_DOEPINT8_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT8_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT8_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT8_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT8_BNAINTR_OFFSET 0xc08 #define GC_USB_DOEPINT8_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT8_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT8_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT8_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT8_PKTDRPSTS_OFFSET 0xc08 #define GC_USB_DOEPINT8_BBLEERR_LSB 0xc #define GC_USB_DOEPINT8_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT8_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT8_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT8_BBLEERR_OFFSET 0xc08 #define GC_USB_DOEPINT8_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT8_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT8_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT8_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT8_NAKINTRPT_OFFSET 0xc08 #define GC_USB_DOEPINT8_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT8_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT8_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT8_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT8_NYETINTRPT_OFFSET 0xc08 #define GC_USB_DOEPINT8_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT8_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT8_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT8_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT8_STUPPKTRCVD_OFFSET 0xc08 #define GC_USB_DOEPTSIZ8_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ8_XFERSIZE_MASK 0x7ffff #define GC_USB_DOEPTSIZ8_XFERSIZE_SIZE 0x13 #define GC_USB_DOEPTSIZ8_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ8_XFERSIZE_OFFSET 0xc10 #define GC_USB_DOEPTSIZ8_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ8_PKTCNT_MASK 0x1ff80000 #define GC_USB_DOEPTSIZ8_PKTCNT_SIZE 0xa #define GC_USB_DOEPTSIZ8_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ8_PKTCNT_OFFSET 0xc10 #define GC_USB_DOEPTSIZ8_RXDPID_LSB 0x1d #define GC_USB_DOEPTSIZ8_RXDPID_MASK 0x60000000 #define GC_USB_DOEPTSIZ8_RXDPID_SIZE 0x2 #define GC_USB_DOEPTSIZ8_RXDPID_DEFAULT 0x0 #define GC_USB_DOEPTSIZ8_RXDPID_OFFSET 0xc10 #define GC_USB_DOEPDMA8_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA8_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA8_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA8_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA8_DMAADDR_OFFSET 0xc14 #define GC_USB_DOEPDMAB8_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB8_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB8_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB8_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB8_DMABUFFERADDR_OFFSET 0xc1c #define GC_USB_DOEPCTL9_MPS_LSB 0x0 #define GC_USB_DOEPCTL9_MPS_MASK 0x7ff #define GC_USB_DOEPCTL9_MPS_SIZE 0xb #define GC_USB_DOEPCTL9_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL9_MPS_OFFSET 0xc20 #define GC_USB_DOEPCTL9_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL9_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL9_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL9_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL9_USBACTEP_OFFSET 0xc20 #define GC_USB_DOEPCTL9_DPID_LSB 0x10 #define GC_USB_DOEPCTL9_DPID_MASK 0x10000 #define GC_USB_DOEPCTL9_DPID_SIZE 0x1 #define GC_USB_DOEPCTL9_DPID_DEFAULT 0x0 #define GC_USB_DOEPCTL9_DPID_OFFSET 0xc20 #define GC_USB_DOEPCTL9_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL9_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL9_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL9_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL9_NAKSTS_OFFSET 0xc20 #define GC_USB_DOEPCTL9_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL9_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL9_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL9_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL9_EPTYPE_OFFSET 0xc20 #define GC_USB_DOEPCTL9_SNP_LSB 0x14 #define GC_USB_DOEPCTL9_SNP_MASK 0x100000 #define GC_USB_DOEPCTL9_SNP_SIZE 0x1 #define GC_USB_DOEPCTL9_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL9_SNP_OFFSET 0xc20 #define GC_USB_DOEPCTL9_STALL_LSB 0x15 #define GC_USB_DOEPCTL9_STALL_MASK 0x200000 #define GC_USB_DOEPCTL9_STALL_SIZE 0x1 #define GC_USB_DOEPCTL9_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL9_STALL_OFFSET 0xc20 #define GC_USB_DOEPCTL9_CNAK_LSB 0x1a #define GC_USB_DOEPCTL9_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL9_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL9_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL9_CNAK_OFFSET 0xc20 #define GC_USB_DOEPCTL9_SNAK_LSB 0x1b #define GC_USB_DOEPCTL9_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL9_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL9_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL9_SNAK_OFFSET 0xc20 #define GC_USB_DOEPCTL9_SETD0PID_LSB 0x1c #define GC_USB_DOEPCTL9_SETD0PID_MASK 0x10000000 #define GC_USB_DOEPCTL9_SETD0PID_SIZE 0x1 #define GC_USB_DOEPCTL9_SETD0PID_DEFAULT 0x0 #define GC_USB_DOEPCTL9_SETD0PID_OFFSET 0xc20 #define GC_USB_DOEPCTL9_SETD1PID_LSB 0x1d #define GC_USB_DOEPCTL9_SETD1PID_MASK 0x20000000 #define GC_USB_DOEPCTL9_SETD1PID_SIZE 0x1 #define GC_USB_DOEPCTL9_SETD1PID_DEFAULT 0x0 #define GC_USB_DOEPCTL9_SETD1PID_OFFSET 0xc20 #define GC_USB_DOEPCTL9_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL9_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL9_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL9_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL9_EPDIS_OFFSET 0xc20 #define GC_USB_DOEPCTL9_EPENA_LSB 0x1f #define GC_USB_DOEPCTL9_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL9_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL9_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL9_EPENA_OFFSET 0xc20 #define GC_USB_DOEPINT9_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT9_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT9_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT9_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT9_XFERCOMPL_OFFSET 0xc28 #define GC_USB_DOEPINT9_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT9_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT9_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT9_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT9_EPDISBLD_OFFSET 0xc28 #define GC_USB_DOEPINT9_AHBERR_LSB 0x2 #define GC_USB_DOEPINT9_AHBERR_MASK 0x4 #define GC_USB_DOEPINT9_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT9_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT9_AHBERR_OFFSET 0xc28 #define GC_USB_DOEPINT9_SETUP_LSB 0x3 #define GC_USB_DOEPINT9_SETUP_MASK 0x8 #define GC_USB_DOEPINT9_SETUP_SIZE 0x1 #define GC_USB_DOEPINT9_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT9_SETUP_OFFSET 0xc28 #define GC_USB_DOEPINT9_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT9_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT9_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT9_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT9_OUTTKNEPDIS_OFFSET 0xc28 #define GC_USB_DOEPINT9_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT9_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT9_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT9_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT9_STSPHSERCVD_OFFSET 0xc28 #define GC_USB_DOEPINT9_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT9_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT9_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT9_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT9_BACK2BACKSETUP_OFFSET 0xc28 #define GC_USB_DOEPINT9_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT9_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT9_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT9_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT9_OUTPKTERR_OFFSET 0xc28 #define GC_USB_DOEPINT9_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT9_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT9_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT9_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT9_BNAINTR_OFFSET 0xc28 #define GC_USB_DOEPINT9_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT9_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT9_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT9_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT9_PKTDRPSTS_OFFSET 0xc28 #define GC_USB_DOEPINT9_BBLEERR_LSB 0xc #define GC_USB_DOEPINT9_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT9_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT9_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT9_BBLEERR_OFFSET 0xc28 #define GC_USB_DOEPINT9_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT9_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT9_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT9_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT9_NAKINTRPT_OFFSET 0xc28 #define GC_USB_DOEPINT9_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT9_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT9_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT9_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT9_NYETINTRPT_OFFSET 0xc28 #define GC_USB_DOEPINT9_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT9_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT9_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT9_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT9_STUPPKTRCVD_OFFSET 0xc28 #define GC_USB_DOEPTSIZ9_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ9_XFERSIZE_MASK 0x7ffff #define GC_USB_DOEPTSIZ9_XFERSIZE_SIZE 0x13 #define GC_USB_DOEPTSIZ9_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ9_XFERSIZE_OFFSET 0xc30 #define GC_USB_DOEPTSIZ9_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ9_PKTCNT_MASK 0x1ff80000 #define GC_USB_DOEPTSIZ9_PKTCNT_SIZE 0xa #define GC_USB_DOEPTSIZ9_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ9_PKTCNT_OFFSET 0xc30 #define GC_USB_DOEPTSIZ9_RXDPID_LSB 0x1d #define GC_USB_DOEPTSIZ9_RXDPID_MASK 0x60000000 #define GC_USB_DOEPTSIZ9_RXDPID_SIZE 0x2 #define GC_USB_DOEPTSIZ9_RXDPID_DEFAULT 0x0 #define GC_USB_DOEPTSIZ9_RXDPID_OFFSET 0xc30 #define GC_USB_DOEPDMA9_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA9_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA9_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA9_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA9_DMAADDR_OFFSET 0xc34 #define GC_USB_DOEPDMAB9_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB9_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB9_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB9_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB9_DMABUFFERADDR_OFFSET 0xc3c #define GC_USB_DOEPCTL10_MPS_LSB 0x0 #define GC_USB_DOEPCTL10_MPS_MASK 0x7ff #define GC_USB_DOEPCTL10_MPS_SIZE 0xb #define GC_USB_DOEPCTL10_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL10_MPS_OFFSET 0xc40 #define GC_USB_DOEPCTL10_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL10_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL10_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL10_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL10_USBACTEP_OFFSET 0xc40 #define GC_USB_DOEPCTL10_DPID_LSB 0x10 #define GC_USB_DOEPCTL10_DPID_MASK 0x10000 #define GC_USB_DOEPCTL10_DPID_SIZE 0x1 #define GC_USB_DOEPCTL10_DPID_DEFAULT 0x0 #define GC_USB_DOEPCTL10_DPID_OFFSET 0xc40 #define GC_USB_DOEPCTL10_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL10_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL10_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL10_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL10_NAKSTS_OFFSET 0xc40 #define GC_USB_DOEPCTL10_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL10_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL10_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL10_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL10_EPTYPE_OFFSET 0xc40 #define GC_USB_DOEPCTL10_SNP_LSB 0x14 #define GC_USB_DOEPCTL10_SNP_MASK 0x100000 #define GC_USB_DOEPCTL10_SNP_SIZE 0x1 #define GC_USB_DOEPCTL10_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL10_SNP_OFFSET 0xc40 #define GC_USB_DOEPCTL10_STALL_LSB 0x15 #define GC_USB_DOEPCTL10_STALL_MASK 0x200000 #define GC_USB_DOEPCTL10_STALL_SIZE 0x1 #define GC_USB_DOEPCTL10_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL10_STALL_OFFSET 0xc40 #define GC_USB_DOEPCTL10_CNAK_LSB 0x1a #define GC_USB_DOEPCTL10_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL10_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL10_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL10_CNAK_OFFSET 0xc40 #define GC_USB_DOEPCTL10_SNAK_LSB 0x1b #define GC_USB_DOEPCTL10_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL10_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL10_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL10_SNAK_OFFSET 0xc40 #define GC_USB_DOEPCTL10_SETD0PID_LSB 0x1c #define GC_USB_DOEPCTL10_SETD0PID_MASK 0x10000000 #define GC_USB_DOEPCTL10_SETD0PID_SIZE 0x1 #define GC_USB_DOEPCTL10_SETD0PID_DEFAULT 0x0 #define GC_USB_DOEPCTL10_SETD0PID_OFFSET 0xc40 #define GC_USB_DOEPCTL10_SETD1PID_LSB 0x1d #define GC_USB_DOEPCTL10_SETD1PID_MASK 0x20000000 #define GC_USB_DOEPCTL10_SETD1PID_SIZE 0x1 #define GC_USB_DOEPCTL10_SETD1PID_DEFAULT 0x0 #define GC_USB_DOEPCTL10_SETD1PID_OFFSET 0xc40 #define GC_USB_DOEPCTL10_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL10_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL10_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL10_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL10_EPDIS_OFFSET 0xc40 #define GC_USB_DOEPCTL10_EPENA_LSB 0x1f #define GC_USB_DOEPCTL10_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL10_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL10_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL10_EPENA_OFFSET 0xc40 #define GC_USB_DOEPINT10_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT10_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT10_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT10_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT10_XFERCOMPL_OFFSET 0xc48 #define GC_USB_DOEPINT10_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT10_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT10_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT10_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT10_EPDISBLD_OFFSET 0xc48 #define GC_USB_DOEPINT10_AHBERR_LSB 0x2 #define GC_USB_DOEPINT10_AHBERR_MASK 0x4 #define GC_USB_DOEPINT10_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT10_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT10_AHBERR_OFFSET 0xc48 #define GC_USB_DOEPINT10_SETUP_LSB 0x3 #define GC_USB_DOEPINT10_SETUP_MASK 0x8 #define GC_USB_DOEPINT10_SETUP_SIZE 0x1 #define GC_USB_DOEPINT10_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT10_SETUP_OFFSET 0xc48 #define GC_USB_DOEPINT10_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT10_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT10_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT10_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT10_OUTTKNEPDIS_OFFSET 0xc48 #define GC_USB_DOEPINT10_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT10_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT10_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT10_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT10_STSPHSERCVD_OFFSET 0xc48 #define GC_USB_DOEPINT10_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT10_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT10_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT10_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT10_BACK2BACKSETUP_OFFSET 0xc48 #define GC_USB_DOEPINT10_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT10_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT10_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT10_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT10_OUTPKTERR_OFFSET 0xc48 #define GC_USB_DOEPINT10_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT10_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT10_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT10_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT10_BNAINTR_OFFSET 0xc48 #define GC_USB_DOEPINT10_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT10_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT10_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT10_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT10_PKTDRPSTS_OFFSET 0xc48 #define GC_USB_DOEPINT10_BBLEERR_LSB 0xc #define GC_USB_DOEPINT10_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT10_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT10_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT10_BBLEERR_OFFSET 0xc48 #define GC_USB_DOEPINT10_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT10_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT10_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT10_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT10_NAKINTRPT_OFFSET 0xc48 #define GC_USB_DOEPINT10_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT10_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT10_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT10_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT10_NYETINTRPT_OFFSET 0xc48 #define GC_USB_DOEPINT10_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT10_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT10_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT10_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT10_STUPPKTRCVD_OFFSET 0xc48 #define GC_USB_DOEPTSIZ10_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ10_XFERSIZE_MASK 0x7ffff #define GC_USB_DOEPTSIZ10_XFERSIZE_SIZE 0x13 #define GC_USB_DOEPTSIZ10_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ10_XFERSIZE_OFFSET 0xc50 #define GC_USB_DOEPTSIZ10_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ10_PKTCNT_MASK 0x1ff80000 #define GC_USB_DOEPTSIZ10_PKTCNT_SIZE 0xa #define GC_USB_DOEPTSIZ10_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ10_PKTCNT_OFFSET 0xc50 #define GC_USB_DOEPTSIZ10_RXDPID_LSB 0x1d #define GC_USB_DOEPTSIZ10_RXDPID_MASK 0x60000000 #define GC_USB_DOEPTSIZ10_RXDPID_SIZE 0x2 #define GC_USB_DOEPTSIZ10_RXDPID_DEFAULT 0x0 #define GC_USB_DOEPTSIZ10_RXDPID_OFFSET 0xc50 #define GC_USB_DOEPDMA10_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA10_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA10_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA10_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA10_DMAADDR_OFFSET 0xc54 #define GC_USB_DOEPDMAB10_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB10_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB10_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB10_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB10_DMABUFFERADDR_OFFSET 0xc5c #define GC_USB_DOEPCTL11_MPS_LSB 0x0 #define GC_USB_DOEPCTL11_MPS_MASK 0x7ff #define GC_USB_DOEPCTL11_MPS_SIZE 0xb #define GC_USB_DOEPCTL11_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL11_MPS_OFFSET 0xc60 #define GC_USB_DOEPCTL11_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL11_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL11_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL11_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL11_USBACTEP_OFFSET 0xc60 #define GC_USB_DOEPCTL11_DPID_LSB 0x10 #define GC_USB_DOEPCTL11_DPID_MASK 0x10000 #define GC_USB_DOEPCTL11_DPID_SIZE 0x1 #define GC_USB_DOEPCTL11_DPID_DEFAULT 0x0 #define GC_USB_DOEPCTL11_DPID_OFFSET 0xc60 #define GC_USB_DOEPCTL11_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL11_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL11_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL11_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL11_NAKSTS_OFFSET 0xc60 #define GC_USB_DOEPCTL11_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL11_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL11_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL11_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL11_EPTYPE_OFFSET 0xc60 #define GC_USB_DOEPCTL11_SNP_LSB 0x14 #define GC_USB_DOEPCTL11_SNP_MASK 0x100000 #define GC_USB_DOEPCTL11_SNP_SIZE 0x1 #define GC_USB_DOEPCTL11_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL11_SNP_OFFSET 0xc60 #define GC_USB_DOEPCTL11_STALL_LSB 0x15 #define GC_USB_DOEPCTL11_STALL_MASK 0x200000 #define GC_USB_DOEPCTL11_STALL_SIZE 0x1 #define GC_USB_DOEPCTL11_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL11_STALL_OFFSET 0xc60 #define GC_USB_DOEPCTL11_CNAK_LSB 0x1a #define GC_USB_DOEPCTL11_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL11_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL11_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL11_CNAK_OFFSET 0xc60 #define GC_USB_DOEPCTL11_SNAK_LSB 0x1b #define GC_USB_DOEPCTL11_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL11_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL11_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL11_SNAK_OFFSET 0xc60 #define GC_USB_DOEPCTL11_SETD0PID_LSB 0x1c #define GC_USB_DOEPCTL11_SETD0PID_MASK 0x10000000 #define GC_USB_DOEPCTL11_SETD0PID_SIZE 0x1 #define GC_USB_DOEPCTL11_SETD0PID_DEFAULT 0x0 #define GC_USB_DOEPCTL11_SETD0PID_OFFSET 0xc60 #define GC_USB_DOEPCTL11_SETD1PID_LSB 0x1d #define GC_USB_DOEPCTL11_SETD1PID_MASK 0x20000000 #define GC_USB_DOEPCTL11_SETD1PID_SIZE 0x1 #define GC_USB_DOEPCTL11_SETD1PID_DEFAULT 0x0 #define GC_USB_DOEPCTL11_SETD1PID_OFFSET 0xc60 #define GC_USB_DOEPCTL11_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL11_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL11_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL11_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL11_EPDIS_OFFSET 0xc60 #define GC_USB_DOEPCTL11_EPENA_LSB 0x1f #define GC_USB_DOEPCTL11_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL11_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL11_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL11_EPENA_OFFSET 0xc60 #define GC_USB_DOEPINT11_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT11_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT11_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT11_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT11_XFERCOMPL_OFFSET 0xc68 #define GC_USB_DOEPINT11_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT11_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT11_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT11_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT11_EPDISBLD_OFFSET 0xc68 #define GC_USB_DOEPINT11_AHBERR_LSB 0x2 #define GC_USB_DOEPINT11_AHBERR_MASK 0x4 #define GC_USB_DOEPINT11_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT11_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT11_AHBERR_OFFSET 0xc68 #define GC_USB_DOEPINT11_SETUP_LSB 0x3 #define GC_USB_DOEPINT11_SETUP_MASK 0x8 #define GC_USB_DOEPINT11_SETUP_SIZE 0x1 #define GC_USB_DOEPINT11_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT11_SETUP_OFFSET 0xc68 #define GC_USB_DOEPINT11_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT11_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT11_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT11_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT11_OUTTKNEPDIS_OFFSET 0xc68 #define GC_USB_DOEPINT11_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT11_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT11_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT11_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT11_STSPHSERCVD_OFFSET 0xc68 #define GC_USB_DOEPINT11_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT11_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT11_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT11_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT11_BACK2BACKSETUP_OFFSET 0xc68 #define GC_USB_DOEPINT11_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT11_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT11_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT11_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT11_OUTPKTERR_OFFSET 0xc68 #define GC_USB_DOEPINT11_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT11_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT11_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT11_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT11_BNAINTR_OFFSET 0xc68 #define GC_USB_DOEPINT11_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT11_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT11_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT11_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT11_PKTDRPSTS_OFFSET 0xc68 #define GC_USB_DOEPINT11_BBLEERR_LSB 0xc #define GC_USB_DOEPINT11_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT11_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT11_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT11_BBLEERR_OFFSET 0xc68 #define GC_USB_DOEPINT11_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT11_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT11_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT11_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT11_NAKINTRPT_OFFSET 0xc68 #define GC_USB_DOEPINT11_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT11_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT11_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT11_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT11_NYETINTRPT_OFFSET 0xc68 #define GC_USB_DOEPINT11_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT11_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT11_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT11_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT11_STUPPKTRCVD_OFFSET 0xc68 #define GC_USB_DOEPTSIZ11_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ11_XFERSIZE_MASK 0x7ffff #define GC_USB_DOEPTSIZ11_XFERSIZE_SIZE 0x13 #define GC_USB_DOEPTSIZ11_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ11_XFERSIZE_OFFSET 0xc70 #define GC_USB_DOEPTSIZ11_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ11_PKTCNT_MASK 0x1ff80000 #define GC_USB_DOEPTSIZ11_PKTCNT_SIZE 0xa #define GC_USB_DOEPTSIZ11_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ11_PKTCNT_OFFSET 0xc70 #define GC_USB_DOEPTSIZ11_RXDPID_LSB 0x1d #define GC_USB_DOEPTSIZ11_RXDPID_MASK 0x60000000 #define GC_USB_DOEPTSIZ11_RXDPID_SIZE 0x2 #define GC_USB_DOEPTSIZ11_RXDPID_DEFAULT 0x0 #define GC_USB_DOEPTSIZ11_RXDPID_OFFSET 0xc70 #define GC_USB_DOEPDMA11_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA11_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA11_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA11_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA11_DMAADDR_OFFSET 0xc74 #define GC_USB_DOEPDMAB11_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB11_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB11_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB11_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB11_DMABUFFERADDR_OFFSET 0xc7c #define GC_USB_DOEPCTL12_MPS_LSB 0x0 #define GC_USB_DOEPCTL12_MPS_MASK 0x7ff #define GC_USB_DOEPCTL12_MPS_SIZE 0xb #define GC_USB_DOEPCTL12_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL12_MPS_OFFSET 0xc80 #define GC_USB_DOEPCTL12_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL12_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL12_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL12_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL12_USBACTEP_OFFSET 0xc80 #define GC_USB_DOEPCTL12_DPID_LSB 0x10 #define GC_USB_DOEPCTL12_DPID_MASK 0x10000 #define GC_USB_DOEPCTL12_DPID_SIZE 0x1 #define GC_USB_DOEPCTL12_DPID_DEFAULT 0x0 #define GC_USB_DOEPCTL12_DPID_OFFSET 0xc80 #define GC_USB_DOEPCTL12_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL12_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL12_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL12_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL12_NAKSTS_OFFSET 0xc80 #define GC_USB_DOEPCTL12_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL12_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL12_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL12_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL12_EPTYPE_OFFSET 0xc80 #define GC_USB_DOEPCTL12_SNP_LSB 0x14 #define GC_USB_DOEPCTL12_SNP_MASK 0x100000 #define GC_USB_DOEPCTL12_SNP_SIZE 0x1 #define GC_USB_DOEPCTL12_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL12_SNP_OFFSET 0xc80 #define GC_USB_DOEPCTL12_STALL_LSB 0x15 #define GC_USB_DOEPCTL12_STALL_MASK 0x200000 #define GC_USB_DOEPCTL12_STALL_SIZE 0x1 #define GC_USB_DOEPCTL12_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL12_STALL_OFFSET 0xc80 #define GC_USB_DOEPCTL12_CNAK_LSB 0x1a #define GC_USB_DOEPCTL12_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL12_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL12_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL12_CNAK_OFFSET 0xc80 #define GC_USB_DOEPCTL12_SNAK_LSB 0x1b #define GC_USB_DOEPCTL12_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL12_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL12_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL12_SNAK_OFFSET 0xc80 #define GC_USB_DOEPCTL12_SETD0PID_LSB 0x1c #define GC_USB_DOEPCTL12_SETD0PID_MASK 0x10000000 #define GC_USB_DOEPCTL12_SETD0PID_SIZE 0x1 #define GC_USB_DOEPCTL12_SETD0PID_DEFAULT 0x0 #define GC_USB_DOEPCTL12_SETD0PID_OFFSET 0xc80 #define GC_USB_DOEPCTL12_SETD1PID_LSB 0x1d #define GC_USB_DOEPCTL12_SETD1PID_MASK 0x20000000 #define GC_USB_DOEPCTL12_SETD1PID_SIZE 0x1 #define GC_USB_DOEPCTL12_SETD1PID_DEFAULT 0x0 #define GC_USB_DOEPCTL12_SETD1PID_OFFSET 0xc80 #define GC_USB_DOEPCTL12_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL12_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL12_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL12_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL12_EPDIS_OFFSET 0xc80 #define GC_USB_DOEPCTL12_EPENA_LSB 0x1f #define GC_USB_DOEPCTL12_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL12_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL12_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL12_EPENA_OFFSET 0xc80 #define GC_USB_DOEPINT12_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT12_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT12_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT12_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT12_XFERCOMPL_OFFSET 0xc88 #define GC_USB_DOEPINT12_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT12_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT12_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT12_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT12_EPDISBLD_OFFSET 0xc88 #define GC_USB_DOEPINT12_AHBERR_LSB 0x2 #define GC_USB_DOEPINT12_AHBERR_MASK 0x4 #define GC_USB_DOEPINT12_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT12_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT12_AHBERR_OFFSET 0xc88 #define GC_USB_DOEPINT12_SETUP_LSB 0x3 #define GC_USB_DOEPINT12_SETUP_MASK 0x8 #define GC_USB_DOEPINT12_SETUP_SIZE 0x1 #define GC_USB_DOEPINT12_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT12_SETUP_OFFSET 0xc88 #define GC_USB_DOEPINT12_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT12_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT12_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT12_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT12_OUTTKNEPDIS_OFFSET 0xc88 #define GC_USB_DOEPINT12_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT12_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT12_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT12_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT12_STSPHSERCVD_OFFSET 0xc88 #define GC_USB_DOEPINT12_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT12_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT12_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT12_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT12_BACK2BACKSETUP_OFFSET 0xc88 #define GC_USB_DOEPINT12_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT12_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT12_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT12_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT12_OUTPKTERR_OFFSET 0xc88 #define GC_USB_DOEPINT12_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT12_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT12_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT12_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT12_BNAINTR_OFFSET 0xc88 #define GC_USB_DOEPINT12_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT12_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT12_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT12_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT12_PKTDRPSTS_OFFSET 0xc88 #define GC_USB_DOEPINT12_BBLEERR_LSB 0xc #define GC_USB_DOEPINT12_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT12_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT12_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT12_BBLEERR_OFFSET 0xc88 #define GC_USB_DOEPINT12_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT12_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT12_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT12_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT12_NAKINTRPT_OFFSET 0xc88 #define GC_USB_DOEPINT12_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT12_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT12_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT12_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT12_NYETINTRPT_OFFSET 0xc88 #define GC_USB_DOEPINT12_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT12_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT12_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT12_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT12_STUPPKTRCVD_OFFSET 0xc88 #define GC_USB_DOEPTSIZ12_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ12_XFERSIZE_MASK 0x7ffff #define GC_USB_DOEPTSIZ12_XFERSIZE_SIZE 0x13 #define GC_USB_DOEPTSIZ12_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ12_XFERSIZE_OFFSET 0xc90 #define GC_USB_DOEPTSIZ12_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ12_PKTCNT_MASK 0x1ff80000 #define GC_USB_DOEPTSIZ12_PKTCNT_SIZE 0xa #define GC_USB_DOEPTSIZ12_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ12_PKTCNT_OFFSET 0xc90 #define GC_USB_DOEPTSIZ12_RXDPID_LSB 0x1d #define GC_USB_DOEPTSIZ12_RXDPID_MASK 0x60000000 #define GC_USB_DOEPTSIZ12_RXDPID_SIZE 0x2 #define GC_USB_DOEPTSIZ12_RXDPID_DEFAULT 0x0 #define GC_USB_DOEPTSIZ12_RXDPID_OFFSET 0xc90 #define GC_USB_DOEPDMA12_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA12_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA12_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA12_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA12_DMAADDR_OFFSET 0xc94 #define GC_USB_DOEPDMAB12_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB12_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB12_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB12_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB12_DMABUFFERADDR_OFFSET 0xc9c #define GC_USB_DOEPCTL13_MPS_LSB 0x0 #define GC_USB_DOEPCTL13_MPS_MASK 0x7ff #define GC_USB_DOEPCTL13_MPS_SIZE 0xb #define GC_USB_DOEPCTL13_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL13_MPS_OFFSET 0xca0 #define GC_USB_DOEPCTL13_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL13_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL13_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL13_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL13_USBACTEP_OFFSET 0xca0 #define GC_USB_DOEPCTL13_DPID_LSB 0x10 #define GC_USB_DOEPCTL13_DPID_MASK 0x10000 #define GC_USB_DOEPCTL13_DPID_SIZE 0x1 #define GC_USB_DOEPCTL13_DPID_DEFAULT 0x0 #define GC_USB_DOEPCTL13_DPID_OFFSET 0xca0 #define GC_USB_DOEPCTL13_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL13_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL13_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL13_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL13_NAKSTS_OFFSET 0xca0 #define GC_USB_DOEPCTL13_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL13_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL13_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL13_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL13_EPTYPE_OFFSET 0xca0 #define GC_USB_DOEPCTL13_SNP_LSB 0x14 #define GC_USB_DOEPCTL13_SNP_MASK 0x100000 #define GC_USB_DOEPCTL13_SNP_SIZE 0x1 #define GC_USB_DOEPCTL13_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL13_SNP_OFFSET 0xca0 #define GC_USB_DOEPCTL13_STALL_LSB 0x15 #define GC_USB_DOEPCTL13_STALL_MASK 0x200000 #define GC_USB_DOEPCTL13_STALL_SIZE 0x1 #define GC_USB_DOEPCTL13_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL13_STALL_OFFSET 0xca0 #define GC_USB_DOEPCTL13_CNAK_LSB 0x1a #define GC_USB_DOEPCTL13_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL13_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL13_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL13_CNAK_OFFSET 0xca0 #define GC_USB_DOEPCTL13_SNAK_LSB 0x1b #define GC_USB_DOEPCTL13_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL13_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL13_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL13_SNAK_OFFSET 0xca0 #define GC_USB_DOEPCTL13_SETD0PID_LSB 0x1c #define GC_USB_DOEPCTL13_SETD0PID_MASK 0x10000000 #define GC_USB_DOEPCTL13_SETD0PID_SIZE 0x1 #define GC_USB_DOEPCTL13_SETD0PID_DEFAULT 0x0 #define GC_USB_DOEPCTL13_SETD0PID_OFFSET 0xca0 #define GC_USB_DOEPCTL13_SETD1PID_LSB 0x1d #define GC_USB_DOEPCTL13_SETD1PID_MASK 0x20000000 #define GC_USB_DOEPCTL13_SETD1PID_SIZE 0x1 #define GC_USB_DOEPCTL13_SETD1PID_DEFAULT 0x0 #define GC_USB_DOEPCTL13_SETD1PID_OFFSET 0xca0 #define GC_USB_DOEPCTL13_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL13_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL13_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL13_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL13_EPDIS_OFFSET 0xca0 #define GC_USB_DOEPCTL13_EPENA_LSB 0x1f #define GC_USB_DOEPCTL13_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL13_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL13_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL13_EPENA_OFFSET 0xca0 #define GC_USB_DOEPINT13_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT13_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT13_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT13_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT13_XFERCOMPL_OFFSET 0xca8 #define GC_USB_DOEPINT13_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT13_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT13_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT13_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT13_EPDISBLD_OFFSET 0xca8 #define GC_USB_DOEPINT13_AHBERR_LSB 0x2 #define GC_USB_DOEPINT13_AHBERR_MASK 0x4 #define GC_USB_DOEPINT13_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT13_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT13_AHBERR_OFFSET 0xca8 #define GC_USB_DOEPINT13_SETUP_LSB 0x3 #define GC_USB_DOEPINT13_SETUP_MASK 0x8 #define GC_USB_DOEPINT13_SETUP_SIZE 0x1 #define GC_USB_DOEPINT13_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT13_SETUP_OFFSET 0xca8 #define GC_USB_DOEPINT13_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT13_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT13_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT13_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT13_OUTTKNEPDIS_OFFSET 0xca8 #define GC_USB_DOEPINT13_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT13_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT13_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT13_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT13_STSPHSERCVD_OFFSET 0xca8 #define GC_USB_DOEPINT13_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT13_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT13_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT13_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT13_BACK2BACKSETUP_OFFSET 0xca8 #define GC_USB_DOEPINT13_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT13_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT13_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT13_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT13_OUTPKTERR_OFFSET 0xca8 #define GC_USB_DOEPINT13_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT13_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT13_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT13_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT13_BNAINTR_OFFSET 0xca8 #define GC_USB_DOEPINT13_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT13_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT13_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT13_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT13_PKTDRPSTS_OFFSET 0xca8 #define GC_USB_DOEPINT13_BBLEERR_LSB 0xc #define GC_USB_DOEPINT13_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT13_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT13_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT13_BBLEERR_OFFSET 0xca8 #define GC_USB_DOEPINT13_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT13_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT13_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT13_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT13_NAKINTRPT_OFFSET 0xca8 #define GC_USB_DOEPINT13_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT13_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT13_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT13_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT13_NYETINTRPT_OFFSET 0xca8 #define GC_USB_DOEPINT13_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT13_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT13_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT13_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT13_STUPPKTRCVD_OFFSET 0xca8 #define GC_USB_DOEPTSIZ13_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ13_XFERSIZE_MASK 0x7ffff #define GC_USB_DOEPTSIZ13_XFERSIZE_SIZE 0x13 #define GC_USB_DOEPTSIZ13_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ13_XFERSIZE_OFFSET 0xcb0 #define GC_USB_DOEPTSIZ13_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ13_PKTCNT_MASK 0x1ff80000 #define GC_USB_DOEPTSIZ13_PKTCNT_SIZE 0xa #define GC_USB_DOEPTSIZ13_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ13_PKTCNT_OFFSET 0xcb0 #define GC_USB_DOEPTSIZ13_RXDPID_LSB 0x1d #define GC_USB_DOEPTSIZ13_RXDPID_MASK 0x60000000 #define GC_USB_DOEPTSIZ13_RXDPID_SIZE 0x2 #define GC_USB_DOEPTSIZ13_RXDPID_DEFAULT 0x0 #define GC_USB_DOEPTSIZ13_RXDPID_OFFSET 0xcb0 #define GC_USB_DOEPDMA13_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA13_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA13_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA13_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA13_DMAADDR_OFFSET 0xcb4 #define GC_USB_DOEPDMAB13_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB13_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB13_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB13_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB13_DMABUFFERADDR_OFFSET 0xcbc #define GC_USB_DOEPCTL14_MPS_LSB 0x0 #define GC_USB_DOEPCTL14_MPS_MASK 0x7ff #define GC_USB_DOEPCTL14_MPS_SIZE 0xb #define GC_USB_DOEPCTL14_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL14_MPS_OFFSET 0xcc0 #define GC_USB_DOEPCTL14_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL14_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL14_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL14_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL14_USBACTEP_OFFSET 0xcc0 #define GC_USB_DOEPCTL14_DPID_LSB 0x10 #define GC_USB_DOEPCTL14_DPID_MASK 0x10000 #define GC_USB_DOEPCTL14_DPID_SIZE 0x1 #define GC_USB_DOEPCTL14_DPID_DEFAULT 0x0 #define GC_USB_DOEPCTL14_DPID_OFFSET 0xcc0 #define GC_USB_DOEPCTL14_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL14_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL14_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL14_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL14_NAKSTS_OFFSET 0xcc0 #define GC_USB_DOEPCTL14_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL14_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL14_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL14_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL14_EPTYPE_OFFSET 0xcc0 #define GC_USB_DOEPCTL14_SNP_LSB 0x14 #define GC_USB_DOEPCTL14_SNP_MASK 0x100000 #define GC_USB_DOEPCTL14_SNP_SIZE 0x1 #define GC_USB_DOEPCTL14_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL14_SNP_OFFSET 0xcc0 #define GC_USB_DOEPCTL14_STALL_LSB 0x15 #define GC_USB_DOEPCTL14_STALL_MASK 0x200000 #define GC_USB_DOEPCTL14_STALL_SIZE 0x1 #define GC_USB_DOEPCTL14_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL14_STALL_OFFSET 0xcc0 #define GC_USB_DOEPCTL14_CNAK_LSB 0x1a #define GC_USB_DOEPCTL14_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL14_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL14_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL14_CNAK_OFFSET 0xcc0 #define GC_USB_DOEPCTL14_SNAK_LSB 0x1b #define GC_USB_DOEPCTL14_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL14_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL14_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL14_SNAK_OFFSET 0xcc0 #define GC_USB_DOEPCTL14_SETD0PID_LSB 0x1c #define GC_USB_DOEPCTL14_SETD0PID_MASK 0x10000000 #define GC_USB_DOEPCTL14_SETD0PID_SIZE 0x1 #define GC_USB_DOEPCTL14_SETD0PID_DEFAULT 0x0 #define GC_USB_DOEPCTL14_SETD0PID_OFFSET 0xcc0 #define GC_USB_DOEPCTL14_SETD1PID_LSB 0x1d #define GC_USB_DOEPCTL14_SETD1PID_MASK 0x20000000 #define GC_USB_DOEPCTL14_SETD1PID_SIZE 0x1 #define GC_USB_DOEPCTL14_SETD1PID_DEFAULT 0x0 #define GC_USB_DOEPCTL14_SETD1PID_OFFSET 0xcc0 #define GC_USB_DOEPCTL14_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL14_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL14_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL14_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL14_EPDIS_OFFSET 0xcc0 #define GC_USB_DOEPCTL14_EPENA_LSB 0x1f #define GC_USB_DOEPCTL14_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL14_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL14_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL14_EPENA_OFFSET 0xcc0 #define GC_USB_DOEPINT14_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT14_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT14_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT14_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT14_XFERCOMPL_OFFSET 0xcc8 #define GC_USB_DOEPINT14_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT14_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT14_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT14_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT14_EPDISBLD_OFFSET 0xcc8 #define GC_USB_DOEPINT14_AHBERR_LSB 0x2 #define GC_USB_DOEPINT14_AHBERR_MASK 0x4 #define GC_USB_DOEPINT14_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT14_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT14_AHBERR_OFFSET 0xcc8 #define GC_USB_DOEPINT14_SETUP_LSB 0x3 #define GC_USB_DOEPINT14_SETUP_MASK 0x8 #define GC_USB_DOEPINT14_SETUP_SIZE 0x1 #define GC_USB_DOEPINT14_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT14_SETUP_OFFSET 0xcc8 #define GC_USB_DOEPINT14_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT14_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT14_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT14_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT14_OUTTKNEPDIS_OFFSET 0xcc8 #define GC_USB_DOEPINT14_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT14_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT14_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT14_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT14_STSPHSERCVD_OFFSET 0xcc8 #define GC_USB_DOEPINT14_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT14_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT14_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT14_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT14_BACK2BACKSETUP_OFFSET 0xcc8 #define GC_USB_DOEPINT14_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT14_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT14_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT14_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT14_OUTPKTERR_OFFSET 0xcc8 #define GC_USB_DOEPINT14_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT14_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT14_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT14_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT14_BNAINTR_OFFSET 0xcc8 #define GC_USB_DOEPINT14_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT14_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT14_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT14_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT14_PKTDRPSTS_OFFSET 0xcc8 #define GC_USB_DOEPINT14_BBLEERR_LSB 0xc #define GC_USB_DOEPINT14_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT14_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT14_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT14_BBLEERR_OFFSET 0xcc8 #define GC_USB_DOEPINT14_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT14_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT14_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT14_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT14_NAKINTRPT_OFFSET 0xcc8 #define GC_USB_DOEPINT14_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT14_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT14_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT14_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT14_NYETINTRPT_OFFSET 0xcc8 #define GC_USB_DOEPINT14_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT14_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT14_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT14_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT14_STUPPKTRCVD_OFFSET 0xcc8 #define GC_USB_DOEPTSIZ14_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ14_XFERSIZE_MASK 0x7ffff #define GC_USB_DOEPTSIZ14_XFERSIZE_SIZE 0x13 #define GC_USB_DOEPTSIZ14_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ14_XFERSIZE_OFFSET 0xcd0 #define GC_USB_DOEPTSIZ14_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ14_PKTCNT_MASK 0x1ff80000 #define GC_USB_DOEPTSIZ14_PKTCNT_SIZE 0xa #define GC_USB_DOEPTSIZ14_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ14_PKTCNT_OFFSET 0xcd0 #define GC_USB_DOEPTSIZ14_RXDPID_LSB 0x1d #define GC_USB_DOEPTSIZ14_RXDPID_MASK 0x60000000 #define GC_USB_DOEPTSIZ14_RXDPID_SIZE 0x2 #define GC_USB_DOEPTSIZ14_RXDPID_DEFAULT 0x0 #define GC_USB_DOEPTSIZ14_RXDPID_OFFSET 0xcd0 #define GC_USB_DOEPDMA14_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA14_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA14_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA14_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA14_DMAADDR_OFFSET 0xcd4 #define GC_USB_DOEPDMAB14_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB14_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB14_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB14_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB14_DMABUFFERADDR_OFFSET 0xcdc #define GC_USB_DOEPCTL15_MPS_LSB 0x0 #define GC_USB_DOEPCTL15_MPS_MASK 0x7ff #define GC_USB_DOEPCTL15_MPS_SIZE 0xb #define GC_USB_DOEPCTL15_MPS_DEFAULT 0x0 #define GC_USB_DOEPCTL15_MPS_OFFSET 0xce0 #define GC_USB_DOEPCTL15_USBACTEP_LSB 0xf #define GC_USB_DOEPCTL15_USBACTEP_MASK 0x8000 #define GC_USB_DOEPCTL15_USBACTEP_SIZE 0x1 #define GC_USB_DOEPCTL15_USBACTEP_DEFAULT 0x0 #define GC_USB_DOEPCTL15_USBACTEP_OFFSET 0xce0 #define GC_USB_DOEPCTL15_DPID_LSB 0x10 #define GC_USB_DOEPCTL15_DPID_MASK 0x10000 #define GC_USB_DOEPCTL15_DPID_SIZE 0x1 #define GC_USB_DOEPCTL15_DPID_DEFAULT 0x0 #define GC_USB_DOEPCTL15_DPID_OFFSET 0xce0 #define GC_USB_DOEPCTL15_NAKSTS_LSB 0x11 #define GC_USB_DOEPCTL15_NAKSTS_MASK 0x20000 #define GC_USB_DOEPCTL15_NAKSTS_SIZE 0x1 #define GC_USB_DOEPCTL15_NAKSTS_DEFAULT 0x0 #define GC_USB_DOEPCTL15_NAKSTS_OFFSET 0xce0 #define GC_USB_DOEPCTL15_EPTYPE_LSB 0x12 #define GC_USB_DOEPCTL15_EPTYPE_MASK 0xc0000 #define GC_USB_DOEPCTL15_EPTYPE_SIZE 0x2 #define GC_USB_DOEPCTL15_EPTYPE_DEFAULT 0x0 #define GC_USB_DOEPCTL15_EPTYPE_OFFSET 0xce0 #define GC_USB_DOEPCTL15_SNP_LSB 0x14 #define GC_USB_DOEPCTL15_SNP_MASK 0x100000 #define GC_USB_DOEPCTL15_SNP_SIZE 0x1 #define GC_USB_DOEPCTL15_SNP_DEFAULT 0x0 #define GC_USB_DOEPCTL15_SNP_OFFSET 0xce0 #define GC_USB_DOEPCTL15_STALL_LSB 0x15 #define GC_USB_DOEPCTL15_STALL_MASK 0x200000 #define GC_USB_DOEPCTL15_STALL_SIZE 0x1 #define GC_USB_DOEPCTL15_STALL_DEFAULT 0x0 #define GC_USB_DOEPCTL15_STALL_OFFSET 0xce0 #define GC_USB_DOEPCTL15_CNAK_LSB 0x1a #define GC_USB_DOEPCTL15_CNAK_MASK 0x4000000 #define GC_USB_DOEPCTL15_CNAK_SIZE 0x1 #define GC_USB_DOEPCTL15_CNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL15_CNAK_OFFSET 0xce0 #define GC_USB_DOEPCTL15_SNAK_LSB 0x1b #define GC_USB_DOEPCTL15_SNAK_MASK 0x8000000 #define GC_USB_DOEPCTL15_SNAK_SIZE 0x1 #define GC_USB_DOEPCTL15_SNAK_DEFAULT 0x0 #define GC_USB_DOEPCTL15_SNAK_OFFSET 0xce0 #define GC_USB_DOEPCTL15_SETD0PID_LSB 0x1c #define GC_USB_DOEPCTL15_SETD0PID_MASK 0x10000000 #define GC_USB_DOEPCTL15_SETD0PID_SIZE 0x1 #define GC_USB_DOEPCTL15_SETD0PID_DEFAULT 0x0 #define GC_USB_DOEPCTL15_SETD0PID_OFFSET 0xce0 #define GC_USB_DOEPCTL15_SETD1PID_LSB 0x1d #define GC_USB_DOEPCTL15_SETD1PID_MASK 0x20000000 #define GC_USB_DOEPCTL15_SETD1PID_SIZE 0x1 #define GC_USB_DOEPCTL15_SETD1PID_DEFAULT 0x0 #define GC_USB_DOEPCTL15_SETD1PID_OFFSET 0xce0 #define GC_USB_DOEPCTL15_EPDIS_LSB 0x1e #define GC_USB_DOEPCTL15_EPDIS_MASK 0x40000000 #define GC_USB_DOEPCTL15_EPDIS_SIZE 0x1 #define GC_USB_DOEPCTL15_EPDIS_DEFAULT 0x0 #define GC_USB_DOEPCTL15_EPDIS_OFFSET 0xce0 #define GC_USB_DOEPCTL15_EPENA_LSB 0x1f #define GC_USB_DOEPCTL15_EPENA_MASK 0x80000000 #define GC_USB_DOEPCTL15_EPENA_SIZE 0x1 #define GC_USB_DOEPCTL15_EPENA_DEFAULT 0x0 #define GC_USB_DOEPCTL15_EPENA_OFFSET 0xce0 #define GC_USB_DOEPINT15_XFERCOMPL_LSB 0x0 #define GC_USB_DOEPINT15_XFERCOMPL_MASK 0x1 #define GC_USB_DOEPINT15_XFERCOMPL_SIZE 0x1 #define GC_USB_DOEPINT15_XFERCOMPL_DEFAULT 0x0 #define GC_USB_DOEPINT15_XFERCOMPL_OFFSET 0xce8 #define GC_USB_DOEPINT15_EPDISBLD_LSB 0x1 #define GC_USB_DOEPINT15_EPDISBLD_MASK 0x2 #define GC_USB_DOEPINT15_EPDISBLD_SIZE 0x1 #define GC_USB_DOEPINT15_EPDISBLD_DEFAULT 0x0 #define GC_USB_DOEPINT15_EPDISBLD_OFFSET 0xce8 #define GC_USB_DOEPINT15_AHBERR_LSB 0x2 #define GC_USB_DOEPINT15_AHBERR_MASK 0x4 #define GC_USB_DOEPINT15_AHBERR_SIZE 0x1 #define GC_USB_DOEPINT15_AHBERR_DEFAULT 0x0 #define GC_USB_DOEPINT15_AHBERR_OFFSET 0xce8 #define GC_USB_DOEPINT15_SETUP_LSB 0x3 #define GC_USB_DOEPINT15_SETUP_MASK 0x8 #define GC_USB_DOEPINT15_SETUP_SIZE 0x1 #define GC_USB_DOEPINT15_SETUP_DEFAULT 0x0 #define GC_USB_DOEPINT15_SETUP_OFFSET 0xce8 #define GC_USB_DOEPINT15_OUTTKNEPDIS_LSB 0x4 #define GC_USB_DOEPINT15_OUTTKNEPDIS_MASK 0x10 #define GC_USB_DOEPINT15_OUTTKNEPDIS_SIZE 0x1 #define GC_USB_DOEPINT15_OUTTKNEPDIS_DEFAULT 0x0 #define GC_USB_DOEPINT15_OUTTKNEPDIS_OFFSET 0xce8 #define GC_USB_DOEPINT15_STSPHSERCVD_LSB 0x5 #define GC_USB_DOEPINT15_STSPHSERCVD_MASK 0x20 #define GC_USB_DOEPINT15_STSPHSERCVD_SIZE 0x1 #define GC_USB_DOEPINT15_STSPHSERCVD_DEFAULT 0x0 #define GC_USB_DOEPINT15_STSPHSERCVD_OFFSET 0xce8 #define GC_USB_DOEPINT15_BACK2BACKSETUP_LSB 0x6 #define GC_USB_DOEPINT15_BACK2BACKSETUP_MASK 0x40 #define GC_USB_DOEPINT15_BACK2BACKSETUP_SIZE 0x1 #define GC_USB_DOEPINT15_BACK2BACKSETUP_DEFAULT 0x0 #define GC_USB_DOEPINT15_BACK2BACKSETUP_OFFSET 0xce8 #define GC_USB_DOEPINT15_OUTPKTERR_LSB 0x8 #define GC_USB_DOEPINT15_OUTPKTERR_MASK 0x100 #define GC_USB_DOEPINT15_OUTPKTERR_SIZE 0x1 #define GC_USB_DOEPINT15_OUTPKTERR_DEFAULT 0x0 #define GC_USB_DOEPINT15_OUTPKTERR_OFFSET 0xce8 #define GC_USB_DOEPINT15_BNAINTR_LSB 0x9 #define GC_USB_DOEPINT15_BNAINTR_MASK 0x200 #define GC_USB_DOEPINT15_BNAINTR_SIZE 0x1 #define GC_USB_DOEPINT15_BNAINTR_DEFAULT 0x0 #define GC_USB_DOEPINT15_BNAINTR_OFFSET 0xce8 #define GC_USB_DOEPINT15_PKTDRPSTS_LSB 0xb #define GC_USB_DOEPINT15_PKTDRPSTS_MASK 0x800 #define GC_USB_DOEPINT15_PKTDRPSTS_SIZE 0x1 #define GC_USB_DOEPINT15_PKTDRPSTS_DEFAULT 0x0 #define GC_USB_DOEPINT15_PKTDRPSTS_OFFSET 0xce8 #define GC_USB_DOEPINT15_BBLEERR_LSB 0xc #define GC_USB_DOEPINT15_BBLEERR_MASK 0x1000 #define GC_USB_DOEPINT15_BBLEERR_SIZE 0x1 #define GC_USB_DOEPINT15_BBLEERR_DEFAULT 0x0 #define GC_USB_DOEPINT15_BBLEERR_OFFSET 0xce8 #define GC_USB_DOEPINT15_NAKINTRPT_LSB 0xd #define GC_USB_DOEPINT15_NAKINTRPT_MASK 0x2000 #define GC_USB_DOEPINT15_NAKINTRPT_SIZE 0x1 #define GC_USB_DOEPINT15_NAKINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT15_NAKINTRPT_OFFSET 0xce8 #define GC_USB_DOEPINT15_NYETINTRPT_LSB 0xe #define GC_USB_DOEPINT15_NYETINTRPT_MASK 0x4000 #define GC_USB_DOEPINT15_NYETINTRPT_SIZE 0x1 #define GC_USB_DOEPINT15_NYETINTRPT_DEFAULT 0x0 #define GC_USB_DOEPINT15_NYETINTRPT_OFFSET 0xce8 #define GC_USB_DOEPINT15_STUPPKTRCVD_LSB 0xf #define GC_USB_DOEPINT15_STUPPKTRCVD_MASK 0x8000 #define GC_USB_DOEPINT15_STUPPKTRCVD_SIZE 0x1 #define GC_USB_DOEPINT15_STUPPKTRCVD_DEFAULT 0x0 #define GC_USB_DOEPINT15_STUPPKTRCVD_OFFSET 0xce8 #define GC_USB_DOEPTSIZ15_XFERSIZE_LSB 0x0 #define GC_USB_DOEPTSIZ15_XFERSIZE_MASK 0x7ffff #define GC_USB_DOEPTSIZ15_XFERSIZE_SIZE 0x13 #define GC_USB_DOEPTSIZ15_XFERSIZE_DEFAULT 0x0 #define GC_USB_DOEPTSIZ15_XFERSIZE_OFFSET 0xcf0 #define GC_USB_DOEPTSIZ15_PKTCNT_LSB 0x13 #define GC_USB_DOEPTSIZ15_PKTCNT_MASK 0x1ff80000 #define GC_USB_DOEPTSIZ15_PKTCNT_SIZE 0xa #define GC_USB_DOEPTSIZ15_PKTCNT_DEFAULT 0x0 #define GC_USB_DOEPTSIZ15_PKTCNT_OFFSET 0xcf0 #define GC_USB_DOEPTSIZ15_RXDPID_LSB 0x1d #define GC_USB_DOEPTSIZ15_RXDPID_MASK 0x60000000 #define GC_USB_DOEPTSIZ15_RXDPID_SIZE 0x2 #define GC_USB_DOEPTSIZ15_RXDPID_DEFAULT 0x0 #define GC_USB_DOEPTSIZ15_RXDPID_OFFSET 0xcf0 #define GC_USB_DOEPDMA15_DMAADDR_LSB 0x0 #define GC_USB_DOEPDMA15_DMAADDR_MASK 0xffffffff #define GC_USB_DOEPDMA15_DMAADDR_SIZE 0x20 #define GC_USB_DOEPDMA15_DMAADDR_DEFAULT 0x0 #define GC_USB_DOEPDMA15_DMAADDR_OFFSET 0xcf4 #define GC_USB_DOEPDMAB15_DMABUFFERADDR_LSB 0x0 #define GC_USB_DOEPDMAB15_DMABUFFERADDR_MASK 0xffffffff #define GC_USB_DOEPDMAB15_DMABUFFERADDR_SIZE 0x20 #define GC_USB_DOEPDMAB15_DMABUFFERADDR_DEFAULT 0x0 #define GC_USB_DOEPDMAB15_DMABUFFERADDR_OFFSET 0xcfc #define GC_USB_PCGCCTL_STOPPCLK_LSB 0x0 #define GC_USB_PCGCCTL_STOPPCLK_MASK 0x1 #define GC_USB_PCGCCTL_STOPPCLK_SIZE 0x1 #define GC_USB_PCGCCTL_STOPPCLK_DEFAULT 0x0 #define GC_USB_PCGCCTL_STOPPCLK_OFFSET 0xe00 #define GC_USB_PCGCCTL_GATEHCLK_LSB 0x1 #define GC_USB_PCGCCTL_GATEHCLK_MASK 0x2 #define GC_USB_PCGCCTL_GATEHCLK_SIZE 0x1 #define GC_USB_PCGCCTL_GATEHCLK_DEFAULT 0x0 #define GC_USB_PCGCCTL_GATEHCLK_OFFSET 0xe00 #define GC_USB_PCGCCTL_PWRCLMP_LSB 0x2 #define GC_USB_PCGCCTL_PWRCLMP_MASK 0x4 #define GC_USB_PCGCCTL_PWRCLMP_SIZE 0x1 #define GC_USB_PCGCCTL_PWRCLMP_DEFAULT 0x0 #define GC_USB_PCGCCTL_PWRCLMP_OFFSET 0xe00 #define GC_USB_PCGCCTL_RSTPDWNMODULE_LSB 0x3 #define GC_USB_PCGCCTL_RSTPDWNMODULE_MASK 0x8 #define GC_USB_PCGCCTL_RSTPDWNMODULE_SIZE 0x1 #define GC_USB_PCGCCTL_RSTPDWNMODULE_DEFAULT 0x0 #define GC_USB_PCGCCTL_RSTPDWNMODULE_OFFSET 0xe00 #define GC_USB_PCGCCTL_PHYSLEEP_LSB 0x6 #define GC_USB_PCGCCTL_PHYSLEEP_MASK 0x40 #define GC_USB_PCGCCTL_PHYSLEEP_SIZE 0x1 #define GC_USB_PCGCCTL_PHYSLEEP_DEFAULT 0x0 #define GC_USB_PCGCCTL_PHYSLEEP_OFFSET 0xe00 #define GC_USB_PCGCCTL_L1SUSPENDED_LSB 0x7 #define GC_USB_PCGCCTL_L1SUSPENDED_MASK 0x80 #define GC_USB_PCGCCTL_L1SUSPENDED_SIZE 0x1 #define GC_USB_PCGCCTL_L1SUSPENDED_DEFAULT 0x0 #define GC_USB_PCGCCTL_L1SUSPENDED_OFFSET 0xe00 #define GC_VOLT_VERSION_CHANGE_LSB 0x0 #define GC_VOLT_VERSION_CHANGE_MASK 0xffffff #define GC_VOLT_VERSION_CHANGE_SIZE 0x18 #define GC_VOLT_VERSION_CHANGE_DEFAULT 0x14125 #define GC_VOLT_VERSION_CHANGE_OFFSET 0x0 #define GC_VOLT_VERSION_REVISION_LSB 0x18 #define GC_VOLT_VERSION_REVISION_MASK 0xff000000 #define GC_VOLT_VERSION_REVISION_SIZE 0x8 #define GC_VOLT_VERSION_REVISION_DEFAULT 0x1 #define GC_VOLT_VERSION_REVISION_OFFSET 0x0 #define GC_VOLT_ANALOG_CONTROL_VSEN_RSTB_LSB 0x0 #define GC_VOLT_ANALOG_CONTROL_VSEN_RSTB_MASK 0x1 #define GC_VOLT_ANALOG_CONTROL_VSEN_RSTB_SIZE 0x1 #define GC_VOLT_ANALOG_CONTROL_VSEN_RSTB_DEFAULT 0x0 #define GC_VOLT_ANALOG_CONTROL_VSEN_RSTB_OFFSET 0x8 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_INPUTDC_NEG_LSB 0x1 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_INPUTDC_NEG_MASK 0x3e #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_INPUTDC_NEG_SIZE 0x5 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_INPUTDC_NEG_DEFAULT 0xb #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_INPUTDC_NEG_OFFSET 0x8 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_INPUTDC_POS_LSB 0x6 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_INPUTDC_POS_MASK 0x1c0 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_INPUTDC_POS_SIZE 0x3 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_INPUTDC_POS_DEFAULT 0x4 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_INPUTDC_POS_OFFSET 0x8 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_TH_NEG_LSB 0x9 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_TH_NEG_MASK 0xe00 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_TH_NEG_SIZE 0x3 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_TH_NEG_DEFAULT 0x4 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_TH_NEG_OFFSET 0x8 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_TH_POS_LSB 0xc #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_TH_POS_MASK 0x1f000 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_TH_POS_SIZE 0x5 #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_TH_POS_DEFAULT 0xb #define GC_VOLT_ANALOG_CONTROL_SEL_VSEN_TH_POS_OFFSET 0x8 #define GC_VOLT_CONFIG_SERIAL_TEST_EN_LSB 0x0 #define GC_VOLT_CONFIG_SERIAL_TEST_EN_MASK 0x1 #define GC_VOLT_CONFIG_SERIAL_TEST_EN_SIZE 0x1 #define GC_VOLT_CONFIG_SERIAL_TEST_EN_DEFAULT 0x0 #define GC_VOLT_CONFIG_SERIAL_TEST_EN_OFFSET 0xc #define GC_WATCHDOG_WDOGCONTROL_INTEN_LSB 0x0 #define GC_WATCHDOG_WDOGCONTROL_INTEN_MASK 0x1 #define GC_WATCHDOG_WDOGCONTROL_INTEN_SIZE 0x1 #define GC_WATCHDOG_WDOGCONTROL_INTEN_DEFAULT 0x0 #define GC_WATCHDOG_WDOGCONTROL_INTEN_OFFSET 0x8 #define GC_WATCHDOG_WDOGCONTROL_RESEN_LSB 0x1 #define GC_WATCHDOG_WDOGCONTROL_RESEN_MASK 0x2 #define GC_WATCHDOG_WDOGCONTROL_RESEN_SIZE 0x1 #define GC_WATCHDOG_WDOGCONTROL_RESEN_DEFAULT 0x0 #define GC_WATCHDOG_WDOGCONTROL_RESEN_OFFSET 0x8 #define GC_WATCHDOG_WDOGITOP_WDOGRES_LSB 0x0 #define GC_WATCHDOG_WDOGITOP_WDOGRES_MASK 0x1 #define GC_WATCHDOG_WDOGITOP_WDOGRES_SIZE 0x1 #define GC_WATCHDOG_WDOGITOP_WDOGRES_DEFAULT 0x0 #define GC_WATCHDOG_WDOGITOP_WDOGRES_OFFSET 0xf04 #define GC_WATCHDOG_WDOGITOP_WDOGINT_LSB 0x1 #define GC_WATCHDOG_WDOGITOP_WDOGINT_MASK 0x2 #define GC_WATCHDOG_WDOGITOP_WDOGINT_SIZE 0x1 #define GC_WATCHDOG_WDOGITOP_WDOGINT_DEFAULT 0x0 #define GC_WATCHDOG_WDOGITOP_WDOGINT_OFFSET 0xf04 #define GC_XO_VERSION_CHANGE_LSB 0x0 #define GC_XO_VERSION_CHANGE_MASK 0xffffff #define GC_XO_VERSION_CHANGE_SIZE 0x18 #define GC_XO_VERSION_CHANGE_DEFAULT 0x1424a #define GC_XO_VERSION_CHANGE_OFFSET 0x0 #define GC_XO_VERSION_REVISION_LSB 0x18 #define GC_XO_VERSION_REVISION_MASK 0xff000000 #define GC_XO_VERSION_REVISION_SIZE 0x8 #define GC_XO_VERSION_REVISION_DEFAULT 0x1 #define GC_XO_VERSION_REVISION_OFFSET 0x0 #define GC_XO_CLK_JTR_CTRL_HS_SEL_LSB 0x0 #define GC_XO_CLK_JTR_CTRL_HS_SEL_MASK 0x1 #define GC_XO_CLK_JTR_CTRL_HS_SEL_SIZE 0x1 #define GC_XO_CLK_JTR_CTRL_HS_SEL_DEFAULT 0x1 #define GC_XO_CLK_JTR_CTRL_HS_SEL_OFFSET 0xc #define GC_XO_CLK_JTR_CTRL_SEL_LSB 0x1 #define GC_XO_CLK_JTR_CTRL_SEL_MASK 0x2 #define GC_XO_CLK_JTR_CTRL_SEL_SIZE 0x1 #define GC_XO_CLK_JTR_CTRL_SEL_DEFAULT 0x1 #define GC_XO_CLK_JTR_CTRL_SEL_OFFSET 0xc #define GC_XO_CLK_JTR_CURRENT_COARSE_TRIM_LSB 0x0 #define GC_XO_CLK_JTR_CURRENT_COARSE_TRIM_MASK 0xff #define GC_XO_CLK_JTR_CURRENT_COARSE_TRIM_SIZE 0x8 #define GC_XO_CLK_JTR_CURRENT_COARSE_TRIM_DEFAULT 0x0 #define GC_XO_CLK_JTR_CURRENT_COARSE_TRIM_OFFSET 0x18 #define GC_XO_CLK_JTR_CURRENT_FINE_TRIM_LSB 0x8 #define GC_XO_CLK_JTR_CURRENT_FINE_TRIM_MASK 0xff00 #define GC_XO_CLK_JTR_CURRENT_FINE_TRIM_SIZE 0x8 #define GC_XO_CLK_JTR_CURRENT_FINE_TRIM_DEFAULT 0x0 #define GC_XO_CLK_JTR_CURRENT_FINE_TRIM_OFFSET 0x18 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_TRIM_EN_LSB 0x0 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_TRIM_EN_MASK 0x1 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_TRIM_EN_SIZE 0x1 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_TRIM_EN_DEFAULT 0x0 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_TRIM_EN_OFFSET 0x20 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_INITIAL_TRIM_PERIOD_LSB 0x1 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_INITIAL_TRIM_PERIOD_MASK 0x1fe #define GC_XO_CLK_JTR_TRIM_CTRL_RC_INITIAL_TRIM_PERIOD_SIZE 0x8 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_INITIAL_TRIM_PERIOD_DEFAULT 0xf #define GC_XO_CLK_JTR_TRIM_CTRL_RC_INITIAL_TRIM_PERIOD_OFFSET 0x20 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_FINE_TRIM_SRC_LSB 0x9 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_FINE_TRIM_SRC_MASK 0x200 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_FINE_TRIM_SRC_SIZE 0x1 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_FINE_TRIM_SRC_DEFAULT 0x0 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_FINE_TRIM_SRC_OFFSET 0x20 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_COARSE_TRIM_SRC_LSB 0xa #define GC_XO_CLK_JTR_TRIM_CTRL_RC_COARSE_TRIM_SRC_MASK 0xc00 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_COARSE_TRIM_SRC_SIZE 0x2 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_COARSE_TRIM_SRC_DEFAULT 0x0 #define GC_XO_CLK_JTR_TRIM_CTRL_RC_COARSE_TRIM_SRC_OFFSET 0x20 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_ENABLE_FAST_LSB 0x0 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_ENABLE_FAST_MASK 0x1 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_ENABLE_FAST_SIZE 0x1 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_ENABLE_FAST_DEFAULT 0x0 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_ENABLE_FAST_OFFSET 0x74 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_ENABLE_SLOW_LSB 0x1 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_ENABLE_SLOW_MASK 0x2 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_ENABLE_SLOW_SIZE 0x1 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_ENABLE_SLOW_DEFAULT 0x0 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_ENABLE_SLOW_OFFSET 0x74 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_SLOW_MODE_SEL_LSB 0x2 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_SLOW_MODE_SEL_MASK 0x4 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_SLOW_MODE_SEL_SIZE 0x1 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_SLOW_MODE_SEL_DEFAULT 0x0 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_SLOW_MODE_SEL_OFFSET 0x74 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_MAX_TRIM_SEL_LSB 0x3 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_MAX_TRIM_SEL_MASK 0x8 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_MAX_TRIM_SEL_SIZE 0x1 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_MAX_TRIM_SEL_DEFAULT 0x0 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_MAX_TRIM_SEL_OFFSET 0x74 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_STOP_ON_NOP_LSB 0x4 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_STOP_ON_NOP_MASK 0x10 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_STOP_ON_NOP_SIZE 0x1 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_STOP_ON_NOP_DEFAULT 0x0 #define GC_XO_CLK_JTR_CALIB_TRIM_CTRL_STOP_ON_NOP_OFFSET 0x74 #define GC_XO_CLK_JTR_FAST_CALIB0_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB0_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_FAST_CALIB0_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_FAST_CALIB0_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB0_UPPER_COUNT_OFFSET 0x84 #define GC_XO_CLK_JTR_FAST_CALIB1_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB1_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_FAST_CALIB1_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_FAST_CALIB1_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB1_UPPER_COUNT_OFFSET 0x88 #define GC_XO_CLK_JTR_FAST_CALIB2_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB2_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_FAST_CALIB2_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_FAST_CALIB2_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB2_UPPER_COUNT_OFFSET 0x8c #define GC_XO_CLK_JTR_FAST_CALIB3_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB3_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_FAST_CALIB3_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_FAST_CALIB3_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB3_UPPER_COUNT_OFFSET 0x90 #define GC_XO_CLK_JTR_FAST_CALIB4_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB4_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_FAST_CALIB4_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_FAST_CALIB4_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB4_UPPER_COUNT_OFFSET 0x94 #define GC_XO_CLK_JTR_FAST_CALIB5_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB5_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_FAST_CALIB5_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_FAST_CALIB5_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB5_UPPER_COUNT_OFFSET 0x98 #define GC_XO_CLK_JTR_FAST_CALIB6_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB6_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_FAST_CALIB6_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_FAST_CALIB6_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB6_UPPER_COUNT_OFFSET 0x9c #define GC_XO_CLK_JTR_FAST_CALIB7_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB7_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_FAST_CALIB7_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_FAST_CALIB7_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB7_UPPER_COUNT_OFFSET 0xa0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL0_OP_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL0_OP_MASK 0xf #define GC_XO_CLK_JTR_FAST_CALIB_CTRL0_OP_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL0_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL0_OP_OFFSET 0xa4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL0_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL0_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL0_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL0_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL0_OPERAND_OFFSET 0xa4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL1_OP_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL1_OP_MASK 0xf #define GC_XO_CLK_JTR_FAST_CALIB_CTRL1_OP_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL1_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL1_OP_OFFSET 0xa8 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL1_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL1_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL1_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL1_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL1_OPERAND_OFFSET 0xa8 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL2_OP_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL2_OP_MASK 0xf #define GC_XO_CLK_JTR_FAST_CALIB_CTRL2_OP_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL2_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL2_OP_OFFSET 0xac #define GC_XO_CLK_JTR_FAST_CALIB_CTRL2_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL2_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL2_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL2_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL2_OPERAND_OFFSET 0xac #define GC_XO_CLK_JTR_FAST_CALIB_CTRL3_OP_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL3_OP_MASK 0xf #define GC_XO_CLK_JTR_FAST_CALIB_CTRL3_OP_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL3_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL3_OP_OFFSET 0xb0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL3_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL3_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL3_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL3_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL3_OPERAND_OFFSET 0xb0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL4_OP_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL4_OP_MASK 0xf #define GC_XO_CLK_JTR_FAST_CALIB_CTRL4_OP_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL4_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL4_OP_OFFSET 0xb4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL4_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL4_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL4_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL4_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL4_OPERAND_OFFSET 0xb4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL5_OP_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL5_OP_MASK 0xf #define GC_XO_CLK_JTR_FAST_CALIB_CTRL5_OP_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL5_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL5_OP_OFFSET 0xb8 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL5_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL5_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL5_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL5_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL5_OPERAND_OFFSET 0xb8 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL6_OP_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL6_OP_MASK 0xf #define GC_XO_CLK_JTR_FAST_CALIB_CTRL6_OP_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL6_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL6_OP_OFFSET 0xbc #define GC_XO_CLK_JTR_FAST_CALIB_CTRL6_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL6_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL6_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL6_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL6_OPERAND_OFFSET 0xbc #define GC_XO_CLK_JTR_FAST_CALIB_CTRL7_OP_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL7_OP_MASK 0xf #define GC_XO_CLK_JTR_FAST_CALIB_CTRL7_OP_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL7_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL7_OP_OFFSET 0xc0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL7_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL7_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL7_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL7_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL7_OPERAND_OFFSET 0xc0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL8_OP_LSB 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL8_OP_MASK 0xf #define GC_XO_CLK_JTR_FAST_CALIB_CTRL8_OP_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL8_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL8_OP_OFFSET 0xc4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL8_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL8_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL8_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL8_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_FAST_CALIB_CTRL8_OPERAND_OFFSET 0xc4 #define GC_XO_CLK_JTR_SLOW_CALIB0_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB0_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_SLOW_CALIB0_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_SLOW_CALIB0_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB0_UPPER_COUNT_OFFSET 0xc8 #define GC_XO_CLK_JTR_SLOW_CALIB1_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB1_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_SLOW_CALIB1_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_SLOW_CALIB1_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB1_UPPER_COUNT_OFFSET 0xcc #define GC_XO_CLK_JTR_SLOW_CALIB2_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB2_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_SLOW_CALIB2_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_SLOW_CALIB2_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB2_UPPER_COUNT_OFFSET 0xd0 #define GC_XO_CLK_JTR_SLOW_CALIB3_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB3_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_SLOW_CALIB3_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_SLOW_CALIB3_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB3_UPPER_COUNT_OFFSET 0xd4 #define GC_XO_CLK_JTR_SLOW_CALIB4_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB4_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_SLOW_CALIB4_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_SLOW_CALIB4_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB4_UPPER_COUNT_OFFSET 0xd8 #define GC_XO_CLK_JTR_SLOW_CALIB5_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB5_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_SLOW_CALIB5_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_SLOW_CALIB5_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB5_UPPER_COUNT_OFFSET 0xdc #define GC_XO_CLK_JTR_SLOW_CALIB6_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB6_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_SLOW_CALIB6_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_SLOW_CALIB6_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB6_UPPER_COUNT_OFFSET 0xe0 #define GC_XO_CLK_JTR_SLOW_CALIB7_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB7_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_JTR_SLOW_CALIB7_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_JTR_SLOW_CALIB7_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB7_UPPER_COUNT_OFFSET 0xe4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL0_OP_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL0_OP_MASK 0xf #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL0_OP_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL0_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL0_OP_OFFSET 0xe8 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL0_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL0_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL0_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL0_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL0_OPERAND_OFFSET 0xe8 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL1_OP_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL1_OP_MASK 0xf #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL1_OP_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL1_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL1_OP_OFFSET 0xec #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL1_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL1_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL1_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL1_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL1_OPERAND_OFFSET 0xec #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL2_OP_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL2_OP_MASK 0xf #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL2_OP_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL2_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL2_OP_OFFSET 0xf0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL2_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL2_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL2_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL2_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL2_OPERAND_OFFSET 0xf0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL3_OP_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL3_OP_MASK 0xf #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL3_OP_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL3_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL3_OP_OFFSET 0xf4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL3_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL3_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL3_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL3_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL3_OPERAND_OFFSET 0xf4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL4_OP_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL4_OP_MASK 0xf #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL4_OP_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL4_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL4_OP_OFFSET 0xf8 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL4_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL4_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL4_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL4_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL4_OPERAND_OFFSET 0xf8 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL5_OP_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL5_OP_MASK 0xf #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL5_OP_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL5_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL5_OP_OFFSET 0xfc #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL5_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL5_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL5_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL5_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL5_OPERAND_OFFSET 0xfc #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL6_OP_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL6_OP_MASK 0xf #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL6_OP_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL6_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL6_OP_OFFSET 0x100 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL6_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL6_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL6_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL6_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL6_OPERAND_OFFSET 0x100 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL7_OP_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL7_OP_MASK 0xf #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL7_OP_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL7_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL7_OP_OFFSET 0x104 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL7_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL7_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL7_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL7_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL7_OPERAND_OFFSET 0x104 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL8_OP_LSB 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL8_OP_MASK 0xf #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL8_OP_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL8_OP_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL8_OP_OFFSET 0x108 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL8_OPERAND_LSB 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL8_OPERAND_MASK 0xf0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL8_OPERAND_SIZE 0x4 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL8_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_JTR_SLOW_CALIB_CTRL8_OPERAND_OFFSET 0x108 #define GC_XO_CLK_JTR_SW_TRIM_COUNTER_VALUE_LSB 0x0 #define GC_XO_CLK_JTR_SW_TRIM_COUNTER_VALUE_MASK 0xffffff #define GC_XO_CLK_JTR_SW_TRIM_COUNTER_VALUE_SIZE 0x18 #define GC_XO_CLK_JTR_SW_TRIM_COUNTER_VALUE_DEFAULT 0x0 #define GC_XO_CLK_JTR_SW_TRIM_COUNTER_VALUE_OFFSET 0x110 #define GC_XO_CLK_JTR_SW_TRIM_COUNTER_DONE_LSB 0x18 #define GC_XO_CLK_JTR_SW_TRIM_COUNTER_DONE_MASK 0x1000000 #define GC_XO_CLK_JTR_SW_TRIM_COUNTER_DONE_SIZE 0x1 #define GC_XO_CLK_JTR_SW_TRIM_COUNTER_DONE_DEFAULT 0x0 #define GC_XO_CLK_JTR_SW_TRIM_COUNTER_DONE_OFFSET 0x110 #define GC_XO_CLK_TIMER_CTRL_HS_SEL_LSB 0x0 #define GC_XO_CLK_TIMER_CTRL_HS_SEL_MASK 0x1 #define GC_XO_CLK_TIMER_CTRL_HS_SEL_SIZE 0x1 #define GC_XO_CLK_TIMER_CTRL_HS_SEL_DEFAULT 0x1 #define GC_XO_CLK_TIMER_CTRL_HS_SEL_OFFSET 0x114 #define GC_XO_CLK_TIMER_CTRL_SEL_LSB 0x1 #define GC_XO_CLK_TIMER_CTRL_SEL_MASK 0x2 #define GC_XO_CLK_TIMER_CTRL_SEL_SIZE 0x1 #define GC_XO_CLK_TIMER_CTRL_SEL_DEFAULT 0x1 #define GC_XO_CLK_TIMER_CTRL_SEL_OFFSET 0x114 #define GC_XO_CLK_TIMER_CURRENT_COARSE_TRIM_LSB 0x0 #define GC_XO_CLK_TIMER_CURRENT_COARSE_TRIM_MASK 0xff #define GC_XO_CLK_TIMER_CURRENT_COARSE_TRIM_SIZE 0x8 #define GC_XO_CLK_TIMER_CURRENT_COARSE_TRIM_DEFAULT 0x0 #define GC_XO_CLK_TIMER_CURRENT_COARSE_TRIM_OFFSET 0x120 #define GC_XO_CLK_TIMER_CURRENT_FINE_TRIM_LSB 0x8 #define GC_XO_CLK_TIMER_CURRENT_FINE_TRIM_MASK 0xff00 #define GC_XO_CLK_TIMER_CURRENT_FINE_TRIM_SIZE 0x8 #define GC_XO_CLK_TIMER_CURRENT_FINE_TRIM_DEFAULT 0x0 #define GC_XO_CLK_TIMER_CURRENT_FINE_TRIM_OFFSET 0x120 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_TRIM_EN_LSB 0x0 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_TRIM_EN_MASK 0x1 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_TRIM_EN_SIZE 0x1 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_TRIM_EN_DEFAULT 0x0 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_TRIM_EN_OFFSET 0x128 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_INITIAL_TRIM_PERIOD_LSB 0x1 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_INITIAL_TRIM_PERIOD_MASK 0x1fe #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_INITIAL_TRIM_PERIOD_SIZE 0x8 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_INITIAL_TRIM_PERIOD_DEFAULT 0xf #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_INITIAL_TRIM_PERIOD_OFFSET 0x128 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_FINE_TRIM_SRC_LSB 0x9 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_FINE_TRIM_SRC_MASK 0x200 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_FINE_TRIM_SRC_SIZE 0x1 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_FINE_TRIM_SRC_DEFAULT 0x0 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_FINE_TRIM_SRC_OFFSET 0x128 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_COARSE_TRIM_SRC_LSB 0xa #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_COARSE_TRIM_SRC_MASK 0xc00 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_COARSE_TRIM_SRC_SIZE 0x2 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_COARSE_TRIM_SRC_DEFAULT 0x0 #define GC_XO_CLK_TIMER_TRIM_CTRL_RC_COARSE_TRIM_SRC_OFFSET 0x128 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_ENABLE_FAST_LSB 0x0 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_ENABLE_FAST_MASK 0x1 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_ENABLE_FAST_SIZE 0x1 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_ENABLE_FAST_DEFAULT 0x0 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_ENABLE_FAST_OFFSET 0x12c #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_ENABLE_SLOW_LSB 0x1 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_ENABLE_SLOW_MASK 0x2 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_ENABLE_SLOW_SIZE 0x1 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_ENABLE_SLOW_DEFAULT 0x0 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_ENABLE_SLOW_OFFSET 0x12c #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_SLOW_MODE_SEL_LSB 0x2 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_SLOW_MODE_SEL_MASK 0x4 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_SLOW_MODE_SEL_SIZE 0x1 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_SLOW_MODE_SEL_DEFAULT 0x0 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_SLOW_MODE_SEL_OFFSET 0x12c #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_MAX_TRIM_SEL_LSB 0x3 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_MAX_TRIM_SEL_MASK 0x8 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_MAX_TRIM_SEL_SIZE 0x1 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_MAX_TRIM_SEL_DEFAULT 0x0 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_MAX_TRIM_SEL_OFFSET 0x12c #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_STOP_ON_NOP_LSB 0x4 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_STOP_ON_NOP_MASK 0x10 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_STOP_ON_NOP_SIZE 0x1 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_STOP_ON_NOP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_CALIB_TRIM_CTRL_STOP_ON_NOP_OFFSET 0x12c #define GC_XO_CLK_TIMER_FAST_CALIB0_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB0_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_FAST_CALIB0_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_FAST_CALIB0_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB0_UPPER_COUNT_OFFSET 0x13c #define GC_XO_CLK_TIMER_FAST_CALIB1_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB1_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_FAST_CALIB1_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_FAST_CALIB1_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB1_UPPER_COUNT_OFFSET 0x140 #define GC_XO_CLK_TIMER_FAST_CALIB2_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB2_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_FAST_CALIB2_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_FAST_CALIB2_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB2_UPPER_COUNT_OFFSET 0x144 #define GC_XO_CLK_TIMER_FAST_CALIB3_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB3_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_FAST_CALIB3_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_FAST_CALIB3_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB3_UPPER_COUNT_OFFSET 0x148 #define GC_XO_CLK_TIMER_FAST_CALIB4_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB4_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_FAST_CALIB4_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_FAST_CALIB4_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB4_UPPER_COUNT_OFFSET 0x14c #define GC_XO_CLK_TIMER_FAST_CALIB5_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB5_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_FAST_CALIB5_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_FAST_CALIB5_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB5_UPPER_COUNT_OFFSET 0x150 #define GC_XO_CLK_TIMER_FAST_CALIB6_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB6_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_FAST_CALIB6_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_FAST_CALIB6_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB6_UPPER_COUNT_OFFSET 0x154 #define GC_XO_CLK_TIMER_FAST_CALIB7_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB7_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_FAST_CALIB7_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_FAST_CALIB7_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB7_UPPER_COUNT_OFFSET 0x158 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL0_OP_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL0_OP_MASK 0xf #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL0_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL0_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL0_OP_OFFSET 0x15c #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL0_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL0_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL0_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL0_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL0_OPERAND_OFFSET 0x15c #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL1_OP_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL1_OP_MASK 0xf #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL1_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL1_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL1_OP_OFFSET 0x160 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL1_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL1_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL1_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL1_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL1_OPERAND_OFFSET 0x160 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL2_OP_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL2_OP_MASK 0xf #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL2_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL2_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL2_OP_OFFSET 0x164 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL2_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL2_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL2_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL2_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL2_OPERAND_OFFSET 0x164 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL3_OP_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL3_OP_MASK 0xf #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL3_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL3_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL3_OP_OFFSET 0x168 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL3_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL3_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL3_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL3_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL3_OPERAND_OFFSET 0x168 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL4_OP_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL4_OP_MASK 0xf #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL4_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL4_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL4_OP_OFFSET 0x16c #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL4_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL4_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL4_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL4_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL4_OPERAND_OFFSET 0x16c #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL5_OP_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL5_OP_MASK 0xf #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL5_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL5_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL5_OP_OFFSET 0x170 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL5_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL5_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL5_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL5_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL5_OPERAND_OFFSET 0x170 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL6_OP_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL6_OP_MASK 0xf #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL6_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL6_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL6_OP_OFFSET 0x174 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL6_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL6_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL6_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL6_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL6_OPERAND_OFFSET 0x174 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL7_OP_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL7_OP_MASK 0xf #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL7_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL7_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL7_OP_OFFSET 0x178 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL7_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL7_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL7_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL7_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL7_OPERAND_OFFSET 0x178 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL8_OP_LSB 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL8_OP_MASK 0xf #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL8_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL8_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL8_OP_OFFSET 0x17c #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL8_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL8_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL8_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL8_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_FAST_CALIB_CTRL8_OPERAND_OFFSET 0x17c #define GC_XO_CLK_TIMER_SLOW_CALIB0_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB0_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_SLOW_CALIB0_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_SLOW_CALIB0_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB0_UPPER_COUNT_OFFSET 0x180 #define GC_XO_CLK_TIMER_SLOW_CALIB1_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB1_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_SLOW_CALIB1_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_SLOW_CALIB1_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB1_UPPER_COUNT_OFFSET 0x184 #define GC_XO_CLK_TIMER_SLOW_CALIB2_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB2_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_SLOW_CALIB2_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_SLOW_CALIB2_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB2_UPPER_COUNT_OFFSET 0x188 #define GC_XO_CLK_TIMER_SLOW_CALIB3_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB3_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_SLOW_CALIB3_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_SLOW_CALIB3_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB3_UPPER_COUNT_OFFSET 0x18c #define GC_XO_CLK_TIMER_SLOW_CALIB4_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB4_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_SLOW_CALIB4_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_SLOW_CALIB4_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB4_UPPER_COUNT_OFFSET 0x190 #define GC_XO_CLK_TIMER_SLOW_CALIB5_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB5_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_SLOW_CALIB5_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_SLOW_CALIB5_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB5_UPPER_COUNT_OFFSET 0x194 #define GC_XO_CLK_TIMER_SLOW_CALIB6_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB6_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_SLOW_CALIB6_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_SLOW_CALIB6_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB6_UPPER_COUNT_OFFSET 0x198 #define GC_XO_CLK_TIMER_SLOW_CALIB7_UPPER_COUNT_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB7_UPPER_COUNT_MASK 0xffff #define GC_XO_CLK_TIMER_SLOW_CALIB7_UPPER_COUNT_SIZE 0x10 #define GC_XO_CLK_TIMER_SLOW_CALIB7_UPPER_COUNT_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB7_UPPER_COUNT_OFFSET 0x19c #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL0_OP_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL0_OP_MASK 0xf #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL0_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL0_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL0_OP_OFFSET 0x1a0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL0_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL0_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL0_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL0_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL0_OPERAND_OFFSET 0x1a0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL1_OP_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL1_OP_MASK 0xf #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL1_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL1_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL1_OP_OFFSET 0x1a4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL1_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL1_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL1_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL1_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL1_OPERAND_OFFSET 0x1a4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL2_OP_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL2_OP_MASK 0xf #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL2_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL2_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL2_OP_OFFSET 0x1a8 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL2_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL2_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL2_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL2_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL2_OPERAND_OFFSET 0x1a8 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL3_OP_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL3_OP_MASK 0xf #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL3_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL3_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL3_OP_OFFSET 0x1ac #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL3_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL3_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL3_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL3_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL3_OPERAND_OFFSET 0x1ac #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL4_OP_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL4_OP_MASK 0xf #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL4_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL4_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL4_OP_OFFSET 0x1b0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL4_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL4_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL4_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL4_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL4_OPERAND_OFFSET 0x1b0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL5_OP_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL5_OP_MASK 0xf #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL5_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL5_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL5_OP_OFFSET 0x1b4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL5_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL5_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL5_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL5_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL5_OPERAND_OFFSET 0x1b4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL6_OP_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL6_OP_MASK 0xf #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL6_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL6_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL6_OP_OFFSET 0x1b8 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL6_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL6_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL6_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL6_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL6_OPERAND_OFFSET 0x1b8 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL7_OP_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL7_OP_MASK 0xf #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL7_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL7_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL7_OP_OFFSET 0x1bc #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL7_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL7_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL7_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL7_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL7_OPERAND_OFFSET 0x1bc #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL8_OP_LSB 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL8_OP_MASK 0xf #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL8_OP_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL8_OP_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL8_OP_OFFSET 0x1c0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL8_OPERAND_LSB 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL8_OPERAND_MASK 0xf0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL8_OPERAND_SIZE 0x4 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL8_OPERAND_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SLOW_CALIB_CTRL8_OPERAND_OFFSET 0x1c0 #define GC_XO_CLK_TIMER_SW_TRIM_COUNTER_VALUE_LSB 0x0 #define GC_XO_CLK_TIMER_SW_TRIM_COUNTER_VALUE_MASK 0xffffff #define GC_XO_CLK_TIMER_SW_TRIM_COUNTER_VALUE_SIZE 0x18 #define GC_XO_CLK_TIMER_SW_TRIM_COUNTER_VALUE_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SW_TRIM_COUNTER_VALUE_OFFSET 0x1c8 #define GC_XO_CLK_TIMER_SW_TRIM_COUNTER_DONE_LSB 0x18 #define GC_XO_CLK_TIMER_SW_TRIM_COUNTER_DONE_MASK 0x1000000 #define GC_XO_CLK_TIMER_SW_TRIM_COUNTER_DONE_SIZE 0x1 #define GC_XO_CLK_TIMER_SW_TRIM_COUNTER_DONE_DEFAULT 0x0 #define GC_XO_CLK_TIMER_SW_TRIM_COUNTER_DONE_OFFSET 0x1c8 #define GC_XO_OSC_XTL_FREQ2X_CAL_CNTL_LSB 0x0 #define GC_XO_OSC_XTL_FREQ2X_CAL_CNTL_MASK 0xf #define GC_XO_OSC_XTL_FREQ2X_CAL_CNTL_SIZE 0x4 #define GC_XO_OSC_XTL_FREQ2X_CAL_CNTL_DEFAULT 0x7 #define GC_XO_OSC_XTL_FREQ2X_CAL_CNTL_OFFSET 0x1cc #define GC_XO_OSC_XTL_FREQ2X_CAL_EN_LSB 0x4 #define GC_XO_OSC_XTL_FREQ2X_CAL_EN_MASK 0x10 #define GC_XO_OSC_XTL_FREQ2X_CAL_EN_SIZE 0x1 #define GC_XO_OSC_XTL_FREQ2X_CAL_EN_DEFAULT 0x0 #define GC_XO_OSC_XTL_FREQ2X_CAL_EN_OFFSET 0x1cc #define GC_XO_OSC_XTL_FREQ2X_SELB_LSB 0x5 #define GC_XO_OSC_XTL_FREQ2X_SELB_MASK 0x20 #define GC_XO_OSC_XTL_FREQ2X_SELB_SIZE 0x1 #define GC_XO_OSC_XTL_FREQ2X_SELB_DEFAULT 0x0 #define GC_XO_OSC_XTL_FREQ2X_SELB_OFFSET 0x1cc #define GC_XO_OSC_XTL_FREQ2X_STAT_CAL_CNTL_LSB 0x0 #define GC_XO_OSC_XTL_FREQ2X_STAT_CAL_CNTL_MASK 0xf #define GC_XO_OSC_XTL_FREQ2X_STAT_CAL_CNTL_SIZE 0x4 #define GC_XO_OSC_XTL_FREQ2X_STAT_CAL_CNTL_DEFAULT 0x6 #define GC_XO_OSC_XTL_FREQ2X_STAT_CAL_CNTL_OFFSET 0x1d0 #define GC_XO_OSC_XTL_FREQ2X_STAT_CAL_EN_LSB 0x4 #define GC_XO_OSC_XTL_FREQ2X_STAT_CAL_EN_MASK 0x10 #define GC_XO_OSC_XTL_FREQ2X_STAT_CAL_EN_SIZE 0x1 #define GC_XO_OSC_XTL_FREQ2X_STAT_CAL_EN_DEFAULT 0x0 #define GC_XO_OSC_XTL_FREQ2X_STAT_CAL_EN_OFFSET 0x1d0 #define GC_XO_OSC_XTL_FREQ2X_STAT_SELB_LSB 0x5 #define GC_XO_OSC_XTL_FREQ2X_STAT_SELB_MASK 0x20 #define GC_XO_OSC_XTL_FREQ2X_STAT_SELB_SIZE 0x1 #define GC_XO_OSC_XTL_FREQ2X_STAT_SELB_DEFAULT 0x0 #define GC_XO_OSC_XTL_FREQ2X_STAT_SELB_OFFSET 0x1d0 #define GC_XO_OSC_XTL_RC_FLTR_TRIM_LSB 0x0 #define GC_XO_OSC_XTL_RC_FLTR_TRIM_MASK 0xf #define GC_XO_OSC_XTL_RC_FLTR_TRIM_SIZE 0x4 #define GC_XO_OSC_XTL_RC_FLTR_TRIM_DEFAULT 0x5 #define GC_XO_OSC_XTL_RC_FLTR_TRIM_OFFSET 0x1e0 #define GC_XO_OSC_XTL_RC_FLTR_BYPASS_LSB 0x4 #define GC_XO_OSC_XTL_RC_FLTR_BYPASS_MASK 0x10 #define GC_XO_OSC_XTL_RC_FLTR_BYPASS_SIZE 0x1 #define GC_XO_OSC_XTL_RC_FLTR_BYPASS_DEFAULT 0x1 #define GC_XO_OSC_XTL_RC_FLTR_BYPASS_OFFSET 0x1e0 #define GC_XO_OSC_XTL_OVRD_TRIM_LSB 0x0 #define GC_XO_OSC_XTL_OVRD_TRIM_MASK 0xf #define GC_XO_OSC_XTL_OVRD_TRIM_SIZE 0x4 #define GC_XO_OSC_XTL_OVRD_TRIM_DEFAULT 0x7 #define GC_XO_OSC_XTL_OVRD_TRIM_OFFSET 0x1e4 #define GC_XO_OSC_XTL_OVRD_ENB_LSB 0x4 #define GC_XO_OSC_XTL_OVRD_ENB_MASK 0x10 #define GC_XO_OSC_XTL_OVRD_ENB_SIZE 0x1 #define GC_XO_OSC_XTL_OVRD_ENB_DEFAULT 0x1 #define GC_XO_OSC_XTL_OVRD_ENB_OFFSET 0x1e4 #define GC_XO_OSC_XTL_TRIM_CODE_LSB 0x0 #define GC_XO_OSC_XTL_TRIM_CODE_MASK 0xf #define GC_XO_OSC_XTL_TRIM_CODE_SIZE 0x4 #define GC_XO_OSC_XTL_TRIM_CODE_DEFAULT 0x0 #define GC_XO_OSC_XTL_TRIM_CODE_OFFSET 0x1ec #define GC_XO_OSC_XTL_TRIM_EN_LSB 0x4 #define GC_XO_OSC_XTL_TRIM_EN_MASK 0x10 #define GC_XO_OSC_XTL_TRIM_EN_SIZE 0x1 #define GC_XO_OSC_XTL_TRIM_EN_DEFAULT 0x0 #define GC_XO_OSC_XTL_TRIM_EN_OFFSET 0x1ec #define GC_XO_OSC_XTL_TRIM_STAT_CODE_LSB 0x0 #define GC_XO_OSC_XTL_TRIM_STAT_CODE_MASK 0xf #define GC_XO_OSC_XTL_TRIM_STAT_CODE_SIZE 0x4 #define GC_XO_OSC_XTL_TRIM_STAT_CODE_DEFAULT 0x0 #define GC_XO_OSC_XTL_TRIM_STAT_CODE_OFFSET 0x1f0 #define GC_XO_OSC_XTL_TRIM_STAT_EN_LSB 0x4 #define GC_XO_OSC_XTL_TRIM_STAT_EN_MASK 0x10 #define GC_XO_OSC_XTL_TRIM_STAT_EN_SIZE 0x1 #define GC_XO_OSC_XTL_TRIM_STAT_EN_DEFAULT 0x0 #define GC_XO_OSC_XTL_TRIM_STAT_EN_OFFSET 0x1f0 #define GC_XO_OSC_XTL_FSM_DONE_LSB 0x0 #define GC_XO_OSC_XTL_FSM_DONE_MASK 0x1 #define GC_XO_OSC_XTL_FSM_DONE_SIZE 0x1 #define GC_XO_OSC_XTL_FSM_DONE_DEFAULT 0x0 #define GC_XO_OSC_XTL_FSM_DONE_OFFSET 0x1fc #define GC_XO_OSC_XTL_FSM_TRIM_LSB 0x1 #define GC_XO_OSC_XTL_FSM_TRIM_MASK 0x1e #define GC_XO_OSC_XTL_FSM_TRIM_SIZE 0x4 #define GC_XO_OSC_XTL_FSM_TRIM_DEFAULT 0x0 #define GC_XO_OSC_XTL_FSM_TRIM_OFFSET 0x1fc #define GC_XO_OSC_XTL_FSM_STATUS_LSB 0x5 #define GC_XO_OSC_XTL_FSM_STATUS_MASK 0x20 #define GC_XO_OSC_XTL_FSM_STATUS_SIZE 0x1 #define GC_XO_OSC_XTL_FSM_STATUS_DEFAULT 0x0 #define GC_XO_OSC_XTL_FSM_STATUS_OFFSET 0x1fc #define GC_XO_OSC_XTL_FSM_STATE_LSB 0x6 #define GC_XO_OSC_XTL_FSM_STATE_MASK 0x3c0 #define GC_XO_OSC_XTL_FSM_STATE_SIZE 0x4 #define GC_XO_OSC_XTL_FSM_STATE_DEFAULT 0x0 #define GC_XO_OSC_XTL_FSM_STATE_OFFSET 0x1fc #define GC_XO_OSC_XTL_FSM_LVL_DET_SYNC_LSB 0xa #define GC_XO_OSC_XTL_FSM_LVL_DET_SYNC_MASK 0x400 #define GC_XO_OSC_XTL_FSM_LVL_DET_SYNC_SIZE 0x1 #define GC_XO_OSC_XTL_FSM_LVL_DET_SYNC_DEFAULT 0x0 #define GC_XO_OSC_XTL_FSM_LVL_DET_SYNC_OFFSET 0x1fc #define GC_XO_OSC_XTL_FSM_CFG_TRIM_MAX_LSB 0x0 #define GC_XO_OSC_XTL_FSM_CFG_TRIM_MAX_MASK 0xf #define GC_XO_OSC_XTL_FSM_CFG_TRIM_MAX_SIZE 0x4 #define GC_XO_OSC_XTL_FSM_CFG_TRIM_MAX_DEFAULT 0x8 #define GC_XO_OSC_XTL_FSM_CFG_TRIM_MAX_OFFSET 0x200 #define GC_XO_OSC_XTL_FSM_CFG_LVL_DET_SNIFF_LSB 0x4 #define GC_XO_OSC_XTL_FSM_CFG_LVL_DET_SNIFF_MASK 0x30 #define GC_XO_OSC_XTL_FSM_CFG_LVL_DET_SNIFF_SIZE 0x2 #define GC_XO_OSC_XTL_FSM_CFG_LVL_DET_SNIFF_DEFAULT 0x0 #define GC_XO_OSC_XTL_FSM_CFG_LVL_DET_SNIFF_OFFSET 0x200 #define GC_XO_OSC_XTL_FSM_CFG_LVL_DET_SENSE_LSB 0x6 #define GC_XO_OSC_XTL_FSM_CFG_LVL_DET_SENSE_MASK 0xc0 #define GC_XO_OSC_XTL_FSM_CFG_LVL_DET_SENSE_SIZE 0x2 #define GC_XO_OSC_XTL_FSM_CFG_LVL_DET_SENSE_DEFAULT 0x2 #define GC_XO_OSC_XTL_FSM_CFG_LVL_DET_SENSE_OFFSET 0x200 #define GC_XO_OSC_XTL_FSM_CFG_PWRUP_REG_MAX_LSB 0x8 #define GC_XO_OSC_XTL_FSM_CFG_PWRUP_REG_MAX_MASK 0x700 #define GC_XO_OSC_XTL_FSM_CFG_PWRUP_REG_MAX_SIZE 0x3 #define GC_XO_OSC_XTL_FSM_CFG_PWRUP_REG_MAX_DEFAULT 0x4 #define GC_XO_OSC_XTL_FSM_CFG_PWRUP_REG_MAX_OFFSET 0x200 #define GC_XO_OSC_XTL_FSM_CFG_SNIFF_REG_MAX_LSB 0xb #define GC_XO_OSC_XTL_FSM_CFG_SNIFF_REG_MAX_MASK 0xf800 #define GC_XO_OSC_XTL_FSM_CFG_SNIFF_REG_MAX_SIZE 0x5 #define GC_XO_OSC_XTL_FSM_CFG_SNIFF_REG_MAX_DEFAULT 0xe #define GC_XO_OSC_XTL_FSM_CFG_SNIFF_REG_MAX_OFFSET 0x200 #define GC_XO_OSC_XTL_FSM_CFG_SENSE_REG_MAX_LSB 0x10 #define GC_XO_OSC_XTL_FSM_CFG_SENSE_REG_MAX_MASK 0x1f0000 #define GC_XO_OSC_XTL_FSM_CFG_SENSE_REG_MAX_SIZE 0x5 #define GC_XO_OSC_XTL_FSM_CFG_SENSE_REG_MAX_DEFAULT 0xd #define GC_XO_OSC_XTL_FSM_CFG_SENSE_REG_MAX_OFFSET 0x200 #define GC_XO_OSC_TEST_CLK2X_EN_LSB 0x0 #define GC_XO_OSC_TEST_CLK2X_EN_MASK 0x1 #define GC_XO_OSC_TEST_CLK2X_EN_SIZE 0x1 #define GC_XO_OSC_TEST_CLK2X_EN_DEFAULT 0x0 #define GC_XO_OSC_TEST_CLK2X_EN_OFFSET 0x204 #define GC_XO_OSC_TEST_CLK_JTR_EN_LSB 0x1 #define GC_XO_OSC_TEST_CLK_JTR_EN_MASK 0x2 #define GC_XO_OSC_TEST_CLK_JTR_EN_SIZE 0x1 #define GC_XO_OSC_TEST_CLK_JTR_EN_DEFAULT 0x0 #define GC_XO_OSC_TEST_CLK_JTR_EN_OFFSET 0x204 #define GC_XO_OSC_TEST_CLK_TIMER_EN_LSB 0x2 #define GC_XO_OSC_TEST_CLK_TIMER_EN_MASK 0x4 #define GC_XO_OSC_TEST_CLK_TIMER_EN_SIZE 0x1 #define GC_XO_OSC_TEST_CLK_TIMER_EN_DEFAULT 0x0 #define GC_XO_OSC_TEST_CLK_TIMER_EN_OFFSET 0x204 #define GC_XO_ANTEST_CTRL_LDO_EN_LSB 0x0 #define GC_XO_ANTEST_CTRL_LDO_EN_MASK 0x1 #define GC_XO_ANTEST_CTRL_LDO_EN_SIZE 0x1 #define GC_XO_ANTEST_CTRL_LDO_EN_DEFAULT 0x0 #define GC_XO_ANTEST_CTRL_LDO_EN_OFFSET 0x214 #define GC_XO_DXO_INT_ENABLE_FAST_CALIB_OVERFLOW_LSB 0x0 #define GC_XO_DXO_INT_ENABLE_FAST_CALIB_OVERFLOW_MASK 0x1 #define GC_XO_DXO_INT_ENABLE_FAST_CALIB_OVERFLOW_SIZE 0x1 #define GC_XO_DXO_INT_ENABLE_FAST_CALIB_OVERFLOW_DEFAULT 0x0 #define GC_XO_DXO_INT_ENABLE_FAST_CALIB_OVERFLOW_OFFSET 0x218 #define GC_XO_DXO_INT_ENABLE_FAST_CALIB_UNDERRUN_LSB 0x1 #define GC_XO_DXO_INT_ENABLE_FAST_CALIB_UNDERRUN_MASK 0x2 #define GC_XO_DXO_INT_ENABLE_FAST_CALIB_UNDERRUN_SIZE 0x1 #define GC_XO_DXO_INT_ENABLE_FAST_CALIB_UNDERRUN_DEFAULT 0x0 #define GC_XO_DXO_INT_ENABLE_FAST_CALIB_UNDERRUN_OFFSET 0x218 #define GC_XO_DXO_INT_ENABLE_SLOW_CALIB_OVERFLOW_LSB 0x2 #define GC_XO_DXO_INT_ENABLE_SLOW_CALIB_OVERFLOW_MASK 0x4 #define GC_XO_DXO_INT_ENABLE_SLOW_CALIB_OVERFLOW_SIZE 0x1 #define GC_XO_DXO_INT_ENABLE_SLOW_CALIB_OVERFLOW_DEFAULT 0x0 #define GC_XO_DXO_INT_ENABLE_SLOW_CALIB_OVERFLOW_OFFSET 0x218 #define GC_XO_DXO_INT_ENABLE_SLOW_CALIB_UNDERRUN_LSB 0x3 #define GC_XO_DXO_INT_ENABLE_SLOW_CALIB_UNDERRUN_MASK 0x8 #define GC_XO_DXO_INT_ENABLE_SLOW_CALIB_UNDERRUN_SIZE 0x1 #define GC_XO_DXO_INT_ENABLE_SLOW_CALIB_UNDERRUN_DEFAULT 0x0 #define GC_XO_DXO_INT_ENABLE_SLOW_CALIB_UNDERRUN_OFFSET 0x218 #define GC_XO_DXO_INT_ENABLE_CLK_JTR_NOP_SEEN_LSB 0x4 #define GC_XO_DXO_INT_ENABLE_CLK_JTR_NOP_SEEN_MASK 0x10 #define GC_XO_DXO_INT_ENABLE_CLK_JTR_NOP_SEEN_SIZE 0x1 #define GC_XO_DXO_INT_ENABLE_CLK_JTR_NOP_SEEN_DEFAULT 0x0 #define GC_XO_DXO_INT_ENABLE_CLK_JTR_NOP_SEEN_OFFSET 0x218 #define GC_XO_DXO_INT_ENABLE_CLK_TIMER_NOP_SEEN_LSB 0x5 #define GC_XO_DXO_INT_ENABLE_CLK_TIMER_NOP_SEEN_MASK 0x20 #define GC_XO_DXO_INT_ENABLE_CLK_TIMER_NOP_SEEN_SIZE 0x1 #define GC_XO_DXO_INT_ENABLE_CLK_TIMER_NOP_SEEN_DEFAULT 0x0 #define GC_XO_DXO_INT_ENABLE_CLK_TIMER_NOP_SEEN_OFFSET 0x218 #define GC_XO_DXO_INT_ENABLE_CLK_JTR_SW_TRIM_DONE_LSB 0x6 #define GC_XO_DXO_INT_ENABLE_CLK_JTR_SW_TRIM_DONE_MASK 0x40 #define GC_XO_DXO_INT_ENABLE_CLK_JTR_SW_TRIM_DONE_SIZE 0x1 #define GC_XO_DXO_INT_ENABLE_CLK_JTR_SW_TRIM_DONE_DEFAULT 0x0 #define GC_XO_DXO_INT_ENABLE_CLK_JTR_SW_TRIM_DONE_OFFSET 0x218 #define GC_XO_DXO_INT_ENABLE_CLK_TIMER_SW_TRIM_DONE_LSB 0x7 #define GC_XO_DXO_INT_ENABLE_CLK_TIMER_SW_TRIM_DONE_MASK 0x80 #define GC_XO_DXO_INT_ENABLE_CLK_TIMER_SW_TRIM_DONE_SIZE 0x1 #define GC_XO_DXO_INT_ENABLE_CLK_TIMER_SW_TRIM_DONE_DEFAULT 0x0 #define GC_XO_DXO_INT_ENABLE_CLK_TIMER_SW_TRIM_DONE_OFFSET 0x218 #define GC_XO_DXO_INT_STATE_FAST_CALIB_OVERFLOW_LSB 0x0 #define GC_XO_DXO_INT_STATE_FAST_CALIB_OVERFLOW_MASK 0x1 #define GC_XO_DXO_INT_STATE_FAST_CALIB_OVERFLOW_SIZE 0x1 #define GC_XO_DXO_INT_STATE_FAST_CALIB_OVERFLOW_DEFAULT 0x0 #define GC_XO_DXO_INT_STATE_FAST_CALIB_OVERFLOW_OFFSET 0x21c #define GC_XO_DXO_INT_STATE_FAST_CALIB_UNDERRUN_LSB 0x1 #define GC_XO_DXO_INT_STATE_FAST_CALIB_UNDERRUN_MASK 0x2 #define GC_XO_DXO_INT_STATE_FAST_CALIB_UNDERRUN_SIZE 0x1 #define GC_XO_DXO_INT_STATE_FAST_CALIB_UNDERRUN_DEFAULT 0x0 #define GC_XO_DXO_INT_STATE_FAST_CALIB_UNDERRUN_OFFSET 0x21c #define GC_XO_DXO_INT_STATE_SLOW_CALIB_OVERFLOW_LSB 0x2 #define GC_XO_DXO_INT_STATE_SLOW_CALIB_OVERFLOW_MASK 0x4 #define GC_XO_DXO_INT_STATE_SLOW_CALIB_OVERFLOW_SIZE 0x1 #define GC_XO_DXO_INT_STATE_SLOW_CALIB_OVERFLOW_DEFAULT 0x0 #define GC_XO_DXO_INT_STATE_SLOW_CALIB_OVERFLOW_OFFSET 0x21c #define GC_XO_DXO_INT_STATE_SLOW_CALIB_UNDERRUN_LSB 0x3 #define GC_XO_DXO_INT_STATE_SLOW_CALIB_UNDERRUN_MASK 0x8 #define GC_XO_DXO_INT_STATE_SLOW_CALIB_UNDERRUN_SIZE 0x1 #define GC_XO_DXO_INT_STATE_SLOW_CALIB_UNDERRUN_DEFAULT 0x0 #define GC_XO_DXO_INT_STATE_SLOW_CALIB_UNDERRUN_OFFSET 0x21c #define GC_XO_DXO_INT_STATE_CLK_JTR_NOP_SEEN_LSB 0x4 #define GC_XO_DXO_INT_STATE_CLK_JTR_NOP_SEEN_MASK 0x10 #define GC_XO_DXO_INT_STATE_CLK_JTR_NOP_SEEN_SIZE 0x1 #define GC_XO_DXO_INT_STATE_CLK_JTR_NOP_SEEN_DEFAULT 0x0 #define GC_XO_DXO_INT_STATE_CLK_JTR_NOP_SEEN_OFFSET 0x21c #define GC_XO_DXO_INT_STATE_CLK_TIMER_NOP_SEEN_LSB 0x5 #define GC_XO_DXO_INT_STATE_CLK_TIMER_NOP_SEEN_MASK 0x20 #define GC_XO_DXO_INT_STATE_CLK_TIMER_NOP_SEEN_SIZE 0x1 #define GC_XO_DXO_INT_STATE_CLK_TIMER_NOP_SEEN_DEFAULT 0x0 #define GC_XO_DXO_INT_STATE_CLK_TIMER_NOP_SEEN_OFFSET 0x21c #define GC_XO_DXO_INT_STATE_CLK_JTR_SW_TRIM_DONE_LSB 0x6 #define GC_XO_DXO_INT_STATE_CLK_JTR_SW_TRIM_DONE_MASK 0x40 #define GC_XO_DXO_INT_STATE_CLK_JTR_SW_TRIM_DONE_SIZE 0x1 #define GC_XO_DXO_INT_STATE_CLK_JTR_SW_TRIM_DONE_DEFAULT 0x0 #define GC_XO_DXO_INT_STATE_CLK_JTR_SW_TRIM_DONE_OFFSET 0x21c #define GC_XO_DXO_INT_STATE_CLK_TIMER_SW_TRIM_DONE_LSB 0x7 #define GC_XO_DXO_INT_STATE_CLK_TIMER_SW_TRIM_DONE_MASK 0x80 #define GC_XO_DXO_INT_STATE_CLK_TIMER_SW_TRIM_DONE_SIZE 0x1 #define GC_XO_DXO_INT_STATE_CLK_TIMER_SW_TRIM_DONE_DEFAULT 0x0 #define GC_XO_DXO_INT_STATE_CLK_TIMER_SW_TRIM_DONE_OFFSET 0x21c #define GC_XO_DXO_INT_TEST_FAST_CALIB_OVERFLOW_LSB 0x0 #define GC_XO_DXO_INT_TEST_FAST_CALIB_OVERFLOW_MASK 0x1 #define GC_XO_DXO_INT_TEST_FAST_CALIB_OVERFLOW_SIZE 0x1 #define GC_XO_DXO_INT_TEST_FAST_CALIB_OVERFLOW_DEFAULT 0x0 #define GC_XO_DXO_INT_TEST_FAST_CALIB_OVERFLOW_OFFSET 0x220 #define GC_XO_DXO_INT_TEST_FAST_CALIB_UNDERRUN_LSB 0x1 #define GC_XO_DXO_INT_TEST_FAST_CALIB_UNDERRUN_MASK 0x2 #define GC_XO_DXO_INT_TEST_FAST_CALIB_UNDERRUN_SIZE 0x1 #define GC_XO_DXO_INT_TEST_FAST_CALIB_UNDERRUN_DEFAULT 0x0 #define GC_XO_DXO_INT_TEST_FAST_CALIB_UNDERRUN_OFFSET 0x220 #define GC_XO_DXO_INT_TEST_SLOW_CALIB_OVERFLOW_LSB 0x2 #define GC_XO_DXO_INT_TEST_SLOW_CALIB_OVERFLOW_MASK 0x4 #define GC_XO_DXO_INT_TEST_SLOW_CALIB_OVERFLOW_SIZE 0x1 #define GC_XO_DXO_INT_TEST_SLOW_CALIB_OVERFLOW_DEFAULT 0x0 #define GC_XO_DXO_INT_TEST_SLOW_CALIB_OVERFLOW_OFFSET 0x220 #define GC_XO_DXO_INT_TEST_SLOW_CALIB_UNDERRUN_LSB 0x3 #define GC_XO_DXO_INT_TEST_SLOW_CALIB_UNDERRUN_MASK 0x8 #define GC_XO_DXO_INT_TEST_SLOW_CALIB_UNDERRUN_SIZE 0x1 #define GC_XO_DXO_INT_TEST_SLOW_CALIB_UNDERRUN_DEFAULT 0x0 #define GC_XO_DXO_INT_TEST_SLOW_CALIB_UNDERRUN_OFFSET 0x220 #define GC_XO_DXO_INT_TEST_CLK_JTR_NOP_SEEN_LSB 0x4 #define GC_XO_DXO_INT_TEST_CLK_JTR_NOP_SEEN_MASK 0x10 #define GC_XO_DXO_INT_TEST_CLK_JTR_NOP_SEEN_SIZE 0x1 #define GC_XO_DXO_INT_TEST_CLK_JTR_NOP_SEEN_DEFAULT 0x0 #define GC_XO_DXO_INT_TEST_CLK_JTR_NOP_SEEN_OFFSET 0x220 #define GC_XO_DXO_INT_TEST_CLK_TIMER_NOP_SEEN_LSB 0x5 #define GC_XO_DXO_INT_TEST_CLK_TIMER_NOP_SEEN_MASK 0x20 #define GC_XO_DXO_INT_TEST_CLK_TIMER_NOP_SEEN_SIZE 0x1 #define GC_XO_DXO_INT_TEST_CLK_TIMER_NOP_SEEN_DEFAULT 0x0 #define GC_XO_DXO_INT_TEST_CLK_TIMER_NOP_SEEN_OFFSET 0x220 #define GC_XO_DXO_INT_TEST_CLK_JTR_SW_TRIM_DONE_LSB 0x6 #define GC_XO_DXO_INT_TEST_CLK_JTR_SW_TRIM_DONE_MASK 0x40 #define GC_XO_DXO_INT_TEST_CLK_JTR_SW_TRIM_DONE_SIZE 0x1 #define GC_XO_DXO_INT_TEST_CLK_JTR_SW_TRIM_DONE_DEFAULT 0x0 #define GC_XO_DXO_INT_TEST_CLK_JTR_SW_TRIM_DONE_OFFSET 0x220 #define GC_XO_DXO_INT_TEST_CLK_TIMER_SW_TRIM_DONE_LSB 0x7 #define GC_XO_DXO_INT_TEST_CLK_TIMER_SW_TRIM_DONE_MASK 0x80 #define GC_XO_DXO_INT_TEST_CLK_TIMER_SW_TRIM_DONE_SIZE 0x1 #define GC_XO_DXO_INT_TEST_CLK_TIMER_SW_TRIM_DONE_DEFAULT 0x0 #define GC_XO_DXO_INT_TEST_CLK_TIMER_SW_TRIM_DONE_OFFSET 0x220 #define GC_M3_ITM_TCR_ITMENA_LSB 0x0 #define GC_M3_ITM_TCR_ITMENA_MASK 0x1 #define GC_M3_ITM_TCR_ITMENA_SIZE 0x1 #define GC_M3_ITM_TCR_ITMENA_DEFAULT 0x0 #define GC_M3_ITM_TCR_ITMENA_OFFSET 0xe80 #define GC_M3_ITM_TCR_TSENA_LSB 0x1 #define GC_M3_ITM_TCR_TSENA_MASK 0x2 #define GC_M3_ITM_TCR_TSENA_SIZE 0x1 #define GC_M3_ITM_TCR_TSENA_DEFAULT 0x0 #define GC_M3_ITM_TCR_TSENA_OFFSET 0xe80 #define GC_M3_ITM_TCR_SYNCENA_LSB 0x2 #define GC_M3_ITM_TCR_SYNCENA_MASK 0x4 #define GC_M3_ITM_TCR_SYNCENA_SIZE 0x1 #define GC_M3_ITM_TCR_SYNCENA_DEFAULT 0x0 #define GC_M3_ITM_TCR_SYNCENA_OFFSET 0xe80 #define GC_M3_ITM_TCR_DWTENA_LSB 0x3 #define GC_M3_ITM_TCR_DWTENA_MASK 0x8 #define GC_M3_ITM_TCR_DWTENA_SIZE 0x1 #define GC_M3_ITM_TCR_DWTENA_DEFAULT 0x0 #define GC_M3_ITM_TCR_DWTENA_OFFSET 0xe80 #define GC_M3_ITM_TCR_SWOENA_LSB 0x4 #define GC_M3_ITM_TCR_SWOENA_MASK 0x10 #define GC_M3_ITM_TCR_SWOENA_SIZE 0x1 #define GC_M3_ITM_TCR_SWOENA_DEFAULT 0x0 #define GC_M3_ITM_TCR_SWOENA_OFFSET 0xe80 #define GC_M3_ITM_TCR_TSPRESCALE_LSB 0x8 #define GC_M3_ITM_TCR_TSPRESCALE_MASK 0x300 #define GC_M3_ITM_TCR_TSPRESCALE_SIZE 0x2 #define GC_M3_ITM_TCR_TSPRESCALE_DEFAULT 0x0 #define GC_M3_ITM_TCR_TSPRESCALE_OFFSET 0xe80 #define GC_M3_ITM_TCR_ATBID_LSB 0x10 #define GC_M3_ITM_TCR_ATBID_MASK 0x7f0000 #define GC_M3_ITM_TCR_ATBID_SIZE 0x7 #define GC_M3_ITM_TCR_ATBID_DEFAULT 0x0 #define GC_M3_ITM_TCR_ATBID_OFFSET 0xe80 #define GC_M3_ITM_TCR_BUSY_LSB 0x17 #define GC_M3_ITM_TCR_BUSY_MASK 0x800000 #define GC_M3_ITM_TCR_BUSY_SIZE 0x1 #define GC_M3_ITM_TCR_BUSY_DEFAULT 0x0 #define GC_M3_ITM_TCR_BUSY_OFFSET 0xe80 #define GC_M3_ITM_LOCKSREG_PRESENT_LSB 0x0 #define GC_M3_ITM_LOCKSREG_PRESENT_MASK 0x1 #define GC_M3_ITM_LOCKSREG_PRESENT_SIZE 0x1 #define GC_M3_ITM_LOCKSREG_PRESENT_DEFAULT 0x0 #define GC_M3_ITM_LOCKSREG_PRESENT_OFFSET 0xfb4 #define GC_M3_ITM_LOCKSREG_ACCESS_LSB 0x1 #define GC_M3_ITM_LOCKSREG_ACCESS_MASK 0x2 #define GC_M3_ITM_LOCKSREG_ACCESS_SIZE 0x1 #define GC_M3_ITM_LOCKSREG_ACCESS_DEFAULT 0x0 #define GC_M3_ITM_LOCKSREG_ACCESS_OFFSET 0xfb4 #define GC_M3_ITM_LOCKSREG_BYTEACC_LSB 0x2 #define GC_M3_ITM_LOCKSREG_BYTEACC_MASK 0x4 #define GC_M3_ITM_LOCKSREG_BYTEACC_SIZE 0x1 #define GC_M3_ITM_LOCKSREG_BYTEACC_DEFAULT 0x0 #define GC_M3_ITM_LOCKSREG_BYTEACC_OFFSET 0xfb4 #define GC_M3_DWT_CTRL_CYCCNTENA_LSB 0x0 #define GC_M3_DWT_CTRL_CYCCNTENA_MASK 0x1 #define GC_M3_DWT_CTRL_CYCCNTENA_SIZE 0x1 #define GC_M3_DWT_CTRL_CYCCNTENA_DEFAULT 0x0 #define GC_M3_DWT_CTRL_CYCCNTENA_OFFSET 0x1000 #define GC_M3_DWT_CTRL_POSTRESET_LSB 0x1 #define GC_M3_DWT_CTRL_POSTRESET_MASK 0x1e #define GC_M3_DWT_CTRL_POSTRESET_SIZE 0x4 #define GC_M3_DWT_CTRL_POSTRESET_DEFAULT 0x0 #define GC_M3_DWT_CTRL_POSTRESET_OFFSET 0x1000 #define GC_M3_DWT_CTRL_POSTCNT_LSB 0x5 #define GC_M3_DWT_CTRL_POSTCNT_MASK 0x1e0 #define GC_M3_DWT_CTRL_POSTCNT_SIZE 0x4 #define GC_M3_DWT_CTRL_POSTCNT_DEFAULT 0x0 #define GC_M3_DWT_CTRL_POSTCNT_OFFSET 0x1000 #define GC_M3_DWT_CTRL_CYCTAP_LSB 0x9 #define GC_M3_DWT_CTRL_CYCTAP_MASK 0x200 #define GC_M3_DWT_CTRL_CYCTAP_SIZE 0x1 #define GC_M3_DWT_CTRL_CYCTAP_DEFAULT 0x0 #define GC_M3_DWT_CTRL_CYCTAP_OFFSET 0x1000 #define GC_M3_DWT_CTRL_SYNCTAP_LSB 0xa #define GC_M3_DWT_CTRL_SYNCTAP_MASK 0xc00 #define GC_M3_DWT_CTRL_SYNCTAP_SIZE 0x2 #define GC_M3_DWT_CTRL_SYNCTAP_DEFAULT 0x0 #define GC_M3_DWT_CTRL_SYNCTAP_OFFSET 0x1000 #define GC_M3_DWT_CTRL_PCSAMPLENA_LSB 0xc #define GC_M3_DWT_CTRL_PCSAMPLENA_MASK 0x1000 #define GC_M3_DWT_CTRL_PCSAMPLENA_SIZE 0x1 #define GC_M3_DWT_CTRL_PCSAMPLENA_DEFAULT 0x0 #define GC_M3_DWT_CTRL_PCSAMPLENA_OFFSET 0x1000 #define GC_M3_DWT_CTRL_EXCTRCENA_LSB 0x10 #define GC_M3_DWT_CTRL_EXCTRCENA_MASK 0x10000 #define GC_M3_DWT_CTRL_EXCTRCENA_SIZE 0x1 #define GC_M3_DWT_CTRL_EXCTRCENA_DEFAULT 0x0 #define GC_M3_DWT_CTRL_EXCTRCENA_OFFSET 0x1000 #define GC_M3_DWT_CTRL_CPIEVTENA_LSB 0x11 #define GC_M3_DWT_CTRL_CPIEVTENA_MASK 0x20000 #define GC_M3_DWT_CTRL_CPIEVTENA_SIZE 0x1 #define GC_M3_DWT_CTRL_CPIEVTENA_DEFAULT 0x0 #define GC_M3_DWT_CTRL_CPIEVTENA_OFFSET 0x1000 #define GC_M3_DWT_CTRL_EXCEVTENA_LSB 0x12 #define GC_M3_DWT_CTRL_EXCEVTENA_MASK 0x40000 #define GC_M3_DWT_CTRL_EXCEVTENA_SIZE 0x1 #define GC_M3_DWT_CTRL_EXCEVTENA_DEFAULT 0x0 #define GC_M3_DWT_CTRL_EXCEVTENA_OFFSET 0x1000 #define GC_M3_DWT_CTRL_SLEEPEVTENA_LSB 0x13 #define GC_M3_DWT_CTRL_SLEEPEVTENA_MASK 0x80000 #define GC_M3_DWT_CTRL_SLEEPEVTENA_SIZE 0x1 #define GC_M3_DWT_CTRL_SLEEPEVTENA_DEFAULT 0x0 #define GC_M3_DWT_CTRL_SLEEPEVTENA_OFFSET 0x1000 #define GC_M3_DWT_CTRL_LSUEVTENA_LSB 0x14 #define GC_M3_DWT_CTRL_LSUEVTENA_MASK 0x100000 #define GC_M3_DWT_CTRL_LSUEVTENA_SIZE 0x1 #define GC_M3_DWT_CTRL_LSUEVTENA_DEFAULT 0x0 #define GC_M3_DWT_CTRL_LSUEVTENA_OFFSET 0x1000 #define GC_M3_DWT_CTRL_FOLDEVTENA_LSB 0x15 #define GC_M3_DWT_CTRL_FOLDEVTENA_MASK 0x200000 #define GC_M3_DWT_CTRL_FOLDEVTENA_SIZE 0x1 #define GC_M3_DWT_CTRL_FOLDEVTENA_DEFAULT 0x0 #define GC_M3_DWT_CTRL_FOLDEVTENA_OFFSET 0x1000 #define GC_M3_DWT_CTRL_CYCEVTENA_LSB 0x16 #define GC_M3_DWT_CTRL_CYCEVTENA_MASK 0x400000 #define GC_M3_DWT_CTRL_CYCEVTENA_SIZE 0x1 #define GC_M3_DWT_CTRL_CYCEVTENA_DEFAULT 0x0 #define GC_M3_DWT_CTRL_CYCEVTENA_OFFSET 0x1000 #define GC_M3_DWT_CTRL_NUMCOMP_LSB 0x1c #define GC_M3_DWT_CTRL_NUMCOMP_MASK 0xf0000000 #define GC_M3_DWT_CTRL_NUMCOMP_SIZE 0x4 #define GC_M3_DWT_CTRL_NUMCOMP_DEFAULT 0x4 #define GC_M3_DWT_CTRL_NUMCOMP_OFFSET 0x1000 #define GC_M3_DWT_FUNCTION0_FUNCTION_LSB 0x0 #define GC_M3_DWT_FUNCTION0_FUNCTION_MASK 0xf #define GC_M3_DWT_FUNCTION0_FUNCTION_SIZE 0x4 #define GC_M3_DWT_FUNCTION0_FUNCTION_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION0_FUNCTION_OFFSET 0x1028 #define GC_M3_DWT_FUNCTION0_EMITRANGE_LSB 0x5 #define GC_M3_DWT_FUNCTION0_EMITRANGE_MASK 0x20 #define GC_M3_DWT_FUNCTION0_EMITRANGE_SIZE 0x1 #define GC_M3_DWT_FUNCTION0_EMITRANGE_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION0_EMITRANGE_OFFSET 0x1028 #define GC_M3_DWT_FUNCTION0_CYCMATCH_LSB 0x7 #define GC_M3_DWT_FUNCTION0_CYCMATCH_MASK 0x80 #define GC_M3_DWT_FUNCTION0_CYCMATCH_SIZE 0x1 #define GC_M3_DWT_FUNCTION0_CYCMATCH_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION0_CYCMATCH_OFFSET 0x1028 #define GC_M3_DWT_FUNCTION0_LNK1ENA_LSB 0x9 #define GC_M3_DWT_FUNCTION0_LNK1ENA_MASK 0x200 #define GC_M3_DWT_FUNCTION0_LNK1ENA_SIZE 0x1 #define GC_M3_DWT_FUNCTION0_LNK1ENA_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION0_LNK1ENA_OFFSET 0x1028 #define GC_M3_DWT_FUNCTION0_DATAVSIZE_LSB 0xa #define GC_M3_DWT_FUNCTION0_DATAVSIZE_MASK 0xc00 #define GC_M3_DWT_FUNCTION0_DATAVSIZE_SIZE 0x2 #define GC_M3_DWT_FUNCTION0_DATAVSIZE_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION0_DATAVSIZE_OFFSET 0x1028 #define GC_M3_DWT_FUNCTION0_MATCHED_LSB 0x18 #define GC_M3_DWT_FUNCTION0_MATCHED_MASK 0x1000000 #define GC_M3_DWT_FUNCTION0_MATCHED_SIZE 0x1 #define GC_M3_DWT_FUNCTION0_MATCHED_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION0_MATCHED_OFFSET 0x1028 #define GC_M3_DWT_FUNCTION1_FUNCTION_LSB 0x0 #define GC_M3_DWT_FUNCTION1_FUNCTION_MASK 0xf #define GC_M3_DWT_FUNCTION1_FUNCTION_SIZE 0x4 #define GC_M3_DWT_FUNCTION1_FUNCTION_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION1_FUNCTION_OFFSET 0x1038 #define GC_M3_DWT_FUNCTION1_EMITRANGE_LSB 0x5 #define GC_M3_DWT_FUNCTION1_EMITRANGE_MASK 0x20 #define GC_M3_DWT_FUNCTION1_EMITRANGE_SIZE 0x1 #define GC_M3_DWT_FUNCTION1_EMITRANGE_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION1_EMITRANGE_OFFSET 0x1038 #define GC_M3_DWT_FUNCTION1_DATAVMATCH_LSB 0x8 #define GC_M3_DWT_FUNCTION1_DATAVMATCH_MASK 0x100 #define GC_M3_DWT_FUNCTION1_DATAVMATCH_SIZE 0x1 #define GC_M3_DWT_FUNCTION1_DATAVMATCH_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION1_DATAVMATCH_OFFSET 0x1038 #define GC_M3_DWT_FUNCTION1_LNK1ENA_LSB 0x9 #define GC_M3_DWT_FUNCTION1_LNK1ENA_MASK 0x200 #define GC_M3_DWT_FUNCTION1_LNK1ENA_SIZE 0x1 #define GC_M3_DWT_FUNCTION1_LNK1ENA_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION1_LNK1ENA_OFFSET 0x1038 #define GC_M3_DWT_FUNCTION1_DATAVSIZE_LSB 0xa #define GC_M3_DWT_FUNCTION1_DATAVSIZE_MASK 0xc00 #define GC_M3_DWT_FUNCTION1_DATAVSIZE_SIZE 0x2 #define GC_M3_DWT_FUNCTION1_DATAVSIZE_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION1_DATAVSIZE_OFFSET 0x1038 #define GC_M3_DWT_FUNCTION1_DATAVADDR0_LSB 0xc #define GC_M3_DWT_FUNCTION1_DATAVADDR0_MASK 0xf000 #define GC_M3_DWT_FUNCTION1_DATAVADDR0_SIZE 0x4 #define GC_M3_DWT_FUNCTION1_DATAVADDR0_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION1_DATAVADDR0_OFFSET 0x1038 #define GC_M3_DWT_FUNCTION1_DATAVADDR1_LSB 0x10 #define GC_M3_DWT_FUNCTION1_DATAVADDR1_MASK 0xf0000 #define GC_M3_DWT_FUNCTION1_DATAVADDR1_SIZE 0x4 #define GC_M3_DWT_FUNCTION1_DATAVADDR1_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION1_DATAVADDR1_OFFSET 0x1038 #define GC_M3_DWT_FUNCTION1_MATCHED_LSB 0x18 #define GC_M3_DWT_FUNCTION1_MATCHED_MASK 0x1000000 #define GC_M3_DWT_FUNCTION1_MATCHED_SIZE 0x1 #define GC_M3_DWT_FUNCTION1_MATCHED_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION1_MATCHED_OFFSET 0x1038 #define GC_M3_DWT_FUNCTION2_FUNCTION_LSB 0x0 #define GC_M3_DWT_FUNCTION2_FUNCTION_MASK 0xf #define GC_M3_DWT_FUNCTION2_FUNCTION_SIZE 0x4 #define GC_M3_DWT_FUNCTION2_FUNCTION_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION2_FUNCTION_OFFSET 0x1048 #define GC_M3_DWT_FUNCTION2_EMITRANGE_LSB 0x5 #define GC_M3_DWT_FUNCTION2_EMITRANGE_MASK 0x20 #define GC_M3_DWT_FUNCTION2_EMITRANGE_SIZE 0x1 #define GC_M3_DWT_FUNCTION2_EMITRANGE_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION2_EMITRANGE_OFFSET 0x1048 #define GC_M3_DWT_FUNCTION2_LNK1ENA_LSB 0x9 #define GC_M3_DWT_FUNCTION2_LNK1ENA_MASK 0x200 #define GC_M3_DWT_FUNCTION2_LNK1ENA_SIZE 0x1 #define GC_M3_DWT_FUNCTION2_LNK1ENA_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION2_LNK1ENA_OFFSET 0x1048 #define GC_M3_DWT_FUNCTION2_DATAVSIZE_LSB 0xa #define GC_M3_DWT_FUNCTION2_DATAVSIZE_MASK 0xc00 #define GC_M3_DWT_FUNCTION2_DATAVSIZE_SIZE 0x2 #define GC_M3_DWT_FUNCTION2_DATAVSIZE_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION2_DATAVSIZE_OFFSET 0x1048 #define GC_M3_DWT_FUNCTION2_MATCHED_LSB 0x18 #define GC_M3_DWT_FUNCTION2_MATCHED_MASK 0x1000000 #define GC_M3_DWT_FUNCTION2_MATCHED_SIZE 0x1 #define GC_M3_DWT_FUNCTION2_MATCHED_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION2_MATCHED_OFFSET 0x1048 #define GC_M3_DWT_FUNCTION3_FUNCTION_LSB 0x0 #define GC_M3_DWT_FUNCTION3_FUNCTION_MASK 0xf #define GC_M3_DWT_FUNCTION3_FUNCTION_SIZE 0x4 #define GC_M3_DWT_FUNCTION3_FUNCTION_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION3_FUNCTION_OFFSET 0x1058 #define GC_M3_DWT_FUNCTION3_EMITRANGE_LSB 0x5 #define GC_M3_DWT_FUNCTION3_EMITRANGE_MASK 0x20 #define GC_M3_DWT_FUNCTION3_EMITRANGE_SIZE 0x1 #define GC_M3_DWT_FUNCTION3_EMITRANGE_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION3_EMITRANGE_OFFSET 0x1058 #define GC_M3_DWT_FUNCTION3_LNK1ENA_LSB 0x9 #define GC_M3_DWT_FUNCTION3_LNK1ENA_MASK 0x200 #define GC_M3_DWT_FUNCTION3_LNK1ENA_SIZE 0x1 #define GC_M3_DWT_FUNCTION3_LNK1ENA_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION3_LNK1ENA_OFFSET 0x1058 #define GC_M3_DWT_FUNCTION3_DATAVSIZE_LSB 0xa #define GC_M3_DWT_FUNCTION3_DATAVSIZE_MASK 0xc00 #define GC_M3_DWT_FUNCTION3_DATAVSIZE_SIZE 0x2 #define GC_M3_DWT_FUNCTION3_DATAVSIZE_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION3_DATAVSIZE_OFFSET 0x1058 #define GC_M3_DWT_FUNCTION3_MATCHED_LSB 0x18 #define GC_M3_DWT_FUNCTION3_MATCHED_MASK 0x1000000 #define GC_M3_DWT_FUNCTION3_MATCHED_SIZE 0x1 #define GC_M3_DWT_FUNCTION3_MATCHED_DEFAULT 0x0 #define GC_M3_DWT_FUNCTION3_MATCHED_OFFSET 0x1058 #define GC_M3_FP_CTRL_ENABLE_LSB 0x0 #define GC_M3_FP_CTRL_ENABLE_MASK 0x1 #define GC_M3_FP_CTRL_ENABLE_SIZE 0x1 #define GC_M3_FP_CTRL_ENABLE_DEFAULT 0x0 #define GC_M3_FP_CTRL_ENABLE_OFFSET 0x2000 #define GC_M3_FP_CTRL_KEY_LSB 0x1 #define GC_M3_FP_CTRL_KEY_MASK 0x2 #define GC_M3_FP_CTRL_KEY_SIZE 0x1 #define GC_M3_FP_CTRL_KEY_DEFAULT 0x0 #define GC_M3_FP_CTRL_KEY_OFFSET 0x2000 #define GC_M3_FP_CTRL_NUM_CODE1_LSB 0x4 #define GC_M3_FP_CTRL_NUM_CODE1_MASK 0xf0 #define GC_M3_FP_CTRL_NUM_CODE1_SIZE 0x4 #define GC_M3_FP_CTRL_NUM_CODE1_DEFAULT 0x6 #define GC_M3_FP_CTRL_NUM_CODE1_OFFSET 0x2000 #define GC_M3_FP_CTRL_NUM_LIT_LSB 0x8 #define GC_M3_FP_CTRL_NUM_LIT_MASK 0xf00 #define GC_M3_FP_CTRL_NUM_LIT_SIZE 0x4 #define GC_M3_FP_CTRL_NUM_LIT_DEFAULT 0x2 #define GC_M3_FP_CTRL_NUM_LIT_OFFSET 0x2000 #define GC_M3_FP_CTRL_NUM_CODE2_LSB 0xc #define GC_M3_FP_CTRL_NUM_CODE2_MASK 0x3000 #define GC_M3_FP_CTRL_NUM_CODE2_SIZE 0x2 #define GC_M3_FP_CTRL_NUM_CODE2_DEFAULT 0x0 #define GC_M3_FP_CTRL_NUM_CODE2_OFFSET 0x2000 #define GC_M3_FP_REMAP_REMAP_LSB 0x5 #define GC_M3_FP_REMAP_REMAP_MASK 0x1fffffe0 #define GC_M3_FP_REMAP_REMAP_SIZE 0x18 #define GC_M3_FP_REMAP_REMAP_DEFAULT 0x0 #define GC_M3_FP_REMAP_REMAP_OFFSET 0x2004 #define GC_M3_FP_COMP0_ENABLE_LSB 0x0 #define GC_M3_FP_COMP0_ENABLE_MASK 0x1 #define GC_M3_FP_COMP0_ENABLE_SIZE 0x1 #define GC_M3_FP_COMP0_ENABLE_DEFAULT 0x0 #define GC_M3_FP_COMP0_ENABLE_OFFSET 0x2008 #define GC_M3_FP_COMP0_COMP_LSB 0x2 #define GC_M3_FP_COMP0_COMP_MASK 0x1ffffffc #define GC_M3_FP_COMP0_COMP_SIZE 0x1b #define GC_M3_FP_COMP0_COMP_DEFAULT 0x0 #define GC_M3_FP_COMP0_COMP_OFFSET 0x2008 #define GC_M3_FP_COMP0_REPLACE_LSB 0x1e #define GC_M3_FP_COMP0_REPLACE_MASK 0xc0000000 #define GC_M3_FP_COMP0_REPLACE_SIZE 0x2 #define GC_M3_FP_COMP0_REPLACE_DEFAULT 0x0 #define GC_M3_FP_COMP0_REPLACE_OFFSET 0x2008 #define GC_M3_FP_COMP1_ENABLE_LSB 0x0 #define GC_M3_FP_COMP1_ENABLE_MASK 0x1 #define GC_M3_FP_COMP1_ENABLE_SIZE 0x1 #define GC_M3_FP_COMP1_ENABLE_DEFAULT 0x0 #define GC_M3_FP_COMP1_ENABLE_OFFSET 0x200c #define GC_M3_FP_COMP1_COMP_LSB 0x2 #define GC_M3_FP_COMP1_COMP_MASK 0x1ffffffc #define GC_M3_FP_COMP1_COMP_SIZE 0x1b #define GC_M3_FP_COMP1_COMP_DEFAULT 0x0 #define GC_M3_FP_COMP1_COMP_OFFSET 0x200c #define GC_M3_FP_COMP1_REPLACE_LSB 0x1e #define GC_M3_FP_COMP1_REPLACE_MASK 0xc0000000 #define GC_M3_FP_COMP1_REPLACE_SIZE 0x2 #define GC_M3_FP_COMP1_REPLACE_DEFAULT 0x0 #define GC_M3_FP_COMP1_REPLACE_OFFSET 0x200c #define GC_M3_FP_COMP2_ENABLE_LSB 0x0 #define GC_M3_FP_COMP2_ENABLE_MASK 0x1 #define GC_M3_FP_COMP2_ENABLE_SIZE 0x1 #define GC_M3_FP_COMP2_ENABLE_DEFAULT 0x0 #define GC_M3_FP_COMP2_ENABLE_OFFSET 0x2010 #define GC_M3_FP_COMP2_COMP_LSB 0x2 #define GC_M3_FP_COMP2_COMP_MASK 0x1ffffffc #define GC_M3_FP_COMP2_COMP_SIZE 0x1b #define GC_M3_FP_COMP2_COMP_DEFAULT 0x0 #define GC_M3_FP_COMP2_COMP_OFFSET 0x2010 #define GC_M3_FP_COMP2_REPLACE_LSB 0x1e #define GC_M3_FP_COMP2_REPLACE_MASK 0xc0000000 #define GC_M3_FP_COMP2_REPLACE_SIZE 0x2 #define GC_M3_FP_COMP2_REPLACE_DEFAULT 0x0 #define GC_M3_FP_COMP2_REPLACE_OFFSET 0x2010 #define GC_M3_FP_COMP3_ENABLE_LSB 0x0 #define GC_M3_FP_COMP3_ENABLE_MASK 0x1 #define GC_M3_FP_COMP3_ENABLE_SIZE 0x1 #define GC_M3_FP_COMP3_ENABLE_DEFAULT 0x0 #define GC_M3_FP_COMP3_ENABLE_OFFSET 0x2014 #define GC_M3_FP_COMP3_COMP_LSB 0x2 #define GC_M3_FP_COMP3_COMP_MASK 0x1ffffffc #define GC_M3_FP_COMP3_COMP_SIZE 0x1b #define GC_M3_FP_COMP3_COMP_DEFAULT 0x0 #define GC_M3_FP_COMP3_COMP_OFFSET 0x2014 #define GC_M3_FP_COMP3_REPLACE_LSB 0x1e #define GC_M3_FP_COMP3_REPLACE_MASK 0xc0000000 #define GC_M3_FP_COMP3_REPLACE_SIZE 0x2 #define GC_M3_FP_COMP3_REPLACE_DEFAULT 0x0 #define GC_M3_FP_COMP3_REPLACE_OFFSET 0x2014 #define GC_M3_FP_COMP4_ENABLE_LSB 0x0 #define GC_M3_FP_COMP4_ENABLE_MASK 0x1 #define GC_M3_FP_COMP4_ENABLE_SIZE 0x1 #define GC_M3_FP_COMP4_ENABLE_DEFAULT 0x0 #define GC_M3_FP_COMP4_ENABLE_OFFSET 0x2018 #define GC_M3_FP_COMP4_COMP_LSB 0x2 #define GC_M3_FP_COMP4_COMP_MASK 0x1ffffffc #define GC_M3_FP_COMP4_COMP_SIZE 0x1b #define GC_M3_FP_COMP4_COMP_DEFAULT 0x0 #define GC_M3_FP_COMP4_COMP_OFFSET 0x2018 #define GC_M3_FP_COMP4_REPLACE_LSB 0x1e #define GC_M3_FP_COMP4_REPLACE_MASK 0xc0000000 #define GC_M3_FP_COMP4_REPLACE_SIZE 0x2 #define GC_M3_FP_COMP4_REPLACE_DEFAULT 0x0 #define GC_M3_FP_COMP4_REPLACE_OFFSET 0x2018 #define GC_M3_FP_COMP5_ENABLE_LSB 0x0 #define GC_M3_FP_COMP5_ENABLE_MASK 0x1 #define GC_M3_FP_COMP5_ENABLE_SIZE 0x1 #define GC_M3_FP_COMP5_ENABLE_DEFAULT 0x0 #define GC_M3_FP_COMP5_ENABLE_OFFSET 0x201c #define GC_M3_FP_COMP5_COMP_LSB 0x2 #define GC_M3_FP_COMP5_COMP_MASK 0x1ffffffc #define GC_M3_FP_COMP5_COMP_SIZE 0x1b #define GC_M3_FP_COMP5_COMP_DEFAULT 0x0 #define GC_M3_FP_COMP5_COMP_OFFSET 0x201c #define GC_M3_FP_COMP5_REPLACE_LSB 0x1e #define GC_M3_FP_COMP5_REPLACE_MASK 0xc0000000 #define GC_M3_FP_COMP5_REPLACE_SIZE 0x2 #define GC_M3_FP_COMP5_REPLACE_DEFAULT 0x0 #define GC_M3_FP_COMP5_REPLACE_OFFSET 0x201c #define GC_M3_FP_COMP6_ENABLE_LSB 0x0 #define GC_M3_FP_COMP6_ENABLE_MASK 0x1 #define GC_M3_FP_COMP6_ENABLE_SIZE 0x1 #define GC_M3_FP_COMP6_ENABLE_DEFAULT 0x0 #define GC_M3_FP_COMP6_ENABLE_OFFSET 0x2020 #define GC_M3_FP_COMP6_COMP_LSB 0x2 #define GC_M3_FP_COMP6_COMP_MASK 0x1ffffffc #define GC_M3_FP_COMP6_COMP_SIZE 0x1b #define GC_M3_FP_COMP6_COMP_DEFAULT 0x0 #define GC_M3_FP_COMP6_COMP_OFFSET 0x2020 #define GC_M3_FP_COMP6_REPLACE_LSB 0x1e #define GC_M3_FP_COMP6_REPLACE_MASK 0xc0000000 #define GC_M3_FP_COMP6_REPLACE_SIZE 0x2 #define GC_M3_FP_COMP6_REPLACE_DEFAULT 0x0 #define GC_M3_FP_COMP6_REPLACE_OFFSET 0x2020 #define GC_M3_FP_COMP7_ENABLE_LSB 0x0 #define GC_M3_FP_COMP7_ENABLE_MASK 0x1 #define GC_M3_FP_COMP7_ENABLE_SIZE 0x1 #define GC_M3_FP_COMP7_ENABLE_DEFAULT 0x0 #define GC_M3_FP_COMP7_ENABLE_OFFSET 0x2024 #define GC_M3_FP_COMP7_COMP_LSB 0x2 #define GC_M3_FP_COMP7_COMP_MASK 0x1ffffffc #define GC_M3_FP_COMP7_COMP_SIZE 0x1b #define GC_M3_FP_COMP7_COMP_DEFAULT 0x0 #define GC_M3_FP_COMP7_COMP_OFFSET 0x2024 #define GC_M3_FP_COMP7_REPLACE_LSB 0x1e #define GC_M3_FP_COMP7_REPLACE_MASK 0xc0000000 #define GC_M3_FP_COMP7_REPLACE_SIZE 0x2 #define GC_M3_FP_COMP7_REPLACE_DEFAULT 0x0 #define GC_M3_FP_COMP7_REPLACE_OFFSET 0x2024 #define GC_M3_ICTR_INTLINESNUM_LSB 0x0 #define GC_M3_ICTR_INTLINESNUM_MASK 0xf #define GC_M3_ICTR_INTLINESNUM_SIZE 0x4 #define GC_M3_ICTR_INTLINESNUM_DEFAULT 0x7 #define GC_M3_ICTR_INTLINESNUM_OFFSET 0xe004 #define GC_M3_SYST_CSR_ENABLE_LSB 0x0 #define GC_M3_SYST_CSR_ENABLE_MASK 0x1 #define GC_M3_SYST_CSR_ENABLE_SIZE 0x1 #define GC_M3_SYST_CSR_ENABLE_DEFAULT 0x0 #define GC_M3_SYST_CSR_ENABLE_OFFSET 0xe010 #define GC_M3_SYST_CSR_TICKINT_LSB 0x1 #define GC_M3_SYST_CSR_TICKINT_MASK 0x2 #define GC_M3_SYST_CSR_TICKINT_SIZE 0x1 #define GC_M3_SYST_CSR_TICKINT_DEFAULT 0x0 #define GC_M3_SYST_CSR_TICKINT_OFFSET 0xe010 #define GC_M3_SYST_CSR_CLKSOURCE_LSB 0x2 #define GC_M3_SYST_CSR_CLKSOURCE_MASK 0x4 #define GC_M3_SYST_CSR_CLKSOURCE_SIZE 0x1 #define GC_M3_SYST_CSR_CLKSOURCE_DEFAULT 0x1 #define GC_M3_SYST_CSR_CLKSOURCE_OFFSET 0xe010 #define GC_M3_SYST_CSR_COUNTFLAG_LSB 0x10 #define GC_M3_SYST_CSR_COUNTFLAG_MASK 0x10000 #define GC_M3_SYST_CSR_COUNTFLAG_SIZE 0x1 #define GC_M3_SYST_CSR_COUNTFLAG_DEFAULT 0x0 #define GC_M3_SYST_CSR_COUNTFLAG_OFFSET 0xe010 #define GC_M3_SYST_RVR_RELOAD_LSB 0x0 #define GC_M3_SYST_RVR_RELOAD_MASK 0xffffff #define GC_M3_SYST_RVR_RELOAD_SIZE 0x18 #define GC_M3_SYST_RVR_RELOAD_DEFAULT 0x0 #define GC_M3_SYST_RVR_RELOAD_OFFSET 0xe014 #define GC_M3_SYST_CVR_CURRENT_LSB 0x0 #define GC_M3_SYST_CVR_CURRENT_MASK 0xffffffff #define GC_M3_SYST_CVR_CURRENT_SIZE 0x20 #define GC_M3_SYST_CVR_CURRENT_DEFAULT 0x0 #define GC_M3_SYST_CVR_CURRENT_OFFSET 0xe018 #define GC_M3_SYST_CALIB_TENMS_LSB 0x0 #define GC_M3_SYST_CALIB_TENMS_MASK 0xffffff #define GC_M3_SYST_CALIB_TENMS_SIZE 0x18 #define GC_M3_SYST_CALIB_TENMS_DEFAULT 0x3f79f #define GC_M3_SYST_CALIB_TENMS_OFFSET 0xe01c #define GC_M3_SYST_CALIB_SKEW_LSB 0x1e #define GC_M3_SYST_CALIB_SKEW_MASK 0x40000000 #define GC_M3_SYST_CALIB_SKEW_SIZE 0x1 #define GC_M3_SYST_CALIB_SKEW_DEFAULT 0x0 #define GC_M3_SYST_CALIB_SKEW_OFFSET 0xe01c #define GC_M3_SYST_CALIB_NOREF_LSB 0x1f #define GC_M3_SYST_CALIB_NOREF_MASK 0x80000000 #define GC_M3_SYST_CALIB_NOREF_SIZE 0x1 #define GC_M3_SYST_CALIB_NOREF_DEFAULT 0x0 #define GC_M3_SYST_CALIB_NOREF_OFFSET 0xe01c #define GC_M3_CPUID_REVISION_LSB 0x0 #define GC_M3_CPUID_REVISION_MASK 0xf #define GC_M3_CPUID_REVISION_SIZE 0x4 #define GC_M3_CPUID_REVISION_DEFAULT 0x1 #define GC_M3_CPUID_REVISION_OFFSET 0xed00 #define GC_M3_CPUID_PARTNO_LSB 0x4 #define GC_M3_CPUID_PARTNO_MASK 0xfff0 #define GC_M3_CPUID_PARTNO_SIZE 0xc #define GC_M3_CPUID_PARTNO_DEFAULT 0xc23 #define GC_M3_CPUID_PARTNO_OFFSET 0xed00 #define GC_M3_CPUID_CONSTANT_LSB 0x10 #define GC_M3_CPUID_CONSTANT_MASK 0xf0000 #define GC_M3_CPUID_CONSTANT_SIZE 0x4 #define GC_M3_CPUID_CONSTANT_DEFAULT 0xf #define GC_M3_CPUID_CONSTANT_OFFSET 0xed00 #define GC_M3_CPUID_VARIANT_LSB 0x14 #define GC_M3_CPUID_VARIANT_MASK 0xf00000 #define GC_M3_CPUID_VARIANT_SIZE 0x4 #define GC_M3_CPUID_VARIANT_DEFAULT 0x2 #define GC_M3_CPUID_VARIANT_OFFSET 0xed00 #define GC_M3_CPUID_IMPLEMENTER_LSB 0x18 #define GC_M3_CPUID_IMPLEMENTER_MASK 0xff000000 #define GC_M3_CPUID_IMPLEMENTER_SIZE 0x8 #define GC_M3_CPUID_IMPLEMENTER_DEFAULT 0x41 #define GC_M3_CPUID_IMPLEMENTER_OFFSET 0xed00 #define GC_M3_ICSR_VECTACTIVE_LSB 0x0 #define GC_M3_ICSR_VECTACTIVE_MASK 0x1ff #define GC_M3_ICSR_VECTACTIVE_SIZE 0x9 #define GC_M3_ICSR_VECTACTIVE_DEFAULT 0x0 #define GC_M3_ICSR_VECTACTIVE_OFFSET 0xed04 #define GC_M3_ICSR_RETTOBASE_LSB 0xb #define GC_M3_ICSR_RETTOBASE_MASK 0x800 #define GC_M3_ICSR_RETTOBASE_SIZE 0x1 #define GC_M3_ICSR_RETTOBASE_DEFAULT 0x0 #define GC_M3_ICSR_RETTOBASE_OFFSET 0xed04 #define GC_M3_ICSR_VECTPENDING_LSB 0xc #define GC_M3_ICSR_VECTPENDING_MASK 0x3ff000 #define GC_M3_ICSR_VECTPENDING_SIZE 0xa #define GC_M3_ICSR_VECTPENDING_DEFAULT 0x0 #define GC_M3_ICSR_VECTPENDING_OFFSET 0xed04 #define GC_M3_ICSR_ISRPENDING_LSB 0x16 #define GC_M3_ICSR_ISRPENDING_MASK 0x400000 #define GC_M3_ICSR_ISRPENDING_SIZE 0x1 #define GC_M3_ICSR_ISRPENDING_DEFAULT 0x0 #define GC_M3_ICSR_ISRPENDING_OFFSET 0xed04 #define GC_M3_ICSR_ISRPREEMPT_LSB 0x17 #define GC_M3_ICSR_ISRPREEMPT_MASK 0x800000 #define GC_M3_ICSR_ISRPREEMPT_SIZE 0x1 #define GC_M3_ICSR_ISRPREEMPT_DEFAULT 0x0 #define GC_M3_ICSR_ISRPREEMPT_OFFSET 0xed04 #define GC_M3_ICSR_PENDSTCLR_LSB 0x19 #define GC_M3_ICSR_PENDSTCLR_MASK 0x2000000 #define GC_M3_ICSR_PENDSTCLR_SIZE 0x1 #define GC_M3_ICSR_PENDSTCLR_DEFAULT 0x0 #define GC_M3_ICSR_PENDSTCLR_OFFSET 0xed04 #define GC_M3_ICSR_PENDSTSET_LSB 0x1a #define GC_M3_ICSR_PENDSTSET_MASK 0x4000000 #define GC_M3_ICSR_PENDSTSET_SIZE 0x1 #define GC_M3_ICSR_PENDSTSET_DEFAULT 0x0 #define GC_M3_ICSR_PENDSTSET_OFFSET 0xed04 #define GC_M3_ICSR_PENDSVCLR_LSB 0x1b #define GC_M3_ICSR_PENDSVCLR_MASK 0x8000000 #define GC_M3_ICSR_PENDSVCLR_SIZE 0x1 #define GC_M3_ICSR_PENDSVCLR_DEFAULT 0x0 #define GC_M3_ICSR_PENDSVCLR_OFFSET 0xed04 #define GC_M3_ICSR_PENDSVSET_LSB 0x1c #define GC_M3_ICSR_PENDSVSET_MASK 0x10000000 #define GC_M3_ICSR_PENDSVSET_SIZE 0x1 #define GC_M3_ICSR_PENDSVSET_DEFAULT 0x0 #define GC_M3_ICSR_PENDSVSET_OFFSET 0xed04 #define GC_M3_ICSR_NMIPENDSET_LSB 0x1f #define GC_M3_ICSR_NMIPENDSET_MASK 0x80000000 #define GC_M3_ICSR_NMIPENDSET_SIZE 0x1 #define GC_M3_ICSR_NMIPENDSET_DEFAULT 0x0 #define GC_M3_ICSR_NMIPENDSET_OFFSET 0xed04 #define GC_M3_SCR_SLEEPONEXIT_LSB 0x1 #define GC_M3_SCR_SLEEPONEXIT_MASK 0x2 #define GC_M3_SCR_SLEEPONEXIT_SIZE 0x1 #define GC_M3_SCR_SLEEPONEXIT_DEFAULT 0x0 #define GC_M3_SCR_SLEEPONEXIT_OFFSET 0xed10 #define GC_M3_SCR_SLEEPDEEP_LSB 0x2 #define GC_M3_SCR_SLEEPDEEP_MASK 0x4 #define GC_M3_SCR_SLEEPDEEP_SIZE 0x1 #define GC_M3_SCR_SLEEPDEEP_DEFAULT 0x0 #define GC_M3_SCR_SLEEPDEEP_OFFSET 0xed10 #define GC_M3_SCR_SEVONPEND_LSB 0x4 #define GC_M3_SCR_SEVONPEND_MASK 0x10 #define GC_M3_SCR_SEVONPEND_SIZE 0x1 #define GC_M3_SCR_SEVONPEND_DEFAULT 0x0 #define GC_M3_SCR_SEVONPEND_OFFSET 0xed10 #define GC_M3_CCR_NONEBASETHRDENA_LSB 0x0 #define GC_M3_CCR_NONEBASETHRDENA_MASK 0x1 #define GC_M3_CCR_NONEBASETHRDENA_SIZE 0x1 #define GC_M3_CCR_NONEBASETHRDENA_DEFAULT 0x0 #define GC_M3_CCR_NONEBASETHRDENA_OFFSET 0xed14 #define GC_M3_CCR_USERSETMPEND_LSB 0x1 #define GC_M3_CCR_USERSETMPEND_MASK 0x2 #define GC_M3_CCR_USERSETMPEND_SIZE 0x1 #define GC_M3_CCR_USERSETMPEND_DEFAULT 0x0 #define GC_M3_CCR_USERSETMPEND_OFFSET 0xed14 #define GC_M3_CCR_UNALIGN_TRP_LSB 0x3 #define GC_M3_CCR_UNALIGN_TRP_MASK 0x8 #define GC_M3_CCR_UNALIGN_TRP_SIZE 0x1 #define GC_M3_CCR_UNALIGN_TRP_DEFAULT 0x0 #define GC_M3_CCR_UNALIGN_TRP_OFFSET 0xed14 #define GC_M3_CCR_DIV_0_TRP_LSB 0x4 #define GC_M3_CCR_DIV_0_TRP_MASK 0x10 #define GC_M3_CCR_DIV_0_TRP_SIZE 0x1 #define GC_M3_CCR_DIV_0_TRP_DEFAULT 0x0 #define GC_M3_CCR_DIV_0_TRP_OFFSET 0xed14 #define GC_M3_CCR_BFHFNMIGN_LSB 0x8 #define GC_M3_CCR_BFHFNMIGN_MASK 0x100 #define GC_M3_CCR_BFHFNMIGN_SIZE 0x1 #define GC_M3_CCR_BFHFNMIGN_DEFAULT 0x0 #define GC_M3_CCR_BFHFNMIGN_OFFSET 0xed14 #define GC_M3_CCR_STKALIGN_LSB 0x9 #define GC_M3_CCR_STKALIGN_MASK 0x200 #define GC_M3_CCR_STKALIGN_SIZE 0x1 #define GC_M3_CCR_STKALIGN_DEFAULT 0x0 #define GC_M3_CCR_STKALIGN_OFFSET 0xed14 #define GC_M3_DEMCR_VC_CORERESET_LSB 0x0 #define GC_M3_DEMCR_VC_CORERESET_MASK 0x1 #define GC_M3_DEMCR_VC_CORERESET_SIZE 0x1 #define GC_M3_DEMCR_VC_CORERESET_DEFAULT 0x0 #define GC_M3_DEMCR_VC_CORERESET_OFFSET 0xedfc #define GC_M3_DEMCR_VC_MMERR_LSB 0x4 #define GC_M3_DEMCR_VC_MMERR_MASK 0x10 #define GC_M3_DEMCR_VC_MMERR_SIZE 0x1 #define GC_M3_DEMCR_VC_MMERR_DEFAULT 0x0 #define GC_M3_DEMCR_VC_MMERR_OFFSET 0xedfc #define GC_M3_DEMCR_VC_NOCPERR_LSB 0x5 #define GC_M3_DEMCR_VC_NOCPERR_MASK 0x20 #define GC_M3_DEMCR_VC_NOCPERR_SIZE 0x1 #define GC_M3_DEMCR_VC_NOCPERR_DEFAULT 0x0 #define GC_M3_DEMCR_VC_NOCPERR_OFFSET 0xedfc #define GC_M3_DEMCR_VC_CHKERR_LSB 0x6 #define GC_M3_DEMCR_VC_CHKERR_MASK 0x40 #define GC_M3_DEMCR_VC_CHKERR_SIZE 0x1 #define GC_M3_DEMCR_VC_CHKERR_DEFAULT 0x0 #define GC_M3_DEMCR_VC_CHKERR_OFFSET 0xedfc #define GC_M3_DEMCR_VC_STATERR_LSB 0x7 #define GC_M3_DEMCR_VC_STATERR_MASK 0x80 #define GC_M3_DEMCR_VC_STATERR_SIZE 0x1 #define GC_M3_DEMCR_VC_STATERR_DEFAULT 0x0 #define GC_M3_DEMCR_VC_STATERR_OFFSET 0xedfc #define GC_M3_DEMCR_VC_BUSERR_LSB 0x8 #define GC_M3_DEMCR_VC_BUSERR_MASK 0x100 #define GC_M3_DEMCR_VC_BUSERR_SIZE 0x1 #define GC_M3_DEMCR_VC_BUSERR_DEFAULT 0x0 #define GC_M3_DEMCR_VC_BUSERR_OFFSET 0xedfc #define GC_M3_DEMCR_VC_INTERR_LSB 0x9 #define GC_M3_DEMCR_VC_INTERR_MASK 0x200 #define GC_M3_DEMCR_VC_INTERR_SIZE 0x1 #define GC_M3_DEMCR_VC_INTERR_DEFAULT 0x0 #define GC_M3_DEMCR_VC_INTERR_OFFSET 0xedfc #define GC_M3_DEMCR_VC_HARDERR_LSB 0xa #define GC_M3_DEMCR_VC_HARDERR_MASK 0x400 #define GC_M3_DEMCR_VC_HARDERR_SIZE 0x1 #define GC_M3_DEMCR_VC_HARDERR_DEFAULT 0x0 #define GC_M3_DEMCR_VC_HARDERR_OFFSET 0xedfc #define GC_M3_DEMCR_MON_EN_LSB 0x10 #define GC_M3_DEMCR_MON_EN_MASK 0x10000 #define GC_M3_DEMCR_MON_EN_SIZE 0x1 #define GC_M3_DEMCR_MON_EN_DEFAULT 0x0 #define GC_M3_DEMCR_MON_EN_OFFSET 0xedfc #define GC_M3_DEMCR_MON_PEND_LSB 0x11 #define GC_M3_DEMCR_MON_PEND_MASK 0x20000 #define GC_M3_DEMCR_MON_PEND_SIZE 0x1 #define GC_M3_DEMCR_MON_PEND_DEFAULT 0x0 #define GC_M3_DEMCR_MON_PEND_OFFSET 0xedfc #define GC_M3_DEMCR_MON_STEP_LSB 0x12 #define GC_M3_DEMCR_MON_STEP_MASK 0x40000 #define GC_M3_DEMCR_MON_STEP_SIZE 0x1 #define GC_M3_DEMCR_MON_STEP_DEFAULT 0x0 #define GC_M3_DEMCR_MON_STEP_OFFSET 0xedfc #define GC_M3_DEMCR_MON_REQ_LSB 0x13 #define GC_M3_DEMCR_MON_REQ_MASK 0x80000 #define GC_M3_DEMCR_MON_REQ_SIZE 0x1 #define GC_M3_DEMCR_MON_REQ_DEFAULT 0x0 #define GC_M3_DEMCR_MON_REQ_OFFSET 0xedfc #define GC_M3_DEMCR_TRCENA_LSB 0x18 #define GC_M3_DEMCR_TRCENA_MASK 0x1000000 #define GC_M3_DEMCR_TRCENA_SIZE 0x1 #define GC_M3_DEMCR_TRCENA_DEFAULT 0x0 #define GC_M3_DEMCR_TRCENA_OFFSET 0xedfc #define GC_CRYPTO_DMEM_DUMMY_SIZE 0x1000 #define GC_CRYPTO_IMEM_DUMMY_SIZE 0x1000 #define GC_SPI_DATA_SIZE 0x100 #define GC_SPS_DATA_SIZE 0x800 #define GC_SPS_ROM_CMD_SIZE 0x200 #define GC_USB_DFIFO_SIZE 0x1000 #ifdef GC__ENABLE_FLASH_DFT_DEFINITIONS__ #define GC_FLASH_DFT_REGS_ADDR_WIDTH 4 #define GC_FLASH_DFT_R_PIN_ADDR 0 #define GC_FLASH_DFT_R_PIN_WIDTH 7 #define GC_FLASH_DFT_R_XADR_ADDR 1 #define GC_FLASH_DFT_R_XADR_WIDTH 10 #define GC_FLASH_DFT_R_YADR_ADDR 2 #define GC_FLASH_DFT_R_YADR_WIDTH 6 #define GC_FLASH_DFT_R_DATA_ADDR 3 #define GC_FLASH_DFT_R_DATA_WIDTH 32 #define GC_FLASH_DFT_R_CTRL_ADDR 4 #define GC_FLASH_DFT_R_CTRL_WIDTH 16 #define GC_FLASH_DFT_R_GRPSEL_ADDR 5 #define GC_FLASH_DFT_R_GRPSEL_WIDTH 1 #define GC_FLASH_DFT_R_OPMODE_ADDR 6 #define GC_FLASH_DFT_R_OPMODE_WIDTH 5 #define GC_FLASH_DFT_R_IPSEL_ADDR 7 #define GC_FLASH_DFT_R_IPSEL_WIDTH 4 #define GC_FLASH_DFT_R_STATUS_ADDR 8 #define GC_FLASH_DFT_R_STATUS_WIDTH 2 #define GC_FLASH_DFT_R_BITSEL_ADDR 9 #define GC_FLASH_DFT_R_BITSEL_WIDTH 6 #define GC_FLASH_DFT_R_REPAIR_0_ADDR 10 #define GC_FLASH_DFT_R_REPAIR_0_WIDTH 8 #define GC_FLASH_DFT_R_REPAIR_1_ADDR 11 #define GC_FLASH_DFT_R_REPAIR_1_WIDTH 8 #define GC_FLASH_DFT_R_SMW_ADDR 12 #define GC_FLASH_DFT_R_SMW_WIDTH 2 #define GC_FLASH_DFT_WIDTH_BY_ADDR(addr) \ (addr == GC_FLASH_DFT_R_PIN_ADDR) ? 7 : \ (addr == GC_FLASH_DFT_R_XADR_ADDR) ? 10 : \ (addr == GC_FLASH_DFT_R_YADR_ADDR) ? 6 : \ (addr == GC_FLASH_DFT_R_DATA_ADDR) ? 32 : \ (addr == GC_FLASH_DFT_R_CTRL_ADDR) ? 16 : \ (addr == GC_FLASH_DFT_R_GRPSEL_ADDR) ? 1 : \ (addr == GC_FLASH_DFT_R_OPMODE_ADDR) ? 5 : \ (addr == GC_FLASH_DFT_R_IPSEL_ADDR) ? 4 : \ (addr == GC_FLASH_DFT_R_STATUS_ADDR) ? 2 : \ (addr == GC_FLASH_DFT_R_BITSEL_ADDR) ? 6 : \ (addr == GC_FLASH_DFT_R_REPAIR_0_ADDR) ? 8 : \ (addr == GC_FLASH_DFT_R_REPAIR_1_ADDR) ? 8 : \ (addr == GC_FLASH_DFT_R_SMW_ADDR) ? 2 : \ -1 #endif /* GC__ENABLE_FLASH_DFT_DEFINITIONS__ */ #define GC_CONST_FSH_PE_CONTROL_BULKERASE 0x1d1e2bad #define GC_CONST_FSH_PE_CONTROL_ERASE 0x31415927 #define GC_CONST_FSH_PE_CONTROL_PROGRAM 0x27182818 #define GC_CONST_FSH_PE_EN 0xb11924e1 #define GC_CONST_FSH_PE_CONTROL_READ 0x16021765 #define GC_CONST_FSH_OVRD_UNLOCK 0x13806488 #endif /* __EC_CHIP_G_CR50_FPGA_REGDEFS_H */