From 6f02a2dcc9b8443b4a48022e605f191939d3e25d Mon Sep 17 00:00:00 2001 From: Jack Rosenthal Date: Wed, 6 Jul 2022 11:43:43 -0600 Subject: chip/stm32/usart-stm32l5.c: Format with clang-format BUG=b:236386294 BRANCH=none TEST=none Tricium: disable Change-Id: I5d2cc33dd442535ebf84e316993c4bd6b67950ed Signed-off-by: Jack Rosenthal Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3749464 Reviewed-by: Jeremy Bettis --- chip/stm32/usart-stm32l5.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'chip') diff --git a/chip/stm32/usart-stm32l5.c b/chip/stm32/usart-stm32l5.c index 3a8db09202..73f0c3c3cb 100644 --- a/chip/stm32/usart-stm32l5.c +++ b/chip/stm32/usart-stm32l5.c @@ -169,12 +169,12 @@ DECLARE_IRQ(STM32_IRQ_USART5, usart5_interrupt, 2); #if defined(CONFIG_STREAM_USART9) struct usart_hw_config const usart9_hw = { - .index = 5, - .base = STM32_USART9_BASE, - .irq = STM32_IRQ_USART9, + .index = 5, + .base = STM32_USART9_BASE, + .irq = STM32_IRQ_USART9, .clock_register = &STM32_RCC_APB1ENR2, - .clock_enable = STM32_RCC_APB1ENR2_LPUART1EN, - .ops = &usart_variant_hw_ops, + .clock_enable = STM32_RCC_APB1ENR2_LPUART1EN, + .ops = &usart_variant_hw_ops, }; static void usart9_interrupt(void) -- cgit v1.2.1