From 7dddeb52f1f4e0d44b99424a7b8c69b38f48b996 Mon Sep 17 00:00:00 2001 From: "Jes B. Klinke" Date: Tue, 10 Aug 2021 10:03:18 -0700 Subject: chip/stm32: Add initial support for STM32L5xx series Introduce L5xx mostly as copy of L4xx, though registers-stm32l5.c is extensively modified. BUG=b:192262089 TEST=Compile and upload board/hyperdebug to Nucleo board BRANCH=none Signed-off-by: Jes B. Klinke Change-Id: Iccc7b05e4f2dfa732559b8099cf856882401e31c Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3086362 Tested-by: Jes Klinke Reviewed-by: Scott Collyer Commit-Queue: Jes Klinke --- chip/stm32/build.mk | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'chip/stm32/build.mk') diff --git a/chip/stm32/build.mk b/chip/stm32/build.mk index 46f2aa41a3..6817a3647d 100644 --- a/chip/stm32/build.mk +++ b/chip/stm32/build.mk @@ -26,6 +26,11 @@ else ifeq ($(CHIP_FAMILY),$(filter $(CHIP_FAMILY),stm32h7)) CORE:=cortex-m # Allow the full Cortex-M4 instruction set (identical to M7) CFLAGS_CPU+=-march=armv7e-m -mcpu=cortex-m4 +else ifeq ($(CHIP_FAMILY),$(filter $(CHIP_FAMILY),stm32l5)) +# STM32FL5xx family has a Cortex-M33 ARM core +CORE:=cortex-m +# Allow the full Cortex-M33 instruction set +CFLAGS_CPU+=-march=armv8-m.main+dsp -mcpu=cortex-m33 else # other STM32 SoCs have a Cortex-M3 ARM core CORE:=cortex-m @@ -63,8 +68,8 @@ ifndef CONFIG_KEYBOARD_NOT_RAW chip-$(HAS_TASK_KEYSCAN)+=keyboard_raw.o endif chip-$(HAS_TASK_POWERLED)+=power_led.o -ifeq ($(CHIP_FAMILY),$(filter $(CHIP_FAMILY),stm32g4 stm32l4)) -# STM32G4 and STM32L4 use the same flash IP block +ifeq ($(CHIP_FAMILY),$(filter $(CHIP_FAMILY),stm32g4 stm32l4 stm32l5)) +# STM32G4, STM32L4 and STM32L5 use the same flash IP block chip-y+=flash-stm32g4-l4.o else chip-$(CONFIG_FLASH_PHYSICAL)+=flash-$(CHIP_FAMILY).o -- cgit v1.2.1