From 8095c8c9cc84187ba938473930fefa872a67bc24 Mon Sep 17 00:00:00 2001 From: Daisuke Nojiri Date: Mon, 22 Oct 2018 11:26:29 -0700 Subject: Kalista: Create baseboard directory This patch creates a baseboard directory for Kalista, derived from Fizz. Signed-off-by: Daisuke Nojiri BUG=b:116764443 BRANCH=none TEST=make BOARD=karma Change-Id: Ib8c9dfd56658fd8b6bd39a0a01e22a05dbed477b Reviewed-on: https://chromium-review.googlesource.com/1298319 Commit-Ready: Daisuke Nojiri Tested-by: Daisuke Nojiri Tested-by: David Huang Reviewed-by: Zhuohao Lee Reviewed-by: Vincent Wang --- baseboard/kalista/baseboard.c | 834 ++++++++++++++++++++++++++++++++++++++ baseboard/kalista/baseboard.h | 274 +++++++++++++ baseboard/kalista/build.mk | 11 + baseboard/kalista/led.c | 232 +++++++++++ baseboard/kalista/usb_pd_policy.c | 419 +++++++++++++++++++ 5 files changed, 1770 insertions(+) create mode 100644 baseboard/kalista/baseboard.c create mode 100644 baseboard/kalista/baseboard.h create mode 100644 baseboard/kalista/build.mk create mode 100644 baseboard/kalista/led.c create mode 100644 baseboard/kalista/usb_pd_policy.c (limited to 'baseboard') diff --git a/baseboard/kalista/baseboard.c b/baseboard/kalista/baseboard.c new file mode 100644 index 0000000000..3febf8f801 --- /dev/null +++ b/baseboard/kalista/baseboard.c @@ -0,0 +1,834 @@ +/* Copyright 2018 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Kalista baseboard configuration */ + +#include "adc.h" +#include "adc_chip.h" +#include "als.h" +#include "battery.h" +#include "bd99992gw.h" +#include "board_config.h" +#include "button.h" +#include "charge_manager.h" +#include "charge_state.h" +#include "charger.h" +#include "chipset.h" +#include "console.h" +#include "cros_board_info.h" +#include "driver/pmic_tps650x30.h" +#include "driver/temp_sensor/tmp432.h" +#include "driver/tcpm/ps8xxx.h" +#include "driver/tcpm/tcpci.h" +#include "driver/tcpm/tcpm.h" +#include "espi.h" +#include "extpower.h" +#include "espi.h" +#include "fan.h" +#include "fan_chip.h" +#include "gpio.h" +#include "hooks.h" +#include "host_command.h" +#include "i2c.h" +#include "math_util.h" +#include "pi3usb9281.h" +#include "power.h" +#include "power_button.h" +#include "pwm.h" +#include "pwm_chip.h" +#include "spi.h" +#include "switch.h" +#include "system.h" +#include "task.h" +#include "temp_sensor.h" +#include "timer.h" +#include "uart.h" +#include "usb_charge.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usb_pd_tcpm.h" +#include "util.h" + +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) + +static uint16_t board_version; +static uint8_t oem; +static uint8_t sku; + +static void tcpc_alert_event(enum gpio_signal signal) +{ + if (!gpio_get_level(GPIO_USB_C0_PD_RST_ODL)) + return; + +#ifdef HAS_TASK_PDCMD + /* Exchange status with TCPCs */ + host_command_pd_send_status(PD_CHARGE_NO_CHANGE); +#endif +} + +#define ADP_DEBOUNCE_MS 1000 /* Debounce time for BJ plug/unplug */ +/* + * ADP_IN pin state. It's initialized to 1 (=unplugged) because the IRQ won't + * be triggered if BJ is the power source. + */ +static int adp_in_state = 1; + +static void adp_in_deferred(void); +DECLARE_DEFERRED(adp_in_deferred); +static void adp_in_deferred(void) +{ + struct charge_port_info pi = { 0 }; + int level = gpio_get_level(GPIO_ADP_IN_L); + + /* Debounce */ + if (level == adp_in_state) + return; + if (!level) { + /* BJ is inserted but the voltage isn't effective because PU3 + * is still disabled. */ + pi.voltage = 19500; + if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) + /* + * It doesn't matter what we set here because we'll + * brown out anyway when charge_manager switches + * input. + */ + pi.current = 3330; + } + charge_manager_update_charge(CHARGE_SUPPLIER_DEDICATED, + DEDICATED_CHARGE_PORT, &pi); + /* + * Explicitly notifies the host that BJ is plugged or unplugged + * (when running on a type-c adapter). + */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + adp_in_state = level; +} + +/* IRQ for BJ plug/unplug. It shouldn't be called if BJ is the power source. */ +void adp_in(enum gpio_signal signal) +{ + if (adp_in_state == gpio_get_level(GPIO_ADP_IN_L)) + return; + hook_call_deferred(&adp_in_deferred_data, ADP_DEBOUNCE_MS * MSEC); +} + +void vbus0_evt(enum gpio_signal signal) +{ + task_wake(TASK_ID_PD_C0); +} + +#include "gpio_list.h" + +/* power signal list. Must match order of enum power_signal. */ +const struct power_signal_info power_signal_list[] = { + {GPIO_PCH_SLP_S0_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S0_DEASSERTED"}, +#ifdef CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS + {VW_SLP_S3_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S3_DEASSERTED"}, + {VW_SLP_S4_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S4_DEASSERTED"}, +#else + {GPIO_PCH_SLP_S3_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S3_DEASSERTED"}, + {GPIO_PCH_SLP_S4_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S4_DEASSERTED"}, +#endif + {GPIO_PCH_SLP_SUS_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_SUS_DEASSERTED"}, + {GPIO_RSMRST_L_PGOOD, POWER_SIGNAL_ACTIVE_HIGH, "RSMRST_L_PGOOD"}, + {GPIO_PMIC_DPWROK, POWER_SIGNAL_ACTIVE_HIGH, "PMIC_DPWROK"}, +}; +BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); + +/* Hibernate wake configuration */ +const enum gpio_signal hibernate_wake_pins[] = { + GPIO_POWER_BUTTON_L, +}; +const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); + +/* ADC channels */ +const struct adc_t adc_channels[] = { + /* Vbus sensing (1/10 voltage divider). */ + [ADC_VBUS] = {"VBUS", NPCX_ADC_CH2, ADC_MAX_VOLT*10, ADC_READ_MAX+1, 0}, +}; +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); + +/******************************************************************************/ +/* Physical fans. These are logically separate from pwm_channels. */ +const struct fan_conf fan_conf_0 = { + .flags = FAN_USE_RPM_MODE, + .ch = MFT_CH_0, /* Use MFT id to control fan */ + .pgood_gpio = -1, + .enable_gpio = GPIO_FAN_PWR_EN, +}; + +const struct fan_rpm fan_rpm_0 = { + .rpm_min = 2200, + .rpm_start = 2200, + .rpm_max = 5600, +}; + +const struct fan_rpm fan_rpm_1 = { + .rpm_min = 2800, + .rpm_start = 2800, + .rpm_max = 5600, +}; + +struct fan_t fans[] = { + [FAN_CH_0] = { .conf = &fan_conf_0, .rpm = &fan_rpm_0, }, +}; +BUILD_ASSERT(ARRAY_SIZE(fans) == FAN_CH_COUNT); + +/******************************************************************************/ +/* MFT channels. These are logically separate from pwm_channels. */ +const struct mft_t mft_channels[] = { + [MFT_CH_0] = {NPCX_MFT_MODULE_2, TCKC_LFCLK, PWM_CH_FAN}, +}; +BUILD_ASSERT(ARRAY_SIZE(mft_channels) == MFT_CH_COUNT); + +/* I2C port map */ +const struct i2c_port_t i2c_ports[] = { + {"tcpc", NPCX_I2C_PORT0_0, 400, GPIO_I2C0_0_SCL, GPIO_I2C0_0_SDA}, + {"eeprom", NPCX_I2C_PORT0_1, 400, GPIO_I2C0_1_SCL, GPIO_I2C0_1_SDA}, + {"charger", NPCX_I2C_PORT1, 100, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, + {"pmic", NPCX_I2C_PORT2, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + {"thermal", NPCX_I2C_PORT3, 400, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, +}; +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); + +/* TCPC mux configuration */ +const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_COUNT] = { + {NPCX_I2C_PORT0_0, I2C_ADDR_TCPC0, &ps8xxx_tcpm_drv, + TCPC_ALERT_ACTIVE_LOW}, +}; + +static int ps8751_tune_mux(int port) +{ + /* 0x98 sets lower EQ of DP port (4.5db) */ + mux_write(port, PS8XXX_REG_MUX_DP_EQ_CONFIGURATION, 0x98); + return EC_SUCCESS; +} + +struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = { + { + .driver = &tcpci_tcpm_usb_mux_driver, + .hpd_update = &ps8xxx_tcpc_update_hpd_status, + .board_init = &ps8751_tune_mux, + } +}; + +const int usb_port_enable[USB_PORT_COUNT] = { + GPIO_USB1_ENABLE, + GPIO_USB2_ENABLE, + GPIO_USB3_ENABLE, + GPIO_USB4_ENABLE, + GPIO_USB5_ENABLE, +}; + +void board_reset_pd_mcu(void) +{ + gpio_set_level(GPIO_USB_C0_PD_RST_ODL, 0); + msleep(1); + gpio_set_level(GPIO_USB_C0_PD_RST_ODL, 1); +} + +void board_tcpc_init(void) +{ + int port, reg; + + /* This needs to be executed only once per boot. It could be run by RO + * if we boot in recovery mode. It could be run by RW if we boot in + * normal or dev mode. Note EFS makes RO jump to RW before HOOK_INIT. */ + board_reset_pd_mcu(); + + /* + * Wake up PS8751. If PS8751 remains in low power mode after sysjump, + * TCPM_INIT will fail due to not able to access PS8751. + * Note PS8751 A3 will wake on any I2C access. + */ + i2c_read8(I2C_PORT_TCPC0, I2C_ADDR_TCPC0, 0xA0, ®); + + /* Enable TCPC interrupts */ + gpio_enable_interrupt(GPIO_USB_C0_PD_INT_ODL); + + /* + * Initialize HPD to low; after sysjump SOC needs to see + * HPD pulse to enable video path + */ + for (port = 0; port < CONFIG_USB_PD_PORT_COUNT; port++) { + const struct usb_mux *mux = &usb_muxes[port]; + mux->hpd_update(port, 0, 0); + } +} +DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C+1); + +uint16_t tcpc_get_alert_status(void) +{ + uint16_t status = 0; + + if (!gpio_get_level(GPIO_USB_C0_PD_INT_ODL)) { + if (gpio_get_level(GPIO_USB_C0_PD_RST_ODL)) + status |= PD_STATUS_TCPC_ALERT_0; + } + + return status; +} + +/* + * TMP431 has one local and one remote sensor. + * + * Temperature sensors data; must be in same order as enum temp_sensor_id. + * Sensor index and name must match those present in coreboot: + * src/mainboard/google/${board}/acpi/dptf.asl + */ +const struct temp_sensor_t temp_sensors[] = { + {"TMP431_Internal", TEMP_SENSOR_TYPE_BOARD, tmp432_get_val, + TMP432_IDX_LOCAL, 4}, + {"TMP431_Sensor_1", TEMP_SENSOR_TYPE_BOARD, tmp432_get_val, + TMP432_IDX_REMOTE1, 4}, +}; +BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); + +/* + * Thermal limits for each temp sensor. All temps are in degrees K. Must be in + * same order as enum temp_sensor_id. To always ignore any temp, use 0. + */ +struct ec_thermal_config thermal_params[] = { + /* {Twarn, Thigh, Thalt}, + * {Twarn, Thigh, X }, + * fan_off, fan_max + */ + {{0, C_TO_K(80), C_TO_K(81)}, {0, C_TO_K(78), 0}, + C_TO_K(4), C_TO_K(76)}, /* TMP431_Internal */ + {{0, 0, 0}, {0, 0, 0}, 0, 0}, /* TMP431_Sensor_1 */ +}; +BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); + +/* Initialize PMIC */ +#define I2C_PMIC_READ(reg, data) \ + i2c_read8(I2C_PORT_PMIC, TPS650X30_I2C_ADDR1, (reg), (data)) + +#define I2C_PMIC_WRITE(reg, data) \ + i2c_write8(I2C_PORT_PMIC, TPS650X30_I2C_ADDR1, (reg), (data)) + +static void board_pmic_init(void) +{ + int err; + int error_count = 0; + static uint8_t pmic_initialized = 0; + + if (pmic_initialized) + return; + + /* Read vendor ID */ + while (1) { + int data; + err = I2C_PMIC_READ(TPS650X30_REG_VENDORID, &data); + if (!err && data == TPS650X30_VENDOR_ID) + break; + else if (error_count > 5) + goto pmic_error; + error_count++; + } + + /* + * VCCIOCNT register setting + * [6] : CSDECAYEN + * otherbits: default + */ + err = I2C_PMIC_WRITE(TPS650X30_REG_VCCIOCNT, 0x4A); + if (err) + goto pmic_error; + + /* + * VRMODECTRL: + * [4] : VCCIOLPM clear + * otherbits: default + */ + err = I2C_PMIC_WRITE(TPS650X30_REG_VRMODECTRL, 0x2F); + if (err) + goto pmic_error; + + /* + * PGMASK1 : Exclude VCCIO from Power Good Tree + * [7] : MVCCIOPG clear + * otherbits: default + */ + err = I2C_PMIC_WRITE(TPS650X30_REG_PGMASK1, 0x80); + if (err) + goto pmic_error; + + /* + * PWFAULT_MASK1 Register settings + * [7] : 1b V4 Power Fault Masked + * [4] : 1b V7 Power Fault Masked + * [2] : 1b V9 Power Fault Masked + * [0] : 1b V13 Power Fault Masked + */ + err = I2C_PMIC_WRITE(TPS650X30_REG_PWFAULT_MASK1, 0x95); + if (err) + goto pmic_error; + + /* + * Discharge control 4 register configuration + * [7:6] : 00b Reserved + * [5:4] : 01b V3.3S discharge resistance (V6S), 100 Ohm + * [3:2] : 01b V18S discharge resistance (V8S), 100 Ohm + * [1:0] : 01b V100S discharge resistance (V11S), 100 Ohm + */ + err = I2C_PMIC_WRITE(TPS650X30_REG_DISCHCNT4, 0x15); + if (err) + goto pmic_error; + + /* + * Discharge control 3 register configuration + * [7:6] : 01b V1.8U_2.5U discharge resistance (V9), 100 Ohm + * [5:4] : 01b V1.2U discharge resistance (V10), 100 Ohm + * [3:2] : 01b V100A discharge resistance (V11), 100 Ohm + * [1:0] : 01b V085A discharge resistance (V12), 100 Ohm + */ + err = I2C_PMIC_WRITE(TPS650X30_REG_DISCHCNT3, 0x55); + if (err) + goto pmic_error; + + /* + * Discharge control 2 register configuration + * [7:6] : 01b V5ADS3 discharge resistance (V5), 100 Ohm + * [5:4] : 01b V33A_DSW discharge resistance (V6), 100 Ohm + * [3:2] : 01b V33PCH discharge resistance (V7), 100 Ohm + * [1:0] : 01b V18A discharge resistance (V8), 100 Ohm + */ + err = I2C_PMIC_WRITE(TPS650X30_REG_DISCHCNT2, 0x55); + if (err) + goto pmic_error; + + /* + * Discharge control 1 register configuration + * [7:2] : 00b Reserved + * [1:0] : 01b VCCIO discharge resistance (V4), 100 Ohm + */ + err = I2C_PMIC_WRITE(TPS650X30_REG_DISCHCNT1, 0x01); + if (err) + goto pmic_error; + + /* + * Increase Voltage + * [7:0] : 0x2a default + * [5:4] : 10b default + * [5:4] : 01b 5.1V (0x1a) + */ + err = I2C_PMIC_WRITE(TPS650X30_REG_V5ADS3CNT, 0x1a); + if (err) + goto pmic_error; + + /* + * PBCONFIG Register configuration + * [7] : 1b Power button debounce, 0ms (no debounce) + * [6] : 0b Power button reset timer logic, no action (default) + * [5:0] : 011111b Force an Emergency reset time, 31s (default) + */ + err = I2C_PMIC_WRITE(TPS650X30_REG_PBCONFIG, 0x9F); + if (err) + goto pmic_error; + + /* + * V3.3A_DSW (VR3) control. Default: 0x2A. + * [7:6] : 00b Disabled + * [5:4] : 00b Vnom + 3%. (default: 10b 0%) + */ + err = I2C_PMIC_WRITE(TPS650X30_REG_V33ADSWCNT, 0x0A); + if (err) + goto pmic_error; + + CPRINTS("PMIC init done"); + pmic_initialized = 1; + return; + +pmic_error: + CPRINTS("PMIC init failed"); +} + +void chipset_pre_init_callback(void) +{ + board_pmic_init(); +} + +/** + * Notify the AC presence GPIO to the PCH. + */ +static void board_extpower(void) +{ + gpio_set_level(GPIO_PCH_ACPRESENT, extpower_is_present()); +} +DECLARE_HOOK(HOOK_AC_CHANGE, board_extpower, HOOK_PRIO_DEFAULT); + +/* Mapping to the old schematics */ +#define GPIO_U42_P GPIO_TYPE_C_60W +#define GPIO_U22_C GPIO_TYPE_C_65W + +/* + * Board version 2.1 or before uses a different current monitoring circuitry. + */ +static void set_charge_limit(int charge_ma) +{ + /* + * We have two FETs connected to two registers: PR257 & PR258. + * These control thresholds of the over current monitoring system. + * + * PR257, PR258 + * For 4.62A (90W BJ adapter), on, off + * For 3.33A (65W BJ adapter), off, on + * For 3.00A (Type-C adapter), off, off + * + * The over current monitoring system doesn't support less than 3A + * (e.g. 2.25A, 2.00A). These current most likely won't be enough to + * power the system. However, if they're needed, EC can monitor + * PMON_PSYS and trigger H_PROCHOT by itself. + */ + if (charge_ma >= 4620) { + gpio_set_level(GPIO_U42_P, 1); + gpio_set_level(GPIO_U22_C, 0); + } else if (charge_ma >= 3330) { + gpio_set_level(GPIO_U42_P, 0); + gpio_set_level(GPIO_U22_C, 1); + } else if (charge_ma >= 3000) { + gpio_set_level(GPIO_U42_P, 0); + gpio_set_level(GPIO_U22_C, 0); + } else { + /* TODO(http://crosbug.com/p/65013352) */ + CPRINTS("Current %dmA not supported", charge_ma); + } +} + +void board_set_charge_limit(int port, int supplier, int charge_ma, + int max_ma, int charge_mv) +{ + int p87w = 0, p65w = 0, p60w = 0; + + /* + * Turn on/off power shortage alert. Performs the same check as + * system_can_boot_ap(). It's repeated here because charge_manager + * hasn't updated charge_current/voltage when board_set_charge_limit + * is called. + */ + led_alert(charge_ma * charge_mv < + CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON * 1000); + + /* + * In terms of timing, this should always work because + * HOOK_PRIO_CHARGE_MANAGER_INIT is notified after HOOK_PRIO_INIT_I2C. + * If CBI isn't initialized or contains invalid data, we assume it's + * a new board. + */ + if (0 < board_version && board_version < 0x0202) + return set_charge_limit(charge_ma); + /* + * We have three FETs connected to three registers: PR257, PR258, + * PR7824. These control the thresholds of the current monitoring + * system. + * + * PR257 PR7824 PR258 + * For BJ (65W or 90W) off off off + * For 4.35A (87W) on off off + * For 3.25A (65W) off off on + * For 3.00A (60W) off on off + * + * The system power consumption is capped by PR259, which is stuffed + * differently depending on the SKU (65W v.s. 90W or U42 v.s. U22). + * So, we only need to monitor type-c adapters. For example: + * + * a 90W system powered by 65W type-c charger + * b 65W system powered by 60W type-c charger + * c 65W system powered by 87W type-c charger + * + * In a case such as (c), we actually do not need to monitor the current + * because the max is capped by PR259. + * + * AP is expected to read type-c adapter wattage from EC and control + * power consumption to avoid over-current or system browns out. + * + */ + if (supplier != CHARGE_SUPPLIER_DEDICATED) { + /* Apple 87W charger offers 4.3A @20V. */ + if (charge_ma >= 4300) { + p87w = 1; + } else if (charge_ma >= 3250) { + p65w = 1; + } else if (charge_ma >= 3000) { + p60w = 1; + } else { + /* + * TODO:http://crosbug.com/p/65013352. + * The current monitoring system doesn't support lower + * current. These currents are most likely not enough to + * power the system. However, if they're needed, EC can + * monitor PMON_PSYS and trigger H_PROCHOT by itself. + */ + p60w = 1; + CPRINTS("Current %dmA not supported", charge_ma); + } + } + + gpio_set_level(GPIO_TYPE_C_87W, p87w); + gpio_set_level(GPIO_TYPE_C_65W, p65w); + gpio_set_level(GPIO_TYPE_C_60W, p60w); +} + +enum battery_present battery_is_present(void) +{ + /* The GPIO is low when the battery is present */ + return BP_NO; +} + +int64_t get_time_dsw_pwrok(void) +{ + /* DSW_PWROK is turned on before EC was powered. */ + return -20 * MSEC; +} + +const struct pwm_t pwm_channels[] = { + [PWM_CH_LED_RED] = { 3, PWM_CONFIG_DSLEEP, 100 }, + [PWM_CH_LED_GREEN] = { 5, PWM_CONFIG_DSLEEP, 100 }, + [PWM_CH_FAN] = {4, PWM_CONFIG_OPEN_DRAIN, 25000}, +}; +BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); + +struct fan_step { + int on; + int off; + int rpm; +}; + +static const struct fan_step *fan_table; + +/* Note: Do not make the fan on/off point equal to 0 or 100 */ +static const struct fan_step fan_table0[] = { + {.on = 0, .off = 1, .rpm = 0}, + {.on = 36, .off = 1, .rpm = 2800}, + {.on = 58, .off = 58, .rpm = 3200}, + {.on = 66, .off = 61, .rpm = 3400}, + {.on = 75, .off = 69, .rpm = 4200}, + {.on = 81, .off = 76, .rpm = 4800}, + {.on = 88, .off = 83, .rpm = 5200}, + {.on = 98, .off = 91, .rpm = 5600}, +}; +static const struct fan_step fan_table1[] = { + {.on = 0, .off = 1, .rpm = 0}, + {.on = 36, .off = 1, .rpm = 2800}, + {.on = 62, .off = 58, .rpm = 3200}, + {.on = 68, .off = 63, .rpm = 3400}, + {.on = 75, .off = 69, .rpm = 4200}, + {.on = 81, .off = 76, .rpm = 4800}, + {.on = 88, .off = 83, .rpm = 5200}, + {.on = 98, .off = 91, .rpm = 5600}, +}; +static const struct fan_step fan_table2[] = { + {.on = 0, .off = 1, .rpm = 0}, + {.on = 36, .off = 1, .rpm = 2200}, + {.on = 63, .off = 56, .rpm = 2900}, + {.on = 69, .off = 65, .rpm = 3000}, + {.on = 75, .off = 70, .rpm = 3300}, + {.on = 80, .off = 76, .rpm = 3600}, + {.on = 87, .off = 81, .rpm = 3900}, + {.on = 98, .off = 91, .rpm = 5000}, +}; +/* All fan tables must have the same number of levels */ +#define NUM_FAN_LEVELS ARRAY_SIZE(fan_table0) +BUILD_ASSERT(ARRAY_SIZE(fan_table1) == NUM_FAN_LEVELS); +BUILD_ASSERT(ARRAY_SIZE(fan_table2) == NUM_FAN_LEVELS); + +static void cbi_init(void) +{ + uint32_t val; + if (cbi_get_board_version(&val) == EC_SUCCESS && val <= UINT16_MAX) + board_version = val; + CPRINTS("Board Version: 0x%04x", board_version); + + if (cbi_get_oem_id(&val) == EC_SUCCESS && val < OEM_COUNT) + oem = val; + CPRINTS("OEM: %d", oem); + + if (cbi_get_sku_id(&val) == EC_SUCCESS && val <= UINT8_MAX) + sku = val; + CPRINTS("SKU: 0x%02x", sku); +} +DECLARE_HOOK(HOOK_INIT, cbi_init, HOOK_PRIO_INIT_I2C + 1); + +static void setup_fan(void) +{ + /* Configure Fan */ + switch (oem) { + case OEM_KENCH: + case OEM_TEEMO: + case OEM_BLEEMO: + default: + fans[FAN_CH_0].rpm = &fan_rpm_1; + fan_table = fan_table0; + break; + case OEM_SION: + fans[FAN_CH_0].rpm = &fan_rpm_1; + fan_table = fan_table1; + break; + case OEM_WUKONG_N: + case OEM_WUKONG_A: + case OEM_WUKONG_M: + fans[FAN_CH_0].rpm = &fan_rpm_0; + fan_table = fan_table2; + break; + } +} + +/* List of BJ adapters shipped with Fizz or its variants */ +enum bj_adapter { + BJ_65W_19V, + BJ_90W_19V, + BJ_65W_19P5V, + BJ_90W_19P5V, +}; + +/* BJ adapter specs */ +static const struct charge_port_info bj_adapters[] = { + [BJ_65W_19V] = { .current = 3420, .voltage = 19000 }, + [BJ_90W_19V] = { .current = 4740, .voltage = 19000 }, + [BJ_65W_19P5V] = { .current = 3330, .voltage = 19500 }, + [BJ_90W_19P5V] = { .current = 4620, .voltage = 19500 }, +}; + +/* + * Bit masks to map SKU ID to BJ adapter wattage. 1:90W 0:65W + * KBL-R i7 8550U 4 90 + * KBL-R i5 8250U 5 90 + * KBL-R i3 8130U 6 90 + * KBL-U i7 7600 3 65 + * KBL-U i5 7500 2 65 + * KBL-U i3 7100 1 65 + * KBL-U Celeron 3965 7 65 + * KBL-U Celeron 3865 0 65 + */ +#define BJ_ADAPTER_90W_MASK (1 << 4 | 1 << 5 | 1 << 6) + +static void setup_bj(void) +{ + enum bj_adapter bj; + + switch (oem) { + case OEM_KENCH: + bj = (BJ_ADAPTER_90W_MASK & (1 << sku)) ? + BJ_90W_19P5V : BJ_65W_19P5V; + break; + case OEM_TEEMO: + case OEM_BLEEMO: + case OEM_SION: + case OEM_WUKONG_N: + case OEM_WUKONG_A: + case OEM_WUKONG_M: + bj = (BJ_ADAPTER_90W_MASK & (1 << sku)) ? + BJ_90W_19V : BJ_65W_19V; + break; + default: + bj = (BJ_ADAPTER_90W_MASK & (1 << sku)) ? + BJ_90W_19P5V : BJ_65W_19P5V; + break; + } + + charge_manager_update_charge(CHARGE_SUPPLIER_DEDICATED, + DEDICATED_CHARGE_PORT, &bj_adapters[bj]); +} + +/* + * Since fizz has no battery, it must source all of its power from either + * USB-C or the barrel jack (preferred). Fizz operates in continuous safe + * mode (charge_manager_leave_safe_mode() will never be called), which + * modifies port / ILIM selection as follows: + * + * - Dual-role / dedicated capability of the port partner is ignored. + * - Charge ceiling on PD voltage transition is ignored. + * - CHARGE_PORT_NONE will never be selected. + */ +static void board_charge_manager_init(void) +{ + enum charge_port port; + int i, j; + + /* Initialize all charge suppliers to 0 */ + for (i = 0; i < CHARGE_PORT_COUNT; i++) { + for (j = 0; j < CHARGE_SUPPLIER_COUNT; j++) + charge_manager_update_charge(j, i, NULL); + } + + port = gpio_get_level(GPIO_ADP_IN_L) ? + CHARGE_PORT_TYPEC0 : CHARGE_PORT_BARRELJACK; + CPRINTS("Power source is p%d (%s)", port, + port == CHARGE_PORT_TYPEC0 ? "USB-C" : "BJ"); + + /* Initialize the power source supplier */ + switch (port) { + case CHARGE_PORT_TYPEC0: + typec_set_input_current_limit(port, 3000, 5000); + break; + case CHARGE_PORT_BARRELJACK: + setup_bj(); + break; + } +} +DECLARE_HOOK(HOOK_INIT, board_charge_manager_init, + HOOK_PRIO_CHARGE_MANAGER_INIT + 1); + +static void board_init(void) +{ + setup_fan(); + + /* Provide AC status to the PCH */ + board_extpower(); + + gpio_enable_interrupt(GPIO_USB_C0_VBUS_WAKE_L); +} +DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); + +int fan_percent_to_rpm(int fan, int pct) +{ + static int current_level; + static int previous_pct; + int i; + + /* + * Compare the pct and previous pct, we have the three paths : + * 1. decreasing path. (check the off point) + * 2. increasing path. (check the on point) + * 3. invariant path. (return the current RPM) + */ + if (pct < previous_pct) { + for (i = current_level; i >= 0; i--) { + if (pct <= fan_table[i].off) + current_level = i - 1; + else + break; + } + } else if (pct > previous_pct) { + for (i = current_level + 1; i < NUM_FAN_LEVELS; i++) { + if (pct >= fan_table[i].on) + current_level = i; + else + break; + } + } + + if (current_level < 0) + current_level = 0; + + previous_pct = pct; + + if (fan_table[current_level].rpm != + fan_get_rpm_target(FAN_CH(fan))) + cprintf(CC_THERMAL, "[%T Setting fan RPM to %d]\n", + fan_table[current_level].rpm); + + return fan_table[current_level].rpm; +} + +void board_rtc_reset(void) +{ + CPRINTS("Asserting RTCRST# to PCH"); + gpio_set_level(GPIO_PCH_RTCRST, 1); + udelay(100); + gpio_set_level(GPIO_PCH_RTCRST, 0); +} diff --git a/baseboard/kalista/baseboard.h b/baseboard/kalista/baseboard.h new file mode 100644 index 0000000000..295538a3b9 --- /dev/null +++ b/baseboard/kalista/baseboard.h @@ -0,0 +1,274 @@ +/* Copyright 2018 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Kalista baseboard configuration */ + +#ifndef __CROS_EC_BASEBOARD_H +#define __CROS_EC_BASEBOARD_H + +/* + * Allow dangerous commands. + * TODO: Remove this config before production. + */ +#undef CONFIG_SYSTEM_UNLOCKED +#define CONFIG_USB_PD_COMM_LOCKED + +/* EC */ +#define CONFIG_ADC +#define CONFIG_BOARD_VERSION_CBI +#define CONFIG_BOARD_HAS_RTC_RESET +#define CONFIG_CRC8 +#define CONFIG_CEC +#define CONFIG_CROS_BOARD_INFO +#define CONFIG_DEDICATED_RECOVERY_BUTTON +#define CONFIG_EMULATED_SYSRQ +#define CONFIG_LED_COMMON +#define CONFIG_KEYBOARD_PROTOCOL_MKBP +#define CONFIG_MKBP_USE_HOST_EVENT +#define CONFIG_DPTF +#define CONFIG_FLASH_SIZE 0x80000 +#define CONFIG_FPU +#define CONFIG_I2C +#define CONFIG_I2C_MASTER +#undef CONFIG_LID_SWITCH +#define CONFIG_POWER_BUTTON_IGNORE_LID +#define CONFIG_PWM +#define CONFIG_LTO +#define CONFIG_CHIP_PANIC_BACKUP +#define CONFIG_SPI_FLASH_REGS +#define CONFIG_SPI_FLASH_W25X40 +#define CONFIG_WATCHDOG_HELP +#define CONFIG_WIRELESS +#define CONFIG_WIRELESS_SUSPEND \ + (EC_WIRELESS_SWITCH_WLAN | EC_WIRELESS_SWITCH_WLAN_POWER) +#define WIRELESS_GPIO_WLAN GPIO_WLAN_OFF_L +#define WIRELESS_GPIO_WLAN_POWER GPIO_PP3300_DX_WLAN +#define WIRELESS_GPIO_WWAN GPIO_PP3300_DX_LTE +#define CEC_GPIO_OUT GPIO_CEC_OUT +#define CEC_GPIO_IN GPIO_CEC_IN +#define CEC_GPIO_PULL_UP GPIO_CEC_PULL_UP +#define CONFIG_FANS 1 +#define CONFIG_FAN_RPM_CUSTOM +#define CONFIG_THROTTLE_AP +#define CONFIG_CHIPSET_CAN_THROTTLE +#define CONFIG_PWM +#define CONFIG_SUPPRESSED_HOST_COMMANDS \ + EC_CMD_CONSOLE_SNAPSHOT, EC_CMD_CONSOLE_READ, EC_CMD_PD_GET_LOG_ENTRY + +/* EC console commands */ +#define CONFIG_CMD_BUTTON + +/* SOC */ +#define CONFIG_CHIPSET_SKYLAKE +#define CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET +#define CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK +#define CONFIG_CHIPSET_RESET_HOOK +#define CONFIG_HOSTCMD_ESPI +/* + * Eve and Poppy all have wires from GPIO to PCH but + * CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS is defined. So, those GPIOs are not used + * by EC. + */ +#define CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS + +/* Charger */ +#define CONFIG_CHARGE_MANAGER + +#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 50000 + +#define CONFIG_CMD_PD_CONTROL +#define CONFIG_EXTPOWER_GPIO +#undef CONFIG_EXTPOWER_DEBOUNCE_MS +#define CONFIG_EXTPOWER_DEBOUNCE_MS 1000 +#define CONFIG_POWER_BUTTON +#define CONFIG_POWER_BUTTON_X86 +#define CONFIG_POWER_BUTTON_INIT_IDLE +#define CONFIG_POWER_COMMON +#define CONFIG_POWER_SIGNAL_INTERRUPT_STORM_DETECT_THRESHOLD 30 +#define CONFIG_DELAY_DSW_PWROK_TO_PWRBTN + +/* Sensor */ +#define CONFIG_TEMP_SENSOR +#define CONFIG_TEMP_SENSOR_TMP432 + +/* USB */ +#undef CONFIG_USB_CHARGER /* dnojiri: verify */ +#define CONFIG_USB_PD_ALT_MODE +#define CONFIG_USB_PD_ALT_MODE_DFP +#define CONFIG_USB_PD_DISCHARGE_TCPC +#define CONFIG_USB_PD_DUAL_ROLE +#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE +#define CONFIG_USB_PD_LOGGING +#define CONFIG_USB_PD_PORT_COUNT 1 +#define CONFIG_USB_PD_VBUS_DETECT_GPIO +#define CONFIG_USB_PD_TCPC_LOW_POWER +#define CONFIG_USB_PD_TCPM_MUX +#define CONFIG_USB_PD_TCPM_TCPCI +#define CONFIG_USB_PD_TCPM_PS8751 +#define CONFIG_USB_PD_TRY_SRC +#define CONFIG_USB_POWER_DELIVERY +#define CONFIG_USBC_SS_MUX +#define CONFIG_USBC_SS_MUX_DFP_ONLY +#define CONFIG_USBC_VCONN +#define CONFIG_USBC_VCONN_SWAP + +/* Charge ports */ +#undef CONFIG_DEDICATED_CHARGE_PORT_COUNT +#define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1 +#define DEDICATED_CHARGE_PORT 1 + +/* USB-A config */ +#define CONFIG_USB_PORT_POWER_DUMB +#define USB_PORT_COUNT 5 + +/* Optional feature to configure npcx chip */ +#define NPCX_UART_MODULE2 1 /* 1:GPIO64/65 as UART */ +#define NPCX_JTAG_MODULE2 0 /* 0:GPIO21/17/16/20 as JTAG */ +#define NPCX_TACH_SEL2 1 /* 0:GPIO40/73 1:GPIO93/A6 as TACH */ + +/* I2C ports */ +#define I2C_PORT_TCPC0 NPCX_I2C_PORT0_0 +#define I2C_PORT_EEPROM NPCX_I2C_PORT0_1 +#define I2C_PORT_BATTERY NPCX_I2C_PORT1 +#define I2C_PORT_CHARGER NPCX_I2C_PORT1 +#define I2C_PORT_PMIC NPCX_I2C_PORT2 +#define I2C_PORT_THERMAL NPCX_I2C_PORT3 + +/* I2C addresses */ +#define I2C_ADDR_TCPC0 0x16 +#define I2C_ADDR_EEPROM 0xa0 + +/* Verify and jump to RW image on boot */ +#define CONFIG_VBOOT_EFS +#define CONFIG_VBOOT_HASH +#define CONFIG_VSTORE +#define CONFIG_VSTORE_SLOT_COUNT 1 + +/* + * Flash layout. Since config_flash_layout.h is included before board.h, + * we can only overwrite (=undef/define) these parameters here. + * + * Flash stores 3 images: RO, RW_A, RW_B. We divide the flash by 4. + * A public key is stored at the end of RO. Signatures are stored at the + * end of RW_A and RW_B, respectively. + */ +#define CONFIG_RW_B +#define CONFIG_RW_B_MEM_OFF CONFIG_RO_MEM_OFF +#undef CONFIG_RO_SIZE +#define CONFIG_RO_SIZE (CONFIG_FLASH_SIZE / 4) +#undef CONFIG_RW_SIZE +#define CONFIG_RW_SIZE CONFIG_RO_SIZE +#define CONFIG_RW_A_STORAGE_OFF CONFIG_RW_STORAGE_OFF +#define CONFIG_RW_B_STORAGE_OFF (CONFIG_RW_A_STORAGE_OFF + \ + CONFIG_RW_SIZE) +#define CONFIG_RW_A_SIGN_STORAGE_OFF (CONFIG_RW_A_STORAGE_OFF + \ + CONFIG_RW_SIZE - CONFIG_RW_SIG_SIZE) +#define CONFIG_RW_B_SIGN_STORAGE_OFF (CONFIG_RW_B_STORAGE_OFF + \ + CONFIG_RW_SIZE - CONFIG_RW_SIG_SIZE) + +#define CONFIG_RWSIG +#define CONFIG_RWSIG_TYPE_RWSIG +#define CONFIG_RSA +#ifdef SECTION_IS_RO +#define CONFIG_RSA_OPTIMIZED +#endif +#define CONFIG_SHA256 +#ifdef SECTION_IS_RO +#define CONFIG_SHA256_UNROLLED +#endif +#define CONFIG_RSA_KEY_SIZE 3072 +#define CONFIG_RSA_EXPONENT_3 + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" +#include "registers.h" + +enum charge_port { + CHARGE_PORT_TYPEC0, + CHARGE_PORT_BARRELJACK, +}; + +enum power_signal { + X86_SLP_S0_DEASSERTED, + X86_SLP_S3_DEASSERTED, + X86_SLP_S4_DEASSERTED, + X86_SLP_SUS_DEASSERTED, + X86_RSMRST_L_PGOOD, + X86_PMIC_DPWROK, + POWER_SIGNAL_COUNT +}; + +enum temp_sensor_id { + TEMP_SENSOR_CHARGER, /* BD99992GW SYSTHERM1 */ + TEMP_SENSOR_DRAM, /* BD99992GW SYSTHERM2 */ + TEMP_SENSOR_COUNT +}; + +enum adc_channel { + ADC_VBUS, + ADC_CH_COUNT +}; + +enum pwm_channel { + PWM_CH_LED_RED, + PWM_CH_LED_GREEN, + PWM_CH_FAN, + /* Number of PWM channels */ + PWM_CH_COUNT +}; + +enum fan_channel { + FAN_CH_0, + /* Number of FAN channels */ + FAN_CH_COUNT +}; + +enum mft_channel { + MFT_CH_0, + /* Number of MFT channels */ + MFT_CH_COUNT +}; + +enum OEM_ID { + OEM_KENCH = 0, + OEM_TEEMO = 1, + OEM_SION = 2, + OEM_WUKONG_N = 3, + OEM_WUKONG_A = 4, + OEM_WUKONG_M = 5, + OEM_BLEEMO = 6, + /* Number of OEM IDs */ + OEM_COUNT +}; + +/* TODO(crosbug.com/p/61098): Verify the numbers below. */ +/* + * delay to turn on the power supply max is ~16ms. + * delay to turn off the power supply max is about ~180ms. + */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ + +/* delay to turn on/off vconn */ +#define PD_VCONN_SWAP_DELAY 5000 /* us */ + +/* Define typical operating power. Since Fizz doesn't have a battery to charge, + * we're not interested in any power lower than the AP power-on threshold. */ +#define PD_OPERATING_POWER_MW CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON +#define PD_MAX_POWER_MW 100000 +#define PD_MAX_CURRENT_MA 5000 +#define PD_MAX_VOLTAGE_MV 20000 + +/* Board specific handlers */ +void board_reset_pd_mcu(void); +void board_set_tcpc_power_mode(int port, int mode); +int board_get_battery_soc(void); +void led_alert(int enable); +void led_critical(void); + +#endif /* !__ASSEMBLER__ */ + +#endif /* __CROS_EC_BASEBOARD_H */ diff --git a/baseboard/kalista/build.mk b/baseboard/kalista/build.mk new file mode 100644 index 0000000000..e64b6a2d71 --- /dev/null +++ b/baseboard/kalista/build.mk @@ -0,0 +1,11 @@ +# -*- makefile -*- +# Copyright 2018 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Baseboard specific files build +# + +baseboard-y=baseboard.o +baseboard-y+=led.o +baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o \ No newline at end of file diff --git a/baseboard/kalista/led.c b/baseboard/kalista/led.c new file mode 100644 index 0000000000..62668cb695 --- /dev/null +++ b/baseboard/kalista/led.c @@ -0,0 +1,232 @@ +/* Copyright 2018 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Power and battery LED control for Kalista + */ + +#include "chipset.h" +#include "console.h" +#include "ec_commands.h" +#include "gpio.h" +#include "hooks.h" +#include "led_common.h" +#include "pwm.h" +#include "timer.h" +#include "util.h" + +const enum ec_led_id supported_led_ids[] = {EC_LED_ID_POWER_LED}; +const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); + +enum led_color { + LED_OFF = 0, + LED_RED, + LED_GREEN, + LED_AMBER, + + /* Number of colors, not a color itself */ + LED_COLOR_COUNT +}; + +static int set_color_power(enum led_color color, int duty) +{ + int green = 0; + int red = 0; + + if (duty < 0 || 100 < duty) + return EC_ERROR_UNKNOWN; + + switch (color) { + case LED_OFF: + break; + case LED_GREEN: + green = 1; + break; + case LED_RED: + red = 1; + break; + case LED_AMBER: + green = 1; + red = 1; + break; + default: + return EC_ERROR_UNKNOWN; + } + + if (red) + pwm_set_duty(PWM_CH_LED_RED, duty); + else + pwm_set_duty(PWM_CH_LED_RED, 0); + + if (green) + pwm_set_duty(PWM_CH_LED_GREEN, duty); + else + pwm_set_duty(PWM_CH_LED_GREEN, 0); + + return EC_SUCCESS; +} + +static int set_color(enum ec_led_id id, enum led_color color, int duty) +{ + switch (id) { + case EC_LED_ID_POWER_LED: + return set_color_power(color, duty); + default: + return EC_ERROR_UNKNOWN; + } +} + +#define LED_PULSE_US (2 * SECOND) +/* 40 msec for nice and smooth transition. */ +#define LED_PULSE_TICK_US (40 * MSEC) + +/* When pulsing is enabled, brightness is incremented by every + * usec from 0 to 100% in LED_PULSE_US usec. Then it's decremented + * likewise in LED_PULSE_US usec. */ +static struct { + uint32_t interval; + int duty_inc; + enum led_color color; + int duty; +} led_pulse; + +#define CONFIG_TICK(interval, color) \ + config_tick((interval), 100 / (LED_PULSE_US / (interval)), (color)) + +static void config_tick(uint32_t interval, int duty_inc, enum led_color color) +{ + led_pulse.interval = interval; + led_pulse.duty_inc = duty_inc; + led_pulse.color = color; + led_pulse.duty = 0; +} + +static void pulse_power_led(enum led_color color) +{ + set_color(EC_LED_ID_POWER_LED, color, led_pulse.duty); + if (led_pulse.duty + led_pulse.duty_inc > 100) + led_pulse.duty_inc = led_pulse.duty_inc * -1; + else if (led_pulse.duty + led_pulse.duty_inc < 0) + led_pulse.duty_inc = led_pulse.duty_inc * -1; + led_pulse.duty += led_pulse.duty_inc; +} + +static void led_tick(void); +DECLARE_DEFERRED(led_tick); +static void led_tick(void) +{ + uint32_t elapsed; + uint32_t next = 0; + uint32_t start = get_time().le.lo; + static uint8_t pwm_enabled = 0; + + if (!pwm_enabled) { + pwm_enable(PWM_CH_LED_RED, 1); + pwm_enable(PWM_CH_LED_GREEN, 1); + pwm_enabled = 1; + } + if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED)) + pulse_power_led(led_pulse.color); + elapsed = get_time().le.lo - start; + next = led_pulse.interval > elapsed ? led_pulse.interval - elapsed : 0; + hook_call_deferred(&led_tick_data, next); +} + +static void led_suspend(void) +{ + CONFIG_TICK(LED_PULSE_TICK_US, LED_GREEN); + led_tick(); +} +DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, led_suspend, HOOK_PRIO_DEFAULT); + +static void led_shutdown(void) +{ + hook_call_deferred(&led_tick_data, -1); + if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED)) + set_color(EC_LED_ID_POWER_LED, LED_OFF, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, led_shutdown, HOOK_PRIO_DEFAULT); + +static void led_resume(void) +{ + /* Assume there is no race condition with led_tick, which also + * runs in hook_task. */ + hook_call_deferred(&led_tick_data, -1); + if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED)) + set_color(EC_LED_ID_POWER_LED, LED_GREEN, 100); +} +DECLARE_HOOK(HOOK_CHIPSET_RESUME, led_resume, HOOK_PRIO_DEFAULT); + +void led_alert(int enable) +{ + if (enable) { + /* Overwrite the current signal */ + config_tick(1 * SECOND, 100, LED_RED); + led_tick(); + } else { + /* Restore the previous signal */ + if (chipset_in_state(CHIPSET_STATE_ON)) + led_resume(); + else if (chipset_in_state(CHIPSET_STATE_SUSPEND)) + led_suspend(); + else if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) + led_shutdown(); + } +} + +void led_critical(void) +{ + hook_call_deferred(&led_tick_data, -1); + if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED)) + set_color(EC_LED_ID_POWER_LED, LED_RED, 100); +} + +static int command_led(int argc, char **argv) +{ + enum ec_led_id id = EC_LED_ID_POWER_LED; + + if (argc < 2) + return EC_ERROR_PARAM_COUNT; + + if (!strcasecmp(argv[1], "debug")) { + led_auto_control(id, !led_auto_control_is_enabled(id)); + ccprintf("o%s\n", led_auto_control_is_enabled(id) ? "ff" : "n"); + } else if (!strcasecmp(argv[1], "off")) { + set_color(id, LED_OFF, 0); + } else if (!strcasecmp(argv[1], "red")) { + set_color(id, LED_RED, 100); + } else if (!strcasecmp(argv[1], "green")) { + set_color(id, LED_GREEN, 100); + } else if (!strcasecmp(argv[1], "amber")) { + set_color(id, LED_AMBER, 100); + } else if (!strcasecmp(argv[1], "alert")) { + led_alert(1); + } else if (!strcasecmp(argv[1], "crit")) { + led_critical(); + } else { + return EC_ERROR_PARAM1; + } + return EC_SUCCESS; +} +DECLARE_CONSOLE_COMMAND(led, command_led, + "[debug|red|green|amber|off|alert|crit]", + "Turn on/off LED."); + +void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) +{ + brightness_range[EC_LED_COLOR_RED] = 100; + brightness_range[EC_LED_COLOR_GREEN] = 100; + brightness_range[EC_LED_COLOR_AMBER] = 100; +} + +int led_set_brightness(enum ec_led_id id, const uint8_t *brightness) +{ + if (brightness[EC_LED_COLOR_RED]) + return set_color(id, LED_RED, brightness[EC_LED_COLOR_RED]); + else if (brightness[EC_LED_COLOR_GREEN]) + return set_color(id, LED_GREEN, brightness[EC_LED_COLOR_GREEN]); + else if (brightness[EC_LED_COLOR_AMBER]) + return set_color(id, LED_AMBER, brightness[EC_LED_COLOR_AMBER]); + else + return set_color(id, LED_OFF, 0); +} diff --git a/baseboard/kalista/usb_pd_policy.c b/baseboard/kalista/usb_pd_policy.c new file mode 100644 index 0000000000..bac29cfa52 --- /dev/null +++ b/baseboard/kalista/usb_pd_policy.c @@ -0,0 +1,419 @@ +/* Copyright 2017 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "atomic.h" +#include "extpower.h" +#include "charge_manager.h" +#include "common.h" +#include "console.h" +#include "driver/tcpm/anx74xx.h" +#include "driver/tcpm/ps8xxx.h" +#include "gpio.h" +#include "hooks.h" +#include "host_command.h" +#include "registers.h" +#include "system.h" +#include "task.h" +#include "timer.h" +#include "util.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usb_pd_tcpm.h" + +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) + +#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\ + PDO_FIXED_COMM_CAP) + +const uint32_t pd_src_pdo[] = { + PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); + +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), + PDO_BATT(4750, 21000, 50000), + PDO_VAR(4750, 21000, 3000), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); + +int pd_is_valid_input_voltage(int mv) +{ + return 1; +} + +void pd_transition_voltage(int idx) +{ + /* No-operation: we are always 5V */ +} + +int board_vbus_source_enabled(int port) +{ + if (port != 0) + return 0; + return gpio_get_level(GPIO_USB_C0_5V_EN); +} + +int pd_set_power_supply_ready(int port) +{ + /* Disable charging */ + gpio_set_level(GPIO_USB_C0_CHARGE_L, 1); + + /* Enable VBUS source */ + gpio_set_level(GPIO_USB_C0_5V_EN, 1); + + /* notify host of power info change */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; /* we are ready */ +} + +void pd_power_supply_reset(int port) +{ + /* Disable VBUS source */ + gpio_set_level(GPIO_USB_C0_5V_EN, 0); + + /* notify host of power info change */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +int pd_snk_is_vbus_provided(int port) +{ + return !gpio_get_level(GPIO_USB_C0_VBUS_WAKE_L); +} + +int pd_board_checks(void) +{ + return EC_SUCCESS; +} + +int pd_check_power_swap(int port) +{ + /* If type-c port is supplying power, we never swap PR (to source) */ + if (port == charge_manager_get_active_charge_port()) + return 0; + /* + * Allow power swap as long as we are acting as a dual role device, + * otherwise assume our role is fixed (not in S0 or console command + * to fix our role). + */ + return pd_get_dual_role(port) == PD_DRP_TOGGLE_ON ? 1 : 0; +} + +int pd_check_data_swap(int port, int data_role) +{ + /* Allow data swap if we are a UFP, otherwise don't allow */ + return (data_role == PD_ROLE_UFP) ? 1 : 0; +} + +int pd_check_vconn_swap(int port) +{ + /* in G3, do not allow vconn swap since pp5000_A rail is off */ + return gpio_get_level(GPIO_PMIC_SLP_SUS_L); +} + +void pd_execute_data_swap(int port, int data_role) +{ + /* Do nothing */ +} + +void pd_check_pr_role(int port, int pr_role, int flags) +{ + /* + * If partner is dual-role power and dualrole toggling is on, consider + * if a power swap is necessary. + */ + if ((flags & PD_FLAGS_PARTNER_DR_POWER) && + pd_get_dual_role(port) == PD_DRP_TOGGLE_ON) { + /* + * If we are a sink and partner is not externally powered, then + * swap to become a source. If we are source and partner is + * externally powered, swap to become a sink. + */ + int partner_extpower = flags & PD_FLAGS_PARTNER_EXTPOWER; + + if ((!partner_extpower && pr_role == PD_ROLE_SINK) || + (partner_extpower && pr_role == PD_ROLE_SOURCE)) + pd_request_power_swap(port); + } +} + +void pd_check_dr_role(int port, int dr_role, int flags) +{ + /* If UFP, try to switch to DFP */ + if ((flags & PD_FLAGS_PARTNER_DR_DATA) && dr_role == PD_ROLE_UFP) + pd_request_data_swap(port); +} +/* ----------------- Vendor Defined Messages ------------------ */ +const struct svdm_response svdm_rsp = { + .identity = NULL, + .svids = NULL, + .modes = NULL, +}; + +int pd_custom_vdm(int port, int cnt, uint32_t *payload, + uint32_t **rpayload) +{ + int cmd = PD_VDO_CMD(payload[0]); + uint16_t dev_id = 0; + int is_rw, is_latest; + + /* make sure we have some payload */ + if (cnt == 0) + return 0; + + switch (cmd) { + case VDO_CMD_VERSION: + /* guarantee last byte of payload is null character */ + *(payload + cnt - 1) = 0; + CPRINTF("version: %s\n", (char *)(payload+1)); + break; + case VDO_CMD_READ_INFO: + case VDO_CMD_SEND_INFO: + /* copy hash */ + if (cnt == 7) { + dev_id = VDO_INFO_HW_DEV_ID(payload[6]); + is_rw = VDO_INFO_IS_RW(payload[6]); + + is_latest = pd_dev_store_rw_hash(port, + dev_id, + payload + 1, + is_rw ? + SYSTEM_IMAGE_RW : + SYSTEM_IMAGE_RO); + /* + * Send update host event unless our RW hash is + * already known to be the latest update RW. + */ + if (!is_rw || !is_latest) + pd_send_host_event(PD_EVENT_UPDATE_DEVICE); + + CPRINTF("DevId:%d.%d SW:%d RW:%d\n", + HW_DEV_ID_MAJ(dev_id), + HW_DEV_ID_MIN(dev_id), + VDO_INFO_SW_DBG_VER(payload[6]), + is_rw); + } else if (cnt == 6) { + /* really old devices don't have last byte */ + pd_dev_store_rw_hash(port, dev_id, payload + 1, + SYSTEM_IMAGE_UNKNOWN); + } + break; + case VDO_CMD_CURRENT: + CPRINTF("Current: %dmA\n", payload[1]); + break; + case VDO_CMD_FLIP: + usb_mux_flip(port); + break; +#ifdef CONFIG_USB_PD_LOGGING + case VDO_CMD_GET_LOG: + pd_log_recv_vdm(port, cnt, payload); + break; +#endif /* CONFIG_USB_PD_LOGGING */ + } + + return 0; +} + +int board_set_active_charge_port(int port) +{ + const int active_port = charge_manager_get_active_charge_port(); + + if (port < 0 || CHARGE_PORT_COUNT <= port) + return EC_ERROR_INVAL; + + if (port == active_port) + return EC_SUCCESS; + + /* Don't charge from a source port */ + if (board_vbus_source_enabled(port)) + return EC_ERROR_INVAL; + + CPRINTS("New charger p%d", port); + + switch (port) { + case CHARGE_PORT_TYPEC0: + /* This is connected to TP on board version 2.2+ thus no-op */ + gpio_set_level(GPIO_USB_C0_CHARGE_L, 0); + gpio_set_level(GPIO_AC_JACK_CHARGE_L, 1); + gpio_enable_interrupt(GPIO_ADP_IN_L); + break; + case CHARGE_PORT_BARRELJACK: + /* Make sure BJ adapter is sourcing power */ + if (gpio_get_level(GPIO_ADP_IN_L)) + return EC_ERROR_INVAL; + /* This will cause brown out when switching from type-c on + * board version 2.2+ thus the rest of the code is no-op. */ + gpio_set_level(GPIO_AC_JACK_CHARGE_L, 0); + /* If type-c voltage > BJ voltage, we'll brown out due to the + * reverse current protection of PU3 but it's intended. */ + gpio_set_level(GPIO_USB_C0_CHARGE_L, 1); + gpio_disable_interrupt(GPIO_ADP_IN_L); + break; + default: + return EC_ERROR_INVAL; + } + + return EC_SUCCESS; +} + +int board_get_battery_soc(void) +{ + return 100; +} + +#ifdef CONFIG_USB_PD_ALT_MODE_DFP +static int dp_flags[CONFIG_USB_PD_PORT_COUNT]; +static uint32_t dp_status[CONFIG_USB_PD_PORT_COUNT]; + +static void svdm_safe_dp_mode(int port) +{ + /* make DP interface safe until configure */ + dp_flags[port] = 0; + dp_status[port] = 0; + usb_mux_set(port, TYPEC_MUX_NONE, + USB_SWITCH_CONNECT, pd_get_polarity(port)); +} + +static int svdm_enter_dp_mode(int port, uint32_t mode_caps) +{ + /* Only enter mode if device is DFP_D capable */ + if (mode_caps & MODE_DP_SNK) { + pd_log_event(PD_EVENT_VIDEO_DP_MODE, + PD_LOG_PORT_SIZE(port, 0), 1, NULL); + svdm_safe_dp_mode(port); + return 0; + } + + return -1; +} + +static int svdm_dp_status(int port, uint32_t *payload) +{ + int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT); + + payload[0] = VDO(USB_SID_DISPLAYPORT, 1, + CMD_DP_STATUS | VDO_OPOS(opos)); + payload[1] = VDO_DP_STATUS(0, /* HPD IRQ ... not applicable */ + 0, /* HPD level ... not applicable */ + 0, /* exit DP? ... no */ + 0, /* usb mode? ... no */ + 0, /* multi-function ... no */ + (!!(dp_flags[port] & DP_FLAGS_DP_ON)), + 0, /* power low? ... no */ + (!!(dp_flags[port] & DP_FLAGS_DP_ON))); + return 2; +}; + +static int svdm_dp_config(int port, uint32_t *payload) +{ + int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT); + int mf_pref = PD_VDO_DPSTS_MF_PREF(dp_status[port]); + int pin_mode = pd_dfp_dp_get_pin_mode(port, dp_status[port]); + + if (!pin_mode) + return 0; + + usb_mux_set(port, mf_pref ? TYPEC_MUX_DOCK : TYPEC_MUX_DP, + USB_SWITCH_CONNECT, pd_get_polarity(port)); + + payload[0] = VDO(USB_SID_DISPLAYPORT, 1, + CMD_DP_CONFIG | VDO_OPOS(opos)); + payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */ + 1, /* DPv1.3 signaling */ + 2); /* UFP connected */ + return 2; +}; + +static void svdm_dp_post_config(int port) +{ + const struct usb_mux *mux = &usb_muxes[port]; + + dp_flags[port] |= DP_FLAGS_DP_ON; + if (!(dp_flags[port] & DP_FLAGS_HPD_HI_PENDING)) + return; + mux->hpd_update(port, 1, 0); +} + +static int svdm_dp_attention(int port, uint32_t *payload) +{ + int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]); + int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]); + const struct usb_mux *mux = &usb_muxes[port]; + + dp_status[port] = payload[1]; + if (!(dp_flags[port] & DP_FLAGS_DP_ON)) { + if (lvl) + dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING; + return 1; + } + mux->hpd_update(port, lvl, irq); + + /* ack */ + return 1; +} + +static void svdm_exit_dp_mode(int port) +{ + const struct usb_mux *mux = &usb_muxes[port]; + + pd_log_event(PD_EVENT_VIDEO_DP_MODE, + PD_LOG_PORT_SIZE(port, 0), 0, NULL); + svdm_safe_dp_mode(port); + mux->hpd_update(port, 0, 0); +} + +static int svdm_enter_gfu_mode(int port, uint32_t mode_caps) +{ + /* Always enter GFU mode */ + return 0; +} + +static void svdm_exit_gfu_mode(int port) +{ +} + +static int svdm_gfu_status(int port, uint32_t *payload) +{ + /* + * This is called after enter mode is successful, send unstructured + * VDM to read info. + */ + pd_send_vdm(port, USB_VID_GOOGLE, VDO_CMD_READ_INFO, NULL, 0); + return 0; +} + +static int svdm_gfu_config(int port, uint32_t *payload) +{ + return 0; +} + +static int svdm_gfu_attention(int port, uint32_t *payload) +{ + return 0; +} + +const struct svdm_amode_fx supported_modes[] = { + { + .svid = USB_SID_DISPLAYPORT, + .enter = &svdm_enter_dp_mode, + .status = &svdm_dp_status, + .config = &svdm_dp_config, + .post_config = &svdm_dp_post_config, + .attention = &svdm_dp_attention, + .exit = &svdm_exit_dp_mode, + }, + { + .svid = USB_VID_GOOGLE, + .enter = &svdm_enter_gfu_mode, + .status = &svdm_gfu_status, + .config = &svdm_gfu_config, + .attention = &svdm_gfu_attention, + .exit = &svdm_exit_gfu_mode, + } +}; +const int supported_modes_cnt = ARRAY_SIZE(supported_modes); +#endif /* CONFIG_USB_PD_ALT_MODE_DFP */ -- cgit v1.2.1